Preparation method of semiconductor structure

Abstract

The invention provides a preparation method of a semiconductor structure. The preparation method comprises the following steps: forming the first electrode on the first surface of the first substrate; forming a first structure layer comprising a first main body layer and a first convex column positioned on one side of the first main body layer; and bonding the first substrate with the first structure layer. The first main body layer is processed to form a patterned second main body layer and a second convex column, the second main body layer comprises a quality structure, and the orthographic projection of the quality structure on the first surface is at least partially overlapped with the orthographic projection of the first electrode on the first surface. And forming a second electrode on the second surface of the second substrate, wherein the difference between the height of the second convex column and the thickness of the second electrode is equal to the difference between the height of the first convex column and the thickness of the first electrode. And bonding the second substrate with the second structure layer, so that the second convex columns are in contact with the second surface, the heights of the second convex columns are kept unchanged, and the orthographic projection of the second electrode on the first surface coincides with the orthographic projection of the first electrode on the first surface.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for preparing a semiconductor structure. Background Art

[0002] A MEMS (Micro-Electro-Mechanical Systems) chip is a semiconductor device that integrates a micromechanical structure and a microelectronic circuit. It can improve its ability to detect tiny signals by setting double-sided electrodes.

[0003] The existing MEMS chips cannot ensure the capacitance symmetry of double-sided electrodes during vacuum packaging, which has a negative impact on the measurement performance and reliability of the MEMS chips. Summary of the invention

[0004] The present application provides a method for preparing a semiconductor structure. The preparation method comprises:

[0005] forming a first electrode on a first surface of the first substrate;

[0006] forming a first structural layer; the first structural layer comprises a first main body layer and a first convex column located on one side of the first main body layer;

[0007] Bonding the first substrate to the first structural layer so that the first convex pillar contacts the first surface and the height of the first convex pillar remains unchanged;

[0008] The first main body layer is processed to form a patterned second main body layer and a second convex pillar located on a side of the second main body layer away from the first convex pillar, so as to obtain a second structural layer including the second main body layer, the second convex pillar and the first convex pillar; the second main body layer includes a mass structure; the orthographic projection of the mass structure on the first surface at least partially overlaps with the orthographic projection of the first electrode on the first surface;

[0009] forming a second electrode on the second surface of the second substrate; the difference between the height of the second convex column and the thickness of the second electrode is equal to the difference between the height of the first convex column and the thickness of the first electrode;

[0010] The second substrate is bonded to the second structural layer so that the second convex column contacts the second surface and the height of the second convex column remains unchanged; the orthographic projection of the second electrode on the first surface coincides with the orthographic projection of the first electrode on the first surface.

[0011] In one embodiment, bonding the first substrate to the first structural layer comprises:

[0012] The first protrusion is bonded to the first substrate by using an anodic bonding process.

[0013] In one embodiment, in the step of processing the first main body layer, a third convex column is further formed on a side of the second main body layer away from the first convex column, and the second structural layer includes the third convex column; the height of the third convex column is less than the height of the second convex column;

[0014] Before bonding the second substrate to the second structural layer, the preparation method further comprises: forming a first bonding structure on a side of the third convex pillar away from the first convex pillar; forming a second bonding structure on one side of the second substrate, wherein the second bonding structure and the second electrode are located on the same side of the second surface;

[0015] The bonding the second substrate to the second structural layer includes: bonding the first bonding structure to the second bonding structure to bond the second substrate to the second structural layer.

[0016] In one embodiment, before bonding the second substrate to the second structural layer, the sum of the thickness of the first bonding structure, the thickness of the portion of the second bonding structure in contact with the second substrate, and the thickness of the third convex column is greater than the thickness of the second convex column; during bonding the second substrate to the second structural layer, the first bonding structure and the second bonding structure melt, and the sum of their thicknesses decreases, so that the second convex column contacts the second surface.

[0017] In one embodiment, the second convex column includes a first sub-convex column and a second sub-convex column located on a side of the first sub-convex column away from the second main body layer; the first sub-convex column has the same height as the third convex column and is formed synchronously.

[0018] In one embodiment, the processing of the first main layer includes:

[0019] Etching a surface of the first main body layer away from the first convex pillar to obtain a third main body layer and a second sub-convex pillar located on a side of the third main body layer away from the first convex pillar;

[0020] The surface of the third main body layer facing the second sub-bulge is etched to obtain the second main body layer and the first sub-bulge and the third bulge located between the second main body layer and the second sub-bulge.

[0021] In one embodiment, before bonding the second substrate to the second structural layer, the preparation method further comprises: forming a first bonding structure on a surface of the second main layer away from the first convex pillar, the first bonding structure being in direct contact with the second main layer; forming a second bonding structure on one side of the second substrate, the second bonding structure and the second electrode being located on the same side of the second surface;

[0022] The bonding the second substrate to the second structural layer includes: bonding the first bonding structure to the second bonding structure to bond the second substrate to the second structural layer.

[0023] In one embodiment, before bonding the second substrate to the second structure layer, the method for preparing the semiconductor structure further includes: forming a first conductive line on the second surface of the second substrate;

[0024] The material of the second structural layer is semiconductor material; the second bonding structure covers a partial area of ​​the first wire; the second main layer includes a connecting portion connected to the third protrusion, and the second structural layer also includes a fourth protrusion connected to the connecting portion; the fourth protrusion and the first protrusion are located on the same side of the second main layer and are in contact with the first electrode.

[0025] In one embodiment, the material of the second structural layer is a semiconductor material; the second structural layer further comprises a fifth convex pillar located on a side of the second main layer away from the first convex pillar, the fifth convex pillar is annular and surrounds the second convex pillar; before bonding the second substrate to the second structural layer, the preparation method further comprises:

[0026] A first wire and a second wire are formed on the second surface of the second substrate; the second wire is electrically connected to the second electrode;

[0027] forming an insulating layer, wherein the insulating layer covers a partial area of ​​the first conductive line and a partial area of ​​the second conductive line;

[0028] forming a third bonding structure located on a surface of the fifth protrusion away from the first protrusion and a fourth bonding structure located on a surface of the insulating layer away from the second substrate;

[0029] The bonding of the second substrate to the second structural layer includes: bonding the third bonding structure to the fourth bonding structure; after the bonding of the second substrate to the second structural layer, the first wire is electrically connected to the first electrode.

[0030] In one embodiment, the first structural layer further includes a sixth convex column, the sixth convex column and the first convex column are located on the same side of the first main body layer; the sixth convex column is annular and surrounds the first convex column;

[0031] The bonding the first substrate to the first structural layer comprises:

[0032] The first convex column and the sixth convex column are respectively bonded to the first substrate by using an anodic bonding process.

[0033] The method for preparing the semiconductor structure provided in the embodiment of the present application can ensure that the distance between the surface of the mass structure facing the first electrode and the first electrode is equal to the distance between the surface of the mass structure facing the second electrode and the second electrode, thereby achieving that the capacitance formed between the mass structure and the first electrode is equal to the capacitance formed between the second electrode, so that the semiconductor structure can more accurately detect slight changes in the signal, which is beneficial to improving the sensitivity and accuracy of semiconductor structure detection.

[0034] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0036] Figure 1 A schematic diagram of a process for preparing a semiconductor structure provided in one embodiment of the present application;

[0037] Figures 2 to 25 A schematic diagram of a structure obtained during the preparation process of a semiconductor structure provided in one embodiment of the present application. DETAILED DESCRIPTION

[0038] Here, the technical solutions in the embodiments (or "implementations") of the present application will be described clearly and completely in conjunction with the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.

[0039] If there are terms involving directional indications or positional relationships in the embodiments of the present application (such as up, down, left, right, front, back, inside, outside, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings); if the specific posture changes, the directional indication or positional relationship will also change accordingly. In addition, the terms "first", "second", etc. involved in the embodiments of the present application are only used for the purpose of convenience of description and cannot be understood as indicating or implying relative importance.

[0040] The following is a detailed description of the method for preparing the semiconductor structure of the embodiment of the present application in conjunction with the accompanying drawings. In the absence of conflict, the features of the following embodiments and implementations may complement or be combined with each other.

[0041] The present application provides a method for preparing a semiconductor structure. Figure 1 As shown, the method for preparing the semiconductor structure includes:

[0042] Step S100: forming a first electrode on a first surface of a first substrate.

[0043] Step S200: forming a first structural layer, wherein the first structural layer includes a first main body layer and a first convex column located at one side of the first main body layer.

[0044] Step S300: bonding the first substrate to the first structural layer so that the first convex pillar contacts the first surface and the height of the first convex pillar remains unchanged.

[0045] Step S400: Processing the first main body layer to form a patterned second main body layer and a second convex pillar located on a side of the second main body layer away from the first convex pillar, thereby obtaining a second structural layer including the second main body layer, the second convex pillar and the first convex pillar. The second main body layer includes a mass structure, and the orthographic projection of the mass structure on the first surface at least partially overlaps with the orthographic projection of the first electrode on the first surface.

[0046] Step S500: forming a second electrode on the second surface of the second substrate, wherein the difference between the height of the second convex column and the thickness of the second electrode is equal to the difference between the height of the first convex column and the thickness of the first electrode.

[0047] Step S600: Bonding the second substrate to the second structural layer, so that the second convex pillar contacts the second surface, and the height of the second convex pillar remains unchanged. The orthographic projection of the second electrode on the first surface coincides with the orthographic projection of the first electrode on the first surface.

[0048] In the method for preparing a semiconductor structure provided in an embodiment of the present application, since the difference between the height of the second convex pillar and the thickness of the second electrode is equal to the difference between the height of the first convex pillar and the thickness of the first electrode, and during the bonding process of the first substrate and the first structural layer, the first convex pillar contacts the first surface and the height of the first convex pillar remains unchanged, and during the bonding process of the second substrate and the second structural layer, the second convex pillar contacts the second surface and the height of the second convex pillar remains unchanged, it can be ensured that the distance between the surface of the mass structure facing the first electrode and the first electrode is equal to the difference between the height of the first convex pillar and the thickness of the first electrode, and the distance between the surface of the mass structure facing the second electrode and the second electrode is equal to the difference between the height of the second convex pillar and the thickness of the second electrode, that is, the distance between the surface of the mass structure facing the first electrode and the first electrode is equal to the distance between the surface of the mass structure facing the second electrode and the second electrode; since the orthographic projection of the second electrode on the first surface coincides with the orthographic projection of the first electrode on the first surface, the capacitance formed between the mass structure and the first electrode and the capacitance formed between the second electrode can be equal, so that the semiconductor structure can more accurately detect slight changes in the signal, which is beneficial to improving the sensitivity and accuracy of semiconductor structure detection.

[0049] In one embodiment, step S100 can be used to obtain Figure 2 The structure shown. Figure 2 As shown, the number of first electrodes 20 formed on the surface 101 of the first substrate 10 is greater than one. Step S100 specifically includes: forming a metal electrode layer on the first surface 101, and etching the metal electrode layer through a patterning process to form the first electrode 20. In some embodiments, the first substrate 10 may be a glass substrate.

[0050] In one embodiment, step S200 can be used to obtain Figure 3 The structure shown. Figure 3 As shown, a plurality of first convex pillars 321 are provided on one side surface of the first main body layer 31. Step S200 specifically includes forming a main body film layer, etching one side of the main body film layer by a patterning process to form the first convex pillars 321, and obtaining the first structural layer 30. In this embodiment, the material of the first main body layer 31 and the first convex pillars 321 can be silicon. The main body film layer can be etched by deep silicon etching technology and inductively coupled plasma etching technology.

[0051] Furthermore, if Figure 3 As shown, the first structural layer 30 further includes a fourth convex column 322, and the fourth convex column 322 and the first convex column 321 are located on the same side of the first main body layer 31. In some embodiments, the fourth convex column 322 can be formed in the same process step as the first convex column 321. The height of the fourth convex column 322 can be the same as the height of the first convex column 321.

[0052] Furthermore, if Figure 3 As shown, the first structural layer 30 further includes a sixth convex column 323, which is located on the same side of the first main body layer 31 as the first convex column 321. The sixth convex column 323 is annular and surrounds the first convex column 321. The sixth convex column 323 can be used for vacuum packaging.

[0053] Specifically, a patterning process is performed on one side of the first main layer 31 where the first convex column 321 is formed to form a sixth convex column 323 . The height of the sixth convex column 323 may be the same as that of the first convex column 321 . The sixth convex column 323 and the first convex column 321 may be formed in the same process step.

[0054] After step S200, a first structural layer 30 including a first main body layer 31, a first convex column 321, a fourth convex column 322 and a sixth convex column 323 can be obtained. The material of the first structural layer 30 can be silicon.

[0055] In one embodiment, step S300 can be used to obtain Figure 4 The structure shown. Figure 4 As shown, the first convex column 321 contacts and bonds with the first substrate 10. In step S300, bonding the first substrate 10 with the first structural layer 30 includes: bonding the first convex column 321 with the first substrate 10 by an anodic bonding process. The anodic bonding process can prevent the height of the first convex column 321 and the thickness of the first substrate 10 from changing after bonding, thereby ensuring that the difference between the height of the first convex column 321 and the thickness of the first electrode 20 does not change before and after bonding. In other embodiments, the first convex column 321 and the first substrate 10 can also be bonded by other bonding processes, as long as the height of the first convex column 321 and the thickness of the first substrate 10 do not change during the bonding process.

[0056] In one embodiment, in step S300, the step of bonding the first substrate 10 to the first structural layer 30 further includes: bonding the fourth convex pillar 322 to the first substrate 10 by using an anodic bonding process, and after the fourth convex pillar 322 is bonded to the first substrate 10, the fourth convex pillar 322 contacts the first electrode 20 to achieve electrical connection. Step S300 also includes: bonding the sixth convex pillar 323 to the first substrate 10 by using an anodic bonding process.

[0057] The thickness of the first main layer 31 is the same everywhere, and the heights of the first convex column 321, the fourth convex column 322 and the sixth convex column 323 are all equal. Through anodic bonding, the first convex column 321, the fourth convex column 322 and the sixth convex column 323 can all contact and bond with the first substrate 10 in one bonding process, thereby simplifying the process flow.

[0058] In one embodiment, after the first substrate 10 is bonded to the first structural layer 30, the surface of the first main body layer 31 away from the first convex pillar 321 can be thinned to ensure that the thickness of the first main body layer 31 is the same everywhere, so as to adjust the first main body layer 31 to a desired thickness. Figure 5 The structure shown.

[0059] In one embodiment, after forming the second convex column in step S400, the following can be obtained: Figure 6 The structure shown. Figure 6 As shown, the second convex pillar 421 is located on a side of the second main body layer 41 away from the first convex pillar 321. In some embodiments, the step of processing the first main body layer to form the second main body layer 41 and the second convex pillar 421 located on a side of the second main body layer 41 away from the first convex pillar 321 specifically includes: etching the side of the first main body layer away from the first convex pillar 321 by a photolithography process to form the second convex pillar 421.

[0060] Furthermore, if Figure 6 As shown, in step S400, in the step of processing the first main body layer, a third convex column 422 is also formed on the side of the second main body layer 41 away from the first convex column 321. The third convex column 422 can be formed in the same process step as the second convex column 421, and the third convex column 422 and the second convex column 421 have the same height.

[0061] In one embodiment, after forming the second convex pillar 421, step S400 further includes: forming a third bonding structure on the surface of the second main body layer 41 away from the first convex pillar 321. Through this step, the following can be obtained: Figure 7 The structure shown. Figure 7 As shown, each surface of the second main body layer 41 away from the first convex pillar 321 is respectively provided with a third bonding structure 503. The material of the third bonding structure 503 can be a gold-tin alloy.

[0062] In one embodiment, step S400 further includes: performing a patterning process on the second main layer 41 to form a mass structure and a connecting portion. Figure 8 The structure shown, such as Figure 8 As shown, the second main body layer 41 includes a mass structure 411 and a connecting portion 412; the mass structure 411 is located between the first electrode and the second electrode to form a capacitor with the first electrode and the second electrode respectively. The connecting portion 412 is used to connect the convex columns and other structures located on both sides of the second main body layer 41. Figure 8In the illustrated embodiment, the connection portion 412 includes a first sub-connection portion 4121 connecting the first and second columns 321 , 421 , a second sub-connection portion 4122 connecting the third and fourth columns 422 , 322 , and a third sub-connection portion 4123 connecting the sixth column 323 and the third bonding structure 503 .

[0063] It should be noted that the thickness of the second main body layer 41 is equal at all locations, that is, the thickness of the mass structure 411 and the connecting portion 412 are equal.

[0064] In one embodiment, step S500 specifically includes forming a metal electrode layer on the second surface 111 of the second substrate 11, and etching the metal electrode layer through a patterning process to form a second electrode. In this embodiment, the second substrate 11 may be a glass substrate.

[0065] In step S500, the difference between the height of the second convex column 421 and the thickness of the second electrode 21 is equal to the difference between the height of the first convex column 321 and the thickness of the first electrode 20. Specifically, it can be set as follows: the thickness of the first electrode 20 is equal to the thickness of the second electrode 21; the height of the first convex column 321 is equal to the height of the second convex column 421.

[0066] Furthermore, before bonding the second substrate 11 to the second structure layer 40, step S500 further includes: forming a first wire 61 and a second wire 62 on the second surface 111 of the second substrate 11. Fig. 9 and Fig.10 As shown, the second wire 62 is electrically connected to the second electrode 21. The first wire 61, the second wire 62 and the second electrode 21 can be formed simultaneously in the same process step.

[0067] Furthermore, if Fig.11 As shown, after step S500 , the preparation method further includes: forming an insulating layer 70 , wherein the insulating layer 70 covers a partial area of ​​the first conductive line 61 and a partial area of ​​the second conductive line 63 .

[0068] Furthermore, if Fig.12 As shown, after step S500, the preparation method further includes: forming a fourth bonding structure 504 on the surface of the insulating layer 70 away from the second substrate 11. The fourth bonding structure 504 can be gold-tin solder.

[0069] In one embodiment, before bonding the second substrate 11 to the second structural layer 40 , the sum of the maximum distance from the surface of the fourth bonding structure 504 away from the second substrate 11 to the second surface 111 of the second substrate 11 and the thickness of the third bonding structure 503 is greater than the height of the second protrusion 421 .

[0070] In step S600, when the second substrate 11 is bonded to the second structure layer 40, the third bonding structure 503 and the fourth bonding structure 504 are aligned and attached, and at this time, the second convex pillar 421 and the third convex pillar 422 are not in contact with the second substrate 11. During the bonding process, the third bonding structure 503 and the fourth bonding structure 504 are melted, and the sum of their thicknesses decreases, so that the second convex pillar 421 and the third convex pillar 422 are in contact with the second substrate 11. Through step S600, the following can be obtained: Fig.13 The structure shown. Fig.13 As shown, the third bonding structure 503 and the fourth bonding structure 504 are bonded to form a bonding portion 506, and the height of the bonding portion 506 is the same as the height of the second convex column 421, so as to achieve the packaging of the semiconductor structure while ensuring that the distance between the surface of the mass structure 411 facing the first substrate 10 and the first electrode 20 is equal to the distance between the surface of the mass structure 411 facing the second substrate 11 and the second electrode 21.

[0071] After bonding is completed, the first protrusion 321 is connected to the second protrusion 421 through the first sub-connecting portion 4121, the fourth protrusion 322 is connected to the third protrusion 422 through the second sub-connecting portion 4122, the sixth protrusion 323 is connected to the structure after the third bonding structure 503 and the fourth bonding structure 504 are fused through the second sub-connecting portion 4123, and the first wire 61 is electrically connected to the first electrode 20 through the third protrusion 422, the second sub-connecting portion 4122 and the fourth protrusion 322 in sequence.

[0072] In one embodiment, the third bonding structure 503 and the fourth bonding structure 504 are both annular bonding structures. The bonding portion 506 obtained after the third bonding structure 503 and the fourth bonding structure 504 are bonded is an annular bonding portion. The bonding portion 506 is connected to the third sub-connecting portion 4123. The bonding portion 506, the third sub-connecting portion 4123 and the sixth protrusion 323 together form a sealing ring. The sealing ring and the first substrate 10 and the second substrate 11 enclose a sealed space, and the sealed space is vacuum.

[0073] In one embodiment, the bonding process used in step S600 may be glass frit bonding, metal eutectic bonding, metal solid-liquid diffusion bonding, etc.

[0074] The present application embodiment also provides another method for preparing a semiconductor structure, which is different from the above-mentioned method in that:

[0075] In this embodiment, if Fig.14As shown, in step S400, the first main body layer is processed to form a second main body layer 41 and a second convex column 421 located on a side of the second main body layer 41 away from the first convex column 321, and no third convex column 422 is formed. Specifically, the second convex column 421 is formed by etching the side of the first main body layer away from the first convex column 321 through a photolithography process.

[0076] like Fig.15 As shown, after forming the second convex pillar 421 , step S400 further includes: forming a first bonding structure 501 and a third bonding structure 503 on a surface of the second main layer 41 away from the first convex pillar 321 , and the material of the first bonding structure 501 and the third bonding structure 503 may be a gold-tin alloy.

[0077] In this embodiment, if Fig.16 As shown, step S400 also includes: performing a patterning process on the second main body layer 41 to form a mass structure 411 and a connecting portion 412. The mass structure 411 is located between the first electrode and the second electrode to form a capacitor with the first electrode and the second electrode respectively. The connecting portion 412 is used to connect the convex columns and other structures located on both sides of the second main body layer 41. Fig.16 In the illustrated embodiment, the connection portion 412 includes a first sub-connection portion 4121 connecting the first column 321 and the second column 421 , a second sub-connection portion 4122 connecting the first bonding structure 501 and the fourth column 322 , and a third sub-connection portion 4123 connecting the sixth column 323 and the third bonding structure 503 .

[0078] In this embodiment, if Fig.17 As shown, step S500 further includes: forming a second bonding structure 502 on one side of the second substrate 11 , the second bonding structure 502 and the second electrode 21 being located on the same side of the second surface 111 . Forming a fourth bonding structure 504 on the surface of the insulating layer 70 away from the second substrate 11 .

[0079] In this embodiment, in step S600, when the second substrate 11 is bonded to the second structural layer 40, the first bonding structure 501 and the second bonding structure 502 are aligned and attached, and the third bonding structure 503 and the fourth bonding structure 504 are aligned and attached. At this time, the second convex pillar 4212 is not in contact with the second substrate 11. During the bonding process, the first bonding structure 501 and the second bonding structure 502 are melted; the third bonding structure 503 and the fourth bonding structure 504 are melted, and the sum of their thicknesses is reduced, so that the second convex pillar 421 is in contact with the second substrate 11. Through step S600, the following can be obtained: Fig.18 The structure shown. Fig.18As shown, the first bonding structure 501 and the second bonding structure 502 are bonded to form a bonding portion 505, and the third bonding structure 503 and the fourth bonding structure 504 are bonded to form a bonding portion 506. The height of the bonding portion 505, the height of the bonding portion 506 and the height of the second protrusion 421 are all the same, so that while the semiconductor structure is packaged, it is ensured that the distance between the surface of the mass structure 411 facing the first substrate 10 and the first electrode 20 is equal to the distance between the surface of the mass structure 411 facing the second substrate 11 and the second electrode 21.

[0080] After bonding is completed, the first protrusion 321 is connected to the second protrusion 421 through the first sub-connection portion 4121, the fourth protrusion 322 is connected to the structure after the first bonding structure 501 and the second bonding structure 502 are fused through the second sub-connection portion 4122, and the sixth protrusion 323 is connected to the structure after the third bonding structure 503 and the fourth bonding structure 504 are fused through the second sub-connection portion 4123. The first wire 61 is electrically connected to the first electrode 20 through the third protrusion 422, the second sub-connection portion 4122 and the fourth protrusion 322 in sequence.

[0081] The present application embodiment also provides another method for preparing a semiconductor structure, which is different from the above-mentioned method in that:

[0082] In this embodiment, if Fig.19 and Fig. 20 As shown, the second convex column 421 includes a first sub-convex column 4211 and a second sub-convex column 4212 located on a side of the first sub-convex column 4211 away from the second main body layer 41. Fig.19 As shown, in step S400, the surface of the first main body layer away from the first convex pillar 321 is etched to obtain a third main body layer 41' and a second sub-convex pillar 4212 located on a side of the third main body layer 41' away from the first convex pillar 321. Fig. 20 As shown, the surface of the third main layer 41 ′ facing the second sub-column 4212 is etched to obtain the second main layer 41 and the first sub-column 4211 located between the second main layer 41 and the second sub-column 4212 .

[0083] Furthermore, if Fig. 20 As shown, in step S400 , in the step of processing the third main layer, a third convex column 422 is formed on the side of the second main layer 41 away from the first convex column 321 , and the height of the third convex column 422 is smaller than the height of the second convex column 421 .

[0084] Furthermore, step S400 further includes: forming a fifth convex column 423 located on a side of the second main body layer 41 away from the first convex column 321, wherein the fifth convex column 423 is annular and surrounds the first convex column 321. The fifth convex column 423, the third convex column 422 and the first sub-convex column 4211 have the same height and are formed in the same process step.

[0085] In this embodiment, if Fig.21 As shown, after forming the second boss 421 , the fifth boss 423 and the third boss 422 , step S400 further includes: forming a first bonding structure 501 on a surface of the third boss 422 away from the first substrate 10 , and forming a third bonding structure 503 on a surface of the fifth boss 423 away from the first substrate 10 .

[0086] In this embodiment, if Fig. 22 As shown, step S400 also includes: performing a patterning process on the second main body layer 41 to form a mass structure 411 and a connecting portion 412. The mass structure 411 is used to form a capacitor between the first electrode and the second electrode. The connecting portion 412 is used to connect the convex columns and other structures located on both sides of the second main body layer 41. Fig. 22 In the illustrated embodiment, the connection portion 412 includes a first sub-connection portion 4121 connecting the first column 321 and the first sub-column 4211 , a second sub-connection portion 4122 connecting the third column 422 and the fourth column 322 , and a third sub-connection portion 4123 connecting the fifth column 423 and the sixth column 323 .

[0087] In this embodiment, if Fig.23 As shown, step S500 further includes: forming a second bonding structure 502 on one side of the second substrate 11 , the second bonding structure 502 and the second electrode 21 being located on the same side of the second surface 111 . Forming a fourth bonding structure 504 on the surface of the insulating layer 70 away from the second substrate 11 .

[0088] In this embodiment, step S600 includes bonding the first bonding structure 501 and the second bonding structure 502, and bonding the third bonding structure 503 and the fourth bonding structure 504, so as to bond the second substrate 11 to the second structural layer. Fig.24 The structure shown. Fig.24 As shown, the first bonding structure 501 and the second bonding structure 502 are bonded to form a bonding portion 505, and the third bonding structure 503 and the fourth bonding structure 504 are bonded to form a bonding portion 506. The height of the bonding portion 505, the height of the bonding portion 506 and the height of the first sub-column 4211 are all the same.

[0089] In this embodiment, if Fig.25As shown, before the second substrate 11 is bonded to the second structure layer 40, the sum of the thickness of the first bonding structure 501, the thickness of the portion of the second bonding structure 502 in contact with the second substrate 11, and the thickness of the third convex pillar 422 is greater than the thickness of the second convex pillar 421. Part of the second bonding structure 502 is located above the first wire 61, and the other part is directly in contact with the second substrate 11.

[0090] exist Fig.25 In the illustrated embodiment, the thickness H1 of the first column 321 is equal to the thickness H2 of the second column 421. The thickness H3 of the first sub-column 4211 is equal to the thickness H5 of the third column 422. The sum H6 of the thickness of the first bonding structure 501 and the maximum thickness of the second bonding structure 502 is greater than the thickness of the second sub-column 4212.

[0091] During the bonding process of the second substrate 11 and the second structural layer 40, the first bonding structure 501 and the second bonding structure 502 are melted, the sum of their thicknesses H6 is reduced, the thickness H2 of the second convex pillar 421 remains unchanged, and finally the second convex pillar 421 contacts the second surface 111. By lowering the bonding temperature, the first bonding structure 501 and the second bonding structure 502 are solidified to form a bonding portion, and the bonding is completed.

[0092] In this embodiment, the third bonding structure 503 and the fourth bonding structure 504 are both annular bonding structures. The bonding portion 506 obtained after the third bonding structure 503 and the fourth bonding structure 504 are bonded is an annular bonding portion. The bonding portion 506 is connected to the fifth convex column 423. The bonding portion 506, the fifth convex column 423, the third sub-connecting portion 4123 and the sixth convex column 323 together form a sealing ring. The sealing ring and the first substrate 10 and the second substrate 11 enclose a sealed space, and the sealed space is a vacuum.

[0093] It should be noted that the technical solutions or technical features described in the above embodiments can be combined or supplemented with each other without causing conflicts. The scope of protection of this application is not limited to the precise structures described in the above embodiments and shown in the drawings; all modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this application should be included in the scope of protection of this application.

Claims

1. A method for preparing a semiconductor structure, characterized in that: include: forming a first electrode on a first surface of the first substrate; forming a first structural layer; The first structural layer includes a first main body layer and a first convex column located on one side of the first main body layer; Bonding the first substrate to the first structural layer so that the first convex pillar contacts the first surface and the height of the first convex pillar remains unchanged; The first main body layer is processed to form a patterned second main body layer and a second convex pillar located on a side of the second main body layer away from the first convex pillar, so as to obtain a second structural layer including the second main body layer, the second convex pillar and the first convex pillar; the second main body layer includes a mass structure; the orthographic projection of the mass structure on the first surface at least partially overlaps with the orthographic projection of the first electrode on the first surface; forming a second electrode on the second surface of the second substrate; the difference between the height of the second convex column and the thickness of the second electrode is equal to the difference between the height of the first convex column and the thickness of the first electrode; The second substrate is bonded to the second structural layer so that the second convex column contacts the second surface and the height of the second convex column remains unchanged; the orthographic projection of the second electrode on the first surface coincides with the orthographic projection of the first electrode on the first surface.

2. The method for preparing a semiconductor structure according to claim 1, characterized in that: The bonding the first substrate to the first structural layer comprises: The first protrusion is bonded to the first substrate by using an anodic bonding process.

3. The method for preparing a semiconductor structure according to claim 1, characterized in that: In the step of processing the first main body layer, a third convex column is also formed on a side of the second main body layer away from the first convex column, and the second structural layer includes the third convex column; the height of the third convex column is less than the height of the second convex column; Before bonding the second substrate to the second structural layer, the preparation method further comprises: forming a first bonding structure on a side of the third convex pillar away from the first convex pillar; forming a second bonding structure on one side of the second substrate, wherein the second bonding structure and the second electrode are located on the same side of the second surface; The bonding the second substrate to the second structural layer includes: bonding the first bonding structure to the second bonding structure to bond the second substrate to the second structural layer.

4. The method for preparing a semiconductor structure according to claim 3, characterized in that: Before bonding the second substrate to the second structural layer, the sum of the thickness of the first bonding structure, the thickness of the portion of the second bonding structure in contact with the second substrate, and the thickness of the third convex column is greater than the thickness of the second convex column; during bonding the second substrate to the second structural layer, the first bonding structure and the second bonding structure melt, and the sum of their thicknesses decreases, so that the second convex column contacts the second surface.

5. The method for preparing a semiconductor structure according to claim 3, characterized in that: The second convex column includes a first sub-convex column and a second sub-convex column located on a side of the first sub-convex column away from the second main body layer; the first sub-convex column has the same height as the third convex column and is formed synchronously.

6. The method for preparing a semiconductor structure according to claim 5, characterized in that: The processing of the first main layer includes: Etching a surface of the first main body layer away from the first convex pillar to obtain a third main body layer and a second sub-convex pillar located on a side of the third main body layer away from the first convex pillar; The surface of the third main body layer facing the second sub-bulge is etched to obtain the second main body layer and the first sub-bulge and the third bulge located between the second main body layer and the second sub-bulge.

7. The method for preparing a semiconductor structure according to claim 1, characterized in that: Before bonding the second substrate to the second structural layer, the preparation method further comprises: forming a first bonding structure on a surface of the second main layer away from the first convex pillar, the first bonding structure being in direct contact with the second main layer; forming a second bonding structure on one side of the second substrate, the second bonding structure and the second electrode being located on the same side of the second surface; The bonding the second substrate to the second structural layer includes: bonding the first bonding structure to the second bonding structure to bond the second substrate to the second structural layer.

8. The method for preparing a semiconductor structure according to any one of claims 3 to 7, characterized in that: Before bonding the second substrate to the second structural layer, the method for preparing the semiconductor structure further includes: forming a first conductive line on the second surface of the second substrate; The material of the second structural layer is semiconductor material; the second bonding structure covers a partial area of ​​the first wire; the second main layer includes a connecting portion connected to the third protrusion, and the second structural layer also includes a fourth protrusion connected to the connecting portion; the fourth protrusion and the first protrusion are located on the same side of the second main layer and are in contact with the first electrode.

9. The method for preparing a semiconductor structure according to any one of claims 3 to 7, characterized in that: The material of the second structural layer is a semiconductor material; the second structural layer further includes a fifth convex pillar located on a side of the second main layer away from the first convex pillar, the fifth convex pillar is annular and surrounds the second convex pillar; before bonding the second substrate to the second structural layer, the preparation method further includes: A first wire and a second wire are formed on the second surface of the second substrate; the second wire is electrically connected to the second electrode; forming an insulating layer, wherein the insulating layer covers a partial area of ​​the first conductive line and a partial area of ​​the second conductive line; forming a third bonding structure located on a surface of the fifth protrusion away from the first protrusion and a fourth bonding structure located on a surface of the insulating layer away from the second substrate; The bonding of the second substrate to the second structural layer includes: bonding the third bonding structure to the fourth bonding structure; after the bonding of the second substrate to the second structural layer, the first wire is electrically connected to the first electrode.

10. The method for preparing a semiconductor structure according to claim 1, characterized in that: The first structural layer further includes a sixth convex column, the sixth convex column and the first convex column are located on the same side of the first main body layer; the sixth convex column is annular and surrounds the first convex column; The bonding the first substrate to the first structural layer comprises: The first convex column and the sixth convex column are respectively bonded to the first substrate by using an anodic bonding process.

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