Band-gap reference voltage adjusting circuit and chip

Through the adjustment of the temperature relationship between the compensation circuit and the voltage output circuit, the problem of the reference voltage value in the traditional bandgap reference circuit is solved, and the target reference voltage is flexibly set, reducing the circuit complexity and cost and improving accuracy.

CN119828835APending Publication Date: 2025-04-15DALIAN AIWEI MICROELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411942762.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-26
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

The reference voltage output by the traditional bandgap reference circuit is affected by manufacturing process parameters, making it difficult to flexibly set the required reference voltage value, and adding operational amplifier devices leads to increased circuit design complexity and cost.

Method used

The compensation circuit and the voltage output circuit are used to adjust the temperature relationship between the first current and the second current to generate a target reference voltage of zero temperature drift or small temperature drift, reducing dependence on the operational amplifier.

Benefits of technology

It realizes flexible output of target reference voltage, reduces circuit design complexity and cost, improves accuracy, and reduces error problems caused by operational amplifiers.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of integrated circuits, in particular to a band-gap reference voltage adjusting circuit and a chip, and the circuit comprises a compensation circuit which is used for generating a first current; the voltage output circuit comprises a band-gap reference circuit and a voltage adjusting circuit, the band-gap reference circuit is used for generating basic band-gap voltage, the voltage adjusting circuit is used for generating adjusting voltage, and the voltage output circuit can output target reference voltage according to the basic band-gap voltage and the adjusting voltage; wherein current in the band-gap reference circuit is second current, the voltage adjusting circuit is connected with the compensating circuit and the band-gap reference circuit in series and can generate adjusting voltage according to the first current and the second current, one of the first current and the second current has a positive temperature relation with the adjusting voltage, and the other one has a negative temperature relation with the adjusting voltage. Therefore, the required target reference voltage can be flexibly generated, and the error of the generated reference voltage is reduced.
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Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a bandgap reference voltage adjustment circuit and chip. Background Art

[0002] The bandgap reference circuit is one of the most common and important integrated circuit modules in analog integrated circuit design. Its function is to generate a stable bandgap voltage as a reference voltage, which is supplied to other modules as a reference voltage. In addition, the requirements for reference voltage in integrated circuits are generally high output accuracy and the output voltage should not change with temperature as much as possible. That is, the bandgap reference circuit used to output the reference voltage generally has a low temperature drift characteristic.

[0003] It is understandable that different circuit modules have different requirements for the numerical value of the reference voltage. Therefore, after the bandgap reference circuit outputs a certain basic bandgap voltage value, the basic bandgap voltage value needs to be adjusted to the required reference voltage value.

[0004] However, the reference voltage value generated by the conventional bandgap reference circuit is greatly affected by the manufacturing process parameters. Due to the inherent characteristics and limitations of the process, it is difficult to flexibly set the required reference voltage value when achieving low temperature drift performance.

[0005] Therefore, it is necessary to provide a bandgap reference voltage adjustment circuit for outputting a required reference voltage value (referred to as “target reference voltage value”). Summary of the invention

[0006] In order to solve the above problems, the present application provides a bandgap reference voltage adjustment circuit, which can flexibly adjust the target reference voltage, reduce the increase of reference voltage error, and improve accuracy.

[0007] In a first aspect, the present application provides a bandgap reference voltage adjustment circuit, comprising: a compensation circuit for generating a first current; a voltage output circuit, comprising a bandgap reference circuit and a voltage adjustment circuit, the bandgap reference circuit being used to generate a basic bandgap voltage, the voltage adjustment circuit being used to generate an adjustment voltage, the voltage output circuit being capable of outputting a target reference voltage based on the basic bandgap voltage and the adjustment voltage; wherein the current in the bandgap reference circuit is a second current, the voltage adjustment circuit is respectively connected in series with the compensation circuit and the bandgap reference circuit, and is capable of generating an adjustment voltage based on the first current and the second current, wherein one of the first current and the second current has a positive temperature relationship with the adjustment voltage, and the other has a negative temperature relationship.

[0008] It can be understood that in the present application, by providing a compensation circuit with a temperature relationship to adjust the basic bandgap voltage, the output voltage can flexibly reach the target reference voltage without adding additional operational amplifier devices to obtain the required target reference voltage, thereby reducing the complexity of circuit design and reducing costs.

[0009] In a possible implementation of the first aspect above, the voltage adjustment circuit includes at least one resistor, and the at least one resistor converts a sum of the first current and the second current into an adjustment voltage.

[0010] It can be understood that converting the sum of the first current and the second current into an adjustment voltage through a resistor is convenient and quick.

[0011] In a possible implementation of the first aspect above, at least one resistor in the voltage adjustment circuit is a first resistor (R1_3).

[0012] In a possible implementation of the first aspect above, the voltage adjustment circuit includes at least one resistor and at least one transistor connected in series, and the at least one resistor and the at least one transistor convert the first current and the second current into an adjustment voltage.

[0013] It can be understood that the target reference voltage can be flexibly adjusted through resistors and transistors.

[0014] In a possible implementation of the first aspect above, the voltage adjustment circuit includes a first resistor (R1_3) and a first triode (Q1_2), the base of the first triode (Q1_2) is connected to the output end of the bandgap reference voltage adjustment circuit, the collector of the first triode (Q1_2) is connected to a power supply, the emitter of the first triode (Q1_2) is connected to the first end of the first resistor (R1_3), and the second end of the first resistor (R1_3) is respectively connected in series with the compensation circuit and the bandgap reference circuit.

[0015] In a possible implementation of the first aspect above, the bandgap reference voltage adjustment circuit and the power supply are integrated into the same chip.

[0016] In a possible implementation of the first aspect, the bandgap reference circuit includes one or more voltage generating devices connected in series, and the voltage generating device includes any one of the following: a resistor, a diode, and a transistor with a base-collector short circuit.

[0017] In a possible implementation of the first aspect above, the one or more voltage generating devices include: a second resistor (R1_2), and the bandgap reference circuit also includes a first operational amplifier (OP1), and the first operational amplifier (OP1) is used to generate a second current in the second resistor (R1_2).

[0018] In a possible implementation of the first aspect above, the one or more voltage generating devices further include: a third resistor (R1_1) and a second transistor (Q1_1).

[0019] In a possible implementation of the first aspect, the bandgap reference circuit further comprises a first NMOS driving tube (NM1); wherein a first end of a third resistor (R1_1) is connected in series with a voltage adjustment circuit, a second end of the third resistor (R1_1) is connected with a first end of a second resistor (R1_2), a first end of the second resistor (R1_2) is connected with a non-inverting input end of a first operational amplifier (OP1), a second end of the second resistor (R1_2) is connected with a reverse input end of the first operational amplifier (OP1), a base of a second triode (Q1_1) is connected with a collector, an emitter of the second triode (Q1_1) is grounded, a gate of the first NMOS driving tube (NM1) is connected with an output end of the first operational amplifier (OP1), and a drain of the first NMOS driving tube (NM1) is connected with an output end of a voltage output circuit.

[0020] In a possible implementation of the first aspect, the one or more voltage generating devices further include: a fourth resistor (R4_1); the bandgap reference circuit further includes a first NMOS driver tube (NM1); a first end of a second resistor (R1_2) is connected in series with the voltage adjustment circuit, and a first end of the second resistor (R1_2) is connected to a non-inverting input end of a first operational amplifier (OP1), a second end of the second resistor (R1_2) is connected to a first end of a fourth resistor (R4_1) and a reverse input end of the first operational amplifier (OP1), a second end of the fourth resistor (R4_1) is grounded, an output end of the first operational amplifier (OP1) is connected to a gate of the first NMOS driver tube (NM1), a source of the first NMOS driver tube (NM1) is grounded, and a drain of the first NMOS driver tube (NM1) is connected to a power supply.

[0021] In a possible implementation of the first aspect, the voltage output circuit provides a second current to the compensation circuit, the compensation circuit generates a first current based on the second current, and the magnitudes of the second current and the first current have a first proportional relationship.

[0022] In a possible implementation of the first aspect above, the compensation circuit includes: a third triode (Q2_1) and a fourth triode (Q2_2); the base of the third triode (Q2_1) receives the second current, and the base of the fourth triode (Q2_2) provides the first current; the emitter of the third triode (Q2_1) is grounded, the collector of the third triode (Q2_1) is connected to the emitter of the fourth triode (Q2_2), and the collector of the second triode Q2_2 is connected to a power supply.

[0023] It can be understood that the temperature compensation of the output voltage can be achieved by only two transistors, thereby reducing the cost.

[0024] In a possible implementation of the first aspect above, the compensation circuit includes a positive temperature end and a negative temperature end. When the first current has a positive temperature relationship with the adjustment voltage, the positive temperature end of the compensation circuit is connected in series with the voltage adjustment circuit; when the first current has a negative temperature relationship with the adjustment voltage, the negative temperature end of the compensation circuit is connected in series with the voltage adjustment circuit.

[0025] In a possible implementation of the first aspect, the compensation circuit includes: a second NMOS drive tube (NM2), a third NMOS drive tube (NM3), a first PMOS drive tube (PM1), a second PMOS drive tube (PM2), a third PMOS drive tube (PM3), a fifth triode (Q3_1), a sixth triode (Q3_2), a fifth resistor (R3_1), and a sixth resistor (R3_2); the drain of the second NMOS drive tube (NM2), the drain of the third NMOS drive tube (NM3), the source of the first PMOS drive tube (PM1), the source of the PMOS drive tube PM2, and the source of the PMOS drive tube PM3 are connected to a power supply, the gate of the third NMOS drive tube (NM3), the gate of the second NMOS drive tube (NM2), the drain of the first PMOS drive tube (PM1), and the collector of the fifth triode (Q3_1) are connected, and the source of the third NMOS drive tube (NM3) is connected to the sixth resistor (R3_2). The first end of the sixth resistor (R3_2) is connected to the first end of the fifth resistor (R3_1), the second end of the sixth transistor (Q3_1), the first end of the fifth transistor (Q3_2), the base of the fifth transistor (Q3_1), and the base of the sixth transistor (Q3_2) are connected, the gate of the first PMOS driving tube (PM1), the gate of the second PMOS driving tube (PM2), and the gate of the third PMOS driving tube (PM3) are connected, the gate and drain of the second PMOS driving tube (PM2) are short-circuited, and the gate of the sixth transistor (Q3_2) is short-circuited. The collector is connected to the drain of the second PMOS driving tube (PM2), the emitter of the sixth triode (Q3_2) is connected to the first end of the seventh resistor (R3_3), the second end of the fifth resistor (R3_1) of the sixth triode (Q3_2), the emitter of the fifth triode (Q3_1), and the second end of the seventh resistor (R3_3) are connected and grounded, the drain of the third PMOS driving tube (PM3) is connected to the positive temperature end, and the source of the NMOS driving tube NM2 is connected to the negative temperature end.

[0026] In a second aspect, the present application provides a chip, comprising the bandgap reference voltage adjustment circuit of the above-mentioned first aspect and any one of the various possible implementations of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 According to some embodiments, a bandgap reference circuit 10 is shown;

[0028] Figure 2AAccording to some embodiments of the present application, a schematic diagram of a bandgap reference voltage adjustment circuit 30 is shown;

[0029] Figure 2B According to some embodiments of the present application, a schematic diagram of a compensation circuit 301A is shown;

[0030] Figure 2C According to some embodiments of the present application, a schematic diagram of a compensation circuit 301B is shown;

[0031] Figure 3A According to some embodiments of the present application, a schematic diagram of a bandgap reference voltage adjustment circuit 30A is shown;

[0032] Figure 3B According to some embodiments of the present application, a schematic diagram of a bandgap reference voltage adjustment circuit 30B is shown;

[0033] Figure 3C According to some embodiments of the present application, a schematic diagram of a bandgap reference voltage adjustment circuit 30C is shown;

[0034] Figure 3D According to some embodiments of the present application, a schematic diagram of a bandgap reference voltage adjustment circuit 30D is shown;

[0035] Figure 4 According to some embodiments of the present application, a schematic diagram of a bandgap reference voltage adjustment circuit 30E is shown. DETAILED DESCRIPTION

[0036] Illustrative embodiments of the present application include, but are not limited to, a bandgap reference voltage adjustment circuit.

[0037] Some terms of this application are first introduced below.

[0038] Reference voltage: A precise voltage that provides a reference for the entire chip.

[0039] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present application, but are not intended to limit the scope of the present application.

[0040] Figure 1 According to some embodiments of the present application, a bandgap reference circuit 10 is shown. The bandgap reference circuit can generate a basic bandgap voltage. Specifically, Figure 1 As shown, in the bandgap reference circuit 10, the external power supply VIN supplies power to the reference power chip, generating Figure 1The current flows in the direction shown in the "circle" F1. In addition, a current Ip is formed on the resistors R1, R2 and transistor Q1 in the reference power chip. Based on the operational amplifier OP1 (the structure of OP1 will be introduced below) composed of two transistors with an area ratio of 1:n, a voltage difference ΔVbe is generated on the resistor R2, and a voltage Vbe is formed on the transistor Q1 according to the base-emitter voltage difference.

[0041] Formula (1) shows a formula for a bandgap reference voltage Vref0 output by the bandgap reference circuit 10 as follows:

[0042]

[0043] Among them, (ΔVbe / R2) is the current on the resistor R2. Since the resistors R1 and R2 are connected in series, the total voltage across the resistors R1 and R2 is (ΔVbe / R2)*(R1+R2). Vbe is the voltage formed on the transistor Q1 according to the base-emitter voltage difference, thereby obtaining the bandgap reference voltage expression shown in the above formula (1).

[0044] In some embodiments, it is necessary to add an additional operational amplifier to form a buffer, and adjust the resistance ratio in the buffer to generate the required reference voltage (i.e., the target reference voltage). For example, assuming that the basic bandgap voltage is 1.2V under a certain process, when a non-1.2V reference voltage needs to be generated, an external buffer can be used to adjust the basic bandgap voltage to the target reference voltage.

[0045] However, after adding a buffer composed of an operational amplifier, the circuit design becomes complicated, and the added operational amplifier is prone to generate an offset voltage.

[0046] Therefore, the present application proposes a bandgap reference voltage adjustment circuit, which includes at least a compensation circuit and a voltage output circuit, wherein the compensation circuit is used to generate a first current, and the first current has a positive or negative relationship with temperature (i.e., the first current is a temperature compensation current); the voltage output circuit is used to adjust the bandgap output voltage to the required target reference voltage based on the first current. Specifically, the voltage output circuit includes a bandgap reference circuit and a voltage adjustment circuit, the bandgap reference circuit is used to generate a basic bandgap voltage, the voltage adjustment circuit is used to generate an adjustment voltage, and the voltage adjustment circuit is connected in series with the compensation circuit and the bandgap reference circuit, respectively, so that the adjustment voltage is generated according to the first current and the current in the bandgap reference circuit (i.e., the second current), and at this time, the voltage output circuit can output the target reference voltage according to the basic bandgap voltage and the adjustment voltage. In addition, one of the first current and the second current is a positive temperature current (i.e., a current having a positive relationship with temperature), and the other is a negative temperature current (i.e., a current having a negative relationship with temperature), so that the target reference voltage output by the voltage output circuit has a zero temperature relationship.

[0047] That is, in the present application, the output voltage is adjusted by providing a compensation circuit with a temperature relationship, without adding additional operational amplifier devices to obtain the required target reference voltage, thereby reducing the complexity of circuit design and lowering costs.

[0048] Figure 2A According to some embodiments of the present application, a bandgap reference voltage adjustment circuit 30 is shown. In this case, the bandgap reference voltage adjustment circuit 30 does not include a chip external power supply circuit and is integrated on a reference power supply chip. It is understandable that in other embodiments, the bandgap reference voltage adjustment circuit 30 may include a chip external power supply circuit. Specifically, Figure 2A As shown, the bandgap reference voltage adjustment circuit 30 includes a compensation circuit 301 and a voltage output circuit 302, and the compensation circuit 301 and the voltage output circuit 302 are located on the reference power chip. The chip external power supply circuit 20 can provide power to the compensation circuit 301 and the voltage output circuit 302 on the reference power chip. The compensation circuit 301 can generate a first current Ic.

[0049] Specifically, the voltage output circuit 302 includes a voltage adjustment circuit 3021 and a bandgap reference circuit 3022 , and the bandgap reference circuit 3022 is used to generate a basic bandgap voltage and a second current Ip.

[0050] The voltage adjustment circuit 3021 is connected in series with the compensation circuit and the bandgap reference circuit, respectively, and can generate an adjustment voltage according to the first current Ic and the second current Ip. For example, when the voltage adjustment circuit 3021 includes a resistor R, the voltage adjustment circuit 3021 can generate an adjustment voltage Ic×R+Ip×R. Among them, Ic×R can be understood as the adjustment voltage component corresponding to the first current Ic, and Ip×R can be understood as the adjustment voltage component corresponding to the second current Ip.

[0051] In the present application, one of the first current Ic and the second current Ip is a positive temperature current, and the other is a negative temperature current. In this way, the voltage output circuit 3022 of the present application can generate a target reference voltage with zero temperature drift or a small temperature drift.

[0052] Take the first current Ic as a positive temperature current and the second current Ip as a negative temperature current as an example for explanation. Since the second current Ip is a negative temperature current, when the temperature rises, the second current Ip will decrease, thereby reducing the adjustment voltage component corresponding to the second current Ip. At the same time, since the present application is provided with a compensation circuit 301 that can generate the first current Ic (positive temperature current), when the temperature rises, the adjustment voltage component corresponding to the first current Ic increases, thereby compensating for the decrease in the adjustment voltage component corresponding to the second current Ip, so that the adjustment voltage is maintained at a substantially constant level.

[0053] That is to say, in the present application, by providing the compensation circuit 301 , the influence of temperature change on the adjustment voltage can be weakened, and a relatively constant target reference voltage can be obtained.

[0054] In some embodiments, the voltage adjustment circuit may use a resistor, or use a resistor and a transistor together to adjust the basic bandgap voltage. Since the voltage adjustment circuit includes a resistor or a transistor, and the resistor or the transistor can generate a voltage with a positive temperature relationship or a negative temperature relationship based on the second current, the relationship between the current and the temperature in the compensation circuit can be designed according to the voltage with a temperature relationship added to the basic bandgap voltage in the voltage output circuit, so that the voltage output circuit has a zero temperature relationship as much as possible when outputting the target reference voltage. It can be understood that when a negative temperature voltage is added to the voltage output circuit, the compensation circuit needs to provide a positive temperature current for compensation, that is, the first current is a positive temperature current; when a positive temperature voltage is added to the voltage output circuit, the compensation circuit needs to provide a negative temperature current for compensation, that is, the first current is a negative temperature current.

[0055] In addition, the voltage output circuit and the compensation circuit can be set according to the specific scene requirements, so that the target reference voltage can be one or more times the basic bandgap voltage. For example, assuming that the basic bandgap voltage is 1.2V, the target reference voltage can be 1 times the basic bandgap voltage value, corresponding to a range of (1.2, 2.4), and N times the basic bandgap voltage value, corresponding to a range of [1.2×N, 1.2×(N+1)].

[0056] The compensation circuit is introduced in detail below.

[0057] In some embodiments, the compensation circuit may generate a first current based on a second current provided by the bandgap reference circuit and provide the first current to the voltage adjustment circuit, and the magnitudes of the second current and the first current have a first proportional relationship.

[0058] Figure 2B According to some embodiments of the present application, a compensation circuit 301A is shown, and the compensation circuit 301A is a specific structure of the compensation circuit 301. In addition, the connection relationship between the compensation circuit 301A and the voltage output circuit 302 is described.

[0059] Specifically, the compensation circuit 301A includes: a transistor Q2_1 and a transistor Q2_2, the base of the transistor Q2_2 receives the second current from the bandgap reference circuit 3022, the emitter of the transistor Q2_1 is grounded, the collector of the transistor Q2_1 is connected to the emitter of the transistor Q2_2, the collector of the transistor Q2_2 is connected to the chip internal power supply VDD, and the base of the transistor Q2_2 is connected to the voltage adjustment circuit 3021, for providing the first current. It can be understood that since the compensation circuit 301A only includes a transistor, the compensation circuit 301A is a circuit structure that can provide a negative temperature compensation current, and at this time, the first current has a negative relationship with the temperature.

[0060] It can be understood that only fewer components are needed in the compensation circuit 301A to adjust the basic bandgap voltage to the target reference voltage, thereby reducing costs and avoiding the operational amplifier error problem caused by using a buffer to obtain the target reference voltage, thereby improving accuracy.

[0061] Figure 2C According to some embodiments of the present application, a compensation circuit 301B is shown, and the compensation circuit 301 is a specific structure of the compensation circuit 301. In addition, the compensation circuit 301B includes a positive temperature end and a negative temperature end. When the first current has a positive temperature relationship with the adjustment voltage, the positive temperature end of the compensation circuit 301B is connected in series with the voltage adjustment circuit 3021; ​​when the first current has a negative temperature relationship with the adjustment voltage, the negative temperature end of the compensation circuit 301B is connected in series with the voltage adjustment circuit 3021.

[0062] Specifically, the compensation circuit 301B includes: NMOS driving tube NM2, NMOS driving tube NM3, PMOS driving tube PM1, PMOS driving tube PM2, PMOS driving tube PM3, transistor Q3_1, transistor Q3_2, resistor R3_1, and resistor R3_2. The drain of NMOS driving tube NM2, the drain of NMOS driving tube NM3, the source of PMOS driving tube PM1, the source of PMOS driving tube PM2, and the source of PMOS driving tube PM3 are connected to the internal power supply VDD of the chip, the gate of NMOS driving tube NM3, the gate of NMOS driving tube NM2, the drain of PMOS driving tube PM1, and the collector of transistor Q3_1 are connected, the source of NMOS driving tube NM3 is connected to the first end of resistor R3_2, the second end of resistor R3_2, the first end of resistor R3_1, the base of transistor Q3_1, and the base of transistor Q3_2 are connected. The gate of the PMOS driving tube PM1, the gate of the PMOS driving tube PM2, and the gate of the PMOS driving tube PM3 are connected, the gate of the PMOS driving tube PM2 is short-circuited with the drain, the collector of the transistor Q3_2 is connected with the drain of the PMOS driving tube PM2, the emitter of the transistor Q3_2 is connected with the first end of the resistor R3_3, the second end of the resistor R3_1 of the transistor Q3_2, the emitter of the transistor Q3_1, and the second end of the resistor R3_3 are connected and grounded, the drain of the PMOS driving tube PM3 is connected with the positive temperature end, and the source of the NMOS driving tube NM2 is connected with the negative temperature end. The positive temperature end of the compensation circuit 301B generates a positive temperature compensation current Ig; the negative temperature end of the compensation circuit 301B generates a negative temperature compensation current In.

[0063] It can be understood that the compensation circuit 301B can adjust the basic bandgap voltage to the target reference voltage without using a buffer, thereby reducing costs and avoiding the operational amplifier error problem caused by using a buffer to obtain the target reference voltage, thereby improving accuracy.

[0064] The voltage adjustment circuit and the bandgap reference circuit included in the voltage output circuit are specifically introduced below.

[0065] As described above, the voltage adjustment circuit can use a resistor, or a resistor and a transistor, to adjust the basic bandgap voltage based on the first current and the second current to reach the target reference voltage. In some implementations, the voltage adjustment circuit includes at least one resistor, and the at least one resistor converts the sum of the first current and the second current into an adjustment voltage. In other implementations, the voltage adjustment circuit includes at least one resistor and at least one transistor connected in series, and the at least one resistor and the at least one transistor convert the first current and the second current into the adjustment voltage.

[0066] It can be understood that the bandgap reference circuit may include one or more voltage generating devices connected in series, and the voltage generating device may include any of the following: a resistor, a diode, and a transistor with a base-collector short circuit. In some implementations, the bandgap reference circuit also includes an operational amplifier, so that the second current is generated on the operational amplifier and the resistor in the voltage generating device.

[0067] Figure 3A According to some embodiments of the present application, a bandgap reference voltage adjustment circuit 30A is shown. The bandgap reference voltage adjustment circuit 30A includes a voltage output circuit 302A and a compensation circuit 301. The voltage output circuit 302A includes a voltage adjustment circuit 3021A and a bandgap reference circuit 3022A. The voltage output circuit 302A is introduced by taking an example of a resistor converting the sum of a first current and a second current into an adjustment voltage. The bandgap reference circuit 3022A is introduced by taking an example of a transistor including resistors connected in series and a base-collector short-circuited transistor.

[0068] The voltage adjustment circuit 3021A includes a resistor R1_3, and the bandgap reference circuit 3022A includes a resistor R1_1, a resistor R1_2, a transistor Q1_1, an operational amplifier OP1, and an NMOS driver NM1. The first end of the resistor R1_3 is connected to the output end of the voltage output circuit 302A, and the second end of the resistor R1_3 is connected in series with the compensation circuit 301 and the bandgap reference circuit 3022A. The first end of the resistor R1_1 is connected in series with the voltage adjustment circuit 3021A (that is, the first end of the resistor R1_1 is connected to the second end of the resistor R1_3), the second end of the resistor R1_1, the first end of the resistor R1_2 and the non-inverting input end of the operational amplifier OP1 are connected, the second end of the resistor R1_2, the reverse input end of the operational amplifier OP1, the base of the transistor Q1_1 and the collector of the transistor Q1_1 are connected, the emitter of the transistor Q1_1 is grounded, the gate of the NMOS driving tube NM1 is connected to the output end of the operational amplifier OP1, and the drain of the NMOS driving tube NM1 is connected to the output end of the voltage output circuit 302A.

[0069] It can be understood that the following formula (3) shows the corresponding Figure 3A Under the circuit structure of , the target reference voltage output by the bandgap reference voltage adjustment circuit 30A is calculated as follows:

[0070]

[0071] Wherein, Vref represents the target reference voltage, and Ic represents the first current provided by the compensation circuit 301. R1_1, R1_2, and R1_3 are the resistance values ​​corresponding to the resistors R1_1, R1_2, and R1_3, respectively, and (ΔVbe / R1) is the second current Ip. Since the resistors R1_1 and R1_2 are connected in series, the total voltage on the resistors R1_1 and R1_2 is (ΔVbe / R1_2)*(R1_1+R1_2). The current on the resistor R1_3 includes the first current Ic and the second current Ip, so the voltage on the resistor R1_3 is (Ic+)*R1_3, and Vbe is the voltage formed on the transistor Q1_1 according to the base-emitter voltage difference. Since the voltage difference ΔVbe across the operational amplifier OP1 will generate a voltage ΔVbe with a positive temperature relationship, that is, the second current Ip corresponding to (ΔbeV / R1_2) is a current that has a positive relationship with temperature. When the first current Ic is a negative temperature current, the target reference voltage can have a zero temperature relationship, thereby obtaining the target reference voltage expression shown in the above formula (3).

[0072] It is understandable that the size of Ic can be selected according to the specific set Vref voltage. In some embodiments, the specific structure of the compensation circuit 301 that generates Ic can be the structure shown in the compensation circuit 301A or the compensation circuit 301B, and the negative temperature end of the compensation circuit 301B is connected to the voltage adjustment circuit 3021.

[0073] Figure 3B According to some embodiments of the present application, a bandgap reference voltage adjustment circuit 30B is shown. In the bandgap reference voltage adjustment circuit 30B, the connection relationship of each component of the bandgap reference voltage adjustment circuit 30B is specifically described by taking the structure shown in the compensation circuit 301A as an example of the compensation circuit. In addition, the compensation circuit 301A generates a first current based on the second current provided by the bandgap reference circuit 3022A and provides the first current to the voltage adjustment circuit 3021A.

[0074] Specifically, the base of the transistor Q2_1 in the compensation circuit 301A is connected to the base of the transistor Q1_1 in the bandgap reference circuit 3022A, and the base of the transistor Q2_2 in the compensation circuit 301A is connected to the second end of the resistor R1_3 in the voltage adjustment circuit 3021A. The description of the connection relationship of other components in the compensation circuit 301A, the bandgap reference circuit 3022A and the voltage adjustment circuit 3021A can be referred to. Figure 2B The description of the specific structure of the compensation circuit 301A and Figure 3AThe detailed structural description of the bandgap reference circuit 3022A and the voltage adjustment circuit 3021A is not repeated here. In addition, it can be understood that the base of the transistor Q2_1 in the compensation circuit 301A can also be connected to the second end of the resistor R1_1 (not shown in the figure), and the specific connection method is not required here.

[0075] Combine the following Figure 3B The calculation method of the target reference voltage output by the voltage output circuit 302A is described.

[0076] Assuming that the area ratio of transistor Q2_1 to transistor Q1_1 is 1:k, since the base of transistor Q2_1 is connected to the base of transistor Q1_1 in the voltage output circuit 302A, and the base of transistor Q1_1 is short-circuited with the collector, the collector current Ip on transistor Q1_1 can be converted into the emitter current on transistor Q2_2 through a 1:k current mirror, and the magnitude is Ip / k. Correspondingly, assuming that the common emitter current amplification factor of transistor Q2_2 is β, the magnitude of the first current Ic on the base of transistor Q2_2 is Ip / (k*β), where k*β is a negative temperature coefficient, that is, the first current has a negative relationship with the temperature.

[0077] It can be understood that by substituting the magnitude of the first current Ic (Ip / k)*β into the above formula (3), the expression of the target reference voltage shown in the following formula (4) can be obtained:

[0078]

[0079] Wherein, Ip=(ΔVbe / R1_2). Since the second current Ip is a positive temperature current and the first current Ic is a negative temperature current, the voltage adjustment circuit 3021A generates a negative temperature voltage based on the first current Ic and generates a positive temperature voltage based on the second current Ip, so that the target reference voltage is zero temperature. It can be understood that the size of each resistance value and the common emitter current amplification factor β and the size of k in the area ratio can be adjusted according to the above formula (4) to achieve the target reference voltage.

[0080] It can be understood that the above compensation circuit 301A is only one implementation method for providing the negative temperature compensation current for the compensation circuit 301 .

[0081] In some other embodiments, the compensation circuit 301 can also be Figure 2B The compensation circuit 301B shown provides a negative temperature compensation current. It can be understood that for the above Figure 3A , the negative temperature end of the compensation circuit 301B can be connected to the voltage adjustment circuit 3021A, that is, Ic is In at this time.

[0082] In addition, if the resistance value of the resistor in the voltage output circuit 302A is adjusted so that the compensation circuit 301 needs to generate a positive temperature current, the positive temperature end of the compensation circuit 301B can be connected to the voltage adjustment circuit 3021A, that is, Ic is Ig at this time.

[0083] Further, the bandgap reference voltage adjustment circuit 30A may be connected to the output end of the chip external power supply circuit. Specifically, the chip external power supply circuit may include a resistor R2_1 and an external power supply VIN, and the first end of the resistor R2_1 is connected to the external power supply VIN, and the second end of the resistor R2_1 is connected to the output end of the chip external power supply circuit.

[0084] As mentioned above, the voltage adjustment circuit includes at least one resistor and at least one transistor connected in series, and the at least one resistor and the at least one transistor convert the first current and the second current into the adjustment voltage.

[0085] Figure 3C According to an embodiment of the present application, another bandgap reference voltage adjustment circuit 30C is shown. The bandgap reference voltage adjustment circuit 30C includes a compensation circuit 301A and a voltage output circuit 302B. The voltage output circuit 302B includes a voltage output circuit 3021B and a bandgap reference circuit 3022A. The voltage output circuit 3021B converts the sum of the first current and the second current into an adjustment voltage based on a resistor R1_3 and a transistor Q1_2.

[0086] Specifically, the voltage output circuit 3021B includes a transistor Q1_2 and a resistor R1_3. The emitter of the transistor Q1_2 is connected to the first end of the resistor R1_3, the collector of the transistor Q1_2 is connected to the chip internal power supply VDD, and the base of the transistor Q1_2 outputs the target reference voltage. The second end of the resistor R1_3 is connected in series with the compensation circuit 301A and the bandgap reference circuit 3022A. The compensation circuit 301A and the bandgap reference circuit 3022A can refer to the specific description of the compensation circuit 301A and the bandgap reference circuit 3022A above, which will not be repeated here.

[0087] The following formula (5) is based on Figure 3C The circuit structure shown in FIG. 1 shows a method for calculating a target reference voltage. The method for calculating the target reference voltage output by the bandgap reference voltage adjustment circuit 30C is:

[0088]

[0089] In which, taking the voltage formed on transistor Q1_1 according to the base-emitter voltage difference and the voltage formed on transistor Q1_2 according to the base-emitter voltage difference as an example, 2Vbe is the sum of the voltage formed on transistor Q1_1 according to the base-emitter voltage difference and the voltage formed on transistor Q1_2 according to the base-emitter voltage difference, and Ic represents the first current provided by the compensation circuit 301A. R1_1, R1_2, and R1_3 are the resistance values ​​corresponding to resistor R1_1, resistor R1_2, and resistor R1_3, respectively, and (ΔVbe / R1_2) is the current on resistor R1_2. It can be understood that the resistance values ​​of resistors R1_1, R1_2, and R1_3 can be adjusted so that the Vref value output is twice the basic band gap value.

[0090] Figure 3D According to an embodiment of the present application, another bandgap reference voltage adjustment circuit 30D is shown. The bandgap reference voltage adjustment circuit 30C includes a compensation circuit 301A and a voltage output circuit 302C. The voltage output circuit 302C includes a voltage output circuit 3021C and a bandgap reference circuit 3022A. Among them, the voltage output circuit 3021B converts the sum of the first current and the second current into an adjustment voltage based on the resistor R1_3, the transistor Q1_2, and the m series-connected base-collector short-circuited transistors Qn1-Qnm.

[0091] Specifically, the collector of the previous transistor among the m transistors Qn1, Qn2, ..., Qnm is connected to the emitter of the next transistor, the emitter of the transistor Qn1 is connected to the first end of the resistor R1_3, the collector of the transistor Qnm is connected to the emitter of the transistor Q1_2, the collector of the transistor Q1_2 is connected to the internal power supply VDD of the chip, and the base of the transistor Q1_2 outputs the target reference voltage.

[0092] It is understandable that, since multiple transistors are added, the values ​​of resistors R1_1, R1_2, and R1_3 can be adjusted at this time, so that the target reference voltage can more easily obtain multiple times of the basic bandgap voltage. For example, the multiple of the target reference voltage of the voltage output circuit can be determined by the number of transistors participating in the voltage calculation in the voltage output circuit. When the number of transistors participating in the target reference voltage calculation is N, the resistance values ​​of the devices in the compensation circuit and the resistors in the voltage output circuit can be adjusted at this time so that the target reference voltage is N times the basic bandgap voltage.

[0093] Understandably, Figure 3C and Figure 3D In the bandgap reference voltage adjustment circuit 30C and the bandgap reference voltage adjustment circuit 30D shown, the compensation circuit 301A may also be replaced by a compensation circuit 301B, and the specific implementation method is not described in detail here.

[0094] It is understandable that in other embodiments, the voltage output circuit 302 may be implemented in another manner. The chip external power supply circuit 20 may also be implemented in another manner.

[0095] Figure 4 According to some embodiments of the present application, another bandgap reference voltage adjustment circuit 30E is shown. And the bandgap reference voltage adjustment circuit 30E is connected to the chip external power supply circuit 20B. Among them, the bandgap reference voltage adjustment circuit 30E includes a voltage output circuit 302D and a compensation circuit 301. The voltage output circuit 302D includes a voltage adjustment circuit 3021B and a bandgap reference circuit 3022B.

[0096] Specifically, the bandgap reference circuit 3022B includes a resistor R1_2, a resistor R4_1, an operational amplifier OP1, and an NMOS driving transistor NM1.

[0097] The first end of the resistor R1_2 is connected in series with the voltage adjustment circuit 3021B, the second end of the resistor R1_2, the first end of the resistor R4_1, and the non-inverting input end of the operational amplifier OP1 are connected, the second end of the resistor R1_2, the reverse input end of the operational amplifier OP1 and the first end of the resistor R4_1 are connected, the second end of the resistor R4_1 is grounded, the gate of the NMOS driving tube NM1 is connected to the output end of the operational amplifier OP_2, and the drain of the NMOS driving tube NM1 is connected to the chip external power supply circuit 20B.

[0098] The chip external power supply circuit 20B includes a resistor R5_1, a resistor R5_2, and a resistor 5_3. The first end of the resistor R5_1 is connected to the external power supply VIN, the second end of the resistor R5_1 is connected to the first end of the resistor R5_2, the second end of the resistor R5_2 is connected to the first end of the resistor R5_3 and the output end of the voltage adjustment circuit 3021B, the second end of the resistor R5_3 is grounded, and the second end of the resistor R5_1 is connected to the drain of the NMOS driver tube NM1.

[0099] Figure 4 The VK node of the chip external power supply circuit 20B is connected to the output end of the voltage output circuit 302D after voltage division through the resistors R5_2 and R5_3. A stable voltage VK can be obtained through negative feedback, and the formula of the voltage VK is shown in the following formula (6):

[0100] VK=Vref / R5_3*(R5_2+R5_3) Formula (6)

[0101] The resistance value of R5_2 can be selected to be 0, and the resistance R6 is disconnected, at which time VK=Vref. That is, the first end of the resistor R5_3 is connected to the second end of the resistor R5_1.

[0102] Understandably, for Figure 4 The end of the compensation circuit 301 shown in FIG. 3 that provides the first current may also be connected between the resistor R1_2 and the resistor R4_1 . In this case, the bandgap reference circuit only includes the resistor R4_1 .

[0103] Understandably, for Figure 4 The voltage adjustment circuit 3021B shown in the figure may also be replaced by the voltage adjustment circuit 3021C described above, and the specific implementation method is not required here.

[0104] In some embodiments of the present application, a chip is further provided, which includes the bandgap reference voltage adjustment circuit described in the above embodiments.

[0105] The specific application form of the bandgap reference voltage adjustment circuit design solution is not limited in this embodiment. Optionally, the application scope of the bandgap reference voltage adjustment circuit design solution includes but is not limited to a digital-to-analog converter, an analog-to-digital converter, a reference voltage source or a power management chip.

[0106] In the accompanying drawings, some structural or method features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be required. Instead, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. In addition, the inclusion of structural or method features in a particular figure does not mean that such features are required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.

[0107] It should be noted that the units / modules mentioned in the various device embodiments of the present application are all logical units / modules. Physically, a logical unit / module can be a physical unit / module, or a part of a physical unit / module, or can be implemented as a combination of multiple physical units / modules. The physical implementation method of these logical units / modules themselves is not the most important. The combination of functions implemented by these logical units / modules is the key to solving the technical problems proposed by the present application. In addition, in order to highlight the innovative part of the present application, the above-mentioned device embodiments of the present application do not introduce units / modules that are not closely related to solving the technical problems proposed by the present application, which does not mean that there are no other units / modules in the above-mentioned device embodiments.

[0108] It should be noted that in the examples and description of this patent, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "including one" do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0109] Although the present application has been illustrated and described with reference to certain preferred embodiments thereof, it will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application.

Claims

1. A bandgap reference voltage adjustment circuit, characterized in that: The circuit comprises: A compensation circuit, configured to generate a first current; a voltage output circuit connected to the compensation circuit; the voltage output circuit comprises a bandgap reference circuit and a voltage adjustment circuit connected thereto, the bandgap reference circuit is used to generate a basic bandgap voltage, the voltage adjustment circuit is used to generate an adjustment voltage, and the voltage output circuit can output a target reference voltage according to the basic bandgap voltage and the adjustment voltage; The current in the bandgap reference circuit is a second current, the voltage adjustment circuit is connected in series with the compensation circuit and the bandgap reference circuit respectively, and can generate the adjustment voltage according to the first current and the second current, wherein one of the first current and the second current is a positive temperature current, and the other is a negative temperature current.

2. The bandgap reference voltage adjustment circuit according to claim 1, characterized in that: The voltage output circuit provides a second current to the compensation circuit. The compensation circuit generates the first current based on the second current. The magnitudes of the second current and the first current have a first proportional relationship.

3. The bandgap reference voltage adjustment circuit according to claim 2, characterized in that: The compensation circuit comprises: a third transistor (Q2_1) and a fourth transistor (Q2_2); The base of the third transistor (Q2_1) receives the second current, and the base of the fourth transistor (Q2_2) provides the first current; the emitter of the third transistor (Q2_1) is grounded, the collector of the third transistor (Q2_1) is connected to the emitter of the fourth transistor (Q2_2), and the collector of the fourth transistor Q2_2 is connected to a power supply.

4. The bandgap reference voltage adjustment circuit according to any one of claims 1, characterized in that: The compensation circuit includes a positive temperature terminal and a negative temperature terminal. When the first current has a positive temperature relationship with the adjustment voltage, the positive temperature terminal of the compensation circuit is connected in series with the voltage adjustment circuit; When the first current has a negative temperature relationship with the adjustment voltage, the negative temperature end of the compensation circuit is connected in series with the voltage adjustment circuit.

5. The bandgap reference voltage adjustment circuit according to claim 4, characterized in that: The compensation circuit comprises: a second NMOS driving tube (NM2), a third NMOS driving tube (NM3), a first PMOS driving tube (PM1), a second PMOS driving tube (PM2), a third PMOS driving tube (PM3), a fifth triode (Q3_1), a sixth triode (Q3_2), a fifth resistor (R3_1), a sixth resistor (R3_2), and a seventh resistor (R3_3); a drain of the second NMOS driving tube (NM2), a drain of the third NMOS driving tube (NM3), a source of the first PMOS driving tube (PM1), a source of the PMOS driving tube PM2, and a source of the PMOS driving tube PM3 are connected to a power supply, a gate of the third NMOS driving tube (NM3), a gate of the second NMOS driving tube (NM2), a drain of the first PMOS driving tube (PM1), and a collector of the fifth triode (Q3_1) are connected, a source of the third NMOS driving tube (NM3) is connected to a first end of the sixth resistor (R3_2), and the sixth resistor (R3_3) is connected to a first end of the sixth resistor (R3_2). The second end of the fifth resistor (R3_2), the first end of the fifth resistor (R3_1), the base of the fifth transistor (Q3_1), and the base of the sixth transistor (Q3_2) are connected; the gate of the first PMOS drive tube (PM1), the gate of the second PMOS drive tube (PM2), and the gate of the third PMOS drive tube (PM3) are connected; the gate and drain of the second PMOS drive tube (PM2) are short-circuited; the collector of the sixth transistor (Q3_2) is connected to the collector of the second PMOS drive tube (PM3); The drain of the MOS driving tube (PM2) is connected, the emitter of the sixth triode (Q3_2) is connected to the first end of the seventh resistor (R3_3), the second end of the fifth resistor (R3_1) of the sixth triode (Q3_2), the emitter of the fifth triode (Q3_1), and the second end of the seventh resistor (R3_3) are connected and grounded, the drain of the third PMOS driving tube (PM3) is connected to the positive temperature end, and the source of the NMOS driving tube NM2 is connected to the negative temperature end.

6. The bandgap reference voltage adjustment circuit according to claim 1, characterized in that: The voltage adjustment circuit includes at least one resistor, and the at least one resistor converts the sum of the first current and the second current into the adjustment voltage. 7 . The bandgap reference voltage adjustment circuit according to claim 6 , wherein at least one resistor in the voltage adjustment circuit is a first resistor ( R1_3 ).

8. The bandgap reference voltage adjustment circuit according to claim 1, characterized in that: The voltage adjustment circuit includes at least one resistor and at least one transistor connected in series, and the at least one resistor and the at least one transistor convert the first current and the second current into the adjustment voltage.

9. The bandgap reference voltage adjustment circuit according to claim 8, characterized in that: The voltage adjustment circuit includes a first resistor (R1_3) and a first transistor (Q1_2). The base of the first triode (Q1_2) is connected to the output end of the bandgap reference voltage adjustment circuit, the collector of the first triode (Q1_2) is connected to a power supply, the emitter of the first triode (Q1_2) is connected to the first end of the first resistor (R1_3), and the second end of the first resistor (R1_3) is respectively connected in series with the compensation circuit and the bandgap reference circuit.

10. The bandgap reference voltage adjustment circuit according to any one of claims 1 to 9, characterized in that: The bandgap reference circuit includes one or more voltage generating devices connected in series, and the voltage generating device includes any one of the following: a resistor, a diode, and a transistor with a base-collector short circuit.

11. The bandgap reference voltage adjustment circuit according to claim 10, characterized in that: The one or more voltage generating devices include: a second resistor (R1_2), and the bandgap reference circuit further includes a first operational amplifier (OP1), and the first operational amplifier (OP1) is used to generate the second current in the second resistor (R1_2).

12. The bandgap reference voltage adjustment circuit according to claim 11, characterized in that: The one or more voltage generating devices further include: a third resistor (R1_1) and a second transistor (Q1_1).

13. The bandgap reference voltage adjustment circuit according to claim 12, characterized in that: The bandgap reference circuit also includes a first NMOS driving tube (NM1); Wherein, a first end of the third resistor (R1_1) is connected in series with the voltage adjustment circuit, a second end of the third resistor (R1_1) is connected to a first end of the second resistor (R1_2), a first end of the second resistor (R1_2) is connected to a non-inverting input end of the first operational amplifier (OP1), a second end of the second resistor (R1_2) is connected to a reverse input end of the first operational amplifier (OP1), a base of the second triode (Q1_1) is connected to a collector, an emitter of the second triode (Q1_1) is grounded, a gate of the first NMOS driving tube (NM1) is connected to an output end of the first operational amplifier (OP1), and a drain of the first NMOS driving tube (NM1) is connected to an output end of the voltage output circuit.

14. The bandgap reference voltage adjustment circuit according to claim 11, characterized in that: The one or more voltage generating devices further include: a fourth resistor (R4_1); the bandgap reference circuit further includes a first NMOS driving tube (NM1); The first end of the second resistor (R1_2) is connected in series with the voltage adjustment circuit, and the first end of the second resistor (R1_2) is connected to the non-inverting input end of the first operational amplifier (OP1), the second end of the second resistor (R1_2) is connected to the first end of the fourth resistor (R4_1) and the reverse input end of the first operational amplifier (OP1), the second end of the fourth resistor (R4_1) is grounded, the output end of the first operational amplifier (OP1) is connected to the gate of the first NMOS drive tube (NM1), the source of the first NMOS drive tube (NM1) is grounded, and the drain of the first NMOS drive tube (NM1) is connected to a power supply.

15. A chip comprising the bandgap reference voltage adjustment circuit according to any one of claims 1 to 14.

Citation Information

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