Partition display driving method, display driving circuit and display screen

Abstract

The invention discloses a partition display driving method, a display driving circuit and a display screen. The method comprises the following steps: acquiring a refresh rate of a display area; under the condition that a plurality of sub-regions of a display region respectively have a plurality of refresh rates, the voltage of a reference signal end in a pixel driving unit is controlled to drop, so that in a partition refresh mode, by setting the voltage dynamic change of the reference signal end, the brightness difference under partitions is weakened, and the display quality is improved. And the purpose of balancing the brightness of the areas with different refresh rates is achieved.

Description

Technical Field

[0001] The present application relates to the technical field of display screens, and in particular to a partition display driving method, a display driving circuit, and a display screen. Background Art

[0002] As people's living standards improve, electronic products play an important role in people's lives. Display panels are important components of electronic products, so the demand for display panels is increasing.

[0003] Nowadays, ordinary display effects can no longer meet people's quality of life, and people's demand for display panels with high refresh rates is increasing. However, display panels in the partition refresh state have the problem of brightness differences. Summary of the invention

[0004] In view of the above problems, the present application provides a partition display driving method, a display driving circuit, and a display screen, aiming to provide a partition refresh solution to solve the problem of brightness difference of the display panel in the current partition refresh state.

[0005] A first aspect of an embodiment of the present application provides a partition display driving method, the partition display driving method comprising:

[0006] Get the refresh rate of the display area;

[0007] When the multiple sub-areas of the display area have multiple refresh rates, the voltage drop of the reference signal terminal in the pixel driving unit is controlled; wherein the power supply terminal of the pixel driving unit is connected to the reference signal terminal via a storage capacitor and a scan driving transistor.

[0008] In some embodiments, when the plurality of sub-areas of the display area have a plurality of refresh rates, controlling the voltage drop of the reference signal terminal in the pixel driving unit includes:

[0009] Get the pixel range of high refresh area and low refresh area;

[0010] The voltage drop of the reference signal terminal in the pixel driving unit corresponding to the high refresh area is controlled according to the pixel range of the high refresh area.

[0011] In some embodiments, the drop amplitude of the voltage at the reference signal terminal in the pixel driving unit is related to the refresh rate difference between the low refresh area and the high refresh area in the display area.

[0012] In some embodiments, the greater the difference in refresh rate between the high refresh area and the low refresh area, the greater the drop in voltage at the reference signal terminal in the pixel driving unit.

[0013] In some embodiments, the partition display driving method further includes:

[0014] Obtaining a refresh rate difference between the high refresh rate area and the low refresh rate area;

[0015] The voltage of the reference signal terminal in the pixel driving unit is determined according to the difference in refresh rate between the high refresh area and the low refresh area.

[0016] In some embodiments, determining the voltage of the reference signal terminal in the pixel driving unit according to the difference between the refresh rates of the high refresh area and the low refresh area includes:

[0017] The voltage of the reference signal terminal in the pixel driving unit is determined according to the difference in refresh rate between the high refresh area and the low refresh area and a preset refresh rate-reference voltage relationship table.

[0018] In some embodiments, determining the voltage of the reference signal terminal in the pixel driving unit according to the difference between the refresh rates of the high refresh area and the low refresh area includes:

[0019] The voltage of the reference signal terminal in the pixel driving unit is gradually reduced according to the difference in refresh rate between the high refresh area and the low refresh area.

[0020] A second aspect of the embodiments of the present application further provides a display driving circuit, the display driving circuit comprising a plurality of pixel driving units and a main control circuit, the main control circuit being used to execute the partition display driving method as described in any one of the above embodiments;

[0021] The plurality of pixel driving units are used to respectively drive a plurality of display pixels to light up.

[0022] In some embodiments, the display driving circuit further includes a plurality of scanning driving modules, and the plurality of gate scanning lines are respectively connected to the plurality of scanning driving modules;

[0023] The scanning driving module is controlled by the main control circuit to provide gate scanning signals for the plurality of gate scanning lines, and the plurality of pixel driving units are respectively connected to corresponding gate scanning lines;

[0024] Each of the pixel driving units is used to drive the corresponding display pixel to light up according to the received gate scanning signal and data signal.

[0025] A third aspect of the embodiments of the present application further provides a display screen, which includes a display driving circuit as described in any one of the above embodiments.

[0026] The beneficial effects of the embodiments of the present application are as follows: by obtaining the refresh rate of the display area; when multiple sub-areas of the display area have multiple refresh rates, the voltage drop of the reference signal terminal in the pixel driving unit is controlled, so that in the partition refresh mode, the brightness differentiation under the partition is weakened by setting the dynamic change of the voltage of the reference signal terminal, so as to achieve the purpose of balancing the brightness of areas with different refresh rates.

[0027] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Moreover, the same reference numerals are used throughout the drawings to represent the same components. In the drawings:

[0029] Figure 1 A first schematic diagram of a partition display driving method provided in an embodiment of the present application;

[0030] Figure 2 A schematic diagram of a pixel driving unit provided in an embodiment of the present application;

[0031] Figure 3 A second schematic diagram of the partition display driving method provided in an embodiment of the present application;

[0032] Figure 4 A third schematic diagram of the partition display driving method provided in an embodiment of the present application;

[0033] Figure 5 A schematic diagram of a display driving circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0036] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0037] Reference to "embodiment" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiment may be included in at least one embodiment of the present application. The phrase "second connection port" at various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0038] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0039] In the description of the embodiments of the present application, the term "multi-frame" refers to more than two (including two).

[0040] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0041] In the related art, in order to achieve better power consumption benefits and thus extend the use time of electronic products, different refresh frequencies can be set in different areas of the screen. However, when the display screen is refreshed in different zones, the refresh rates of each display area are different. Due to the different characteristic offsets of the N-type transistors in the pixel driving circuit of the TFT device at different refresh rates, brightness differences occur in different areas. For example, the N-type transistor that performs scan drive at 120hz is in a PBS / NBS cycle state, and the N-type transistor is in a long-term NBS state at a low refresh rate. In the PBS state, the gate of one of the N-type transistors has a positive voltage of about 8V, causing the electrons in the film to be attracted to the interface between IGZO and GI, thereby being captured by defects at the interface, causing the transfer characteristic curve of the device to move in the positive direction of Vgs. In the NBS state, the holes in the film are attracted to the defects near the interface, which captures the TFT characteristic drift in the negative direction of Vgs, resulting in brightness differences under zone refresh.

[0042] In order to solve the above technical problems, the present application embodiment provides a partition display driving method, see Figure 1 As shown, the partition display driving method in this embodiment includes steps S100 to S200.

[0043] In step S100, the refresh rate of the display area is obtained.

[0044] In this embodiment, in order to reduce the power consumption of the display panel, the display area can be set with multiple sub-areas with different refresh rates according to the application scenario, wherein the low refresh area refers to the area of ​​the display panel that uses a lower refresh rate for display, and the high refresh area refers to the area of ​​the display panel that uses a higher refresh rate for display, and the image refresh rate of the high refresh area is higher than that of the low refresh area. When the display panel displays the image, it can display the image with a low refresh rate in some areas according to user needs or image display needs. For example, in the area where only text needs to be displayed in some areas, the display refresh rate of the area can be reduced to achieve the purpose of reducing display power consumption.

[0045] In some embodiments, the image refresh rate in the low refresh area may be less than 30 Hz.

[0046] In some embodiments, the image refresh rate in the low refresh area may be 1 Hz.

[0047] In some embodiments, the image refresh rate in the high refresh area may be greater than 60 Hz.

[0048] In some embodiments, the image refresh rate in the high refresh area can be 120 Hz.

[0049] In step S200, when the plurality of sub-areas of the display area have a plurality of refresh rates, the voltage of the reference signal terminal in the pixel driving unit is controlled to decrease.

[0050] In this embodiment, the display panel includes a plurality of display pixels, and the plurality of display pixels can be arranged in an array. Each display pixel is driven by a corresponding pixel driving unit. The pixel driving unit can generate a pixel driving signal according to a received gate scanning signal, thereby driving the corresponding display pixel to light up. When the plurality of display pixels are driven to light up, the corresponding picture can be displayed.

[0051] The power supply terminal of the pixel driving unit is connected to the reference signal terminal via the storage capacitor and the scanning driving transistor. Under the condition of low refresh rate, since the scanning driving transistor is in the NBS effect opening time for a long time, the stress degree of the scanning driving transistor in the low refresh rate area is higher than that in the high refresh rate area (the DTFT gate is higher), resulting in a negative bias in the threshold voltage (Vth) of the scanning driving transistor, weakening the degree of coupling of the scanning driving transistor from the off gate voltage (PVGL_N) to the on-pole voltage (PVGH_N) to the DTFT gate, resulting in the high refresh rate area being brighter. Therefore, when the display panel enters the partition refresh mode, the voltage of the reference signal terminal in the pixel driving unit can be reduced, so that the initialization reset of the storage capacitor connected in series with the scanning driving transistor in the high refresh rate area can be enhanced, and the charging point of the storage capacitor is low, thereby improving the brightness of the high refresh rate area and weakening the brightness difference between different areas under the partition refresh caused by the PBS of the scanning driving transistor.

[0052] In some embodiments, see Figure 2 As shown, the pixel driving unit includes: a first P-type transistor T1, a second P-type transistor T2, a first N-type transistor T3, a second N-type transistor T4, a third P-type transistor T5, a fourth P-type transistor T6 and a storage capacitor Cst.

[0053] In this embodiment, the first end of the second P-type transistor T2 is used to receive the display data signal, and the control end of the second P-type transistor T2 is used to receive the first data control signal Data; the control end of the second N-type transistor T4 is used to receive the first scan control signal SN1, and the control end of the first N-type transistor T3 is used to receive the second scan control signal SN2. The second scan control signal SN2 can be provided by a level conversion circuit, and the partition enable signal can be output as the second scan control signal SN2 to the control end of the first N-type transistor T3 via the output end of the level conversion circuit, thereby realizing partition refresh control of the pixel driving unit 530.

[0054] The control end of the third P-type transistor T5 and the controller of the fourth P-type transistor T6 are connected together to receive the dimming control signal EM; the control end of the fifth P-type transistor T7 and the control end of the sixth P-type transistor T8 are connected together to receive the second data control signal SP2. The first end of the third P-type transistor T5 and the first end of the storage capacitor Cst are commonly connected to the first power supply terminal ELVDD, the second end of the second P-type transistor T2, the second end of the third P-type transistor T5, and the first end of the first P-type transistor T1 are commonly connected, the second end of the storage capacitor Cst, the control end of the first P-type transistor T1, and the first end of the first N-type transistor T3 are commonly connected, the second end of the first N-type transistor T3, the first end of the second N-type transistor T4, the second end of the first P-type transistor T1, the first end of the fourth P-type transistor T6, and the first end of the sixth P-type transistor T8 are commonly connected, the second end of the second N-type transistor T4 is connected to the first reference signal terminal Vrefn1, the second end of the fourth P-type transistor T6 and the first end of the fifth P-type transistor T7 are commonly connected to the positive electrode of the display diode OLED, the negative electrode of the display diode is connected to the reference ground, the second end of the fifth P-type transistor T7 is connected to the second reference signal terminal Vrefn2, and the second end of the sixth P-type transistor T8 is connected to the third reference signal terminal Vrefp.

[0055] In this embodiment, the first N-type transistor T3 and the second N-type transistor T4 can both be used as scan driving transistors in the pixel driving unit, and the first reference signal terminal Vrefn1 can be used as a reference signal terminal in the pixel driving unit.

[0056] In the high refresh rate area, where the first N-type transistor T3 is in a long open state, the PBS effect of the first N-type transistor T3 causes the stress level of the high refresh rate area to be higher than that of the low refresh rate area, thereby causing the threshold voltage (Vth) of the first N-type transistor T3 to be positively biased, weakening the degree of coupling of the first N-type transistor T3 from the gate on voltage (PVGH_N) to the gate off voltage (PVGL_N) to the DTFT gate, resulting in dim brightness in the high refresh rate area, which in turn causes the data voltage (Vdata) of the storage capacitor Cst in the pixel driving unit to decrease, resulting in lower brightness in the high refresh rate area, and a brightness split screen problem. Therefore, by reducing the voltage of the reference signal terminal in the pixel driving unit when the display panel enters the partition refresh mode, the initialization reset of the storage capacitor connected in series with the scan drive transistor in the high refresh rate area can be enhanced, and the charging point of the storage capacitor is low, thereby improving the brightness of the high refresh rate area, weakening the brightness difference between different areas under the partition refresh caused by the PBS of the scan drive transistor, and achieving the purpose of balancing the brightness of display areas with different refresh rates.

[0057] In some embodiments, in the low refresh rate area, the first N-type transistor T3 is in the NBS effect open time for a longer time, resulting in a higher stress level in the low refresh rate area than in the high refresh rate area (DTFT gate is higher), resulting in a negative bias in the threshold voltage (Vth) of the first N-type transistor T3. For example, at a refresh rate of 1 Hz, the first N-type transistor T3 is closed in the frame area, and the voltage drop at the reference signal end in the pixel driving unit has little effect on the low refresh area. Therefore, when the display panel enters the partition refresh mode, the voltage at the dynamic reference signal end can be triggered by DDIC to achieve the purpose of balancing the brightness of display areas with different refresh rates.

[0058] In some embodiments, the second P-type transistor T2, the fifth P-type transistor T7, the sixth P-type transistor T8, the third P-type transistor T5 and the fourth P-type transistor T6 are P-type TFTs; the first N-type transistor T3 and the second N-type transistor T4 are N-type TFTs.

[0059] In some embodiments, in combination Figure 3 As shown, step S200 includes step S211 and step S212.

[0060] In step S211, the pixel ranges of the high refresh area and the low refresh area are obtained.

[0061] In step S212, the voltage drop of the reference signal terminal in the pixel driving unit corresponding to the high refresh area is controlled according to the pixel range of the high refresh area.

[0062] In this embodiment, the display area can be set with multiple sub-areas with different refresh rates according to the application scenario, wherein the low refresh area represents an area in the display panel that uses a lower refresh rate for display, and the high refresh area represents an area in the display panel that uses a higher refresh rate for display, and the picture refresh rate of the high refresh area is higher than that of the low refresh area. In the high refresh rate area, the first N-type transistor T3 is in a state of being turned on for a long time, and the PBS effect of the first N-type transistor T3 causes the stress level of the high refresh rate area to be higher than that of the low refresh rate area, thereby causing the threshold voltage (Vth) of the first N-type transistor T3 to be positively biased, weakening the degree of coupling of the first N-type transistor T3 from the gate on voltage (PVGH_N) to the gate off voltage (PVGL_N) to the DTFT gate, resulting in dim brightness in the high refresh rate area, which in turn causes the data voltage (Vdata) of the storage capacitor Cst in the pixel driving unit to become smaller, resulting in lower brightness in the high refresh rate area, and the problem of brightness split screen occurs. Therefore, by obtaining the pixel range of the high refresh area and selecting the voltage drop at the reference signal end of the pixel driving unit corresponding to the pixel range of the high refresh area, the initialization reset of the storage capacitor connected in series with the scanning drive transistor in the high refresh rate area can be enhanced, and the charging point of the storage capacitor can be low, thereby improving the brightness of the high refresh rate area and reducing the brightness difference between different areas under the partition refresh caused by the PBS of the scanning drive transistor, thereby achieving the purpose of balancing the brightness of display areas with different refresh rates.

[0063] In some embodiments, when the display panel operates in the normal mode and the display panel does not operate in the partition refresh mode, the display panel is connected to the display panel. Figure 2 As shown, the first reference signal terminal Vrefn1 can be set to -4V. When the display panel works in the partition refresh mode, the dynamic voltage setting can be triggered by DDIC to set the voltage of the first reference signal terminal Vrefn1 to -5V.

[0064] In some embodiments, the voltage of the first reference signal terminal Vrefn1 is reduced and set reasonably in the 120 Hz area to enhance the initialization reset of the storage capacitor Cst in the high refresh area, and the charging point of the storage capacitor Cst is relatively low, so that the brightness of the 120 Hz area is increased, and the brightness difference of different areas under the partition refresh caused by the PBS of the first N-type transistor T3 and the second N-type transistor T4 is weakened.

[0065] In some embodiments, when the display panel works in the partition refresh mode, 1HZ is equivalent to 120hz frame skip (Frame skip) formation (different from the actual frame skip), the first N-type transistor T3 of the frame holding area in the 1hz area is turned off, and the voltage reduction of the first reference signal terminal Vrefn1 has little effect on its low refresh area. The display driver chip (Display Driver Integrated Circuit, DDIC) in this embodiment supports dynamic voltage control of the first reference signal terminal Vrefn1.

[0066] In some embodiments, the drop amplitude of the voltage at the reference signal terminal in the pixel driving unit is related to the refresh rate difference between the low refresh area and the high refresh area in the display area.

[0067] In this embodiment, combined with Figure 2 As shown, the storage capacitor Cst, the first N-type transistor T3, and the second N-type transistor T4 are connected in series to the first reference signal terminal Vrefn1. The initialization and reset of the storage capacitor Cst is related to the voltage of the first reference signal terminal Vrefn1. The greater the decrease in the voltage of the first reference signal terminal Vrefn1, the faster the storage capacitor Cst is initialized and reset. Therefore, the decrease in the voltage of the reference signal terminal in the pixel driving unit is positively correlated with the refresh rate difference between the low refresh area and the high refresh area in the display area.

[0068] In some embodiments, the greater the difference in refresh rate between the high refresh rate area and the low refresh rate area, the greater the drop in voltage at the reference signal terminal in the pixel driving unit.

[0069] In this embodiment, the greater the difference in refresh rate between the high refresh rate area and the low refresh rate area, the PBS effect of the first N-type transistor T3 causes the stress level in the high refresh rate area to be higher than that in the low refresh rate area, the greater the positive bias amplitude generated by the threshold voltage (Vth) of the first N-type transistor T3, and the lower the brightness of the high refresh rate area. Therefore, the storage capacitor Cst is required to have a higher initialization reset, and the voltage drop amplitude of the reference signal terminal in the pixel driving unit is greater.

[0070] In some embodiments, in combination Figure 4 As shown, the partition display driving method in this embodiment further includes step S310 and step S320.

[0071] In step S310, the refresh rate difference between the high refresh area and the low refresh area is obtained.

[0072] In step S320, the voltage of the reference signal terminal in the pixel driving unit is determined according to the difference between the refresh rates of the high refresh area and the low refresh area.

[0073] In this embodiment, the greater the difference in refresh rate between the high refresh area and the low refresh area, the greater the stress level of the high refresh area caused by the PBS effect of the first N-type transistor T3 is than that of the low refresh area, the greater the positive bias amplitude generated by the threshold voltage (Vth) of the first N-type transistor T3, and the lower the brightness of the high refresh area. Therefore, the storage capacitor Cst needs to have a higher initialization reset, and the greater the voltage drop at the reference signal end in the pixel driving unit. The smaller the difference in refresh rate between the high refresh area and the low refresh area, the smaller the positive bias amplitude generated by the threshold voltage (Vth) of the first N-type transistor T3, the smaller the brightness difference between the high refresh area and the low refresh area, and the lower the degree of initialization reset required for the storage capacitor Cst.

[0074] In some embodiments, the voltage of the reference signal terminal in the pixel driving unit is determined according to the difference in refresh rates between the high refresh area and the low refresh area, including: determining the voltage of the reference signal terminal in the pixel driving unit according to the difference in refresh rates between the high refresh area and the low refresh area and a preset refresh rate-reference voltage relationship table.

[0075] In this embodiment, a refresh rate-reference voltage relationship table can be established through preliminary testing. The preset refresh rate-reference voltage relationship table is used to represent the relationship between the difference in refresh rate between the high refresh area and the low refresh area and the voltage of the first reference signal terminal Vrefn1. According to the difference in refresh rate between the high refresh area and the low refresh area, the corresponding voltage value can be read from the preset refresh rate-reference voltage relationship table, and the read voltage value is used as the voltage value of the voltage of the reference signal terminal in the pixel driving unit.

[0076] In some embodiments, the voltage of the reference signal terminal in the pixel driving unit is determined according to the difference in refresh rate between the high refresh area and the low refresh area, including: gradually reducing the voltage of the reference signal terminal in the pixel driving unit according to the difference in refresh rate between the high refresh area and the low refresh area.

[0077] In this embodiment, in order to avoid the problem of flickering caused by a sudden change in the voltage at the reference signal end in the pixel driving unit when the display panel operates in the partition refresh mode, the voltage at the reference signal end in the pixel driving unit can be gradually reduced according to the difference in refresh rate between the high refresh area and the low refresh area when the display panel operates in the partition refresh mode. In this way, the brightness of the area with a high refresh rate can be slowly increased, and the brightness difference between different areas under the partition refresh caused by the PBS of the scanning drive transistor can be weakened, so as to achieve the purpose of balancing the brightness of display areas with different refresh rates and enhance the user's visual experience.

[0078] In some embodiments, the partition display driving method in this embodiment further includes step S400: generating a corresponding partition enable signal according to a pixel range of the low refresh area.

[0079] In this embodiment, the scanning area where the display refresh rate needs to be reduced is determined by the pixel range of the low refresh area, thereby generating a corresponding partition enable signal, and the partition enable signal is used to control the corresponding pixel driving unit to reduce the duty cycle of the pixel driving signal, thereby achieving a reduction in the switching duty cycle of the pixels in the corresponding area.

[0080] In some embodiments, in combination Figure 5 As shown, the partition enable signal can also be logically processed with the scan drive signal output by the scan drive module 520, so as to adjust the duty cycle of the scan drive signal output to the gate scan line 501, thereby achieving the purpose of controlling the corresponding pixel drive unit to reduce the duty cycle of the pixel drive signal, thereby realizing the partition refresh display of the display panel.

[0081] In some embodiments, the main control circuit 510 can provide a corresponding partition scanning signal to the scanning driving module 520 according to the content to be displayed on the display panel, so as to adjust the refresh rate of the corresponding display screen. For example, according to the coordinates of the display screen and the refresh rate requirements, by providing a corresponding partition scanning signal for the partition display driving method, the refresh rate of the display screen is set according to a frequency distribution such as 60hz-120hz-60hz, 30hz-120hz-30hz, 1hz-120hz-1hz, etc. Specifically, in realizing the function of displaying different refresh rates in multiple regions of a mobile phone, if the mobile phone is watching a video (requiring a high refresh rate display) and reading text (low refresh rate display) at the same time, the refresh rate of the text display area in the display screen is set to a low refresh rate (such as 1Hz, 30Hz, etc.), thereby reducing the power consumption of the display panel without affecting the display effect.

[0082] The present application also provides a display driving circuit. Figure 5 As shown, the display driving circuit in the embodiment of the present application includes multiple pixel driving units 530 and a main control circuit 510. The main control circuit 510 is used to execute the partition display driving method in any of the above embodiments; the multiple pixel driving units 530 are used to drive multiple display pixels to light up respectively.

[0083] In this embodiment, the display panel includes a plurality of display pixels, and the plurality of display pixels may be arranged in an array, each display pixel is driven by a corresponding pixel driving unit 530, and the pixel driving unit 530 may generate a pixel driving signal according to a received gate scanning signal, thereby driving the corresponding display pixel to light up, and the plurality of display pixels may display corresponding images when driven to light up. The main control circuit 510 may control the corresponding pixel driving unit 530 to generate a pixel driving signal with a low duty cycle according to the pixel range of the low refresh area, thereby reducing the refresh rate of the display image in the low refresh area.

[0084] In some embodiments, in combination Figure 5 As shown, the display driving circuit also includes multiple scanning driving modules 520, and multiple gate scanning lines 501 are respectively connected to the multiple scanning driving modules 520; the scanning driving modules 520 are controlled by the main control circuit 510 to provide gate scanning signals for the multiple gate scanning lines 501, and multiple pixel driving units 530 are respectively connected to the corresponding gate scanning lines 501; each pixel driving unit 530 is used to drive the corresponding display pixel to light up according to the received gate scanning signal and data signal.

[0085] In some embodiments, the circuit structure of the pixel driving unit 530 is as follows: Figure 2 shown.

[0086] An embodiment of the present application further provides a display screen, which includes a display driving circuit as described in any one of the above embodiments.

[0087] In this embodiment, the display screen includes a display panel and a display driving circuit. The display panel includes a plurality of display pixels. Each display pixel includes at least one display diode. The display diode can emit a corresponding color when it is lit. For example, the display diode can emit one of red light, blue light or green light. The display diodes of three colors can form a display pixel. By obtaining the refresh rate of the display area; when multiple sub-areas of the display area have multiple refresh rates, the voltage drop of the reference signal terminal in the pixel driving unit is controlled. In the partition refresh mode, by setting the voltage of the reference signal terminal to change dynamically, the brightness differentiation under the partition is weakened, so as to achieve the purpose of balancing the brightness of areas with different refresh rates.

[0088] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0089] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0090] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the electronic device embodiments described above are merely schematic. For example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0091] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0092] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0093] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A partition display driving method, characterized in that: The partition display driving method comprises: Get the refresh rate of the display area; When the multiple sub-areas of the display area have multiple refresh rates, the voltage drop of the reference signal terminal in the pixel driving unit is controlled; wherein the power supply terminal of the pixel driving unit is connected to the reference signal terminal via a storage capacitor and a scan driving transistor.

2. The partition display driving method according to claim 1, characterized in that: The method of controlling the voltage drop of the reference signal terminal in the pixel driving unit when the plurality of sub-areas of the display area have a plurality of refresh rates comprises: Get the pixel range of high refresh area and low refresh area; The voltage drop of the reference signal terminal in the pixel driving unit corresponding to the high refresh area is controlled according to the pixel range of the high refresh area.

3. The partition display driving method according to claim 1, characterized in that: The drop amplitude of the voltage at the reference signal terminal in the pixel driving unit is related to the refresh rate difference between the low refresh area and the high refresh area in the display area.

4. The partition display driving method according to claim 3, characterized in that: The greater the difference in refresh rate between the high refresh area and the low refresh area, the greater the drop in voltage at the reference signal terminal in the pixel driving unit.

5. The partition display driving method according to claim 4, characterized in that: The partition display driving method further includes: Obtaining a refresh rate difference between the high refresh rate area and the low refresh rate area; The voltage of the reference signal terminal in the pixel driving unit is determined according to the difference in refresh rate between the high refresh area and the low refresh area.

6. The partition display driving method according to claim 4, characterized in that: The step of determining the voltage of the reference signal terminal in the pixel driving unit according to the difference between the refresh rates of the high refresh area and the low refresh area comprises: The voltage of the reference signal terminal in the pixel driving unit is determined according to the difference in refresh rate between the high refresh area and the low refresh area and a preset refresh rate-reference voltage relationship table.

7. The partition display driving method according to claim 5, characterized in that: The step of determining the voltage of the reference signal terminal in the pixel driving unit according to the difference between the refresh rates of the high refresh area and the low refresh area comprises: The voltage of the reference signal terminal in the pixel driving unit is gradually reduced according to the difference in refresh rate between the high refresh area and the low refresh area.

8. A display driving circuit, characterized in that: The display driving circuit comprises a plurality of pixel driving units and a main control circuit, wherein the main control circuit is used to execute the partition display driving method according to any one of claims 1 to 7; The plurality of pixel driving units are used to drive a plurality of display pixels to light up.

9. The display driving circuit according to claim 8, characterized in that: The display driving circuit further comprises a plurality of scanning driving modules, and a plurality of gate scanning lines are respectively connected to the plurality of scanning driving modules; The scanning driving module is controlled by the main control circuit to provide gate scanning signals for the plurality of gate scanning lines, and the plurality of pixel driving units are respectively connected to the corresponding gate scanning lines; Each of the pixel driving units is used to drive the corresponding display pixel to light up according to the received gate scanning signal and data signal.

10. A display screen, characterized in that: The display screen includes the display driving circuit as claimed in claim 8 or 9.

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