High-reliability chiplet packaging implementation method

Abstract

The invention discloses a high-reliability chip package implementation method, and belongs to the technical field of chip packaging, and the method comprises the steps: manufacturing a TSV (Through Silicon Via) for each chip in a wafer comprising a plurality of chips; an NCF film is attached to the front face of the wafer after the TSV is manufactured; carrying out thinning treatment on the back surface of the wafer until the TSV is exposed, and cutting the wafer into single chips; bonding the cut chip and the substrate together through a TCB bonding technology, then superposing another chip on the bonded chip through the TCB technology until the required layer number is reached, and packaging to form a complete chip module; information interaction is formed between the bonded chiplets by means of the TSVs, and the gaps between the salient points of the chiplets and between the chiplets and the substrate are completely filled with the NCF films; according to the invention, TSV processing is carried out on the chiplets, the chiplets with different functions can form stacks and carry out information interaction through the TSV, the problems of more and long substrate circuits and the like caused by tiling the chiplets on the substrate are avoided, the chip packaging structure has the advantages of small data delay, high integration level, reduced power consumption and the like, and the size of a final packaging body is reduced.

Description

Technical Field

[0001] The invention relates to a high-reliability chiplet packaging implementation method, belonging to the technical field of chip packaging. Background Art

[0002] At present, the demand for high-performance computing in large-scale simulation, games, collaborative control, etc. is increasing day by day. However, the semiconductor industry has experienced the slowdown of Moore's Law and the sharp increase in the cost and technical challenges of the next transistor node. Therefore, it is urgent to explore new technical methods to overcome this problem and achieve high-performance computing. A chiplet is a part of an integrated circuit with a specific function. When combined with other chiplets and packaged, it can form a large chip with a full-function module, which is equivalent to the traditional SOC structure. The cost of a chiplet is reduced by half compared to a traditional SOC structure. There are many technical challenges in interconnecting multiple small chiplets and finally heterogeneously integrating them into a large chip. Among them, interconnection and packaging are the two most important "levels" to be overcome. Summary of the invention

[0003] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a high-reliability chiplet packaging implementation method. By using TSV processing on the chiplet, chiplets with different functions can rely on TSV to form a stack and exchange information, avoiding the problem of too many and long substrate lines caused by laying them flat on the substrate. It has the advantages of small data delay, high integration, reduced power consumption, etc., and reduces the volume of the final package.

[0004] To achieve the above object, the present invention is implemented by adopting the following technical solutions: In a first aspect, the present invention provides a high-reliability chiplet packaging implementation method, comprising: In a wafer containing multiple chiplets, TSVs are fabricated for each chiplet; Laminating the NCF film on the front side of the wafer after TSV is made; Thin the back of the wafer after the NCF film is attached until the TSV is exposed, and then cut the wafer into individual chiplets; The cut single chiplet is interconnected with the substrate through TCB bonding technology, and then another chiplet is stacked on the bonded chiplet through TCB process until the required number of layers is reached to package it into a complete chiplet module; Among them, the bonded chiplets rely on TSV to form information exchange, and the NCF film completely fills the gaps between the chiplet bumps and between the chiplet and the substrate.

[0005] Furthermore, the method also includes: interconnecting the cut single chiplet with the substrate through TCB bonding technology, wherein the pads / bumps on the chiplet are bonded to the pads of the substrate through TCB bonding technology.

[0006] Furthermore, the method also includes: performing surface treatment on the chiplet and the substrate to remove surface impurities.

[0007] Furthermore, the method further includes: performing plastic encapsulation on the chiplet module to form a protective layer.

[0008] Furthermore, the method further includes: planting balls on the encapsulated chiplet module and cutting it into individual chiplet modules.

[0009] Furthermore, a plurality of TSVs are fabricated in the chiplet.

[0010] Furthermore, the NCF film completely covers and adheres to the wafer.

[0011] Furthermore, there are no bubbles between the NCF film and the chiplet that are larger than 5 bump spacings.

[0012] Furthermore, when the single chiplets with different functions are interconnected with the substrate by TCB bonding technology, tight bonding between the chiplet and the substrate is achieved by heat pressing or ultrasound.

[0013] Furthermore, the depth of the TSV is 30-100 um.

[0014] Compared with the prior art, the present invention has the following beneficial effects: 1. The present invention provides a high-reliability chiplet packaging implementation method. By using TSV processing on the chiplet, chiplets with different functions can rely on TSV to form a stack and exchange information, avoiding the problem of too many and long substrate lines caused by laying them flat on the substrate. It has the advantages of small data delay, high integration, reduced power consumption, etc., and reduces the volume of the final package.

[0015] 2. During the TCB process, the NCF film on the chiplet copper layer will fill the gaps between the copper bumps and between the chiplet and the substrate, providing good protection for the copper bumps and achieving high-reliability packaging.

[0016] 3. The TCB process can minimize the problems of substrate warping and chip warping, so that the chiplet can be perfectly bonded to the substrate and achieve good electrical connection. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram of making TSV in a chiplet provided by an embodiment of the present invention; Figure 2 is a schematic diagram of a wafer before thinning provided by an embodiment of the present invention; Figure 3 is a schematic diagram of a wafer after thinning provided by an embodiment of the present invention; Figure 4 is a schematic diagram before TCB bonding provided by an embodiment of the present invention; Figure 5 is a schematic diagram of TCB after bonding provided by an embodiment of the present invention; Figure 6 Schematic diagram of the chiplet module provided by an embodiment of the present invention; Figure 7 It is a schematic diagram of chiplet module implantation provided by an embodiment of the present invention; Figure 8 It is a schematic diagram of implanting balls and cutting into separate chiplet modules provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and cannot be used to limit the protection scope of the present invention.

[0019] Embodiment 1: This embodiment introduces a high-reliability chiplet packaging implementation method, including: In a wafer containing multiple chiplets, TSVs are fabricated for each chiplet; Laminating the NCF film on the front side of the wafer after TSV is made; Thin the back of the wafer after the NCF film is attached until the TSV is exposed, and then cut the wafer into individual chiplets; The cut single chiplet is interconnected with the substrate through TCB bonding technology, and then another chiplet is stacked on the bonded chiplet through TCB process until the required number of layers is reached to package it into a complete chiplet module; Among them, the bonded chiplets rely on TSV to form information exchange, and the NCF film completely fills the gaps between the chiplet bumps and between the chiplet and the substrate.

[0020] The high-reliability chiplet packaging implementation method provided in this embodiment specifically involves the following steps: 1. Preprocessing. Figure 1As shown, the chiplet and substrate are surface treated to remove surface impurities. TSV (Through Silicon Via) is made in the chiplet, and the recommended TSV depth is 30~100um.

[0021] 2. Thinning and dicing. Figure 2 , Figure 3 As shown, NCF film (Non-Conductive Film) is applied to the front side of the wafer containing multiple chiplets (the side with bumps or pads), ensuring that the NCF is completely attached to the wafer without warping, and there are no large bubbles between the NCF film and the chiplet (such as bubble diameter greater than 5 bump spacings). Then the wafer is thinned from the back to the required thickness (TSV must be exposed), and then the wafer is cut into chiplets.

[0022] 3.TCB bonding. Figure 4 , Figure 5 As shown in the figure, the chiplet modules with different functions are interconnected with the substrate through TCB bonding technology, and finally packaged into a module with complete functions. At this time, the pads / bumps on the chiplet are bonded to the substrate pads, and the NCF completely fills the gaps between the chiplet bumps and between the chiplet and the substrate.

[0023] 4. Plastic sealing. Figure 6 As shown, the chiplet module with complete functions is plastic-encapsulated to form a protective layer.

[0024] 5. As Figure 7 , Figure 8 As shown in the figure, the ball is implanted and cut into individual chiplet modules, and the packaging is completed. The packaged chiplet module can be used in scenarios that require high-performance computing, such as servers, AI, game development, etc.

[0025] The beneficial effects achieved by this embodiment are: 1. The present invention provides a high-reliability chiplet packaging implementation method. By using TSV processing on the chiplet, chiplets with different functions can rely on TSV to form a stack and exchange information, avoiding the problem of too many and long substrate lines caused by laying them flat on the substrate. It has the advantages of small data delay, high integration, reduced power consumption, etc., and reduces the volume of the final package.

[0026] 2. During the TCB process, the NCF film on the chiplet copper layer will fill the gaps between the copper bumps and between the chiplet and the substrate, providing good protection for the copper bumps and achieving high-reliability packaging.

[0027] 3. The TCB process can minimize the problems of substrate warping and chip warping, so that the chiplet can be perfectly bonded to the substrate and achieve good electrical connection.

[0028] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A high reliability chiplet packaging implementation method, characterized in that: include: In a wafer containing multiple chiplets, TSVs are fabricated for each chiplet; Laminating the NCF film on the front side of the wafer after TSV is made; Thin the back of the wafer after the NCF film is attached until the TSV is exposed, and then cut the wafer into individual chiplets; The cut chiplet is bonded to the substrate through TCB bonding technology, and then another chiplet is stacked on the bonded chiplet through TCB process until the required number of layers is reached to package it into a complete chiplet module; Among them, the bonded chiplets rely on TSV to form information exchange, and the NCF film completely fills the gaps between the chiplet bumps and between the chiplet and the substrate.

2. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: The method further includes: interconnecting the cut single chiplet with the substrate through TCB bonding technology, wherein the pads / bumps on the chiplet are bonded to the pads of the substrate through the TCB bonding technology.

3. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: The method further includes: performing surface treatment on the chiplet and the substrate to remove surface impurities.

4. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: The method further includes: performing plastic encapsulation on the chiplet module to form a protective layer.

5. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: The method further includes: planting balls on the encapsulated chiplet module and cutting it into individual chiplet modules.

6. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: A plurality of TSVs are fabricated in the chiplet.

7. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: The NCF film completely covers and adheres to the wafer.

8. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: There are no bubbles greater than 5 bump spacings between the NCF film and the chiplet.

9. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: When the single chiplets with different functions are interconnected with the substrate by TCB bonding technology, tight bonding between the chiplet and the substrate is achieved by heat pressing or ultrasonic bonding.

10. The high reliability chiplet packaging implementation method according to claim 1, characterized in that: The depth of the TSV is 30-100 um.

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