Manufacturing method of embedded chip LTCC (Low Temperature Co-Fired Ceramic) substrate
The secondary alignment processing and the addition of high-thermal conductivity inorganic powders in the filling medium are solved through precision laser equipment, and the cavity accuracy, chip position control and heat dissipation problems in the manufacture of buried chip LTCC substrates, and a buried chip LTCC substrate with high integration and good heat dissipation performance is achieved.
Patent Information
- Application Number
- CN202411672005.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-21
- Publication Date
- 2025-04-15
AI Technical Summary
When manufacturing the built-in chip LTCC substrate, the prior art faces problems such as low cavity shape accuracy, difficult chip position accuracy, and difficulty in dissipating heat in the buried chip.
Secondary alignment processing is carried out using precision laser equipment to ensure the accuracy of the chip cavity and RDL alignment holes, and high thermal conductivity inorganic powder is added to the filling medium to improve the thermal conductivity and filling density of the dielectric material.
The verticality of the side wall of the chip cavity and the interconnection accuracy between the chip and RDL graphics are improved, and the heat dissipation performance of the buried chip is improved.
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Figure CN119833406A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of LTCC substrate manufacturing, and in particular relates to a manufacturing method of a high-integration LTCC substrate with embedded chips. Background Art
[0002] Low temperature co-fired ceramic (LTCC) technology is a passive component integrated circuit technology developed in the 1980s. Multilayer LTCC substrate technology can integrate some passive components into the substrate, making it have the advantages of high speed, high frequency, high density, and high reliability, which is conducive to system miniaturization, and improves system reliability while increasing circuit assembly density. Therefore, it is widely used in microwave communications, aerospace, and military electronics.
[0003] With the rapid development of electronic technology, high-performance microelectronic components such as 3D-MCM (three-dimensional multi-chip module), SIP (system-level package), MEMS (micro-electromechanical system) components, T / R (transmit / receive) components have more and more functions, higher integration density, and more complex group packaging structure, and the integration of LTCC substrates is getting higher and higher.
[0004] At present, there are three main technical approaches to improve the integration of LTCC substrates in the industry:
[0005] 1. Improve the wiring density of LTCC substrates by improving the accuracy of LTCC printed lines, mastering the printing technology of finer and finer lines, and the ability to produce smaller interconnection through holes.
[0006] 2. Combine thin film technology with LTCC substrate technology to create more precise fine lines on the surface of the LTCC substrate to improve the integration of the LTCC substrate.
[0007] 3. The chip is buried inside the LTCC substrate, and the chip and substrate are integrated through RDL (ReDistribution Layer) on the surface of LTCC.
[0008] Among the above technical solutions, the third one is a new technical approach, but it faces many difficulties in implementation, mainly the following three points:
[0009] 1. In the conventional LTCC substrate process, the cavity shape formed by first cutting a single layer of cavity and then stacking multiple layers is not accurate, especially the verticality of the side wall is difficult to ensure, which affects the accuracy of subsequent chip mounting;
[0010] 2. The position accuracy of the chip in the LTCC substrate and the relative position between the substrate interconnection hole and the chip interconnection pad during subsequent RDL are difficult to accurately control;
[0011] 3. The chip is buried inside the LTCC substrate, so the heat of the chip is not easy to transfer out. Summary of the invention
[0012] The technical problem to be solved by the present invention is to overcome the defects of the prior art, provide a method for manufacturing an embedded chip LTCC substrate, solve the problem of poor position accuracy between the embedded chip and the LTCC substrate, improve the ability to produce precise RDL graphics, and solve the heat dissipation problem of the embedded chip.
[0013] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0014] A method for manufacturing an embedded chip LTCC substrate comprises the following steps:
[0015] Step 1: Cutting, aging, and punching, filling, and printing the LTCC raw ceramic sheets layer by layer according to the product layer design requirements. The surface layer is repeatedly made into one more layer as a sacrificial layer for subsequent grinding and polishing, and only the holes are filled without printing the graphics.
[0016] Step 2, stacking, then encapsulating and laminating under low pressure, laminating conditions: 50-75°C, pressure: 50-300psi, to obtain LTCC green body;
[0017] Step 3, using the metal holes on the surface of the LTCC green body as alignment marks, cutting out the chip cavity and the alignment holes for making the surface RDL, and only cutting off the chip cavity layer during cutting;
[0018] Step 4, taking out the green ceramic sheet in the chip cavity to obtain the chip cavity structure;
[0019] Step 5, placing a PET film containing a chip cavity structure and a stainless steel protective plate on the surface of the LTCC green body in sequence, and then performing encapsulation and finished product lamination, lamination conditions: 60-85°C, pressure: 2500-4500psi;
[0020] Step 6, hot cutting and sintering the laminated product to obtain a LTCC cooked substrate;
[0021] Step 7, using the four sides of the chip cavity as alignment marks, mount the bare chip into the cavity of the LTCC substrate, and then perform gold ball implantation on the pads of the bare chip;
[0022] Step 8, preparing a high thermal conductivity filling medium, the main body of the medium is PI or BCB photosensitive material, and 3-10wt% of high thermal conductivity powder is added as an additive;
[0023] Step 9, filling the gap between the chip and the cavity with a high thermal conductivity filling medium, and after baking and curing, grinding and polishing the LTCC substrate until the gold balls on the chip are exposed;
[0024] Step 10, using the alignment holes as marks, fabricating the surface RDL metal layer and dielectric layer, and finally performing dicing to obtain a highly integrated embedded chip LTCC substrate.
[0025] Furthermore, in step 8, the high thermal conductivity powder is SiC, AlN or BN.
[0026] The beneficial effects of the present invention are:
[0027] (1) The verticality of the side wall of the cavity made by the present invention is relatively good, which can avoid the inter-layer misalignment caused by multi-layer stacking.
[0028] (2) When preparing the cavity filling medium, the present invention can improve the hardness of the medium material, reduce the curing shrinkage rate, and improve the filling density by adding a certain mass fraction of inorganic powder. In addition, selecting materials with high thermal conductivity such as SiC, AlN, BN, etc. can improve the thermal conductivity of the medium layer, which is beneficial to improve the heat dissipation problem of the embedded chip;
[0029] (3) The present invention utilizes a secondary alignment processing method for the cavity and the RDL alignment hole to improve the interconnection accuracy between the chip and the RDL pattern. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 This is the plan view of the LTCC green body after the cavity and RDL alignment holes are made.
[0031] Figure 2 for Figure 1 Cross-sectional view of .
[0032] Figure 3 This is a cross-sectional view of the LTCC substrate after the embedded chip is completed.
[0033] Figure 4 Cross-sectional view of the LTCC substrate with embedded chip after surface RDL is completed. DETAILED DESCRIPTION
[0034] The present invention is further described in detail below in conjunction with the accompanying drawings.
[0035] A method for manufacturing an embedded chip LTCC substrate, referring to Figure 1-Figure 4 , including the following steps:
[0036] Step 1: blanking, aging, and punching, filling and printing the LTCC raw ceramic sheets layer by layer according to the product layer design requirements. The surface layer is repeated to make an extra layer as a sacrificial layer for subsequent grinding and polishing, and only the holes are filled without printing the graphics.
[0037] Step 2, laminating with a precision laminating machine or a high-precision laminating plate, and then encapsulating and laminating with a small pressure, laminating conditions: 50-75° C., pressure: 50-300 psi, to obtain LTCC green body 1;
[0038] Step 3: Use precision laser processing equipment to select the metal holes on the surface of the LTCC green body as alignment marks, cut out the chip cavity 2 and the alignment holes 3 for the subsequent production of the surface RDL, and ensure that only the chip cavity layer is cut by strictly controlling the cutting parameters.
[0039] Step 4, taking out the green ceramic sheet in the chip cavity with tweezers under a microscope to obtain the chip cavity structure;
[0040] Step 5, placing a PET film containing a chip cavity structure and a stainless steel protective plate on the surface of the cavity LTCC green body in sequence, and then performing encapsulation and finished product lamination, lamination conditions: 60-85°C, pressure: 2500-4500psi;
[0041] Step 6, hot cutting and sintering the laminated product to obtain a LTCC cooked substrate 4;
[0042] Step 7, using the four sides of the chip cavity as alignment marks, use a high-precision chip mounter to mount the bare chip 5 into the cavity of the LTCC substrate, and then use a ball bonder to plant gold balls 6 on the pads of the bare chip;
[0043] Step 8, preparing a high thermal conductivity filling medium 7, the main body of the medium is a photosensitive material such as PI or BCB, and adding 3-10wt% of high thermal conductivity powder as an additive. The high thermal conductivity powder can be an inorganic material such as silicon carbide SiC, aluminum nitride AlN, boron nitride BN, etc.;
[0044] Step 9, filling the gap between the chip and the cavity with a high thermal conductivity filling medium, baking and curing, and then grinding and polishing the LTCC substrate until the gold balls on the chip are exposed;
[0045] Step 10, using the alignment holes made in step 3 as marks, fabricate the surface RDL dielectric layer 8 and metal layer 9, and finally perform dicing to obtain a highly integrated embedded chip LTCC substrate.
[0046] In step 2, step 3 and step 4, a small pressure is first used for pre-pressing, and then the chip cavity and RDL alignment holes are made by laser. The verticality of the cavity sidewall made in this way is better, which can avoid the inter-layer misalignment caused by multi-layer stacking.
[0047] Here is a more specific example:
[0048] In this embodiment, the LTCC substrate to be manufactured has a 10-layer wiring structure, and the specific process is as follows:
[0049] (1) Cut 11 layers of raw ceramic sheets, age them, and perform punching, hole filling, and printing operations on the LTCC raw ceramic sheets layer by layer according to the product layer design requirements. The surface layer is repeated to make an extra layer as a sacrificial layer for subsequent grinding and polishing, and only the holes are filled without printing patterns;
[0050] (2) stacking 11 layers of green ceramic sheets in sequence using a precision stacking machine, and then encapsulating and laminating under low pressure at 50° C. and 100 psi to obtain a LTCC green body;
[0051] (3) Using precision laser equipment, the metal holes on the surface of the LTCC green body are selected as alignment marks to cut out the chip cavity and the alignment holes for the subsequent production of the surface RDL. By strictly controlling the cutting parameters, it is ensured that only the chip cavity layer is cut. The chip cavity layer of this sample is designed to be 2 layers deep. Considering the grinding and polishing thickening layer, the actual controlled cutting depth is 3 layers of green ceramic sheets.
[0052] (4) Using tweezers under a microscope, gently peel off the raw ceramic sheet in the chip cavity to obtain the chip cavity structure;
[0053] (5) Placing a PET film containing a chip cavity structure and a stainless steel protective plate on the surface of the cavity LTCC green body in sequence, and then encapsulating and laminating the finished product. The lamination conditions are: 70° C., pressure: 3000 psi;
[0054] (6) hot cutting and sintering the laminated product to obtain a LTCC cooked substrate;
[0055] (7) Using the four sides of the chip cavity as alignment marks, a high-precision chip mounter is used to mount the bare chip into the cavity of the LTCC substrate, and then a ball bonder is used to plant gold balls on the pads of the bare chip;
[0056] (8) preparing a high thermal conductivity filling medium. In this embodiment, photosensitive BCB is selected as the medium material, and SiC powder with a mass fraction of 5wt%-8wt% is added to the BCB, and then stirred evenly;
[0057] (9) Fill the gap between the chip and the cavity with a high thermal conductivity filling medium, and then grind and polish the LTCC substrate until the gold balls on the chip are exposed;
[0058] (10) Using the alignment holes made in step 3 as marks, the surface RDL dielectric layer and metal layer are made, and finally the outer shape is cut by a grinding wheel to obtain a highly integrated embedded chip LTCC substrate.
[0059] In the above process, a small pressure is first used for pre-pressing, and then the cavity is cut by laser as a whole. The verticality of the side wall of the cavity is relatively good, which can avoid the interlayer misalignment caused by multi-layer stacking. At the same time, the interconnection accuracy between the chip and the RDL graphics can be improved by using precision laser secondary alignment processing of the cavity and RDL alignment holes. In addition, when preparing the cavity filling medium, the hardness of the filling medium material is increased and the curing shrinkage rate is reduced by adding a certain mass fraction of high thermal conductivity SiC powder, which can improve the filling density and the thermal conductivity of the filling medium material.
[0060] In summary, the present invention adopts a secondary alignment method of precision laser equipment to simultaneously process the chip cavity and the RDL alignment hole, thereby improving the verticality of the chip cavity side wall and the interconnection accuracy between the chip and the subsequent RDL graphics; on the other hand, by adding high thermal conductivity inorganic powder to the filling dielectric material, the characteristics of the dielectric filling material are improved, the filling strength and density of the dielectric material are improved, and it is beneficial to improve the heat dissipation performance of the embedded chip.
[0061] The coefficients and parameters given in the above embodiments are provided to those skilled in the art to implement or use the invention, and the invention is not limited to the above disclosed values. Without departing from the idea of the invention, those skilled in the art can make various modifications or adjustments to the above embodiments. Therefore, the protection scope of the invention is not limited by the above embodiments, but should be the maximum scope of the innovative features mentioned in the claims.
Claims
1. A method for manufacturing an embedded chip LTCC substrate, characterized in that: The following steps are involved: Step 1: Cutting, aging, and punching, filling, and printing the LTCC raw ceramic sheets layer by layer according to the product layer design requirements. The surface layer is repeatedly made into one more layer as a sacrificial layer for subsequent grinding and polishing, and only the holes are filled without printing the graphics. Step 2, stacking, then encapsulating and laminating under low pressure, laminating conditions: 50-75°C, pressure: 50-300psi, to obtain LTCC green body; Step 3, using the metal holes on the surface of the LTCC green body as alignment marks, cutting out the chip cavity and the alignment holes for making the surface RDL, and only cutting off the chip cavity layer during cutting; Step 4, taking out the green ceramic sheet in the chip cavity to obtain the chip cavity structure; Step 5, placing a PET film containing a chip cavity structure and a stainless steel protective plate on the surface of the LTCC green body in sequence, and then performing encapsulation and finished product lamination, lamination conditions: 60-85°C, pressure: 2500-4500psi; Step 6, hot cutting and sintering the laminated product to obtain a LTCC cooked substrate; Step 7, using the four sides of the chip cavity as alignment marks, mount the bare chip into the cavity of the LTCC substrate, and then perform gold ball implantation on the pads of the bare chip; Step 8, preparing a high thermal conductivity filling medium, the main body of the medium is PI or BCB photosensitive material, and 3-10wt% of high thermal conductivity powder is added as an additive; Step 9, filling the gap between the chip and the cavity with a high thermal conductivity filling medium, and after baking and curing, grinding and polishing the LTCC substrate until the gold balls on the chip are exposed; Step 10, using the alignment holes as marks, fabricating the surface RDL metal layer and dielectric layer, and finally performing dicing to obtain a highly integrated embedded chip LTCC substrate.
2. The method for manufacturing an embedded chip LTCC substrate according to claim 1, characterized in that: In step 8, the high thermal conductivity powder is SiC, AlN or BN.