MOS desaturation protection circuit and application method

Abstract

The invention discloses an MOS desaturation protection circuit and an application method, and belongs to the technical field of protection circuits, and the method comprises the steps: detecting the drain voltage of an MOS, and determining that the MOS has a short circuit fault if the drain voltage is greater than a first preset value; identifying the short-circuit type of the short-circuit fault based on the on-state of the MOS, and starting short-circuit protection based on the blanking time; during the protection response period corresponding to the short-circuit protection, the energy storage circuit stores energy, and the energy is in direct proportion to the applied voltage; the hiccup frequency is dynamically adjusted based on the energy of the energy storage circuit and the power consumption of the enable circuit; during the fault latching period corresponding to the short circuit fault, the MOS is kept in a closed state, the fault latching is relieved until the energy dissipation is finished, and the MOS recovers to a normal working state; and if the short-circuit fault continuously exists, the circuit repeatedly executes the step, and enters a hiccup mode based on the hiccup frequency until the short-circuit fault ends. The invention can ensure that the device is not damaged during fault detection.

Description

Technical Field

[0001] The present invention belongs to the technical field of protection circuits, and in particular relates to a MOS desaturation protection circuit and an application method thereof. Background Art

[0002] MOS (Metal-Oxide-Semiconductor) is a semiconductor device technology widely used to build field-effect transistors (FET). In the field of modern power electronics, metal-oxide-semiconductor field-effect transistors (MOSFET) are widely used in various electronic devices due to their high-speed switching characteristics, low on-resistance, and easy integration. However, MOSFET may encounter desaturation caused by short circuits or overcurrent events during operation, which may cause device performance degradation or even permanent damage.

[0003] The desaturation detection method is the most common detection method for MOS short-circuit faults. Its principle also determines that each time a faulty tube experiences a sharp rise in drain current, multiple judgments will be made during use to avoid false triggering of faults, so that the MOS works in hiccup mode. Using a safe design, the temperature generated by the last fault will be dissipated during the hiccup interval to avoid MOS temperature accumulation and thermal damage. MOS power consumption is related to the applied voltage. Different voltages generate different power consumption, and the time required for temperature dissipation is also different. The ideal design hiccup frequency is related to power consumption and changes dynamically, while the existing technology is fixed. The drain voltage does not participate in the hiccup frequency setting and is designed to be a fixed value by other circuits.

[0004] Similar prior art includes a Chinese patent application with publication number CN114678839A, which discloses an improved desaturation protection circuit, application method and application suitable for SiC MOSFET. The improved desaturation protection circuit suitable for SiC MOSFET includes a typical desaturation protection circuit topology, a logic processing circuit for distinguishing FUL faults, and a blanking capacitor charging branch additionally drawn from the drain of MOSFET; the application method of the improved desaturation protection circuit suitable for SiC MOSFET includes: a typical desaturation protection circuit topology plus a logic processing circuit for distinguishing FUL faults, and then adding a blanking capacitor charging branch additionally drawn from the drain of MOSFET to accelerate the processing of HSF faults. This invention improves the response speed without sacrificing its anti-interference performance, has a relatively comprehensive optimization range, and is improved when handling two different types of short-circuit faults, and can achieve fast and reliable circuit protection.

[0005] However, the above-mentioned prior art does not consider the setting of blanking time. In actual situations, when a short circuit occurs in the MOS, the impedance in the power loop is particularly small, and sufficient temperature dissipation time needs to be ensured so that the device is not damaged during fault detection. Summary of the invention

[0006] In view of the above-mentioned technical problems, the present invention provides an application method of a MOS desaturation protection circuit to solve the problems in the prior art.

[0007] The present invention provides a MOS desaturation protection circuit, the protection circuit comprising: a main MOS circuit, an opening circuit, a protection enabling circuit, a protection circuit, and an energy storage circuit;

[0008] The main MOS circuit includes a main MOSFET, the turn-on circuit includes a fourth transistor and a buffer, the protection enabling circuit includes a P-channel MOSFET (Q3) and a fourth resistor, the protection circuit includes a first diode, a second diode and a Zener diode, and the energy storage circuit includes a capacitor.

[0009] Furthermore, the base of the fourth transistor in the turn-on circuit is connected to the output end of the buffer, and the collector is connected to the gate of the main MOSFET.

[0010] Furthermore, the gate of the P-channel MOSFET in the protection enabling circuit is connected to the drain of the main MOSFET through the fourth resistor.

[0011] Furthermore, the Zener diode and the first diode in the protection circuit are connected in parallel between the gate of the main MOSFET and ground.

[0012] Furthermore, the capacitor in the energy storage circuit is connected between the gate of the main MOSFET and ground.

[0013] The present invention also provides a MOS desaturation protection circuit application method, which is used to implement the application of the above-mentioned MOS desaturation protection circuit. The method comprises the following steps:

[0014] S1: Detecting the drain voltage of the MOS, and if the drain voltage is greater than a first preset value, determining that a short circuit fault occurs in the MOS;

[0015] S2: Identify the short-circuit type of the short-circuit fault based on the on-state of the MOS. If the short-circuit type is that the MOS is already in a short-circuit fault state before being turned on, set a blanking time, and start short-circuit protection based on the blanking time.

[0016] S3: During the protection response period corresponding to the short-circuit protection, the energy storage circuit stores energy;

[0017] S4: dynamically adjusting the hiccup frequency based on the energy of the energy storage circuit and the power consumption of the enabling circuit;

[0018] S5: During the fault latching period corresponding to the short-circuit fault, the MOS remains in a closed state, and the fault latching is released after the energy dissipation is completed, and the MOS resumes a normal working state;

[0019] S6: If the short-circuit fault persists, the circuit will repeatedly execute S1 to S5, and enter the hiccup mode based on the hiccup frequency until the short-circuit fault ends, wherein the circuit includes the open circuit and the open loop.

[0020] Further, the detecting the drain voltage of the MOS comprises the following steps:

[0021] The drive control system includes a detection unit and a control unit, wherein the detection unit is node-connected with the MOS, monitors the voltage data flowing through the MOS in real time, and converts the voltage data into a digital signal;

[0022] The first preset value is set based on the rated voltage and safe operation parameters of the MOS, and the control unit determines whether the voltage data is greater than the first preset value and has a duration based on the digital signal, and if so, outputs a cut-off command, controls the voltage data flowing through the MOS based on the cut-off command, and detects the drain voltage;

[0023] The control unit determines a startup period for the MOS to resume a normal working state, and sets the predetermined time as the startup period within the output voltage range with the shortest predetermined time among the rated output voltage values ​​after startup;

[0024] In the startup period, the control unit extends the predetermined time to the startup period and outputs a smooth voltage.

[0025] Furthermore, the S4 further includes:

[0026] When the short circuit fault occurs in the MOS, a capacitor is set as the energy storage circuit, and during the protection response period, the capacitor is charged and stores the energy;

[0027] The discharge time is calculated based on a first formula, which is: Where W is the energy, U is the applied voltage, I is the drain current, and P EN is the power consumption required by the enabling circuit to keep the MOS driver turned off, T1 is the charging time, and T2 is the discharging time;

[0028] Dynamically adjusting the hiccup frequency based on the discharge time, if the discharge time increases, the hiccup frequency decreases, and if the discharge time decreases, the hiccup frequency increases;

[0029] The power consumption P is calculated based on the second formula EN , the second formula is: P EN =I EN ×U EN , where I EN is the current of the enabling circuit, U EN is the voltage of the enabling circuit;

[0030] Based on the power consumption and the thermal characteristics of the MOS, a temperature rise value of the MOS is output, and the hiccup frequency is adjusted after combining the temperature rise value and the power consumption. If the power consumption and the temperature rise value are reduced, the hiccup frequency is reduced;

[0031] The temperature rise value is calculated based on the third formula, and the third formula is: Wherein, F is the temperature rise value, α is the thermal resistance parameter corresponding to the thermal characteristic, F1 is the estimated temperature, and F2 is the ambient temperature.

[0032] Furthermore, the S2 further comprises the following steps:

[0033] The driving signal is sent, the MOS exits the saturation region, the drain level value is set to the applied voltage, the blanking end point is obtained based on the blanking time, the input signal is pulled low at the blanking end point, the buffer outputs a low level, and the MOS enters the off state to achieve the short-circuit protection.

[0034] Furthermore, the S5 further comprises the following steps:

[0035] A desaturation voltage threshold is set, and the charging state of the circuit is judged based on the desaturation voltage threshold. If the enable circuit is enabled, the energy storage circuit is charged; if the enable circuit is disabled, the enable circuit is turned on to supply power, and the circuit enters a fault latch.

[0036] Compared with the prior art, the beneficial effects of the present invention are at least as follows:

[0037] 1. By dynamically adjusting the hiccup frequency, the protection circuit can adapt to different working conditions and power consumption requirements, reduce false triggering caused by fixed frequency protection, and improve the overall reliability of the circuit.

[0038] 2. The protection circuit can monitor the drain voltage of MOS in real time, respond quickly to short circuit or overcurrent events, cut off the current in time, protect MOS from damage, and avoid safety risks caused by device damage.

[0039] 3. By ensuring sufficient temperature dissipation time, the protection circuit helps prevent MOS from thermal damage due to excessive temperature, optimizes thermal management, and extends the service life of the device.

[0040] 4. Dynamically adjust the protection response according to the applied voltage to provide a more flexible protection strategy to adapt to different power conditions and load changes.

[0041] 5. By dissipating the heat generated by the last fault during the hiccup interval, the protection circuit reduces the additional power consumption caused by frequent switching and improves energy efficiency.

[0042] 6. A circuit protection device is designed to quickly cut off the MOS when a short circuit occurs, reducing thermal shock and electrical stress on the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of the specific structure of a MOS desaturation protection circuit of the present invention;

[0044] Figure 2 The present invention is a flowchart of the steps of a MOS desaturation protection circuit application method. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0046] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but unless otherwise specified, these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first xx script may be referred to as a second xx script, and similarly, a second xx script may be referred to as a first xx script.

[0047] like Figure 1 As shown, a specific structural diagram of a MOS desaturation protection circuit is shown, and the protection circuit includes: a main MOS circuit, an opening circuit, a protection enabling circuit, a protection circuit, and an energy storage circuit.

[0048] The main MOS circuit includes a main MOSFET, the turn-on circuit includes a fourth transistor and a buffer, the protection enabling circuit includes a P-channel MOSFET and a fourth resistor, the protection circuit includes a first diode, a second diode and a Zener diode, and the energy storage circuit includes a capacitor.

[0049] The base of the fourth transistor in the turn-on circuit is connected to the output terminal of the buffer, and the collector is connected to the gate of the main MOSFET.

[0050] The gate of the P-channel MOSFET in the protection enabling circuit is connected to the drain of the main MOSFET through a fourth resistor.

[0051] The Zener diode and the first diode in the protection circuit are connected in parallel between the gate of the main MOSFET and the ground.

[0052] The capacitor in the energy storage circuit is connected between the gate of the main MOSFET and ground.

[0053] For example, Figure 1 As shown, the main MOS circuit is mainly composed of the main MOSFET (N-channel MOSFET, Q2), which is the main switching element in the circuit and is used to control the on and off of the current. The turn-on circuit includes an NPN transistor (the fourth transistor, Q4), a buffer, resistors R7 and R8, which work together to control the gate voltage of the main MOSFET Q2, thereby controlling the turn-on of Q2. The protection enabling circuit includes a P-channel MOSFET (the third transistor, Q3), resistors R4, R5, and an NPN transistor Q2. This circuit provides additional protection when Q2 is turned on, ensuring that the main MOSFET can be turned off in time in the event of a short circuit or other abnormal conditions. The protection circuit includes a first diode D1 (anti-reverse protection), a Zener diode ZD1 (used to set the desaturation voltage threshold), a resistor R6 and an NPN transistor (the fourth transistor, Q4). This circuit is used to quickly turn off the main MOSFET (Q2) when a short circuit or other abnormal condition is detected to protect the circuit from damage. The energy storage circuit includes capacitor C1 and resistor R1. This circuit is used to store energy during the off time of the main MOSFET (Q2) so as to respond quickly when needed and realize dynamic adjustment of hiccup mode.

[0054] like Figure 1As shown, R1, R2, R3, R4, R5, R6, R7, and R8 are resistors in the protection circuit, wherein the first resistor R1 is connected between the capacitor C1 and the ground, and may be used to discharge or stabilize the voltage to ensure the stability of the gate voltage of the main MOSFET (Q2). The second resistor R2 is connected in series with the second diode D2, connected between the source and the gate of the main MOSFET (Q2), and may be used to limit the gate current to protect the gate of the main MOSFET from damage caused by excessive current. The third resistor R3 is connected in parallel with the second diode D2, connected between the source and the gate of the main MOSFET (Q2), and may be used to provide an additional current path when D2 is turned on, or to provide a bias current of the gate when D2 is reverse biased. The fourth resistor R4 is connected between the gate of the P-channel MOSFET (Q3) and the ground, and may be used to provide a bias voltage of the gate of Q3 to ensure that Q3 can be properly turned on or off when needed. The fifth resistor R5 is connected between the gate and ground of the main MOSFET (Q2), and may be used for the discharge of the gate to ensure that the gate voltage of Q2 can drop quickly when it is turned off. The sixth resistor R6 is connected in parallel with the gate and source of the main MOSFET (Q2), and may be used for pre-charging the gate, reducing the rise time of the gate voltage and increasing the switching speed. The seventh resistor R7 is connected between the base of the NPN transistor (the fourth transistor, Q4) and the drive control input to limit the current flowing into the base of Q4 and protect Q4 from being damaged by excessive current. The eighth resistor R8 is connected between the drain and ground of the main MOSFET (Q2), and may be used to provide the source voltage of Q2 to ensure that Q2 has a suitable operating voltage when it is turned on. The ninth resistor R9 is connected between the emitter and ground of the NPN transistor (the fourth transistor, Q4) to provide the base current of Q4 to ensure that Q4 can be turned on when needed.

[0055] exist Figure 1 In the figure, Q1 is the MOS under test, which is used for detection and protection. Q2, Q3, and Q4 are also MOSFET devices, which are used to control different parts of the circuit, such as switch control and protection enable. D1 and D2 are diodes, which are used for anti-reverse protection and fast shutdown loop. ZD1 is a voltage-stabilizing diode, which is used to maintain a stable reference voltage, and is used to determine the discharge cut-off voltage in this circuit. C1 is a capacitor, which is used in the energy storage circuit to store energy to maintain the power supply of the protection enable circuit. Buffer is a buffer, which is used to enhance the signal or isolate different parts of the circuit. Figure 1The working principle of the circuit diagram is: Q1 is the MOS under test, and the control signal controls Q1 through R7, Buffer, and R8. Q3 is the protection start switch, and D1 is the anti-reverse protection. R4, R5, and Q2 are the Q3 turn-on circuit. R2 is the Q2 turn-on loop, and R3 and D2 constitute the Q2 fast turn-off loop. R6, ZD1, R9, and Q4 are the protection enable circuit. R1 and C1 are the energy storage circuit. To set the protection blanking time, the design is achieved by adjusting the turn-on time of Q1 and Q2, that is, adjusting the driving resistance of R2 and R8.

[0056] like Figure 2 As shown, a MOS desaturation protection circuit application method is used to implement the application of the above-mentioned MOS desaturation protection circuit, including the following steps:

[0057] S1: Detecting the drain voltage of the MOS. If the drain voltage is greater than a first preset value, it is determined that a short circuit fault occurs in the MOS.

[0058] Specifically, in the present embodiment, desaturation is the process in which the MOS is in the on state and changes from the saturated state to the off state due to certain changes in conditions, and the condition of the present invention is short-circuit overcurrent. The drain voltage refers to the voltage flowing through the drain of the MOSFET (metal-oxide-semiconductor field-effect transistor), which is a key parameter when the MOS is working. A short-circuit fault refers to an abnormal state in a circuit. A short-circuit fault will cause the drain current of the MOS to increase sharply, which may exceed its rated current, thereby possibly damaging the MOS or causing damage to other circuit components.

[0059] S2: Identify the short-circuit type of the short-circuit fault based on the on-state of the MOS. If the short-circuit type is that the MOS is already in a short-circuit fault state before it is turned on, set the blanking time and start the short-circuit protection based on the blanking time.

[0060] Specifically, in this embodiment, the on-state refers to the time correlation between the on-state of the MOS and the short-circuit fault. The blanking time refers to the period of time during which the protection circuit does not immediately respond to a short-circuit or overcurrent condition. Short-circuit protection refers to a protection mechanism that takes prompt action to prevent device damage when a short circuit is detected in the MOSFET.

[0061] S3: During the protection response corresponding to the short-circuit protection, the energy storage circuit stores energy, and the energy is proportional to the applied voltage.

[0062] Specifically, in this embodiment, the energy storage circuit refers to a circuit component or system that can store energy and release energy under certain conditions, such as Figure 1As shown, R1 and C1 form a tank circuit. Energy refers to the electrical energy stored in the capacitor or other energy storage element in the tank circuit, and applied voltage refers to the voltage applied to the MOS, especially the voltage between the drain and source (V DS ).

[0063] S4: Dynamically adjust the hiccup frequency based on the energy of the energy storage circuit and the power consumption of the enabling circuit.

[0064] Specifically, in this embodiment, the enabling circuit refers to a circuit for controlling the MOS to be turned on or off, which is usually connected to the gate of the MOS and controls the switching state of the MOS by providing an appropriate voltage signal, such as Figure 1 As shown, R6, ZD1, R9, and Q4 form a protection enabling circuit. Power consumption refers to the electrical energy consumed by the enabling circuit during operation. Dynamic adjustment of the hiccup frequency refers to real-time adjustment of the hiccup mode frequency in the protection circuit according to the working conditions of the MOS (such as applied voltage, power consumption, and temperature rise). The hiccup mode is an overcurrent protection mechanism that causes the MOS to be periodically turned off and on to limit the current flow during short circuit or overcurrent events, while allowing heat to dissipate to prevent the device from being damaged due to excessive temperature. For example, under normal working conditions, the applied voltage of the MOS is V1, and the hiccup frequency at this time is f1. In this state, the power consumption and temperature rise of the MOSFET are within the safe range. If the applied voltage is increased to V2, this will cause the power consumption of the MOSFET to increase, because the power consumption is proportional to the applied voltage. In this case, the hiccup frequency can be increased by reducing the hiccup interval time. If the original hiccup frequency f1 is 10 times per second, it can be increased to 20 times per second, that is, the new hiccup frequency f2.

[0065] S5: During the fault latch period corresponding to the short-circuit fault, the MOS remains in the off state. After the energy dissipation is completed, the fault latch is released and the MOS returns to the normal working state.

[0066] Specifically, in the present embodiment, the fault latch refers to a mechanism in which the protection circuit is set to keep the MOS in an off state when a specific fault condition (such as a short circuit fault or an overcurrent) is detected.

[0067] S6: If the short circuit fault persists, the circuit will repeatedly execute S1 to S5 and enter the hiccup mode based on the hiccup frequency until the short circuit fault ends, wherein the circuit includes an open circuit and an open loop.

[0068] Specifically, in this embodiment, the hiccup mode is formed by a dynamic hiccup frequency. The open loop refers to a circuit path in the control circuit of the MOS, which is used to change the MOS from a closed state (cut-off state) to an open state (working state). The open circuit refers to a circuit part that changes the MOS from a closed state (cut-off state) to an open state (working state).

[0069] As a preferred technical solution of the present invention, detecting the drain voltage of the MOS includes the following steps:

[0070] The drive control system includes a detection unit and a control unit. The detection unit is connected to the MOS through a node, monitors the voltage data flowing through the MOS in real time, and converts the voltage data into a digital signal.

[0071] A first preset value is set based on the rated voltage and safety operating parameters of the MOS. The control unit determines whether the voltage data is greater than the first preset value and has a duration based on the digital signal. If so, a cut-off command is output, and the voltage data flowing through the MOS is controlled based on the cut-off command, and the drain voltage is detected.

[0072] The control unit determines a startup period for the MOS to resume a normal working state, and sets a predetermined time as the startup period within an output voltage range with the shortest predetermined time among rated output voltage values ​​after startup.

[0073] During the startup period, the control unit extends the predetermined time to the startup period and outputs a smooth voltage.

[0074] Specifically, in this embodiment, the drive control system is a system module for detecting MOS, and the node connection refers to connecting the detection unit for monitoring or detecting circuit parameters (such as voltage, current, etc.) to a specific electrical node of the MOS, wherein the electrical node includes the source, drain, and gate of the MOS. Voltage data refers to the numerical information about the voltage in the MOS element measured and obtained by the detection unit corresponding to the voltage. Use an analog-to-digital converter (ADC) or other similar sensors and conversion technologies to convert voltage data (continuously changing voltage) into a digital signal (discrete value) in digital form.

[0075] The first preset value is a voltage limit standard set to prevent the device from overheating, damage or failure. The first preset value is set based on the rated current and safe operating parameters of the MOS to determine the maximum voltage limit of the MOS in normal operation and protection circuits. For example, the first preset value is set to the saturation voltage of the MOS under normal working conditions plus a certain safety margin. The control unit refers to a microprocessor or microcontroller, which is responsible for the core control logic and decision-making of the entire protection circuit. The duration refers to the time period during which the voltage data is greater than the first preset value. The cut-off instruction can prevent overcurrent or short circuit from causing damage to the circuit.

[0076] The startup cycle refers to the time window set by the control unit in the circuit protection device according to the startup situation of the MOS. For example, during the startup cycle, due to the large charging current of the capacitive load, the response threshold of the protection circuit may need to be adjusted to avoid false triggering of the protection action.

[0077] The startup period is the first period of time during the load startup cycle, during which the voltage demand of the load may be particularly high because the capacitive load needs to be charged. During the startup period, the control unit identifies the output voltage range with the shortest predetermined time among the rated output voltage values ​​of the various branch systems. This means that different loads may have different startup voltage requirements. The control unit sets a predetermined time within this shortest output voltage range after startup. This time window is considered the startup period of the load. During this startup period, the control unit adjusts the behavior of the protection circuit to adapt to the special requirements of the load when starting.

[0078] During the startup period, the control unit performs control to extend the prescribed time to approximately the startup period, which can ensure that the output voltage has a smooth waveform and the load does not malfunction, that is, smooth voltage.

[0079] As a preferred technical solution of the present invention, S4 also includes:

[0080] When a short circuit occurs in the MOS, a capacitor is set as an energy storage circuit. During the protection response period, the capacitor is charged and stores energy.

[0081] The discharge time is calculated based on the first formula, which is: Where W is energy, U is applied voltage, I is drain current, P EN To enable the circuit to keep the MOS driver off, T1 is the charging time and T2 is the discharging time.

[0082] The hiccup frequency is dynamically adjusted based on the discharge time. If the discharge time increases, the hiccup frequency decreases, and if the discharge time decreases, the hiccup frequency increases.

[0083] Calculate the power consumption P based on the second formula EN, the second formula is: P EN =I EN ×U EN , where I EN is the current of the enabling circuit, U EN is the voltage that enables the circuit;

[0084] Based on the power consumption and the thermal characteristics of MOS, the temperature rise value of MOS is output, and the hiccup frequency is adjusted after combining the temperature rise value and the power consumption. If the power consumption and the temperature rise value are reduced, the hiccup frequency is reduced;

[0085] The temperature rise value is calculated based on the third formula, which is: Among them, F is the temperature rise value, α is the thermal resistance parameter corresponding to the thermal characteristic, F1 is the estimated temperature, and F2 is the ambient temperature.

[0086] Specifically, in this embodiment, for example, Figure 1 In the first formula, when MOS is short-circuited, the impedance in the power circuit is very small, and the short-circuit current can reach 8 to 10 times the rated current. During the short-circuit process, V DS The voltage value at both ends is close to the applied voltage. The detection time and enable shutdown time account for most of the entire protection response time. These two times are basically constant. The applied voltage can characterize the loss and the temperature rise caused by it.

[0087] The hiccup interval time is the fault latch time, which keeps the MOS driver off. Assuming that the power required for the enable circuit to keep the MOS driver off is P EN , design a storage circuit, the charging input is the MOS tube drain, the charging time is the protection response time, and the discharge circuit is the enabling circuit. It can be seen from the previous text that the protection response time is a constant. When a fault occurs, the storage circuit stores energy, and the energy W increases monotonically with the input voltage. The change in the discharge time T can realize the dynamic change of the hiccup time and the applied voltage.

[0088] Through this step, it can be seen that the hiccup frequency changes to ensure temperature dissipation. Thermal characteristics are used to evaluate heat dissipation conditions, including factors such as heat sinks, thermal interface materials, and air flow. The voltage, current, and temperature of the MOS are continuously monitored to ensure that the temperature rise is within a safe range. For example, the higher the applied voltage, the greater the energy loss at the same current, which may cause the temperature of the MOS to rise.

[0089] The third formula can be used to effectively estimate and control the temperature rise that may be caused by MOS under different working conditions, thereby protecting the device from overheating damage and ensuring the reliability and stability of the circuit.

[0090] As a preferred technical solution of the present invention, S2 further includes the following steps:

[0091] The driving signal is sent, the MOS exits the saturation area, the drain level value is set to the applied voltage, the blanking end point is obtained based on the blanking time, the input signal is pulled low at the blanking end point, the buffer outputs a low level, and the MOS enters the off state to achieve short-circuit protection.

[0092] Specifically, in this embodiment, Figure 1 As shown, the driving signal is sent out. Due to the short circuit, Q1 exits the saturation region at the moment of turning on, and the drain level value is the applied voltage. After the blanking is over, Q3 is turned on to form a path with D1, R6, and Q4. Q4 is turned on, pulling the input signal low, the buffer outputs a low level, and Q1 enters the shutdown state to achieve protection.

[0093] As a preferred technical solution of the present invention, S5 also includes the following steps:

[0094] A desaturation voltage threshold is set, and the charging state of the circuit is judged based on the desaturation threshold. If the opening circuit is turned on, the energy storage circuit is charged. If the opening circuit is turned off, the enabling circuit is turned on and the circuit enters a fault latch.

[0095] Specifically, in this embodiment, Figure 1 As shown, the desaturation voltage threshold is set to judge and prevent interference. At the same time, Q2 is also turned off, and then Q3 is turned off. Q3 is turned on and C1 is charged through R1. Q3 is turned off and charging ends. The charging voltage is approximately: V = V DS ×[1-e -t / (R1×C1) ]. The enabling circuit is powered by R1, Q4 is kept on, and the circuit enters the fault latch. The drain voltage participates in the fault latch, forming a closed loop of applied voltage, power consumption, temperature rise, and latch dissipation, which more reliably ensures that the MOS operates at a safe temperature.

[0096] The MOS on time refers to the start time of the MOS in the on state. Figure 1 After Q1 is turned on, Q3 is turned on, and the time interval between the two is the blanking time.

[0097] It should be understood that, although each step in the flow chart of each embodiment of the present invention is shown in sequence according to the indication of the arrow, these steps are not necessarily performed in sequence according to the order indicated by the arrow. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be performed in other orders. Moreover, at least a portion of the steps in each embodiment may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times, and the execution order of these sub-steps or stages is not necessarily performed in sequence, but can be performed in turn or alternately with at least a portion of other steps or sub-steps or stages of other steps.

[0098] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The above-mentioned program can be stored in a non-volatile computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0099] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0100] The above embodiments only express several implementation methods of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the present invention. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention.

[0101] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A MOS desaturation protection circuit, characterized in that: The protection circuit comprises: a main MOS circuit, an opening circuit, a protection enabling circuit, a protection circuit, and an energy storage circuit; The main MOS circuit includes a main MOSFET, the turn-on circuit includes a fourth transistor and a buffer, the protection enabling circuit includes a P-channel MOSFET (Q3) and a fourth resistor, the protection circuit includes a first diode, a second diode and a Zener diode, and the energy storage circuit includes a capacitor.

2. The protection circuit according to claim 1, characterized in that: The base of the fourth transistor in the turn-on circuit is connected to the output end of the buffer, and the collector is connected to the gate of the main MOSFET.

3. The protection circuit according to claim 1, characterized in that: The gate of the P-channel MOSFET in the protection enabling circuit is connected to the drain of the main MOSFET through the fourth resistor.

4. The protection circuit according to claim 1, characterized in that: The Zener diode and the first diode in the protection circuit are connected in parallel between the gate of the main MOSFET and ground.

5. The protection circuit according to claim 1, characterized in that: The capacitor in the energy storage circuit is connected between the gate of the main MOSFET and ground.

6. A method for applying a MOS desaturation protection circuit, the method being used to implement the application of the MOS desaturation protection circuit according to claim 1, characterized in that: The method comprises the following steps: S1: Detecting the drain voltage of the MOS, and if the drain voltage is greater than a first preset value, determining that a short circuit fault occurs in the MOS; S2: Identify the short-circuit type of the short-circuit fault based on the on-state of the MOS. If the short-circuit type is that the MOS is already in a short-circuit fault state before being turned on, set a blanking time, and start short-circuit protection based on the blanking time. S3: During the protection response period corresponding to the short-circuit protection, the energy storage circuit stores energy; S4: dynamically adjusting the hiccup frequency based on the energy of the energy storage circuit and the power consumption of the enabling circuit; S5: During the fault latching period corresponding to the short-circuit fault, the MOS remains in a closed state, and the fault latching is released after the energy dissipation is completed, and the MOS resumes a normal working state; S6: If the short-circuit fault persists, the circuit will repeatedly execute S1 to S5 and enter the hiccup mode based on the hiccup frequency until the short-circuit fault ends, wherein the circuit includes the open circuit and the open loop.

7. The method according to claim 6, characterized in that The detection of the drain voltage of the MOS comprises the following steps: The drive control system includes a detection unit and a control unit, wherein the detection unit is node-connected with the MOS, monitors the voltage data flowing through the MOS in real time, and converts the voltage data into a digital signal; The first preset value is set based on the rated voltage and safe operation parameters of the MOS, and the control unit determines whether the voltage data is greater than the first preset value and has a duration based on the digital signal, and if so, outputs a cut-off command, controls the voltage data flowing through the MOS based on the cut-off command, and detects the drain voltage; The control unit determines a startup period for the MOS to resume a normal working state, and sets the predetermined time as the startup period within the output voltage range with the shortest predetermined time among the rated output voltage values ​​after startup; In the startup period, the control unit extends the predetermined time to the startup period and outputs a smooth voltage.

8. The method according to claim 6, characterized in that The S4 further comprises: When the short circuit fault occurs in the MOS, a capacitor is set as the energy storage circuit, and during the protection response period, the capacitor is charged and stores the energy; The discharge time is calculated based on a first formula, which is: Where W is the energy, U is the applied voltage, I is the drain current, and P EN is the power consumption required by the enabling circuit to keep the MOS driver turned off, T1 is the charging time, and T2 is the discharging time; Dynamically adjusting the hiccup frequency based on the discharge time, if the discharge time increases, the hiccup frequency decreases, and if the discharge time decreases, the hiccup frequency increases; The power consumption P is calculated based on the second formula EN , the second formula is: P EN =I EN ×U EN , where I EN is the current of the enabling circuit, U EN is the voltage of the enabling circuit; Based on the power consumption and the thermal characteristics of the MOS, a temperature rise value of the MOS is output, and the hiccup frequency is adjusted after combining the temperature rise value and the power consumption. If the power consumption and the temperature rise value are reduced, the hiccup frequency is reduced; The temperature rise value is calculated based on the third formula, and the third formula is: Wherein, F is the temperature rise value, α is the thermal resistance parameter corresponding to the thermal characteristic, F1 is the estimated temperature, and F2 is the ambient temperature.

9. The method according to claim 6, characterized in that The S2 further comprises the following steps: The driving signal is sent, the MOS exits the saturation region, the drain level value is set to the applied voltage, the blanking end point is obtained based on the blanking time, the input signal is pulled low at the blanking end point, the buffer outputs a low level, and the MOS enters the off state to achieve the short-circuit protection.

10. The method according to claim 6, characterized in that The S5 further comprises the following steps: A desaturation voltage threshold is set, and the charging state of the circuit is judged based on the desaturation voltage threshold. If the enable circuit is enabled, the energy storage circuit is charged; if the enable circuit is disabled, the enable circuit is turned on to supply power, and the circuit enters a fault latch.

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