Minimum power fluctuation WPT system design method based on offset unification theory

Through the design method based on the unified theory of offset, the model of the WPT circuit system is optimized to achieve minimum power fluctuation, which solves the problems of output power fluctuation and input current change of the WPT system during offset, and improves the stability and efficiency of the system.

CN119834481APending Publication Date: 2025-04-15ZHEJIANG UNIV
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Patent Information

Application Number
CN202411931779.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-26
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

The WPT system causes output power fluctuations and input current changes during offset, and the prior art is difficult to effectively reduce power fluctuations and suppress the increase of input current.

Method used

Using a design method based on the unified theory of offset, the circuit system is optimized to achieve minimum power fluctuation by establishing a fixed frequency WPT circuit system model, defining the offset coefficient x, and setting the mutual inductance between all coils divided into two different sides during offset changes at the same rate.

Benefits of technology

The optimized design of the WPT circuit system under offset conditions is realized, which reduces the fluctuation of the output power, suppresses the increase in the input current, and improves the stability and efficiency of the system.

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Abstract

The invention discloses a minimum power fluctuation WPT system design method based on an offset unification theory, and the method comprises the following steps: 1, building a fixed-frequency WPT circuit system model with a double-side port network and a corresponding coil, defining the ratio of the mutual inductance at an offset position to the mutual inductance at an opposite position as an offset coefficient x, the mutual inductances between the coils belonging to the two different sides are set to change at the same rate during the offset; step 2, obtaining a relation among a minimum offset coefficient xmin, an input current rising rate gamma, an output power fluctuation coefficient kappa R and an input current Iin through a unified output current offset characteristic, a unified output power offset characteristic and a unified input current offset characteristic of the fixed-frequency WPT circuit system under the resistive load; according to the method, the optimal design of the WPT circuit system under offset can be realized, and the constructed WPT circuit system has the characteristic of small power fluctuation.
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Description

Technical Field

[0001] The present invention relates to the field of WPT technology, and in particular to a minimum power fluctuation WPT system design method based on offset unified theory. Background Art

[0002] The WPT system is a technology that transmits electrical energy from a power source to electrical equipment through electromagnetic induction, electromagnetic radiation or magnetic field coupling without using physical wire connections. The WPT system is widely used in many fields, including electric vehicle charging, powering smart home devices, and wireless powering medical equipment. In WPT technology, the offset of the system coupling mechanism will cause the mutual inductance between coils to change, which in turn causes fluctuations in output power and changes in input current. Therefore, how to effectively reduce power fluctuations and suppress the increase in input current has become a major challenge facing this field. Summary of the invention

[0003] The purpose of the present invention is to provide a method for designing a WPT system with minimum power fluctuation based on the unified theory of offset. The present invention can realize the optimal design of the WPT circuit system under offset, and the constructed WPT circuit system has the characteristic of small power fluctuation.

[0004] The technical solution provided by the present invention is as follows: A minimum power fluctuation WPT system design method based on the unified offset theory comprises the following steps:

[0005] Step 1: Establish a fixed-frequency WPT circuit system model with a double-sided port network and corresponding coils, define the ratio of the mutual inductance at the offset position to the mutual inductance at the opposite position as the offset coefficient x, and set the mutual inductance between all coils belonging to two different sides to change at the same rate during the offset;

[0006] Step 2: Obtain the minimum offset coefficient x by using the uniform output current offset characteristic, uniform output power offset characteristic and uniform input current offset characteristic of the fixed frequency WPT circuit system under a resistive load. min , input current rise rate γ, output power fluctuation coefficient κ R With input current I in the relationship between;

[0007] Step 3: Obtain the output power fluctuation coefficient κ through the uniform output power offset characteristics of the fixed-frequency WPT circuit system with battery load R , minimum offset coefficient x min and the input current rise rate γ;

[0008] Step 4: Configure the minimum power fluctuation fixed-frequency WPT circuit system based on the fixed-frequency WPT circuit system parameter relationship under the resistive load and the battery load.

[0009] In the above-mentioned minimum power fluctuation WPT system design method based on the unified offset theory, the fixed-frequency WPT circuit system model includes a two-coil WPT circuit system model and a coaxial multi-coil WPT circuit system model, and the current loop equation formed by the primary and secondary port networks is expressed by the following formula:

[0010]

[0011] In the formula, The voltage vector of each port of each port network in the tabular fixed-frequency WPT circuit system model; The current vector of each port of each port network in the tabular fixed-frequency WPT circuit system model; Z m~n The impedance matrix of the fixed-frequency WPT circuit system model is shown in the table. The impedance matrix is ​​composed of the impedance matrix of each port network and the mutual inductance matrix of the coils between the primary and secondary port networks. m~n represents the m parallel coils of the primary port network to the n parallel coils of the secondary port network.

[0012] In the aforementioned minimum power fluctuation WPT system design method based on the unified offset theory, the unified output current offset characteristic of the fixed-frequency WPT circuit system under the resistive load is to calculate the current vector through the current loop equation, as shown in the following formula:

[0013]

[0014] The last column in the above formula is:

[0015]

[0016] Where K represents the total number of current loops, represents the output current of the Kth current loop; Indicates the voltage of the current loop; Representation Matrix The element in the lower left corner is as follows:

[0017]

[0018] In the formula, A 1K Represents Z m~n The algebraic cofactor matrix of the upper right corner element of 1K ) means A 1K The determinant of det(Z m~n ) represents Z m~n The determinant of ;

[0019] Det(A 1K ) and det(Z m~n) is converted into an expression about the offset coefficient x to obtain the uniform output current offset characteristic.

[0020] In the aforementioned minimum power fluctuation WPT system design method based on the unified offset theory, the unified output power offset characteristic of the fixed-frequency WPT circuit system under the resistive load is the relationship between power and current obtained by the electric power formula, as shown in the following formula:

[0021]

[0022] The output power of the fixed-frequency WPT circuit system at the facing position and the maximum offset position is set to be the same, so that x = x min , x = 1, and set λ to:

[0023]

[0024] The output power fluctuation coefficient κ R Defined as the ratio of the maximum output power to the output power at the facing position, substitute the minimum offset coefficient x min ,λto obtain the output power fluctuation coefficientκ R The associated unity output power offset characteristic.

[0025] In the aforementioned minimum power fluctuation WPT system design method based on the unified offset theory, the unified input current offset characteristic of the fixed-frequency WPT circuit system under the resistive load is obtained by the following formula:

[0026]

[0027] In the formula, Represents the output current of the first current loop; express The upper left corner element of is calculated as follows:

[0028]

[0029] In the formula, A 11 Represents Z m~n The algebraic cofactor matrix of the upper left corner element, det(A 11 ) means A 11 The determinant of det(Z m~n ) represents Z m~n The determinant of ;

[0030] Define the input current function I with respect to the offset factor x in (x) and make it equal to Set the zero phase angle of voltage and current at the positive position or the maximum offset position to obtain λ and the minimum offset coefficient x min The relationship between them must satisfy the following formula:

[0031] or

[0032] The current function I in (x) are normalized to x = 1 and x = x respectively. min A uniform input current offset characteristic is obtained.

[0033] In the above-mentioned minimum power fluctuation WPT system design method based on the unified offset theory, the input current rise rate γ is defined as the ratio of the input current at the opposite position or the maximum offset position to the current at the opposite position or the maximum offset position. min Substituting the uniform input current offset characteristic and dividing it, we can get the input current rise rate γ with respect to the minimum offset coefficient x min The relationship between λ and λ.

[0034] In the aforementioned minimum power fluctuation WPT system design method based on the unified offset theory, the fixed-frequency WPT circuit system with battery load is equivalent to a voltage source and an impedance connected in series and connected to a battery load, and its circuit equation is as follows:

[0035]

[0036] Where Uoc represents the voltage source; X eq Indicates reactance; jX eq Indicates impedance; U cnt Indicates the effective value of the equivalent AC voltage corresponding to the battery voltage.

[0037] In the aforementioned minimum power fluctuation WPT system design method based on the unified offset theory, the unified output power offset characteristic of the fixed-frequency WPT circuit system with battery load is calculated by the circuit method to be the current flowing through the load:

[0038]

[0039] Further derive the output power P DC for:

[0040]

[0041] Assume that the output power of the WPT circuit system at the facing position is P a , expressed as:

[0042]

[0043] calculate The voltage source Uoc and the short-circuit current with the offset coefficient x are derived Then we get the reactance X eqand P a , substitute the output power P DC A uniform output power offset characteristic with an offset coefficient x is obtained.

[0044] In the above-mentioned minimum power fluctuation WPT system design method based on the unified offset theory, the target WPT system circuit is selected and the output power P is set a , minimum offset coefficient x min , input and output voltages, and the component parameters of the WPT circuit system are solved based on the demand parameters and the known parameter relationships among the unified output current offset characteristics, the two unified output power offset characteristics, and the unified input current offset characteristics. Based on the component parameters, a small-power fluctuating fixed-frequency WPT circuit system is constructed.

[0045] Compared with the prior art, the present invention establishes a fixed-frequency WPT circuit system model with a double-sided port network and corresponding coils, and sets the mutual inductance between all coils belonging to two different sides to change at the same rate during the offset; the minimum offset coefficient x is obtained through the unified output current offset characteristic, unified output power offset characteristic and unified input current offset characteristic of the fixed-frequency WPT circuit system under a resistive load. min , input current rise rate γ, output power fluctuation coefficient κ R With input current I in According to the power difference of the offset coefficient x, this type of system is divided into two categories: WPT circuit system with low-order offset and WPT circuit system with high-order offset characteristics; the output power fluctuation coefficient κ is obtained by the unified output power offset characteristics of the fixed-frequency WPT circuit system with battery load R , minimum offset coefficient x min The relationship between the input current rise rate γ is calculated, and the battery load is included in the proposed unified theoretical framework. The unified output power offset characteristics of the WPT circuit system under battery load are derived, and the conditions that the output power minimization system should meet are derived. The minimum power fluctuation fixed-frequency WPT circuit system is configured based on the parameter relationship of the fixed-frequency WPT circuit system under resistive load and battery load. The configuration parameters are matched according to the characteristics, and the component parameters of the two-coil WPT system are determined to minimize the system fluctuation under load. An experimental system is built to verify the system design method and the unified theoretical framework. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 A unified circuit model for a two-coil WPT circuit system with different current loops;

[0047] Figure 2 is the T-type equivalent circuit of a passive two-port network;

[0048] Figure 3A unified circuit model for a multi-to-multi-coil WPT circuit system;

[0049] Figure 4 It is the star equivalent circuit of the multi-port network;

[0050] Figure 5 It is the coil structure of the coaxial multi-coil WPT circuit system;

[0051] Figure 6 The coil structure of the multi-coil LDMC-WPT circuit system;

[0052] Figure 7 Unified output power offset characteristics for LDMC-WPT circuit systems;

[0053] Figure 8 Unified input current offset characteristics for LDMC-WPT circuit system;

[0054] Fig. 9 It is the impossible triangle of the LDMC-WPT circuit system;

[0055] Fig.10 There are two types of loads in the WPT circuit system;

[0056] Fig.11 is the Thevenin equivalent circuit of the WPT circuit system;

[0057] Fig.12 Unified input-output offset characteristics for LDMC-WPT circuit system with battery load;

[0058] Fig.13 The circuit diagram of the WPT circuit system with two coils and four current loops;

[0059] Fig.14 The oscilloscope waveforms of the rectifier input voltage and current in the minimum power fluctuation WPT circuit system prototype;

[0060] Fig.15 It is the experimental data curve of the minimum power fluctuation WPT circuit system prototype;

[0061] Fig.16 The oscilloscope waveform of the input voltage and current of the minimum power fluctuation WPT circuit system prototype. DETAILED DESCRIPTION

[0062] The present invention is further described below in conjunction with the embodiments and drawings, but they are not intended to limit the present invention.

[0063] Example: A two-coil minimum power fluctuation WPT system design method based on the offset unified theory of fixed-frequency WPT is used to model and analyze the fixed-frequency WPT circuit system. Figure 1 (a) shows the most basic SS-WPT circuit system. In this system, the primary and secondary sides each contain a current loop, so it is called a two-coil 1-1 loop WPT circuit system. In the system, P and S are the reactance (usually capacitance) in series with the primary coil and the secondary coil, respectively. represents a sinusoidal voltage source; Figure 1 (b) shows a more complex two-coil WPT system configuration, in which network P and network S are two-port compensation networks cascaded between the primary power supply and the transmitting coil, and the secondary receiving coil and the load, respectively; Figure 2 As shown in the figure, the passive two-port network contains multiple current loops, which is equivalent to a T-type circuit. Figure 1 The circuit in (b) has two current loops on the primary and secondary sides, forming a two-coil 2-2 loop WPT circuit system; similarly, Figure 1 (c) and (d) represent the two-coil 2-1 loop and 1-2 loop WPT circuit systems respectively.

[0064] In the WPT circuit system, the compensation circuit is usually composed of capacitors and inductors. In order to simplify the calculation and analysis process, this embodiment ignores the parasitic resistance of the coil and the compensation element in the system in the theoretical discussion stage. At the same time, the inductance of the transmitting and receiving coils is included in the network P and the network S. The unified equation is used to describe the two-port network P or network S as follows:

[0065]

[0066] in, and are the voltage vector and current vector of the two ports, Z P / S is the impedance matrix; the general form of the network P and network S impedance matrices is as follows:

[0067]

[0068] Where P ij and S ij is a real number; Figure 1 The current loop equations of the four two-coil WPT circuit systems are:

[0069]

[0070] In the formula, is the current in the ith loop.

[0071] In this embodiment, the offset performance of the system is studied by using the offset coefficient x, which is defined as the ratio of the mutual inductance of the system at the offset position to the mutual inductance at the facing position, so as to normalize the influence of the offset. In a common wide air gap WPT circuit system, the self-inductance of the coil usually does not change greatly with the offset. Therefore, in this embodiment, it is regarded as a constant, and equation (2-3) can be uniformly written as:

[0072]

[0073] Among them, the subscript 1~1 represents a single coil to single coil system, Z 1~1 Can be divided into four block matrices:

[0074]

[0075] The two-coil WPT circuit system model can be extended to the coaxial multi-coil WPT circuit system. Figure 3 The unified circuit model of a multi-coil to multi-coil system is shown, where there are m and n coils in the primary and secondary sides, respectively. Figure 3 It can be seen that if the input voltage source is connected in series with one of the primary coils, the network P is an m-port network, as shown in the attached figure. Figure 3 (a) and (c), otherwise it is an (m+1) port network, as shown in the attached Figure 3 (b) and (d); similarly, there are two different ways to connect the load resistor R. According to the electrical network theory, a multi-terminal network can be equivalent to a star circuit, which is also applicable to a multi-port network, as shown in the attached figure. Figure 4 As shown; therefore attached Figure 3 The number of ports in the multi-port network on the primary or secondary side is equal to the number of current loops on that side; therefore, the topology of the multi-coil WPT circuit system is divided into four different types, namely, mn loop, (m+1)-n loop, m-(n+1) loop and (m+1)-(n+1) loop, and the inductance of the coil and the mutual inductance between the two coils on the same side are already included in the network P or network S; Figure 3 The loop current equation of the multi-coil to multi-coil WPT circuit system is as follows:

[0076]

[0077] In the formula, The voltage vector of each port of each port network in the tabular fixed-frequency WPT circuit system model is: The current vector of each port of each port network in the tabular fixed-frequency WPT circuit system model is specifically: Z m~nThe impedance matrix of the fixed-frequency WPT circuit system model is shown in the table. The impedance matrix is ​​composed of the impedance matrix of each port network and the mutual inductance matrix of the coils between the primary and secondary port networks. m~n represents the m parallel coils of the primary port network to the n parallel coils of the secondary port network, which is specifically:

[0078]

[0079] In Z m~n In, M ij is the mutual inductance between the i-th coil in the primary and the j-th coil in the secondary. Assuming that the mutual inductance between all coils in two different sides changes at the same rate when offset, the offset situation can be uniformly described by the offset coefficient x:

[0080] M′ ij =xM ij (2-9)

[0081] Where M ij is the mutual inductance at the opposite position, M' ij is the mutual inductance at the corresponding offset position.

[0082] To achieve the effect described in (2-9), the coils in the primary and secondary sides need to be coaxial, as shown in the attached figure. Figure 5 As shown, attached Figure 5 The coils on the same side in (a) are stacked because the coils are in the same position, so the conditions in (2-9) are met; Figure 5 In (b), the coils on the same side are arranged in the same plane in an inner-outer nested form, so the positions of the coils are different. After simulation verification, it can be seen that if the offset is within an appropriate range relative to the size of the coil, then the assumption in (2-9) is more reasonable.

[0083] Unified output current offset characteristics of the fixed-frequency WPT circuit system with resistive load: According to formula (2-6), it can be obtained:

[0084]

[0085] The last column of formula (2-10) is:

[0086]

[0087] In the formula, the output current and is proportional, so we only need to study As the offset coefficient x changes, is a matrix The lower left element is calculated as:

[0088]

[0089] In the formula, A 1K It's Z m~n The algebraic cofactor matrix of the upper right corner element of 1K ) and det(Z m~n ) respectively represent the determinants of the corresponding matrices. Since the present embodiment studies the offset characteristics of the system, it is only necessary to focus on the expression forms of the two determinants with respect to the offset coefficient x;

[0090] According to the theory of linear algebra, the determinant of a K-order square matrix is ​​defined as follows:

[0091]

[0092] Where p1,···,p K is a permutation of 1,···,K, a 1p 1···a Kp K is the element-wise product of the permutation, and sgn(p1,···,p K ) is the symbol corresponding to the arrangement. To get det(Z m~n ) and det(A 1K ) in the number of x, we only need to consider a in (2-13) 1p 1···a Kp The sum of the products of K, that is, the sum of the products of all elements in different rows and columns in the square matrix.

[0093] Select elements of different rows and columns in (2-8). If the block matrix in the upper right corner, that is, the matrix M in (2-5), is a 1p 1···a Kp K selects l elements, then the remaining (ml) elements must be selected from the matrix P, excluding the first row (if it exists); if the first row of the matrix P is included, since all elements in the first row of the matrix M are zero, an element must be selected from the matrix P, so (m+1-l) elements need to be selected from the matrix P; similarly, an element must be selected from the first column of the matrix P, and the other (ml) elements are selected from other columns except the first column (if it exists); from M T The selection of l elements from M and M must also follow the thorn process. T Select l elements from each, and l can take values ​​from 0 to the smaller of m and n, so det(Z m~n ) will be an even number between 0 and 2·min(m,n). In addition, the element at the lower left corner of the matrix (jS 00 +R) is a complex number, so expand the determinant to 2l The coefficients of are defined as complex numbers (a2l +jb 2l ), in summary, det(Z m~n ) is generally expressed as:

[0094]

[0095] Determinant det(A 1K ) is similar to the above proof method. The matrix A 1K It is expressed as:

[0096]

[0097] In (2-15), we select elements from different rows and columns. If we select l elements from the upper right block matrix, we should select (ml) elements from the upper left block matrix (if the first row is included) or (ml-1) elements from the upper left block matrix (if the first row is not included). If the first column is included, we must select one of the elements, and we should also select the remaining (ml-1) elements. Therefore, we should select (l+1) elements from the lower left block matrix. Therefore, det(A 1K ) where the exponent of x is an odd number not greater than (min(m,n)-1); since the matrix A 1K All elements in are pure imaginary numbers, so the j of each row in the matrix can be extracted as j (K-1) Put it in front, so x (2l-1) The coefficient of is a real number; in summary, A 1K The general expression of is:

[0098]

[0099] In summary, The expression is:

[0100]

[0101] For the attached Figure 1 The two-coil WPT circuit system in Figure 6 The multi-coil to single-coil and single-coil to multi-coil WPT circuit systems in (a) and (b) are attached. Figure 6 In the figure, different colors of voltage sources and loads indicate where they may appear, similar to the Figure 3 In the four cases), min(m,n) in (2-17) is equal to 1, so The expression should have the following form:

[0102]

[0103] This embodiment refers to this system as a low-degree misalignment characteristic (LDMC-) WPT system; Figure 3 In the multi-coil to multi-coil WPT circuit system, min(m,n)≥2, so the degree of x in the offset characteristic is relatively high, and this embodiment is called a high-order offset characteristic (High-Degree Misalignment Characteristic, HDMC-) WPT system; this embodiment will focus on the LDMC-WPT circuit system.

[0104] Unified output power deviation characteristics of fixed frequency WPT circuit system with resistive load: For resistive load, the output power is proportional to I K is proportional to the square of , so we can get:

[0105]

[0106] According to (2-18), we can calculate The values ​​are:

[0107]

[0108] In the denominator of (2-20), x 2 is an increasing function, and x -2 is a decreasing function, so within a certain range of x, p R The change of (x) tends to be gentle. By designing the compensation element of the WPT circuit system, the area is made to fall within the desired offset range to improve the offset characteristics of the system. In this embodiment, it is considered that the WPT circuit system is at the opposite position (x=1) and at the maximum offset position (x=x min ) have the same output power:

[0109]

[0110] Solve for x 2 min for:

[0111]

[0112] Then (2-20) can be rewritten as:

[0113]

[0114] Set λ to:

[0115]

[0116] From (2-20), we can see that the function p RThe shape of (x) is only related to x min Related to λ, it can be deduced through (2-22) and (2-24):

[0117]

[0118] Therefore, the value range of λ is [-1,1]. Normalizing (2-23) to x = 1, we can obtain the unified output power-offset characteristic p of the LDMC-WPT circuit system. R (x) is:

[0119]

[0120] Using the basic inequality for (2-26), we can calculate p R Maximum value of (x):

[0121]

[0122] In (2-27), if and only if When taking the equal sign, that is The output power reaches its maximum value when , and the ratio of the maximum output power to the output power at the opposite position is defined as the output power fluctuation coefficient κ R ,get:

[0123]

[0124] Define the output power fluctuation percentage of the WPT circuit system as v R ,but

[0125] v R =(κ R -1)×100% (2-29)

[0126] Attached Figure 7 (a) and (b) show the x min How do λ and λ affect the output power-offset characteristics of low-offset WPT systems? Figure 7 It can be seen that when λ is kept constant, a larger offset range (i.e., a smaller x min ) will lead to larger output power fluctuations, while increasing λ can reduce such fluctuations.

[0127] The uniform input current offset characteristic of the fixed-frequency WPT circuit system with resistive load: This characteristic is closely related to the volt-ampere rate of the inverter. The first column of equation (2-10) is:

[0128]

[0129] in, Represents the output current of the first current loop; express The upper left corner element of is calculated as follows:

[0130]

[0131] In the formula, A 11 Represents Z m~n The algebraic cofactor matrix of the upper left corner element;

[0132] The form of expression (2-31) is derived as follows: It is necessary to consider two WPT circuit systems: multi-coil to single-coil and single-coil to multi-coil. In the WPT circuit system of multi-coil to single-coil, Z in (2-31) is m~n Should be Z as shown in (2-33) m~1 , and A in (2-31) 11 By removing Z m~1 The first row and column of A becomes 11,m~1 ; The same is true for the single-coil to multi-coil WPT circuit system, using Z in (2-34) 1~n and A 11,1~n to replace; the four determinants det(Z m~1 )、det(A 11,m~1 )、det(Z 1~n ) and det(A 11,1~n ) can be divided into the sum of two determinants, which have the form on the left side of the equal sign in (2-32), as shown in (2-35), (2-37), (2-39) and (2-41a) respectively. The following is a formula for calculating the determinant of a block matrix:

[0133]

[0134] Where O represents a square matrix with all elements being 0;

[0135]

[0136] det(Z 1~n )=(C+jD)·x 2 +jP 11 ·(E+jF) (2-40a)

[0137]

[0138]

[0139] det(A 11,1~n )=(E+jF) (2-42a)

[0140] det(A 11,1~n )=(C+jD)·x2 +jP 11 ·(E+jF) (2-42b)

[0141] According to (2-32), the upper left color block and the middle color block in (2-35) can be simplified to (2-36a). Similarly, the lower right color block and the entire equation in (2-35) can also be simplified to (2-36b), where ⊕ means XOR, which means that both take the value before ⊕ or both take the value after ⊕; then, (2-37) can be simplified to (2-38a) and (2-38b). Similarly, the middle color block and the lower right color block in (2-39) can be simplified to (2-40a), and the upper left color block and the entire equation can be simplified to (2-40b), and (2- 41a) and (2-41b) can be simplified to (2-42a) and (2-42a) respectively; in these equations, A1, B1, A2, B2, C, D, E and F are real numbers calculated according to the corresponding blocks in the determinant. By comparing (2-36a) and (2-38a), it is found that the ratio of the two coefficients of x2 in these equations is pure imaginary numbers, and the ratio of the remaining coefficients is also pure imaginary numbers. The same applies to (2-36b) and (2-38b), (2-40a) and (2-42a) (there is no x2 term in this equation) and (2-40b) and (2-42b).

[0142] The above analysis can be written as:

[0143]

[0144] In the formula, a i , b i and c i It is a real number. If there is only one current loop on the primary side, then c2=0.

[0145] The input current function I with respect to the offset factor x in (x) and make it equal to Formula (2-43) is converted into the form of (A+jB):

[0146]

[0147] When designing a WPT circuit system, it is usually necessary to achieve soft switching of the inverter's switching devices within the entire range. This requires the system to ensure the zero phase angle (ZPA) of the input voltage and current at the facing position or the maximum offset position. Assuming that ZPA appears at a certain offset position in the middle, this will cause the input impedance on one side of the position to be capacitive, resulting in the inverter being unable to achieve soft switching. On the contrary, if ZPA does not appear within the entire offset range, the entire input impedance range will exhibit a large inductive characteristic, which will cause the input current to increase significantly, increasing the inverter's demand for volt-ampere rate. Therefore, ZPA should appear at the facing position or the maximum offset position as much as possible. If ZPA appears at the facing position, combined with (2-22) and (2-24), the following formula can be derived:

[0148]

[0149] Similarly, if ZPA occurs at the maximum deviation position, the following equation can be derived:

[0150]

[0151] If there is only one current loop on the primary side in the LDMC-WPT circuit system, then c2=0 in (2-45) and (2-46). From (2-45) and (2-46), it can be deduced that:

[0152]

[0153] For such a system, x min and λ need to satisfy the above equations to be respectively min Get ZPA at, and according to (2-25) we can get x min The relationship between λ and a2, b2, a0 and b0 is:

[0154]

[0155] Substituting equations (2-22), (2-24), (2-46) and (2-48) into equation (2-44), when the ZPA of the input voltage and current are at the positive position and the maximum deviation position respectively, the input current of the LDMC-WPT system is:

[0156]

[0157] Normalize (2-49) and (2-50) to x = 1 and x = x respectively. min The normalized input current-offset characteristic of the LDMC-WPT circuit system is obtained as follows:

[0158]

[0159] In the above formula, the symbol ± represents that the input impedance may be inductive or capacitive. In the design, it is necessary to use a positive or negative sign according to the actual situation so that the input impedance of the system remains inductive within the offset range.

[0160] If ZPA is achieved at the maximum offset position (or aligned position), the input current rise rate γ is defined as the input current at this position. The ratio of the input current at the opposite position (or the maximum offset position) is x = x min Substitute x=1 into (2-51) and then divide the result modulo to obtain γ (or substitute them into (2-52) to obtain the same γ):

[0161]

[0162] It can be seen that the input current rise rate γ is an even function of λ. Figure 8 Shows λ and x min How to affect the input current-offset characteristics of the LDMC-WPT circuit system? Take the input voltage and current ZPA at x=1 as an example. Figure 8 (a) It can be seen that when λ is fixed, x min The smaller the input current is, the faster it increases with the offset change; Figure 8 It can be seen from (b) that x min When |λ| increases, the maximum input current will increase at an increasingly faster rate. It should be noted that λ in (2-51) and (2-52) cannot be equal to ±1, otherwise the real part of the input current will be zero. That is to say, if λ approaches ±1, the imaginary part of the input current will approach infinity, so the input current will surge in practice. Figure 8 As shown in the curve with λ = 0.99; therefore, Figure 7 The curve of λ=1 in (b) is a dotted line, indicating that the actual system cannot reach this curve; in addition, since γ is an even function of λ, when λ decreases from 0 to -1, the input current rise rate will also increase. However, the fluctuation coefficient will also increase at the same time. Therefore, λ is not configured as a negative number.

[0163] The minimum offset coefficient x can be clarified by combining the unified output current offset characteristic, the unified output power offset characteristic and the unified input current offset characteristic. min , input current rise rate γ and output power fluctuation coefficient κ R and input current I in The relationship between: 1. Smaller x minThis will result in greater output power fluctuations. You can increase λ to reduce output power fluctuations. It is not recommended to configure λ to a negative number. λ should not be too large, otherwise there will be a significant increase in input current.

[0164] The above relationship can be summarized as Fig. 9 The impossible triangle described in : a larger offset distance, smaller power fluctuation and smaller input current rise rate cannot be achieved at the same time.

[0165] The uniform output power offset characteristics of the fixed-frequency WPT circuit system with battery load: The characteristic of the resistive load is that the voltage is proportional to the current, so the change of the output current after the system offset will also cause the change of the output voltage; in practical applications, the WPT circuit system usually charges the battery load, such as the attached Fig.10 As shown in (b), although the battery voltage increases with the increase of battery power during charging, the battery load can still be considered as a constant voltage in a short period of time and will not change with the change of output current; after removing the load of the WPT circuit system, its circuit can be regarded as a single-port network, and the open-circuit voltage of the port is Uoc. This circuit can be performed with the Thevenin equivalent: the circuit is equivalent to the voltage source Uoc and the impedance jX eq Since the parasitic resistance of the coil and compensation capacitor in the circuit is ignored, the equivalent impedance is pure reactance. Fig.11 (a) is the above-mentioned Thevenin equivalent circuit; Fig.11 In the Thevenin equivalent circuit in (a), a battery load is added, as shown in the figure below. Fig.11 As shown in (b), when the battery load is equivalent to the AC circuit, the corresponding AC load should have the following two characteristics: the effective value of the voltage is constant, and the charging current and voltage are in phase. Fig.11 The circuit equation in (b) is:

[0166]

[0167] Where U cnt Indicates the effective value of the equivalent AC voltage corresponding to the battery voltage.

[0168] Solving the equation in (2-54), we can deduce that the current flowing through the load is:

[0169]

[0170] Derive the system output power P DC for:

[0171]

[0172] Calculate P DCIt is necessary to obtain the open circuit voltage Uoc and equivalent reactance X of the Thevenin equivalent circuit of the WPT circuit system eq The expression of P is calculated. DC The expression cannot be related to the load resistance R. If the output power of the system at the opposite position is set to Pa, the following relationship can be obtained:

[0173]

[0174] Derivation of WPT circuit system and The unified expression calculated using a0, a2, b0, b2 and e1, first, Z in (2-33) m~1 and Z in (2-34) 1~n The determinant of is rewritten as follows:

[0175]

[0176] where t ij is a real number, and the determinant can be viewed as the sum of two determinants:

[0177]

[0178] We can get:

[0179] det(Z)=j n T1+j (n-1) T2·R (2-60)

[0180] Among them, T1 and T2 are real numbers. It is found from the above that if the number of current loops is an even number, the first term is a real number and the second term is an imaginary number. Therefore, the real part of det(Z) has nothing to do with R, and the imaginary part is linearly related to R. From (2-18), we can get:

[0181] det(Z)=(a2x 2 +a0)+j(b2x 2 +b0) (2-61)

[0182] Therefore, we can get:

[0183] b2x 2 +b0=T2R (2-62)

[0184] In summary, b0 and b2 should be linearly related to R:

[0185] b0=β0R,b2=β2R (2-63)

[0186] Therefore, we can get:

[0187]

[0188] If the number of current loops in the WPT circuit system is technology, the real part of det(Z) is proportional to R, and the imaginary part is independent of R, that is:

[0189] a0=α0R,a2=α2R (2-65)

[0190] Therefore, we can get:

[0191]

[0192] The above two situations are similar, so this paper only focuses on the analysis of the WPT circuit system with an even number of current loops; if R is 0, it is deduced that for:

[0193]

[0194] When R tends to infinity, it can be deduced that for:

[0195]

[0196] Combining (2-63) we get:

[0197]

[0198] Calculate the equivalent reactance X of the Thevenin equivalent circuit eq for:

[0199]

[0200] According to (2-19) and (2-20) and x=1, the expression of e1 is:

[0201]

[0202] Combining (2-57), (2-56), (2-67), (2-69) and (2-71), the unified output power offset characteristic of the LDMC-WPT circuit system with battery load is obtained as follows:

[0203] P DC =P a ·p DC (x) (2-72)

[0204] For a WPT circuit system with an even number of current loops, its p DC (x) is:

[0205]

[0206] For a WPT circuit system with an odd number of current loops, it is only necessary to swap a0 with b0, and a2 with b2 in the above formula.DC (x) is:

[0207]

[0208] Methods to minimize output power fluctuations: Use analyze, The derivative function with respect to x is:

[0209]

[0210] in,

[0211]

[0212] Let the derivative function be 0, and we can derive hour, To reach the maximum value, its expression is:

[0213]

[0214] Find the relationship between a0, a2, b0 and b2 that satisfies (2-77) and minimizes the power fluctuation. According to x in (2-22), min and λ in (2-24), (2-77) is transformed into:

[0215]

[0216] in,

[0217]

[0218] Therefore, to calculate the minimum value of (2-77), we only need to get the minimum value of F and set k1, k2 and k3 to:

[0219]

[0220] According to (2-22) and (2-24), we can get

[0221]

[0222] Substituting (2-81) into (2-79), we can deduce that the function of F with respect to k1 is:

[0223]

[0224] Taking the derivative of the above formula, we get:

[0225]

[0226] Let the above formula be equal to 0 and calculate the value of k1 to be ±x min, substituting the solution into (2-82) we obtain:

[0227]

[0228] Since F(-x in (2-84) min ) is less than zero and needs to be discarded, so k1 is selected to be equal to x min , that is, when a0, a2, b0 and b2 meet the following conditions, Get the minimum value:

[0229]

[0230] Substitute (2-85) into the value (2-76) to calculate xP max Can be obtained when The output power reaches the maximum when the load is F(x min ) into (2-78), we can get The minimum value of is:

[0231]

[0232] Similarly, for the WPT circuit system with an odd number of current loops, a0, a2, b0 and b2 must meet the following conditions to obtain the same minimum value in (2-86):

[0233]

[0234] Substituting (2-85) into (2-73), κ DC for:

[0235]

[0236] By comparing (2-89) and (2-28), we can find that:

[0237]

[0238] According to (2-90), and the following basic inequality:

[0239]

[0240] get:

[0241]

[0242] Compared with the load with resistance, the LDMC-WPT circuit system with battery load has a min (i.e., offset range) and λ value, the fluctuation coefficient κ can be further reduced by configuring the values ​​of a0, a2, b0, and b2.DC And reduce it to the minimum, reducing the amplitude of system power fluctuation by more than 50%; Fig.12 (a) and (b) show the min The output power-offset characteristics of the LDMC-WPT circuit system with κ and λ are compared with the case with a resistive load (dashed line in the figure); all κ DC are minimized and are less than κ R Attached Fig.12 (a) and (b) show the corresponding input current-offset characteristics, where the input voltage and current achieve ZPA at x = 1. These input current-offset characteristics are obtained by attaching Fig.13 The example system shown is derived from the circuit simulation, where X1 and X 34 It's emotional, X 12 , X2 and X3 are capacitive. The specific component parameters used in these systems are shown in Table 1 below (Appendix Fig.13 The inductance of the middle coil is already included in X2 and X3, and the mutual inductance between the coils is 75μH)

[0243]

[0244] Table 1

[0245] From the attached Fig.12 It can be seen from (c) and (d) that for the system with battery load, when κ DC At a minimum, the input current is equal at the straight-on and maximum offset positions, but is smaller at mid-excursion positions compared to a system with a resistive load.

[0246] Design of two-coil minimum power fluctuation fixed-frequency WPT circuit system: Appendix Fig.13 is an AC equivalent circuit diagram of a two-coil 2-2 loop WPT circuit system, in which the primary and secondary sides each have three compensation elements; the matrix Z in (2-2) P and Z S The elements in can be calculated as follows:

[0247]

[0248] According to (2-3b), the variables related to the uniform output current offset characteristics of the system in (2-11) are obtained by calculation: The expression is:

[0249]

[0250] The above formula satisfies the form of (2-18), and the expressions of a0, a2, b0, b2 and e1 are:

[0251]

[0252] According to (2-3b), the variables related to the uniform input current offset characteristics of the system in (2-30) are obtained by calculation The expression is:

[0253]

[0254] According to the above analysis, this embodiment designs a two-coil 2-2 loop WPT circuit system, and sets the ZPA point at the facing position. The design requirement parameters are shown in Table 2 below:

[0255]

[0256] Table 2

[0257] To get the x required in the table min and λ, and make κ DC Minimum, the above variables a0, a2, b0 and b2 should satisfy the three equations in (2-85). In addition, the four loop currents I˙ia at the facing position can be obtained by solving (2-4) and should meet the following three conditions: 1. The input current and voltage at the facing position are in phase to achieve ZPA; 2. The output current at the facing position can provide the required power; 3. The current ratio τ23 of the primary and secondary coils at the maximum offset position is known;

[0258] It is expressed as:

[0259]

[0260] Since this system is a 2-2 loop WPT circuit system, unlike the 1-1 loop WPT circuit system, the input current and the transmitting coil current, the output current and the receiving coil current of this system do not have to be the same, which also brings more freedom to the system design. The ratio of the input current to the primary coil current at the opposite position is defined as τ 12 ,So:

[0261]

[0262] There are seven equations in total in (2-85), (3-27) and (3-28). Fig.13 There are six unknown reactances and one unknown mutual inductance in the circuit that need to be solved. By solving these seven equations, a two-coil WPT circuit system can be determined.

[0263] We choose λ = 0.25 because it has a relatively smooth output (such as the Figure 7 (b)) and the maximum input current is also relatively small (see Figure 8(b)); the parameters of the coupler in the experimental system are shown in Table 3 below:

[0264]

[0265] Table 3

[0266] Solving the seven equations in (2-85), (3-27) and (3-28), we can obtain eight sets of equations about the attached Fig.13 The solution of the compensation components is shown in Table 4 below:

[0267]

[0268] Table 4

[0269] Since the input impedance of the last four groups in the offset range is capacitive, they are removed. Then, the group with higher efficiency is selected from the first four groups of solutions; from (3-27), it can be seen that the current of each group of coils is the same, so only the loss of the compensation components needs to be compared. The quality factor of the capacitor of the experimental prototype is about 900, and the quality factor of the inductor is about 400. Through circuit simulation software, the current value of each component can be determined, and then the loss is calculated. The loss of the second group is the lowest.

[0270] Experimental verification of the two-coil minimum power fluctuation WPT circuit system: An experimental prototype was built according to the design, in which the input voltage of the transmitter was generated by a full-bridge inverter, the inverter consisted of four C3M0021120D SiC MOSFETs from Cree, and the output DC voltage was rectified by a full-bridge rectifier, which consisted of four STPSC20065WSiC Schottky diodes from STMicroelectronics. The compensation component parameters are shown in Table 5 below:

[0271]

[0272] Table 5

[0273] In the experiment, high-order harmonics affect the phase difference between the input voltage and current of the rectifier. Fig.14 (a) shows the original waveform of the rectifier input voltage and current. It can be seen that the phase of the current lags behind the voltage. In the oscilloscope, the voltage and current waveforms are input into the same low-pass filter. The waveform after filtering is shown in the attached figure. Fig.14 (b) shows the waveform. Fig.14As shown in (c), the measured phase difference is 6.88° (current lags voltage), so the load can be equivalent to an inductor and a resistor in series; the AC equivalent resistance can be calculated to be 39.3Ω, so the equivalent reactance is 4.74Ω, and the load inductance can be calculated to be 8.88μH. Since the equivalent inductor can replace X4 (11.09μH), there is no need to set an inductor at the X4 position in the experimental prototype.

[0274] Attached Fig.15 (c) is the relationship between the offset distance and the offset coefficient of the experimental prototype. From the figure, we can get x min = 0.5 corresponds to a maximum offset distance of 170 mm; Fig.15 (a) shows the variation of output power with offset coefficient x under resistive load and battery load. It can be seen that the output power is in good agreement with the theoretical value. The fluctuation coefficient κ of the resistive load and battery load measured in the experiment is R ,exp and κ D , exp are 1.216 and 1.105 respectively; the waveforms of the inverter output voltage and current are shown in the attached figure. Fig.16 As shown in the figure, at the positive position, the input voltage and current are basically in phase. As the offset increases, the input current also increases, and ZVS is achieved in the entire offset range. Fig.15 (b) shows that the input current increases as x decreases, and the ratio γ of the maximum input current to the minimum input current within the offset range is measured to be 1.746; Fig.15 There are some differences between the theoretical and measured values ​​in (a) and (b), which are due to the errors in the compensation components, the parasitic resistance of the compensation components and the coil, the change in the self-inductance of the coil after the coupling adjustment, and the inaccuracy of the mutual inductance measurement. The overall trend found in the theoretical values ​​is consistent with the experimental measurement results. When the offset becomes larger, it is expected that a larger input current will be required. Fig.15 (d) shows the change in efficiency within the offset range; at the facing position, the DC-DC efficiency of the prototype is 94.8%, while at the maximum offset position (i.e. 170 mm), the efficiency drops to 90.9%.

Claims

1. A minimum power fluctuation WPT system design method based on the unified offset theory, characterized by: The steps include: Step 1: Establish a fixed-frequency WPT circuit system model with a double-sided port network and corresponding coils, define the ratio of the mutual inductance at the offset position to the mutual inductance at the opposite position as the offset coefficient x, and set the mutual inductance between all coils belonging to two different sides to change at the same rate during the offset; Step 2: Obtain the minimum offset coefficient x by using the uniform output current offset characteristic, uniform output power offset characteristic and uniform input current offset characteristic of the fixed frequency WPT circuit system under a resistive load. min , input current rise rate γ, output power fluctuation coefficient κ R With input current I in the relationship between; Step 3: Obtain the output power fluctuation coefficient κ through the uniform output power offset characteristics of the fixed-frequency WPT circuit system with battery load R , minimum offset coefficient x min and the input current rise rate γ; Step 4: Configure the minimum power fluctuation fixed-frequency WPT circuit system based on the fixed-frequency WPT circuit system parameter relationship under the resistive load and the battery load.

2. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to claim 1, characterized in that: The fixed-frequency WPT circuit system model includes a two-coil WPT circuit system model and a coaxial multi-coil WPT circuit system model, and the current loop equation formed by the primary and secondary port networks is expressed by the following formula: In the formula, The voltage vector of each port of each port network in the tabular fixed-frequency WPT circuit system model; The current vector of each port of each port network in the tabular fixed-frequency WPT circuit system model; Z m~n The impedance matrix of the fixed-frequency WPT circuit system model is shown in the table. The impedance matrix is ​​composed of the impedance matrix of each port network and the mutual inductance matrix of the coils between the primary and secondary port networks. m~n represents the m parallel coils of the primary port network to the n parallel coils of the secondary port network.

3. The minimum power fluctuation WPT system design method based on the offset unified theory according to claim 2 is characterized by: The uniform output current offset characteristic of the fixed-frequency WPT circuit system with a resistive load is to calculate the current vector through the current loop equation, as shown in the following formula: The last column in the above formula is: Where K represents the total number of current loops, represents the output current of the Kth current loop; Indicates the voltage of the current loop; Representation Matrix The element in the lower left corner is as follows: In the formula, A 1K Represents Z m~n The algebraic cofactor matrix of the upper right corner element of 1K ) means A 1K The determinant of det(Z m~n ) represents Z m~n The determinant of ; Det(A 1K ) and det(Z m~n ) is converted into an expression about the offset coefficient x to obtain the uniform output current offset characteristic.

4. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to claim 3 is characterized in that: The uniform output power deviation characteristic of the fixed-frequency WPT circuit system with a resistive load is obtained by using the electric power formula to obtain the relationship between power and current, as shown in the following formula: The output power of the fixed-frequency WPT circuit system at the facing position and the maximum offset position is set to be the same, so that x = x min , x = 1, and set λ to: The output power fluctuation coefficient κ R Defined as the ratio of the maximum output power to the output power at the facing position, substitute the minimum offset coefficient x min ,λto obtain the output power fluctuation coefficientκ R The associated unity output power offset characteristic.

5. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to claim 4 is characterized in that: The uniform input current offset characteristic of the fixed-frequency WPT circuit system with a resistive load is obtained by the following formula: In the formula, Represents the output current of the first current loop; express The upper left corner element of is calculated as follows: In the formula, A 11 Represents Z m~n The algebraic cofactor matrix of the upper left corner element, det(A 11 ) means A 11 The determinant of det(Z m~n ) represents Z m~n The determinant of ; Define the input current function I with respect to the offset factor x in (x) and make it equal to Set the zero phase angle of voltage and current at the positive position or the maximum offset position to obtain λ and the minimum offset coefficient x min The relationship between them must satisfy the following formula: or The current function I in (x) are normalized to x = 1 and x = x respectively. min A uniform input current offset characteristic is obtained.

6. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to claim 4 is characterized in that: Define the input current rise rate γ as the ratio of the input current at the facing position or the maximum offset position to the current at the facing position or the maximum offset position. min Substituting the uniform input current offset characteristic and dividing it, we can get the input current rise rate γ with respect to the minimum offset coefficient x min The relationship between λ and λ.

7. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to claim 2, characterized in that: The fixed-frequency WPT circuit system with battery load is equivalent to a voltage source and an impedance connected in series and connected to a battery load. The circuit equation is as follows: Where Uoc represents the voltage source; X eq Indicates reactance; jX eq Indicates impedance; U cnt Indicates the effective value of the equivalent AC voltage corresponding to the battery voltage.

8. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to claim 7, characterized in that: The uniform output power deviation characteristic of the fixed-frequency WPT circuit system with battery load is: Further derive the output power P DC for: Assume the output power of the WPT circuit system at the facing position is P a , expressed as: calculate The voltage source Uoc and the short-circuit current with the offset coefficient x are derived Then we get the reactance X eq and P a , substitute the output power P DC A uniform output power offset characteristic with an offset coefficient x is obtained.

9. The method for designing a WPT system with minimum power fluctuation based on the unified offset theory according to any one of claims 1 to 8, characterized in that: The process of configuring the minimum power fluctuation fixed-frequency WPT circuit system by combining the fixed-frequency WPT circuit system parameter relationship under resistive load and battery load is as follows: Select the target WPT system circuit and set the output power P a , minimum offset coefficient x min , input and output voltages, and the component parameters of the WPT circuit system are solved based on the demand parameters and the known parameter relationships among the unified output current offset characteristics, the two unified output power offset characteristics, and the unified input current offset characteristics. Based on the component parameters, a small-power fluctuating fixed-frequency WPT circuit system is constructed.

Citation Information

Patent Citations

  • Design method for double-end compensation network of WPT system with strong offset resistance

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