Power supply circuit, chip and electronic equipment

Abstract

The invention relates to the technical field of switching power supplies, in particular to a power supply circuit, a chip and electronic equipment. The power supply circuit comprises a first power supply module, a second power supply module, a voltage clamping circuit and a voltage output end, the first power supply module is used for outputting a first output voltage when the input voltage is smaller than a first threshold voltage; the voltage clamping circuit is used for clamping the voltage on the voltage output end to a second output voltage when the input voltage is larger than the first threshold voltage and smaller than the second threshold voltage; the second power supply module is used for outputting a third output voltage when the input voltage is greater than a second threshold voltage; in the process that the input voltage gradually rises from zero, the first power supply module, the voltage clamping circuit and the second power supply module work in sequence, stable voltage can be adaptively output according to the increase of the input voltage, switching between high voltage and low voltage can be achieved without a comparator and a logic circuit, the structural design of the power supply circuit is simple, and the cost is low. And the hardware cost is low.

Description

Technical Field

[0001] The present application relates to the technical field of switching power supplies, and in particular to a power supply circuit, a chip and an electronic device. Background Art

[0002] In the initial stage of powering on the circuit system, many modules of the system have not been powered on, and the high-precision low-dropout regulator (LDO) power supply cannot work properly at this time. However, at this stage, the system needs a relatively stable power supply voltage to ensure that modules such as logic circuits can work properly, otherwise the system will be locked in the initial stage and cannot be powered on normally. Therefore, an initial power supply is needed in the system. The accuracy requirement of this power supply is not high, but it must ensure that it can be powered on following the external input and can work normally in both the low voltage domain and the high voltage domain.

[0003] In the related art, when the circuit system involves an application with a wider input voltage range, two sets of initial power supply circuits, high voltage and low voltage, are required, and corresponding comparators and logic circuits are required to switch between the two, resulting in a complex structure of the initial power supply circuit and high hardware cost. Summary of the invention

[0004] The present application provides a power supply circuit, a chip and an electronic device to solve the technical problem of high hardware cost of the power supply circuit in the related art.

[0005] In a first aspect, the present application provides a power supply circuit, the power supply circuit comprising: a first power supply module, a second power supply module, a voltage clamping circuit and a voltage output terminal;

[0006] The first power module and the second power module are both used to receive input voltage, and the first power module, the second power module and the voltage clamping circuit are all connected to the voltage output terminal;

[0007] The first power supply module is used to output a first output voltage when the input voltage is less than a first threshold voltage;

[0008] The voltage clamping circuit is used for clamping the voltage on the voltage output terminal to a second output voltage when the input voltage is greater than the first threshold voltage and less than a second threshold voltage;

[0009] The second power supply module is used to output a third output voltage when the input voltage is greater than the second threshold voltage;

[0010] The voltage output terminal is used to output the first output voltage, the second output voltage and the third output voltage; the voltage values ​​of the first output voltage, the second output voltage and the third output voltage increase in sequence.

[0011] In a possible design, the power supply circuit further includes an output clamp protection circuit, and the output clamp protection circuit is connected to the voltage output terminal and / or the first power supply module;

[0012] The output clamping protection circuit is used to clamp the voltage of the voltage output terminal to the fourth threshold voltage when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage; and / or, when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage, output a voltage clamping protection signal to the first power supply module, and the first power supply module is used to clamp the voltage of the voltage output terminal to the fourth threshold voltage according to the voltage clamping protection signal.

[0013] In a possible design, the power supply circuit further includes a current mirror circuit, and the current mirror circuit includes a current generating branch, a first current branch, and a second current branch;

[0014] The current generating branch is used to generate a bias current, and the first current branch and the second current branch are respectively used to generate a first current and a second current according to the bias current; the first current branch is connected to the second power supply module, and the second current branch is connected to the voltage clamping circuit.

[0015] In a possible design, the current generating branch includes a first transistor, a second transistor, a first resistor and a second resistor, the first end of the first resistor is used to receive the input voltage, the second end of the first resistor is connected to the first electrode of the first transistor, the control electrode and the second electrode of the first transistor are both connected to the second electrode of the second transistor, the first electrode of the second transistor is grounded through the second resistor, and the control electrode of the second transistor is grounded;

[0016] The first current branch includes a third resistor and a third transistor, the first end of the third resistor is used to receive the input voltage, the second end of the third resistor is connected to the first electrode of the third transistor, the second electrode of the third transistor is connected to the second power supply module, and the control electrode of the third transistor is connected to the control electrode of the first transistor;

[0017] The second current branch includes a fourth resistor, a fifth resistor, a fourth transistor, a fifth transistor and a sixth transistor, the first end of the fourth resistor is used to receive the input voltage, the second end of the fourth resistor is connected to the first electrode of the fourth transistor, the control electrode of the fourth transistor is connected to the control electrode of the first transistor, the second electrode of the fourth transistor is connected to the first end of the fifth resistor and the control electrode of the fifth transistor, the second end of the fifth resistor is connected to the second electrode of the fifth transistor, the first electrode of the fifth transistor is connected to the second electrode of the sixth transistor, and the first electrode of the sixth transistor is grounded; the control electrodes of the fifth transistor and the sixth transistor are both connected to the voltage clamping circuit.

[0018] In one possible design, the first power supply module includes a seventh transistor, a sixth resistor and a second voltage stabilizing diode;

[0019] The first electrode of the seventh transistor is used to receive the input voltage, the second electrode of the seventh transistor is connected to the voltage output end, the sixth resistor and the second voltage-stabilizing diode are both connected in parallel to the control electrode and the first electrode of the seventh transistor, and the positive electrode of the second voltage-stabilizing diode is connected to the control electrode of the seventh transistor.

[0020] In a possible design, the second power supply module includes an eighth transistor, a first capacitor, and a first voltage stabilizing diode;

[0021] The second electrode of the eighth transistor is used to receive the input voltage, the first electrode of the eighth transistor is connected to the voltage output end, the control electrode of the eighth transistor is respectively connected to the second electrode of the third transistor, the first end of the first capacitor and the negative electrode of the first voltage-stabilizing diode, and the second end of the first capacitor and the positive electrode of the first voltage-stabilizing diode are both grounded.

[0022] In one possible design, the seventh transistor is a P-type transistor, and the eighth transistor is an N-type transistor.

[0023] In one possible design, the voltage clamping circuit includes a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor;

[0024] The second electrode and the control electrode of the ninth transistor are both connected to the voltage output terminal, the first electrode of the ninth transistor is respectively connected to the second electrode and the control electrode of the tenth transistor, the first electrode of the tenth transistor is respectively connected to the second electrode and the control electrode of the eleventh transistor, the first electrode of the eleventh transistor is respectively connected to the first electrode of the twelfth transistor and the second electrode of the thirteenth transistor, the second electrode of the twelfth transistor is connected to the control electrode of the seventh transistor, and the first electrode of the thirteenth transistor is grounded;

[0025] The control electrode of the twelfth transistor is connected to the control electrode of the fifth transistor, and the control electrode of the thirteenth transistor is connected to the control electrode of the sixth transistor.

[0026] In a possible design, the output clamp protection circuit includes a seventh resistor, an eighth resistor, a ninth resistor, a fourth voltage stabilizing diode and a fourteenth transistor;

[0027] The cathode of the fourth voltage zener diode is connected to the voltage output terminal, the anode of the fourth voltage zener diode is connected to the first end of the seventh resistor and the control electrode of the fourteenth transistor, and the second end of the seventh resistor is grounded; the first end of the eighth resistor is connected to the voltage output terminal, the second end of the eighth resistor is connected to the second electrode of the fourteenth transistor, and the first electrode of the fourteenth transistor is grounded.

[0028] In a possible design, the output clamp protection circuit includes a ninth resistor, a tenth resistor, a fifteenth transistor, a sixteenth transistor, and a third voltage stabilizing diode;

[0029] The control electrode of the fifteenth transistor is connected to the first end of the seventh resistor, the first electrode of the fifteenth transistor is grounded, the second electrode of the fifteenth transistor is connected to the first end of the tenth resistor through the ninth resistor, and the second end of the tenth resistor is used to receive the input voltage;

[0030] The control electrode of the sixteenth transistor is connected to the first end of the tenth resistor, the first electrode of the sixteenth transistor is used to receive the input voltage, and the second electrode of the sixteenth transistor is connected to the control electrode of the seventh transistor; the positive electrode of the third voltage zener diode is connected to the control electrode of the sixteenth transistor, and the negative electrode of the third voltage zener diode is used to receive the input voltage.

[0031] In a second aspect, the present application further provides a chip, comprising a power supply circuit as described in any one of the above items.

[0032] In a third aspect, the present application further provides an electronic device, the electronic device comprising a power supply circuit as described in any one of the above items; or the electronic device comprising a chip as described above.

[0033] The power supply circuit provided by the first aspect above includes: a first power supply module, a second power supply module, a voltage clamping circuit and a voltage output terminal; the first power supply module and the second power supply module are both used to receive an input voltage; the first power supply module, the second power supply module and the voltage clamping circuit are all connected to the voltage output terminal; the first power supply module is used to output a first output voltage when the input voltage is less than a first threshold voltage; the voltage clamping circuit is used to clamp the voltage on the voltage output terminal to a second output voltage when the input voltage is greater than the first threshold voltage and less than the second threshold voltage; the second power supply module is used to output a third output voltage when the input voltage is greater than the second threshold voltage; the voltage values ​​of the first output voltage, the second output voltage and the third output voltage increase in sequence. It can be seen that according to the power supply circuit provided by the present application, in the process of the input voltage gradually increasing from zero, the first power supply module, the voltage clamping circuit and the second power supply module work in sequence, and can output two successively increasing stable voltages when the input voltage is in different stages to provide the circuit system with the power required for initial power-on, and according to the increase of the input voltage, the output voltage can be adaptively switched from a stable low voltage to a stable high voltage, without the need to use a comparator and a logic circuit to achieve switching between high voltage and low voltage, so that the structural design of the power supply circuit is simple and the hardware cost is low.

[0034] In addition, the power supply circuit provided in the present application is designed with a voltage clamping circuit. When the input voltage AVIN increases from a low voltage to a high voltage, within a voltage range, the voltage clamping circuit will form a voltage regulation loop, and the output voltage at the voltage output end is feedback-regulated through the voltage regulation loop, so that the output voltage is stabilized at the second output voltage, thereby avoiding the output voltage directly jumping from a low voltage to a high voltage, causing large voltage fluctuations.

[0035] The beneficial effects provided in the above-mentioned second aspect and various possible designs of the above-mentioned second aspect can refer to the beneficial effects brought about by the above-mentioned first aspect and various possible implementation methods of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 One of the schematic diagrams of the power supply circuit structure provided in the embodiment of the present application;

[0037] Figure 2 The second schematic diagram of the power supply circuit structure provided in the embodiment of the present application;

[0038] Figure 3 The third schematic diagram of the power supply circuit structure provided in the embodiment of the present application;

[0039] Figure 4 A fourth schematic diagram of the power supply circuit structure provided in an embodiment of the present application;

[0040] Figure 5 This is the fifth schematic diagram of the power supply circuit structure provided in the embodiment of the present application. DETAILED DESCRIPTION

[0041] In this application, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c alone can represent: a, b, c, a and b, a and c, or a, b, and c, where a, b, and c can be single or multiple. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0042] The directions or positional relationships indicated by terms such as "center", "longitudinal", "lateral", "up", "down", "left", "right", "front", and "back" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.

[0043] The terms "connected" and "connected" should be understood in a broad sense. For example, the "connected" or "connected" of a circuit structure can refer to not only physical connection, but also electrical connection or signal connection. For example, it can be directly connected, that is, physically connected, or indirectly connected through at least one intermediate element, as long as the circuit is connected, or it can be the internal connection of two elements; signal connection can refer to signal connection through a circuit or through a media medium, such as radio waves. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0044] The transistor of the present application may be a field effect transistor, such as a metal oxide semiconductor field effect transistor (MOSFET), and MOSFET includes an N-type metal oxide semiconductor field effect transistor (NMOSFET or NMOS tube) and a P-type metal oxide semiconductor field effect transistor (PMOSFET or PMOS tube). The transistor in the present application is a three-terminal transistor, and its three terminals are a control electrode, a first electrode, and a second electrode. The transistor may be a bipolar transistor or a field effect transistor, etc. For example, when the transistor is a bipolar transistor, its control electrode refers to the base of the bipolar transistor, the first electrode may be the collector or emitter of the bipolar transistor, and the corresponding second electrode may be the emitter or collector of the bipolar transistor; when the transistor is a field effect transistor, its control electrode refers to the gate of the field effect transistor, the first electrode may be the drain or source of the field effect transistor, and the corresponding second electrode may be the source or drain of the field effect transistor.

[0045] In the initial stage of powering on the circuit system, many modules of the system have not been powered on, and the high-precision low-dropout voltage regulator power supply cannot work properly at this time. However, at this stage, the system needs a relatively stable power supply voltage to ensure that modules such as logic circuits can work properly, otherwise the system will be locked in the initial stage and cannot be powered on normally. Therefore, an initial power supply is required in the system. This power supply does not require high accuracy, but it must be able to power on with external input. And as the input voltage gradually increases, the initial power supply needs to work properly in both the low voltage domain and the high voltage domain. In the related art, when the circuit system involves an application with a wide input voltage range, two sets of initial power supply circuits, high voltage and low voltage, are required, and corresponding comparators and logic circuits are required to switch the two sets of initial power supply circuits, resulting in a complex structure of the initial power supply circuit and a high hardware cost. In addition, since the power supply circuit in the related art is a low-voltage power supply circuit and a high-voltage power supply circuit, during the switching process between the low-voltage power supply circuit and the high-voltage power supply circuit, the output voltage of the power supply circuit will produce a large waveform at the switching point, affecting the stability of the output voltage.

[0046] In order to overcome the deficiencies in the above-mentioned related technologies, the present application provides a power supply circuit, which includes: a first power supply module, a second power supply module, a voltage clamping circuit and a voltage output terminal; the first power supply module and the second power supply module are both used to receive an input voltage, and the first power supply module, the second power supply module and the voltage clamping circuit are all connected to the voltage output terminal; the first power supply module is used to output a first output voltage when the input voltage is less than a first threshold voltage; the voltage clamping circuit is used to clamp the voltage on the voltage output terminal to a second output voltage when the input voltage is greater than the first threshold voltage and less than the second threshold voltage; the second power supply module is used to output a third output voltage when the input voltage is greater than the second threshold voltage; the voltage values ​​of the first output voltage, the second output voltage and the third output voltage increase in sequence. It can be seen that according to the power supply circuit provided by the present application, in the process of the input voltage gradually increasing from zero, when the input voltage is in different stages, two successively increasing stable voltages can be output to provide the circuit system with the power supply required for initial power-on, and according to the increase of the input voltage, the output voltage can be adaptively switched from a stable low voltage to a stable high voltage, without the need to switch between high voltage and low voltage through a comparator and a logic circuit, so that the structural design of the power supply circuit is simple and the hardware cost is low.

[0047] In addition, the power supply circuit provided by the present application triggers the first power supply module and the second power supply module to work in sequence as the input voltage continues to increase, thereby outputting different output voltages, avoiding the low-voltage power supply circuit and the high-voltage power supply circuit from generating large waveforms at the switching point during the switching process, thereby ensuring the stability of the output voltage of the power supply circuit; and the present application designs a voltage clamping circuit, when the input voltage is at a certain voltage stage, the voltage clamping circuit can clamp the output voltage to a stable second output voltage, further ensuring the stability of the output voltage of the power supply circuit.

[0048] Figure 1 One of the schematic diagrams of the power supply circuit structure provided in the embodiment of the present application is shown in FIG. Figure 1 As shown, the power supply circuit 100 provided in this embodiment includes: a first power supply module 12, a second power supply module 11, a voltage clamping circuit 13 and a voltage output terminal 14. The first power supply module 12 and the second power supply module 11 are both used to receive an input voltage AVIN, and the first power supply module 12, the second power supply module 11 and the voltage clamping circuit 13 are all connected to the voltage output terminal 14, and the voltage output terminal 14 is used to output a stable output voltage PRE_VCC.

[0049] Among them, the first power supply module 12 is used to output a first output voltage when the input voltage AVIN is less than a first threshold voltage; the voltage clamping circuit 13 is used to clamp the voltage on the voltage output terminal 14 to a second output voltage when the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage; the second power supply module 11 is used to output a third output voltage when the input voltage AVIN is greater than the second threshold voltage; the voltage output terminal 14 is used to output the first output voltage, the second output voltage and the third output voltage.

[0050] It can be understood that, in this embodiment, the voltage values ​​of the first output voltage, the second output voltage and the third output voltage increase successively, so that two stable output voltages can be provided in stages to ensure that other functional modules in the circuit are powered on and work normally.

[0051] It can be understood that according to the power supply circuit 100 provided in the present application, in the process of the input voltage AVIN gradually increasing from zero, when the input voltage AVIN is in different stages, the first power supply module 12, the voltage clamping circuit 13 and the second power supply module 11 work in sequence, and can output two successively increasing stable voltages to provide the circuit system with the power required for initial power-on, and according to the increase of the input voltage, the output voltage can adaptively switch from a stable low voltage to a stable high voltage, without the need to realize the switching between high voltage and low voltage through a comparator and a logic circuit, so that the structural design of the power supply circuit is simple and the hardware cost is low.

[0052] Figure 2 For the second schematic diagram of the power supply circuit structure provided in the embodiment of the present application, please refer to Figure 2 As shown, in one embodiment, the power supply circuit 100 provided in this embodiment further includes an output clamp protection circuit 15, and the output clamp protection circuit 15 is connected to the voltage output terminal 14. The output clamp protection circuit 15 is used to clamp the voltage of the voltage output terminal to the fourth threshold voltage when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage.

[0053] It can be understood that, in an abnormal state, when the output voltage PRE_VCC output by the voltage output terminal 14 is too high, it will cause damage to the downstream circuit devices in the circuit. Therefore, in order to ensure the service life of each device in the circuit, in this embodiment, an output clamping protection circuit 15 is provided on the voltage output terminal 14. When it is detected that the output voltage PRE_VCC of the voltage output terminal 14 is greater than the fourth threshold voltage, the output clamping protection circuit 15 clamps the output voltage PRE_VCC, so that the output voltage PRE_VCC can always be less than the fourth threshold voltage, so that the output voltage PRE_VCC operates within the rated voltage range of each device, thereby avoiding the output voltage PRE_VCC being too high, causing device damage, such as causing some devices to break down, etc., thereby ensuring the service life of the circuit.

[0054] In one embodiment, the power supply circuit 100 provided in this embodiment further includes an output clamp protection circuit 15, and the output clamp protection circuit 15 is connected to the first power supply module 12. The output clamp protection circuit 15 is used to output a voltage clamp protection signal to the first power supply module 12 when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage, and the first power supply module 12 is used to clamp the output voltage PRE_VCC on the voltage output terminal 14 to the fourth threshold voltage according to the voltage clamp protection signal. In this way, the output voltage PRE_VCC can be prevented from being too high, causing damage to the device, such as causing breakdown of some devices, etc., thereby ensuring the working life of the circuit.

[0055] Figure 3 For the third schematic diagram of the power supply circuit structure provided in the embodiment of the present application, please refer to Figure 3 As shown, in one embodiment, the power supply circuit further includes an output clamp protection circuit 15, which is connected to the voltage output terminal 14 and the first power supply module 12 at the same time; the output clamp protection circuit 15 is used to clamp the voltage of the voltage output terminal 14 to the fourth threshold voltage when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage; at the same time, when the output clamp protection circuit 15 detects that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage, it outputs a voltage clamp protection signal to the first power supply module 12, and the first power supply module 12 is used to clamp the voltage of the voltage output terminal 14 to the fourth threshold voltage according to the voltage clamp protection signal. In this way, when it is detected that the output voltage PRE_VCC exceeds the fourth threshold voltage, the output clamp protection circuit 15 and the first power supply module 12 work at the same time to clamp the output voltage PRE_VCC, so that the output voltage PRE_VCC works within the rated voltage range of each device, thereby avoiding the output voltage PRE_VCC being too high, causing device damage, and ensuring the working life of the circuit.

[0056] In one embodiment, the output clamp protection circuit 15 can be a current discharge circuit, that is, when it is detected that the output voltage PRE_VCC exceeds the fourth threshold voltage, the current discharge circuit is turned on to form a current channel between the voltage output terminal 14 and the common ground, releasing the energy on the voltage output terminal 14 to pull the output voltage PRE_VCC on the voltage output terminal 14 down to the fourth threshold voltage.

[0057] In one embodiment, when the first power supply module 12 is working, a current path is formed to provide energy to the voltage output terminal 14. When it is detected that the output voltage PRE_VCC exceeds the fourth threshold voltage, the output clamping protection circuit 15 outputs a voltage clamping protection signal to the first power supply module 12. After receiving the voltage clamping protection signal, the first power supply module 12 cuts off the current channel that provides energy to the voltage output terminal 14, thereby clamping the voltage of the voltage output terminal 14 to the fourth threshold voltage, thereby preventing the output voltage PRE_VCC from being too high and causing damage to the device, thereby ensuring the working life of the circuit.

[0058] It should be noted that the output voltage PRE_VCC on the voltage output terminal 14 in this embodiment can specifically be any one of the above-mentioned first output voltage, second output voltage or third output voltage. In the process of the input voltage AVIN gradually increasing from zero, when the input voltage AVIN is in different stages, the output voltage PRE_VCC is specifically switched to any one of the first output voltage, second output voltage or third output voltage.

[0059] It is understandable that, since the voltage values ​​of the first output voltage, the second output voltage and the third output voltage in this embodiment increase successively, the setting value of the fourth threshold voltage in this embodiment is greater than the third output voltage. Generally, the voltage value of the fourth threshold voltage can be set higher than the third output voltage by several hundred millivolts.

[0060] Figure 4 The fourth schematic diagram of the power supply circuit structure provided in the embodiment of the present application is shown in FIG. Figure 4 As shown, in one embodiment, the power supply circuit 100 of this embodiment further includes a current mirror circuit 16, which is connected to the second power supply module 11 and the voltage clamping circuit 13 respectively, and is used to generate two current branches to respectively provide the second power supply module 11 and the voltage clamping circuit 13 with the current required for operation. In other words, the current mirror circuit 16 is used to generate two current branches to drive the second power supply module 11 and the voltage clamping circuit 13 to work normally.

[0061] It can be understood that the current mirror circuit 16 in this embodiment mainly provides the bias current required for the second power supply module 11 and the voltage clamping circuit 13 to work. The use of the current mirror circuit 16 to provide the bias current has the advantages of high current accuracy, small circuit size, and saving circuit layout space.

[0062] In other embodiments, other methods such as a current source may be used to provide the second power module 11 and the voltage clamping circuit 13 with the bias current required for operation.

[0063] Figure 5 For the fifth schematic diagram of the power supply circuit structure provided in the embodiment of the present application, please refer to Figure 5 As shown, the current mirror circuit 16 provided in this embodiment specifically includes a current generating branch 161, a first current branch 162 and a second current branch 163. Among them, the current generating branch 161 is used to generate a bias current, and the first current branch 612 and the second current branch 163 are respectively used to generate a first current and a second current according to the bias current; the first current branch 612 is connected to the second power supply module 11, and the second current branch 163 is connected to the voltage clamping circuit 13. It can be understood that the first current branch 162 and the second current branch 163 can mirror the bias current generated by the current generating branch 161 to generate the first current and the second current, so as to provide the second power supply module 11 and the voltage clamping circuit 13 with the current required for operation.

[0064] Please continue to see Figure 5 As shown, the current generating branch 161 provided in this embodiment includes a first transistor Q1, a second transistor Q2, a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is used to receive the input voltage AVIN, the second end of the first resistor R1 is connected to the first electrode of the first transistor Q1, the control electrode and the second electrode of the first transistor Q1 are both connected to the second electrode of the second transistor Q2, the first electrode of the second transistor Q2 is grounded through the second resistor R2, and the control electrode of the second transistor Q2 is grounded GND.

[0065] In which, in this embodiment, the first current branch 162 includes a third resistor R3 and a third transistor Q3, the first end of the third resistor R3 is used to receive the input voltage AVIN, the second end of the third resistor R3 is connected to the first electrode of the third transistor Q3, the second electrode of the third transistor Q3 is connected to the second power supply module 11, and the control electrode of the third transistor Q3 is connected to the control electrode of the first transistor Q1.

[0066] In this embodiment, the second current branch 163 includes a fourth resistor R4, a fifth resistor R5, a fourth transistor Q4, a fifth transistor Q5 and a sixth transistor Q6, the first end of the fourth resistor R4 is used to receive the input voltage AVIN, the second end of the fourth resistor R4 is connected to the first electrode of the fourth transistor Q4, the control electrode of the fourth transistor Q4 is connected to the control electrode of the first transistor Q1, the second electrode of the fourth transistor R4 is connected to the first end of the fifth resistor R5 and the control electrode of the fifth transistor Q5, the second end of the fifth resistor R5 is connected to the second electrode of the fifth transistor Q5, the first electrode of the fifth transistor Q5 is connected to the second electrode of the sixth transistor Q6, and the first electrode of the sixth transistor Q6 is grounded; the control electrodes of the fifth transistor Q5 and the sixth transistor Q6 are both connected to the voltage clamping circuit 13.

[0067] It should be noted that the first transistor Q1, the third transistor Q3 and the fourth transistor Q4 in the present embodiment are all PMOS (P-Metal-Oxide-Semiconductor) tubes, specifically, the first electrode thereof is the source electrode, the second electrode thereof is the drain electrode, and the control electrode thereof is the gate electrode. The second transistor Q2, the fifth transistor Q5 and the sixth transistor Q4 in the present embodiment are all NMOS (N-Metal-Oxide-Semiconductor) tubes, the first electrode thereof is the source electrode, the second electrode thereof is the drain electrode, and the control electrode thereof is the gate electrode.

[0068] After the circuit is powered on, in the process of the input voltage AVIN starting to power on from 0V, when the input voltage AVIN is higher than the threshold voltage of the first transistor Q1, the current generating branch 161 starts to generate current, wherein the second transistor Q2 is a depletion-type NMOSFET, and its threshold voltage is negative. Therefore, the bias current generated by the current generating branch 161 in this embodiment can be expressed as I_BIAS=VTH_Ndep0 / R2, wherein VTH_Ndep0 is the absolute value of the threshold voltage of the second transistor Q2. The bias current generated by this current generating branch 161 is supplied to other branches through a current mirror. The first resistor R1, the third resistor R3 and the fourth resistor R4 are respectively arranged on the source of the first transistor Q1, the third transistor Q3 and the fourth transistor Q4. The first resistor R1, the third resistor R3 and the fourth resistor R4 are used to improve the image accuracy of the current mirror.

[0069] Please continue to see Figure 5As shown, the first power supply module 12 in this embodiment includes a seventh transistor Q7, a sixth resistor R6 and a second voltage-stabilizing diode Z2; the first electrode of the seventh transistor Q7 is used to receive the input voltage AVIN, the second electrode of the seventh transistor Q7 is connected to the voltage output terminal 14, the sixth resistor R6 and the second voltage-stabilizing diode Z2 are both connected in parallel to the control electrode and the first electrode of the seventh transistor Q7, and the positive electrode of the second voltage-stabilizing diode Z2 is connected to the control electrode of the seventh transistor Q7.

[0070] It should be noted that the seventh transistor Q7 in this embodiment is a PMOS (P-Metal-Oxide-Semiconductor) tube. Specifically, its first electrode is a source electrode, its second electrode is a drain electrode, and its control electrode is a gate electrode.

[0071] When the input voltage AVIN is powered on from 0V, the current mirror circuit 16 mirrors the bias current to the fourth resistor R4, and the resistance of the sixth resistor R6 is relatively large and the input voltage AVIN has not yet increased enough to turn on the ninth transistor Q9, the tenth transistor Q10 and the eleventh transistor Q11, so the gate voltage of the seventh transistor Q7 is pulled down to approximately the ground potential, and the seventh transistor Q7 in the first power module 12 is turned on to directly provide energy for the output voltage PRE_VCC through the input voltage AVIN. The output voltage PRE_VCC is approximately equal to the input voltage AVIN at this time, that is, the output voltage PRE_VCC is powered on through the seventh transistor Q7 following the input voltage AVIN, and the second power module 11 is in a closed state.

[0072] In other words, when the input voltage AVIN is powered on from 0V, the first power module 12 is used to work when the input voltage AVIN is less than the first threshold voltage to output a first output voltage to the voltage output terminal 14; the first output voltage is approximately equal to the input voltage AVIN.

[0073] Please continue to see Figure 5As shown, the voltage clamping circuit 13 of this embodiment includes a ninth transistor Q9, a tenth transistor Q10, an eleventh transistor Q11, a twelfth transistor Q12 and a thirteenth transistor Q13; the second electrode and the control electrode of the ninth transistor Q9 are both connected to the voltage output terminal 14, the first electrode of the ninth transistor Q9 is respectively connected to the second electrode and the control electrode of the tenth transistor Q10, the first electrode of the tenth transistor Q10 is respectively connected to the second electrode and the control electrode of the eleventh transistor Q11, the first electrode of the eleventh transistor Q11 is respectively connected to the first electrode of the twelfth transistor Q12 and the second electrode of the thirteenth transistor Q13, the second electrode of the twelfth transistor Q12 is connected to the control electrode of the seventh transistor Q7, and the first electrode of the thirteenth transistor Q13 is grounded GND; the control electrode of the twelfth transistor Q12 is connected to the control electrode of the fifth transistor Q5, and the control electrode of the thirteenth transistor Q13 is connected to the control electrode of the sixth transistor Q6.

[0074] The ninth transistor Q9, the tenth transistor Q10, the eleventh transistor Q11, the twelfth transistor Q12 and the thirteenth transistor Q13 in the voltage clamping circuit 13 of the present embodiment are all NMOS (N-Metal-Oxide-Semiconductor) transistors, whose first electrode is the source, whose second electrode is the drain and whose control electrode is the gate.

[0075] As the input voltage AVIN increases, when the output voltage PRE_VCC is higher than the sum of the threshold voltages of the three NMOSFETs, namely the ninth transistor Q9, the tenth transistor Q10 and the eleventh transistor Q11, a portion of the current mirrored by the thirteenth transistor Q13 will be shunted by the eleventh transistor Q11, thus generating a negative feedback loop consisting of the seventh transistor Q7, the ninth transistor Q9, the tenth transistor Q10, the eleventh transistor Q11 and the twelfth transistor Q12. Assuming that the gate voltage of the seventh transistor Q7 is low, the pull-up capability of the seventh transistor Q7 becomes stronger, the output voltage PRE_VCC will increase, causing the current capabilities of the ninth transistor Q9, the tenth transistor Q10 and the eleventh transistor Q11 to become stronger, and the eleventh transistor Q11 will shunt more current from the thirteenth transistor Q13, causing a smaller current to flow through the twelfth transistor Q12, thereby weakening the pull-down of the gate of the seventh transistor Q7 and increasing its gate voltage.

[0076] If the gate voltage of the seventh transistor Q7 is too high, the feedback process is the same as described above. When the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage, the voltage clamping circuit 13 clamps the output voltage PRE_VCC to the second output voltage.

[0077] Specifically, when the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage, the voltage clamping circuit 13 clamps the output voltage PRE_VCC at VDS_Q13+VGS_Q11+VGS_Q10+VGS_Q9, wherein VDS_Q13 is the drain-source voltage of the thirteenth transistor Q13, VGS_Q11 is the gate-source voltage of the eleventh transistor Q11, VGS_Q10 is the gate-source voltage of the tenth transistor Q10, and VGS_Q9 is the gate-source voltage of the ninth transistor Q9. In this stage, the second output voltage varies very little with the input voltage AVIN, so a relatively stable output voltage can be obtained when the input voltage AVIN is low.

[0078] It can be understood that when the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage, the second output voltage of the power supply circuit 100 can be set to VDS_Q13+VGS_Q11+VGS_Q10+VGS_Q9, and the second threshold voltage is greater than the above-mentioned first threshold voltage.

[0079] However, since the first power module 12 provided in this embodiment connects the drain of the P-type tube (i.e., the seventh transistor Q7) to the voltage output terminal 14, its output current capability is weaker than that of the N-type transistor structure that directly connects the load to the NMOS source. Assuming that the second power module 11 is turned on at this time, if the load requires a larger current at this time, the output voltage PRE_VCC will be pulled down, so that the gate-source voltage of the eighth transistor Q8 will increase immediately, thereby providing a larger current to the load, but the first power module 12 needs to regulate the current capability through the above-mentioned voltage clamping circuit 13. Therefore, in this embodiment, when the input voltage AVIN is high enough, the second power module 11 is used as a power supply to provide the output voltage PRE_VCC.

[0080] Please continue to see Figure 5 As shown, the second power supply module 11 of this embodiment includes an eighth transistor Q8, a first capacitor C1 and a first voltage-stabilizing diode Z1; the second electrode of the eighth transistor Q8 is used to receive the input voltage AVIN, the first electrode of the eighth transistor Q8 is connected to the voltage output terminal 14, the control electrode of the eighth transistor Q8 is respectively connected to the second electrode of the third transistor Q3, the first end of the first capacitor C1 and the negative electrode of the first voltage-stabilizing diode Z1, and the second end of the first capacitor C1 and the positive electrode of the first voltage-stabilizing diode Z1 are both grounded GND.

[0081] The eighth transistor Q8 in the second power module 11 of the present embodiment is an NMOS (N-Metal-Oxide-Semiconductor) tube, wherein the first electrode thereof is a source electrode, the second electrode thereof is a drain electrode, and the control electrode thereof is a gate electrode.

[0082] When the input voltage AVIN is low, the voltage across the first voltage stabilizing diode Z1 does not reach its clamping point, so the gate of the eighth transistor Q8 in the second power module 11 is the input voltage AVIN of the power supply.

[0083] If the input voltage AVIN at the input end continues to increase, so that the gate-source voltage of the eighth transistor Q8 is higher than its threshold voltage, the eighth transistor Q8 is turned on to inject current into the output voltage PRE_VCC, so that the output voltage PRE_VCC begins to increase, and therefore the current in the ninth transistor Q9 and the tenth transistor Q10 begins to increase. When PRE_VCC increases to the point where all the current in the thirteenth transistor Q13 flows into the eleventh transistor Q11, the above-mentioned clamping loop disappears, no current flows through the twelfth transistor Q12, and the gate of the seventh transistor Q7 is pulled up to the input voltage AVIN by the sixth resistor R6, so that the seventh transistor Q7 is turned off. At this time, the output voltage VCC_PRE is the gate voltage of the eighth transistor Q8 minus its gate-source voltage. When the input voltage AVIN increases to the clamping voltage of the first voltage zener diode Z1, the gate voltage of the eighth transistor Q8 no longer increases but is clamped to about 5V. Therefore, the output voltage PRE_VCC is fixed at about 5V-VGS_Q8, wherein VGS_Q8 is the gate-source voltage of the eighth transistor Q8. Since the size of the eighth transistor Q8 is relatively large, this voltage is approximately its threshold voltage. Therefore, when the input voltage AVIN is high, a relatively stable output voltage is obtained using NMOSFET as the power tube.

[0084] It can be understood that when it is detected that the input voltage AVIN rises to a level greater than the second threshold voltage, the second power supply module 11 starts working, so that the voltage output terminal 14 outputs a third output voltage, and the voltage value of the third output voltage can be expressed as 5V-VGS_Q8, where VGS_Q8 is the gate-source voltage of Q8 of the eighth transistor.

[0085] It can be understood that in this embodiment, the seventh transistor Q7 is a P-type tube and the eighth transistor Q8 is an N-type tube. According to the working characteristics of the P-type tube and the N-type tube, when the input voltage AVIN is low, the seventh transistor Q7 is turned on to supply power to the output voltage PRE_VCC through the input voltage AVIN. As the input voltage AVIN gradually increases, when the input voltage AVIN is greater than the second threshold voltage, the eighth transistor Q8 is turned on, that is, the N-type tube is used as a power supply to supply power to the output voltage PRE_VCC. In this way, as AVIN gradually increases, the P-type tube is smoothly switched to the N-type tube to supply power to the output voltage PRE_VCC, avoiding the ripple caused by the low voltage to high voltage switching process, so that the voltage outputted by the voltage output terminal 14 is more stable.

[0086] In some application scenarios, when the output voltage PRE_VCC outputted from the voltage output terminal 14 is abnormal, for example, the output voltage PRE_VCC outputted from the voltage output terminal 14 is too high, it may cause damage to downstream circuit components in the circuit. Therefore, in order to ensure the service life of each component in the circuit, an output clamping protection circuit 15 is also provided in this embodiment to clamp the output voltage PRE_VCC outputted from the voltage output terminal 14 to below the fourth threshold voltage to prevent the output voltage PRE_VCC outputted from the voltage output terminal 14 from being too high.

[0087] Please continue to see Figure 5 As shown, in one embodiment, the output clamp protection circuit 15 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a fourth voltage zener diode Z4 and a fourteenth transistor Q14. The cathode of the fourth voltage zener diode Z4 is connected to the voltage output terminal 14, the anode of the fourth voltage zener diode Z4 is connected to the first end of the seventh resistor R7 and the control electrode of the fourteenth transistor Q14, and the second end of the seventh resistor R7 is grounded GND; the first end of the eighth resistor R8 is connected to the voltage output terminal 14, the second end of the eighth resistor R8 is connected to the second electrode of the fourteenth transistor Q14, and the first electrode of the fourteenth transistor Q14 is grounded GND.

[0088] Specifically, the fourteenth transistor Q14 in the clamping protection circuit 15 provided in this embodiment can be an NMOS (N-Metal-Oxide-Semiconductor) tube, the first electrode of which is the source, the second electrode of which is the drain, and the control electrode of which is the gate.

[0089] According to the clamping protection circuit 15 provided in this embodiment, when it is detected that the output voltage PRE_VCC outputted from the voltage output terminal 14 is higher than the clamping voltage of the fourth voltage zener diode Z4, the gate of the fourteenth transistor Q14 will be pulled high, so that the fourteenth transistor Q14 is turned on, and then the eighth resistor R8 and the fourteenth transistor Q14 can form a current discharge circuit, that is, a current channel is formed between the voltage output terminal 14 and the common ground GND through the eighth resistor R8 and the fourteenth transistor Q14, so as to release the energy on the voltage output terminal 14, so as to pull the output voltage PRE_VCC on the voltage output terminal 14 down to the fourth threshold voltage.

[0090] Please continue to see Figure 5As shown, in one embodiment, the output clamp protection circuit 15 also includes a ninth resistor R9, a tenth resistor R10, a fifteenth transistor Q15, a sixteenth transistor Q16 and a third voltage zener diode Z3; the control electrode of the fifteenth transistor Q15 is connected to the first end of the seventh resistor R7, the first electrode of the fifteenth transistor Q15 is grounded GND, the second electrode of the fifteenth transistor Q15 is connected to the first end of the tenth resistor R10 through the ninth resistor R9, and the second end of the tenth resistor R10 is used to receive the input voltage AVIN; the control electrode of the sixteenth transistor Q16 is connected to the first end of the tenth resistor R10, the first electrode of the sixteenth transistor Q16 is used to receive the input voltage AVIN, and the second electrode of the sixteenth transistor Q16 is connected to the control electrode of the seventh transistor Q7; the positive electrode of the third voltage zener diode Z3 is connected to the control electrode of the sixteenth transistor Q16, and the negative electrode of the third voltage zener diode Z3 is used to receive the input voltage AVIN.

[0091] Among them, the fifteenth transistor Q15 in the output clamp protection circuit 15 provided in this embodiment adopts an NMOS (N-Metal-Oxide-Semiconductor) tube, whose first pole is the source, whose second pole is the drain, and whose control pole is the gate; the sixteenth transistor Q16 in this embodiment adopts a PMOS (P-Metal-Oxide-Semiconductor) tube, whose first pole is the source, whose second pole is the drain, and whose control pole is the gate.

[0092] When it is detected that the output voltage PRE_VCC outputted from the voltage output terminal 14 is higher than the clamping voltage of the fourth voltage zener diode Z4, the gate of the fifteenth transistor Q15 will be pulled high, so that the fifteenth transistor Q15 is turned on. After the fifteenth transistor Q15 is turned on, the gate voltage of the sixteenth transistor Q16 is pulled down through the ninth resistor R9 and the tenth resistor R10, so that the sixteenth transistor Q16 is turned on, and the gate potential of the seventh transistor Q7 is pulled high to the power supply voltage, and the seventh transistor Q7 is turned off, so as to prevent the seventh transistor Q7 from continuing to provide charge to the voltage output terminal 14. Among them, the ninth resistor R9 plays a role in current limiting, and the tenth resistor R10 plays a role in providing an initial potential.

[0093] The second voltage stabilizing diode Z2 and the third voltage stabilizing diode Z3 in this embodiment are used to clamp and protect the gate voltages of the seventh transistor Q7 and the sixteenth transistor Q16.

[0094] It can be seen that the output clamp protection circuit 15 provided in this embodiment includes the above two clamp protection units, the first clamp protection unit is composed of the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the fourth voltage zener diode Z4 and the fourteenth transistor Q14, and the second clamp protection unit is composed of the ninth resistor R9, the tenth resistor R10, the fifteenth transistor Q15, the sixteenth transistor Q16 and the third voltage zener diode Z3. Both the first clamp protection unit and the second clamp protection unit can achieve the purpose of clamping the output voltage PRE_VCC on the voltage output terminal 14, but the voltage clamping methods of the two are different. The first clamp protection unit is equivalent to forming a current discharge path, which releases the energy on the voltage output terminal 14 to lower the output voltage PRE_VCC on the voltage output terminal 14; while the second clamp protection unit controls the closing of the power input channel on the voltage output terminal 14 to achieve the purpose of lowering the output voltage PRE_VCC on the voltage output terminal 14. In this embodiment, the first clamp protection unit and the second clamp protection unit are set at the same time to improve the speed of voltage clamping.

[0095] It should be noted that the first voltage stabilizing diode Z1, the second voltage stabilizing diode Z2, the third voltage stabilizing diode Z3 and the fourth voltage stabilizing diode Z4 in this embodiment are also called Zener diodes, and their English name is Zener diode. The voltage stabilizing diode uses the reverse breakdown state of the PN junction, and its current can change in a wide range while the voltage remains basically unchanged, so as to make a diode that plays a voltage stabilizing role. This diode is a semiconductor device that has a very high resistance until the critical reverse breakdown voltage. At this critical breakdown point, the reverse resistance is reduced to a very small value. In this low resistance area, the current increases while the voltage remains constant. The voltage stabilizing diode is graded according to the breakdown voltage. Because of this characteristic, the voltage stabilizing diode is mainly used as a voltage stabilizer or a voltage reference element. The voltage stabilizing diode can be connected in series so as to be used at a higher voltage. By connecting in series, a higher stable voltage can be obtained. In this embodiment, the first voltage stabilizing diode Z1, the second voltage stabilizing diode Z2, the third voltage stabilizing diode Z3 and the fourth voltage stabilizing diode Z4 are used, which mainly play the role of voltage stabilization.

[0096] It should be noted that, in this embodiment, a first transistor Q1, a second transistor Q2, ..., a fifteenth transistor Q15, and a sixteenth transistor Q16 are provided. Although the types of the above transistors and the terminals are described, it is not limited to the above transistor types in the power supply circuit 100 of this embodiment. In other embodiments, as long as the circuit is adaptively deformed, other types of transistors may be used. For example, in one embodiment, a certain N-type transistor may be replaced by a P-type transistor, which is easy to implement for those skilled in the art and therefore also falls within the scope of protection of this application.

[0097] Among them, the first voltage stabilizing diode Z1 is mainly used for stabilizing the gate of the eighth transistor Q8, that is, the voltage on the gate of the eighth transistor Q8 is clamped by the first voltage stabilizing diode Z1; the second voltage stabilizing diode Z2 is mainly used for stabilizing the gate of the seventh transistor Q7, that is, the voltage on the gate of the eighth transistor Q7 is clamped by the second voltage stabilizing diode Z2; the third voltage stabilizing diode Z3 is mainly used for stabilizing the gate of the sixteenth transistor Q16, that is, the voltage on the gate of the sixteenth transistor Q16 is clamped by the third voltage stabilizing diode Z3; the fourth voltage stabilizing diode Z4 is mainly used for stabilizing the gate of the fourteenth transistor Q14, that is, the voltage on the gate of the fourteenth transistor Q14 is clamped by the fourth voltage stabilizing diode Z4. It can be understood that, through the above-mentioned first Zener diode Z1, second Zener diode Z2, third Zener diode Z3 and fourth Zener diode Z4, the gate voltage of the eighth transistor Q8, the seventh transistor Q7, the sixteenth transistor Q16 and the fourteenth transistor Q14 can always be at a stable operating voltage value, avoiding being excessively pulled up or down, which may cause a certain transistor to be unable to turn on or off, thereby ensuring the stability of the circuit operation.

[0098] It is understandable that, in other embodiments, the output clamping protection circuit 15 may only include any one of the first clamping protection unit and the second clamping protection unit, and the purpose of voltage clamping may also be achieved.

[0099] The following describes the working process of the power supply circuit 100 of the present application in combination with the power-on process of the power supply circuit. The power supply circuit 100 provided in this embodiment can be divided into the following three stages from power-on to reaching a stable output voltage:

[0100] 1. Initial power-on stage

[0101] After the initial power-on, in the process of the input voltage AVIN starting to power up from 0V, when the input voltage AVIN is higher than the threshold voltage of the first transistor Q1, the current generating branch 161 starts to generate current, wherein the second transistor Q2 is a depletion-type NMOSFET, and its threshold voltage is negative. Therefore, in this embodiment, the current generating branch 161 is turned on to generate a bias current. The bias current generated by this current generating branch 161 is supplied to other branches through a current mirror, so that other devices and branches start working.

[0102] Among them, the second current branch 162 mirrors the bias current generated by the current generating branch 161 to the fourth resistor R4, and the resistance value of the sixth resistor R6 is relatively large and the input voltage AVIN is not yet increased enough to turn on the ninth transistor Q9, the tenth transistor Q4 and the eleventh transistor Q11, so the gate voltage of the seventh transistor Q7 is pulled down to approximately the ground potential, and the seventh transistor Q7 in the first power module 12 is turned on to directly provide energy for the output voltage PRE_VCC through the input voltage AVIN. The output voltage PRE_VCC is approximately equal to the input voltage AVIN at this time, that is, the output voltage PRE_VCC is powered on by the seventh transistor Q7 following the input voltage AVIN, and the second power module 11 is in a closed state.

[0103] In summary, in the initial power-on stage, when the input voltage AVIN is between 0V and the first threshold voltage, the first power module 12 intervenes and the first output voltage outputted from the voltage output terminal 14 of the power circuit 100 is approximately equal to the input voltage AVIN.

[0104] 2. Input voltage AVIN is in the low voltage stage

[0105] As the input voltage AVIN increases, when the output voltage PRE_VCC is higher than the sum of the threshold voltages of the three NMOSFETs, namely the ninth transistor Q9, the tenth transistor Q10 and the eleventh transistor Q11, a portion of the current mirrored by the thirteenth transistor Q13 will be shunted by the eleventh transistor Q11, thus generating a negative feedback loop consisting of the seventh transistor Q7, the ninth transistor Q9, the tenth transistor Q10, the eleventh transistor Q11 and the twelfth transistor Q12. Assuming that the gate voltage of the seventh transistor Q7 is low, the pull-up capability of the seventh transistor Q7 becomes stronger, the output voltage PRE_VCC will increase, causing the current capabilities of the ninth transistor Q9, the tenth transistor Q10 and the eleventh transistor Q11 to become stronger, and the eleventh transistor Q11 will shunt more current from the thirteenth transistor Q13, causing a smaller current to flow through the twelfth transistor Q12, thereby weakening the pull-down of the gate of the seventh transistor Q7 and increasing its gate voltage.

[0106] When the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage, the voltage clamping circuit 13 clamps the output voltage PRE_VCC at VDS_Q13+VGS_Q11+VGS_Q10+VGS_Q9, wherein VDS_Q13 is the drain-source voltage of the thirteenth transistor Q13, VGS_Q11 is the gate-source voltage of the eleventh transistor Q11, VGS_Q10 is the gate-source voltage of the tenth transistor Q10, and VGS_Q9 is the gate-source voltage of the ninth transistor Q9. In this stage, the second output voltage varies very little with the input voltage AVIN, so a relatively stable output voltage can be obtained when the input voltage AVIN is low. In other words, when the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage, the feedback regulation of the voltage clamping circuit 13 in the power supply circuit 100 can set the second output voltage of the power supply circuit 100 to be VDS_Q13+VGS_Q11+VGS_Q10+VGS_Q9.

[0107] In summary, when the input voltage AVIN is greater than the first threshold voltage and less than the second threshold voltage, the voltage clamping circuit 13 intervenes to form a voltage feedback regulation loop, so that the power supply circuit 100 outputs a stable second output voltage.

[0108] 3. Input voltage AVIN rises to high voltage stage

[0109] If the input voltage AVIN at the input end continues to increase, so that the gate-source voltage of the eighth transistor Q8 is higher than its threshold voltage, the eighth transistor Q8 is turned on to inject current into the output voltage PRE_VCC, so that the output voltage PRE_VCC begins to increase, so the current of NM2-NM4 will begin to increase, and when PRE_VCC increases to the point where all the current in NM1 flows into the eleventh transistor Q11, the above-mentioned clamping loop disappears, no current flows through the twelfth transistor Q12, and the gate of the seventh transistor Q7 is pulled up to the input voltage AVIN by the sixth resistor R6, so that the seventh transistor Q7 is turned off. At this time, the output voltage VCC_PRE is the gate voltage of the eighth transistor Q8 minus its gate-source voltage. When the input voltage AVIN rises to the clamping voltage of the first voltage zener diode Z1, the gate voltage of the eighth transistor Q8 no longer rises but is clamped to about 5V, so the output voltage PRE_VCC is fixed at about 5V-VGS_Q8, where VGS_Q8 is the gate-source voltage of the eighth transistor Q8. Since the size of the eighth transistor Q8 is relatively large, this voltage is approximately its threshold voltage. Therefore, when the input voltage AVIN is high, a relatively stable output voltage using NMOSFET as a power tube is obtained. In other words, when it is detected that the input voltage AVIN rises to a value greater than the second threshold voltage, the second power supply module 11 starts working, and at this time, the voltage output terminal 14 outputs a third output voltage of 5V-VGS_Q8.

[0110] Since the first power module 12 of this embodiment connects the drain of the seventh transistor Q7 to the voltage output terminal 14, its output current capability is weaker than that of an N-type transistor structure that directly connects the load to the source of the NMOS. Assuming that the second power module 11 is turned on at this time, if the load current suddenly increases at this time, the output voltage PRE_VCC will have insufficient load capacity, which will in turn cause PRE_VCC to be pulled down, so that the gate-source voltage of the eighth transistor Q8 will increase immediately, thereby providing a larger current to the load. However, the first power module 12 needs to regulate the current capability through the above-mentioned voltage clamping circuit 15, so the response speed will be slower. Therefore, in this embodiment, when the input voltage AVIN is high enough, the second power module 11 is used as a power source to provide the output voltage PRE_VCC.

[0111] Among them, the power supply circuit 100 provided in the present application can output two stable voltages, the first stable voltage is the second output voltage determined by the voltage clamping circuit 13 loop, and the second stable voltage is the third output voltage generated by the second power supply module 11; before reaching the first threshold voltage, the output voltage PRE_VCC is equal to the input voltage AVIN.

[0112] It can be understood that when it is detected that the input voltage AVIN increases to be greater than the second threshold voltage, the second power supply module 11 starts to work, so that the voltage output terminal 14 outputs a stable third output voltage.

[0113] According to the power supply circuit 100 provided in the present application, in the process of the input voltage AVIN gradually increasing from zero, when the input voltage AVIN is in different stages, the first power supply module 12, the voltage clamping circuit 13 and the second power supply module 11 work in sequence, and can output two successively increasing voltages to provide the circuit system with the power required for initial power-on, and according to the increase of the input voltage, the output voltage can adaptively switch from a stable low voltage to a stable high voltage, without the need to use a comparator and a logic circuit to achieve switching between high voltage and low voltage, so that the structural design of the power supply circuit is simple and the hardware cost is low.

[0114] In addition, the power supply circuit 100 provided in this embodiment is designed with a voltage clamping circuit 13. When the input voltage AVIN increases from a low voltage to a high voltage, within a voltage range, the voltage clamping circuit 13 forms a voltage regulation loop, and the output voltage PRE_VCC on the voltage output terminal 14 is feedback-regulated by the voltage regulation loop, so that the output voltage PRE_VCC is stabilized at the second output voltage, thereby avoiding the output voltage PRE_VCC directly jumping from a low voltage to a high voltage, causing large voltage fluctuations.

[0115] Finally, the power supply circuit 100 provided in the present application is also designed with an output clamping protection circuit 15. When it is detected that the output voltage PRE_VCC exceeds the fourth threshold voltage, the output clamping protection circuit 15 clamps the output voltage PRE_VCC, so that the output voltage PRE_VCC operates within the rated voltage range of each device, thereby avoiding the output voltage PRE_VCC being too high, causing damage to the device, and ensuring the working life of the circuit.

[0116] An embodiment of the present application also provides a chip, which includes the power supply circuit as described above.

[0117] An embodiment of the present application further provides an electronic device, which includes the power supply circuit as described above; or the electronic device includes the chip as described above.

[0118] Among them, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a wearable device, a vehicle-mounted device, an augmented reality (AR) / virtual reality (VR) device, an ultra-mobile personal computer (UMPC), a netbook, a personal digital assistant (PDA), a smart TV, a smart screen, a high-definition TV, a 4K TV, a smart speaker, a smart projector and other devices. This application does not impose any restrictions on the specific types of electronic devices.

[0119] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A power supply circuit, characterized in that: The power supply circuit comprises: a first power supply module, a second power supply module, a voltage clamping circuit and a voltage output terminal; The first power module and the second power module are both used to receive input voltage, and the first power module, the second power module and the voltage clamping circuit are all connected to the voltage output terminal; The first power supply module is used to output a first output voltage when the input voltage is less than a first threshold voltage; The voltage clamping circuit is used for clamping the voltage on the voltage output terminal to a second output voltage when the input voltage is greater than the first threshold voltage and less than a second threshold voltage; The second power supply module is used to output a third output voltage when the input voltage is greater than the second threshold voltage; The voltage output terminal is used to output the first output voltage, the second output voltage and the third output voltage; the voltage values ​​of the first output voltage, the second output voltage and the third output voltage increase in sequence.

2. The power supply circuit according to claim 1, characterized in that: The power supply circuit further includes an output clamp protection circuit, and the output clamp protection circuit is connected to the voltage output terminal and / or the first power supply module; The output clamping protection circuit is used to clamp the voltage of the voltage output terminal to the fourth threshold voltage when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage; and / or, when it is detected that the first output voltage, the second output voltage or the third output voltage is greater than the fourth threshold voltage, output a voltage clamping protection signal to the first power supply module, and the first power supply module is used to clamp the voltage of the voltage output terminal to the fourth threshold voltage according to the voltage clamping protection signal.

3. The power supply circuit according to claim 2, characterized in that: The power supply circuit further includes a current mirror circuit, wherein the current mirror circuit includes a current generating branch, a first current branch and a second current branch; The current generating branch is used to generate a bias current, and the first current branch and the second current branch are respectively used to generate a first current and a second current according to the bias current; the first current branch is connected to the second power supply module, and the second current branch is connected to the voltage clamping circuit.

4. The power supply circuit according to claim 3, characterized in that: The current generating branch comprises a first transistor, a second transistor, a first resistor and a second resistor, wherein the first end of the first resistor is used to receive the input voltage, the second end of the first resistor is connected to the first electrode of the first transistor, the control electrode and the second electrode of the first transistor are both connected to the second electrode of the second transistor, the first electrode of the second transistor is grounded through the second resistor, and the control electrode of the second transistor is grounded; The first current branch includes a third resistor and a third transistor, the first end of the third resistor is used to receive the input voltage, the second end of the third resistor is connected to the first electrode of the third transistor, the second electrode of the third transistor is connected to the second power supply module, and the control electrode of the third transistor is connected to the control electrode of the first transistor; The second current branch includes a fourth resistor, a fifth resistor, a fourth transistor, a fifth transistor and a sixth transistor, the first end of the fourth resistor is used to receive the input voltage, the second end of the fourth resistor is connected to the first electrode of the fourth transistor, the control electrode of the fourth transistor is connected to the control electrode of the first transistor, the second electrode of the fourth transistor is connected to the first end of the fifth resistor and the control electrode of the fifth transistor, the second end of the fifth resistor is connected to the second electrode of the fifth transistor, the first electrode of the fifth transistor is connected to the second electrode of the sixth transistor, and the first electrode of the sixth transistor is grounded; the control electrodes of the fifth transistor and the sixth transistor are both connected to the voltage clamping circuit.

5. The power supply circuit according to claim 4, characterized in that: The first power supply module includes a seventh transistor, a sixth resistor and a second voltage stabilizing diode; The first electrode of the seventh transistor is used to receive the input voltage, the second electrode of the seventh transistor is connected to the voltage output end, the sixth resistor and the second voltage-stabilizing diode are both connected in parallel to the control electrode and the first electrode of the seventh transistor, and the positive electrode of the second voltage-stabilizing diode is connected to the control electrode of the seventh transistor.

6. The power supply circuit according to claim 5, characterized in that: The second power supply module includes an eighth transistor, a first capacitor and a first voltage stabilizing diode; The second electrode of the eighth transistor is used to receive the input voltage, the first electrode of the eighth transistor is connected to the voltage output end, the control electrode of the eighth transistor is respectively connected to the second electrode of the third transistor, the first end of the first capacitor and the negative electrode of the first voltage-stabilizing diode, and the second end of the first capacitor and the positive electrode of the first voltage-stabilizing diode are both grounded.

7. The power supply circuit according to claim 5, characterized in that: The voltage clamping circuit includes a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor and a thirteenth transistor; The second electrode and the control electrode of the ninth transistor are both connected to the voltage output terminal, the first electrode of the ninth transistor is respectively connected to the second electrode and the control electrode of the tenth transistor, the first electrode of the tenth transistor is respectively connected to the second electrode and the control electrode of the eleventh transistor, the first electrode of the eleventh transistor is respectively connected to the first electrode of the twelfth transistor and the second electrode of the thirteenth transistor, the second electrode of the twelfth transistor is connected to the control electrode of the seventh transistor, and the first electrode of the thirteenth transistor is grounded; The control electrode of the twelfth transistor is connected to the control electrode of the fifth transistor, and the control electrode of the thirteenth transistor is connected to the control electrode of the sixth transistor.

8. The power supply circuit according to claim 5, characterized in that: The output clamp protection circuit includes a seventh resistor, an eighth resistor, a ninth resistor, a fourth voltage stabilizing diode and a fourteenth transistor; The cathode of the fourth voltage zener diode is connected to the voltage output terminal, the anode of the fourth voltage zener diode is connected to the first end of the seventh resistor and the control electrode of the fourteenth transistor, and the second end of the seventh resistor is grounded; the first end of the eighth resistor is connected to the voltage output terminal, the second end of the eighth resistor is connected to the second electrode of the fourteenth transistor, and the first electrode of the fourteenth transistor is grounded.

9. The power supply circuit according to claim 8, characterized in that: The output clamp protection circuit includes a ninth resistor, a tenth resistor, a fifteenth transistor, a sixteenth transistor and a third voltage stabilizing diode; The control electrode of the fifteenth transistor is connected to the first end of the seventh resistor, the first electrode of the fifteenth transistor is grounded, the second electrode of the fifteenth transistor is connected to the first end of the tenth resistor through the ninth resistor, and the second end of the tenth resistor is used to receive the input voltage; The control electrode of the sixteenth transistor is connected to the first end of the tenth resistor, the first electrode of the sixteenth transistor is used to receive the input voltage, and the second electrode of the sixteenth transistor is connected to the control electrode of the seventh transistor; the positive electrode of the third voltage zener diode is connected to the control electrode of the sixteenth transistor, and the negative electrode of the third voltage zener diode is used to receive the input voltage.

10. The power supply circuit according to claim 6, characterized in that: The seventh transistor is a P-type transistor, and the eighth transistor is an N-type transistor.

11. A chip, characterized in that: The chip comprises the power supply circuit as claimed in any one of claims 1 to 10.

12. An electronic device, characterized in that: The electronic device comprises the power supply circuit as described in any one of claims 1 to 10; or the electronic device comprises the chip as described in claim 10.

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