Epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride material and preparation method thereof
By etching the trench on the substrate of the Si-based GaN device and growing the diffusion barrier layer, the gap between the AlN layer and the diffusion barrier layer is formed, the problem of radio frequency loss of the Si-based GaN device in the high-frequency working state is solved, and the gain cutoff frequency and power additional efficiency of the device are improved.
Patent Information
- Application Number
- CN202411916529.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2025-04-15
AI Technical Summary
Si-based GaN devices have large RF losses in high-frequency operating state, which affects the gain cutoff frequency and power additional efficiency of the device, mainly due to the parasitic capacitance and resistance caused by the P-type conductive channel at the AlN/Si interface.
Using a patterned substrate, multiple trenches arranged at intervals are etched on the substrate, and a diffusion barrier layer is grown epitaxially inside the trenches to form a gap between the AlN layer and the diffusion barrier layer, reducing the diffusion and stress release of Al atoms and reducing radio frequency losses.
By reducing the contact area between the AlN layer and the patterned substrate, reducing stress and dislocation density, the RF loss of the device is effectively reduced and the quality of the epitaxial structure is improved.
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Figure CN119835963A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials and a preparation method thereof. Background Art
[0002] Devices based on GaN (gallium nitride) materials are new materials for studying microelectronic devices. They have wide direct band gaps, high thermal conductivity, high electron mobility, high saturation rate, high breakdown voltage, and strong radiation resistance. They have extremely broad prospects in the application of high-temperature, high-power devices and high-frequency microwave devices. Among them, the high electron mobility transistor (HEMT) in GaN devices is the forefront and hot spot of current research.
[0003] Si (silicon)-based GaN has the advantages of low cost and large wafer size, and its device manufacturing process is compatible with Si complementary metal oxide semiconductor (CMOS) process, so it can be produced in Si CMOS semiconductor manufacturing plants with lower cost and mature process, realizing the mass production and commercial application of Si-based GaN devices. At present, the RF performance of Si-based GaN HEMTs is already quite excellent.
[0004] However, due to the large lattice mismatch and thermal mismatch between the Si substrate and GaN, Si-based GaN faces many challenges, such as high dislocation density, large-area wafer warping, and thermal gradients on the wafer. In order to solve the mismatch problem, the prior art usually grows a thicker AlN (aluminum nitride) nucleation layer or an AlGaN (aluminum gallium nitride) gradient buffer layer between the Si substrate and GaN. However, when the AlN nucleation layer and the AlGaN gradient buffer layer are epitaxially grown, a P-type conductive channel is formed at the interface between the Si substrate and the AlN nucleation layer due to the reaction of Al (aluminum) and Ga (gallium) atoms on the surface and inside of the Si substrate, which leads to large parasitic capacitance and parasitic resistance. As a result, when the device is in high-frequency operation, the microwave signal will produce large RF losses, affecting the gain cutoff frequency f of the device. T And high oscillation frequency f max , and reduce the power added efficiency (PAE) of the device.
[0005] In order to solve the above problems, reducing the P-type conductive channel at the AlN / Si interface during the GaN epitaxy process on Si substrates becomes the key. At present, the main measure to reduce the RF loss of GaN epitaxial wafers on RF high-resistance Si substrates is to suppress the generation of P-type conductive channels at the AlN / Si interface by reducing the growth temperature and thickness of the AlN nucleation layer. However, the lower AlN nucleation layer growth temperature and thinner thickness will cause the subsequent AlGaN gradient buffer layer and GaN heterojunction epitaxial quality to drop sharply. Therefore, how to provide an epitaxial structure that reduces the RF loss of silicon-based gallium nitride materials without affecting the epitaxial quality has become an important issue. Summary of the invention
[0006] In order to solve the above problems existing in the prior art, the present invention provides an epitaxial structure for reducing the radio frequency loss of silicon-based gallium nitride materials and a preparation method thereof.
[0007] The technical problem to be solved by the present invention is achieved through the following technical solutions:
[0008] In a first aspect, the present invention provides an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials, the epitaxial structure comprising:
[0009] A patterned substrate; the patterned substrate is provided with a plurality of grooves arranged at intervals;
[0010] A diffusion barrier layer superimposed on the plurality of spaced grooves; the thickness of the diffusion barrier layer is less than the depth of the grooves; the material of the patterned substrate is Si;
[0011] An AlN layer superimposed on the patterned substrate; a gap is provided between the AlN layer and the diffusion barrier layer;
[0012] a nucleation layer superimposed on the AlN layer;
[0013] a buffer layer superimposed on the nucleation layer;
[0014] A GaN layer is stacked on the buffer layer.
[0015] Optionally, the bottom surface of the groove is an arc-shaped surface, a conical surface or a plane surface.
[0016] Optionally, the patterned substrate has a thickness ranging from 500 μm to 1000 μm.
[0017] Optionally, the buffer layer is an AlGaN gradient buffer layer; the AlGaN gradient buffer layer includes, from bottom to top, a first AlGaN buffer layer, a second AlGaN buffer layer and a third AlGaN buffer layer;
[0018] The molar content of Al in the first AlGaN buffer layer is 70%; the molar content of Al in the second AlGaN buffer layer is 30%; and the molar content of Al in the third AlGaN buffer layer is 15%.
[0019] Optionally, the thickness of the first AlGaN buffer layer is in the range of 300 nm to 400 nm; the thickness of the second AlGaN buffer layer is in the range of 300 nm to 400 nm; and the thickness of the third AlGaN buffer layer is in the range of 200 nm to 300 nm.
[0020] Optionally, the material of the nucleation layer is AlN; and the thickness of the nucleation layer is in the range of 120 nm to 230 nm.
[0021] Optionally, the material of the diffusion barrier layer is Si3N4 or Al2O3; the thickness of the diffusion barrier layer is in the range of 10nm to 50nm.
[0022] In a second aspect, the present invention provides a method for preparing an epitaxial structure that reduces radio frequency loss of silicon-based gallium nitride materials, the preparation method comprising:
[0023] A substrate is selected, and a plurality of grooves arranged at intervals are etched on the substrate to form a patterned substrate; the material of the patterned substrate is Si;
[0024] epitaxially growing a diffusion barrier layer in the plurality of spaced trenches; the thickness of the diffusion barrier layer being less than the depth of the trenches;
[0025] Under low TMAl concentration, AlN is grown upward starting from each region of the upper surface of the patterned substrate except the grooves, until the AlN grown above each region is merged in the upper layer to form an AlN layer, and a gap is formed between the diffusion barrier layer and the AlN layer; the low TMAl concentration refers to a TMAl concentration range of 50 sccm to 200 sccm;
[0026] growing a nucleation layer on the AlN layer;
[0027] growing a buffer layer on the nucleation layer;
[0028] A GaN layer is grown on top of the buffer layer.
[0029] Optionally, the formation process of the AlN layer includes:
[0030] At an initial TMAl concentration, using MOCVD to form a layer of aluminum film on each area of the upper surface of the patterned substrate except the grooves;
[0031] The flow rate of TMAl is adjusted to the low TMAl concentration, and NH3 is introduced so that the NH3 reacts with the aluminum film to form an AlN seed layer, and AlN continues to grow on the AlN seed layer until the AlN grown above each region merges on the upper layer to form an AlN layer, and a gap is formed between the diffusion barrier layer and the AlN layer.
[0032] Optionally, growing a nucleation layer on the AlN layer comprises:
[0033] On the AlN layer, a lower layer of the nucleation layer is grown under low temperature and high V / III conditions; the low temperature refers to a temperature of 800° C. to 900° C.; the high V / III refers to a molar ratio of the V group element NH3 to the III group element TMAl being higher than 15;
[0034] The upper layer of the nucleation layer is grown on the lower layer of the nucleation layer under high temperature and low V / III conditions to obtain the nucleation layer; the high temperature refers to a temperature of 1000°C to 1200°C; the low V / III refers to a molar ratio of group V element NH3 to group III element TMAl less than 10.
[0035] In an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials provided by the present invention, Al atoms in an AlN layer have a high diffusion barrier on a patterned substrate made of Si, and due to the presence of a plurality of grooves arranged at intervals in the patterned substrate and a diffusion barrier layer having a thickness less than the groove depth superimposed in the groove, Al atoms cannot diffuse into the groove, so sufficient gaps are formed between the AlN layer and the diffusion barrier layer to release stress, and the contact area between the AlN layer and the patterned substrate is small, which also reduces stress and dislocation density to a certain extent, thereby reducing the radio frequency loss of the device and improving the quality of the epitaxial structure.
[0036] The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 It is a structural schematic diagram of an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials provided by an embodiment of the present invention;
[0038] Figure 2 It is a schematic flow chart of a method for preparing an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials provided by an embodiment of the present invention;
[0039] Figure 3 It is a schematic diagram of a preparation process of an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials provided by an embodiment of the present invention.
[0040] Reference numerals: 10, patterned substrate; 20, diffusion barrier layer; 30, AlN layer; 40, nucleation layer; 50, buffer layer; 60, GaN layer. DETAILED DESCRIPTION
[0041] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.
[0042] In order to solve the problem that the existing silicon-based gallium nitride material has low RF loss but poor epitaxial quality, the embodiment of the present invention provides an epitaxial structure that reduces the RF loss of the silicon-based gallium nitride material, see Figure 1 , Figure 1 It is a structural schematic diagram of an epitaxial structure for reducing the radio frequency loss of silicon-based gallium nitride materials provided by an embodiment of the present invention, including a patterned substrate 10, a diffusion barrier layer 20, an AlN layer 30, a nucleation layer 40, a buffer layer 50 and a GaN layer 60.
[0043] In the embodiment of the present invention, the material of the patterned substrate 10 may be Si (silicon), and may be specifically single crystal silicon with a crystal orientation of 111. The patterned substrate 10 is a high-resistance patterned substrate, and its resistivity may range from 5000Ω·cm to 10000Ω·cm, and its thickness may range from 500μm to 1000μm.
[0044] In the embodiment of the present invention, the patterned substrate 10 may be a circular patterned substrate, and its diameter may be 2 inches to 6 inches.
[0045] In the embodiment of the present invention, the patterned substrate 10 is provided with a plurality of grooves arranged at intervals. The plurality of grooves may be arranged at equal or non-equidistant intervals. Considering the quality of other structures grown subsequently, in the embodiment of the present invention, the plurality of grooves are preferably arranged at equal intervals.
[0046] In the embodiment of the present invention, the bottom surface of the groove in the patterned substrate 10 is an arc-shaped surface, a conical surface or a flat surface.
[0047] In the embodiment of the present invention, the width of a single groove may be in the range of 0.5 μm to 3 μm, and the depth may be in the range of 100 nm to 300 nm.
[0048] In the embodiment of the present invention, in order to prevent the AlN layer 30 from contacting the bottom of the grooves of the patterned substrate 10, a diffusion barrier layer 20 is stacked in a plurality of alternately arranged grooves.
[0049] The diffusion barrier layer 20 may be used to block the diffusion of Al (aluminum) and Ga (gallium) elements.
[0050] Specifically, the thickness of the diffusion barrier layer 20 is smaller than the depth of the trench. In order to leave enough space to release stress, the thickness of the diffusion barrier layer 20 located above the bottom of the trench can be much smaller than the depth of the trench. The thickness of the diffusion barrier layer 20 can range from 10 nm to 50 nm.
[0051] In the embodiment of the present invention, the material of the diffusion barrier layer 20 may be Si3N4 (silicon nitride) or Al2O3 (aluminum oxide). Since both Si3N4 and Al2O3 have excellent chemical stability, good thermal stability and electrical insulation, the diffusion barrier layer 20 made of Si3N4 or Al2O3 can effectively prevent the diffusion of elements between different materials, thereby improving the performance and reliability of the device.
[0052] In the embodiment of the present invention, the AlN layer 30 is stacked on the patterned substrate 10. A gap is provided between the AlN layer 30 and the diffusion barrier layer 20.
[0053] The Al atoms in the AlN layer 30 have a high diffusion barrier on the substrate made of single crystal silicon, and the deposited aluminum atoms tend to diffuse to the edge and apex of the step first. This phenomenon causes the Al atoms to accumulate quickly on the surface. Since the patterned substrate 10 has a plurality of spaced grooves, the thickness of the diffusion barrier layer 20 located inside the structure is less than the depth of the groove. Therefore, a gap with sufficient space can be formed between the diffusion barrier layer 20 and the AlN layer 30, which reduces the diffusion drop of the Al atoms in the AlN layer 30 at the contact interface between the AlN layer 30 and the substrate made of single crystal silicon, thereby reducing the RF loss.
[0054] In the embodiment of the present invention, the nucleation layer 40 is stacked on the AlN layer 30. The material of the nucleation layer 40 may be AlN, and the thickness thereof is in the range of 120 nm to 230 nm.
[0055] In the embodiment of the present invention, the buffer layer 50 is superimposed on the nucleation layer 40. The material of the buffer layer 50 may be AlGaN. The introduction of AlGaN can effectively buffer the lattice mismatch between different materials, reduce defects that may occur during the growth process, and further improve the quality and stability of the entire epitaxial structure.
[0056] In the embodiment of the present invention, the GaN layer 60 is stacked on the buffer layer 50. The thickness of the GaN layer 60 may be in the range of 1 μm to 2 μm.
[0057] In the embodiment of the present invention, Al atoms in the AlN layer 30 have a high diffusion barrier on the patterned substrate 10 made of Si, and due to the presence of multiple spaced grooves in the patterned substrate 10 and the presence of a diffusion barrier layer 20 having a thickness less than the groove depth superimposed in the groove, Al atoms cannot diffuse into the groove. Therefore, sufficient gaps are formed between the AlN layer 30 and the diffusion barrier layer 20 to release stress, and the contact area between the AlN layer 30 and the patterned substrate 10 is small, which also reduces stress and dislocation density to a certain extent, thereby reducing the RF loss of the device and improving the quality of the epitaxial structure.
[0058] In one implementation, the buffer layer 50 is an AlGaN graded buffer layer, which includes, from bottom to top, a first AlGaN buffer layer, a second AlGaN buffer layer, and a third AlGaN buffer layer.
[0059] The molar content of Al in the first AlGaN buffer layer is 70%; the molar content of Al in the second AlGaN buffer layer is 30%; and the molar content of Al in the third AlGaN buffer layer is 15%.
[0060] The thickness of the first AlGaN buffer layer ranges from 300nm to 400nm; the thickness of the second AlGaN buffer layer ranges from 300nm to 400nm; and the thickness of the third AlGaN buffer layer ranges from 200nm to 300nm.
[0061] In the embodiment of the present invention, the first AlGaN buffer layer, the second AlGaN buffer layer and the third AlGaN buffer layer with a gradient transition in the molar content percentage of the Al element can effectively reduce lattice mismatch and stress concentration, optimize the distribution of carriers, and improve the electrical performance of the device.
[0062] Based on the same inventive concept, the embodiment of the present invention also provides a method for preparing an epitaxial structure for reducing the radio frequency loss of silicon-based gallium nitride materials, see Figure 2 , Figure 2 1 is a flow chart of a method for preparing an epitaxial structure for reducing radio frequency loss of a silicon-based gallium nitride material provided by an embodiment of the present invention. The preparation method comprises:
[0063] Step S201 , selecting a substrate, and etching a plurality of alternately arranged grooves on the substrate to form a patterned substrate 10 ; the material of the patterned substrate 10 is Si.
[0064] In an embodiment of the present invention, a single crystal silicon with a crystal orientation of 111 can be selected as a substrate, the resistivity of the Si substrate is 5000Ω·cm~10000Ω·cm, and the thickness of the Si substrate is 500μm~1000μm. Before patterning, the high-resistance Si substrate needs to be organically cleaned. The specific steps of organic cleaning are to use acetone, ethanol and deionized water to ultrasonically clean the high-resistance Si substrate for 5min~30min, and place it in a spin dryer for 15min~20min, and then put it into a 130℃ oven for drying for 30min. Then, a 2μm~10μm thick photoresist is spin-coated on the surface of the dried substrate, and a pattern is left by photolithography and development.
[0065] The Si substrate after photolithography is etched using a reactive ion etcher (RIE): the reactive gas introduced into the reactive ion etcher is a gas mixture of CHF3 / O2 (trifluoromethane / oxygen), and the high-resistance Si substrate is etched according to the pattern left by photolithography and development to obtain the desired pattern, that is, a plurality of spaced grooves are formed by etching, wherein the etching width is 0.5μm to 3μm, and the etching depth is 100nm to 300nm. After etching, the sample surface is cleaned with acetone, ethanol, and deionized water respectively, and placed in a spin dryer for 15min to 20min to spin dry, and a patterned substrate 10 with a plurality of spaced grooves is obtained, see Figure 3 In (a), Figure 3 It is a schematic diagram of a preparation process of an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials provided by an embodiment of the present invention.
[0066] Step S202 , epitaxially growing a diffusion barrier layer 20 in a plurality of spaced trenches; the thickness of the diffusion barrier layer 20 is smaller than the depth of the trenches.
[0067] In the embodiment of the present invention, an initial diffusion barrier layer can be epitaxially grown on the entire upper surface of the patterned substrate 10, and then the initial diffusion barrier layer outside the groove area on the upper surface of the patterned substrate 10 can be etched away to obtain a diffusion barrier layer 20 superimposed on a plurality of spaced grooves.
[0068] In the embodiment of the present invention, the material of the diffusion barrier layer 20 may be Si3N4 or Al2O3. Corresponding to the diffusion barrier layer 20 of different materials, the embodiment of the present invention provides different preparation methods, which are as follows:
[0069] For the diffusion barrier layer 20 made of Si3N4: a layer of Si3N4 initial diffusion barrier layer is epitaxially grown on the patterned substrate 10 by PECVD (Plasma Enhanced Chemical VaperDeposition) technology. The thickness of the initial diffusion barrier layer is less than the depth of the groove, and the specific thickness range can be 10nm to 50nm. Then, a photoresist with a thickness of 2μm to 10μm is spin-coated on the surface of the patterned substrate 10, and the pattern to be etched is left by photolithography and development. Then, the initial diffusion barrier layer is etched by RIE, and the etching thickness is 15nm to 55nm to ensure that the Si3N4 outside the groove area on the surface of the patterned substrate 10 is completely etched away, and the Si3N4 diffusion barrier layer inside the groove of the patterned substrate 10 is retained, and the preparation of the diffusion barrier layer 20 is completed, see Figure 3 After etching, the sample surface is cleaned with acetone, ethanol and deionized water respectively, and placed in a spin dryer for 15 to 20 minutes, and then the patterned substrate 10 is thermally annealed at 800°C to 1100°C for 3 to 5 minutes to repair the damage to the surface of the patterned substrate 10 caused by etching.
[0070] For the diffusion barrier layer 20 made of Al2O3: an initial diffusion barrier layer made of Al2O3 is epitaxially grown on the patterned substrate 10 by ALD (atomic layer deposition) technology, and the thickness of the initial diffusion barrier layer is 10nm to 50nm. Then, a photoresist with a thickness of 2μm to 10μm is spin-coated on the surface of the patterned substrate 10, and the pattern to be etched is left by photolithography and development. Then, an ICP (Inductively Coupled Plasma) device is used to etch the initial diffusion barrier layer made of Al2O3, and the etching thickness is 15nm to 55nm, so as to ensure that the Al2O3 outside the groove area on the surface of the patterned substrate 10 is completely etched away, and the Al2O3 diffusion barrier layer inside the groove of the patterned substrate 10 is retained, and the preparation of the diffusion barrier layer 20 is completed, see Figure 3 After etching, the sample surface is cleaned with acetone, ethanol and deionized water respectively, and placed in a spin dryer for 15 to 20 minutes, and then the patterned substrate 10 is thermally annealed at 800°C to 1100°C for 3 to 5 minutes to repair the damage to the surface of the patterned substrate 10 caused by etching.
[0071] Step S203, under low TMAl (trimethylaluminum) concentration, AlN is grown upward starting from each area on the upper surface of the patterned substrate 10 except the grooves, until the AlN grown above each area merges in the upper layer to form an AlN layer 30, and a gap is formed between the diffusion barrier layer 20 and the AlN layer 30; the low TMAl concentration refers to a TMAl concentration range of 50sccm to 200sccm.
[0072] In the embodiment of the present invention, MOCVD (Metal-organic Chemical Vapor Deposition) may be used to grow the AlN layer 30 upward on the upper surface of the patterned substrate 10 except for the grooves.
[0073] Specifically, the formation process of the AlN layer 30 includes:
[0074] Under the initial TMAl, a layer of aluminum film is formed on each area of the upper surface of the patterned substrate 10 except the groove by MOCVD; the initial TMAl concentration range is 10sccm to 30sccm; in the epitaxial process, sccm is usually directly used as a concentration reference standard. Because in the epitaxial process, the source gas is carried into the reaction chamber by an inert gas, so the flow rate represents the concentration of the source gas.
[0075] The flow rate of TMAl is adjusted to a low TMAl concentration, and NH3 is introduced to react with the aluminum film to form an AlN seed layer. AlN is continuously grown on the AlN seed layer until the AlN grown on each region is merged on the upper layer to form an AlN layer 30, and a gap is formed between the diffusion barrier layer 20 and the AlN layer 30, see Figure 3 (c) in which the low TMAl concentration refers to a TMAl concentration range of 50 sccm to 200 sccm.
[0076] In the embodiment of the present invention, a layer of aluminum film is pre-laid on the patterned substrate 10 of Si material in a TMAl atmosphere on the patterned substrate 10 on which the diffusion barrier layer 20 is epitaxially grown by MOCVD. Specifically, the patterned substrate 10 is placed in an MOCVD reaction chamber, and the temperature is raised to 1085°C to 1120°C, the TMAl gas path is opened, and the TMAl flow rate is adjusted to 10sccm to 30sccm to form a layer of aluminum film on the patterned substrate 10. Thereafter, the flow rate of TMAl is adjusted to 50sccm to 200sccm, and NH3 (ammonia) is introduced to react with the aluminum film, thereby forming an AlN seed layer on the patterned substrate 10, until the AlN seed layer grows AlN upward, and until the AlN grown above each region merges at the upper layer to form an AlN layer 30. Since the Al atoms in the AlN layer 30 have a high diffusion barrier on the substrate made of single crystal silicon, the deposited aluminum atoms tend to diffuse to the edge and apex of the step first. This phenomenon causes the Al atoms to accumulate rapidly on the surface. Since the patterned substrate 10 has a plurality of spaced grooves, the thickness of the diffusion barrier layer 20 located inside the structure is less than the depth of the groove, so a gap with sufficient space can be formed between the diffusion barrier layer 20 and the AlN layer 30.
[0077] The thickness of the AlN layer 30 is in the range of 100 nm to 300 nm, the growth temperature is in the range of 900° C. to 1150° C., and the NH 3 flow rate is in the range of 1000 sccm to 3000 sccm.
[0078] Step S204 , growing a nucleation layer 40 on the AlN layer 30 .
[0079] In the embodiment of the present invention, the nucleation layer 40 may be epitaxially grown upward on the AlN layer 30 by using a MOCVD process, see Figure 3 (d) The material of the nucleation layer 40 may be AlN.
[0080] In an embodiment of the present invention, in order to improve the crystal quality of the nucleation layer 40, the growth method of the nucleation layer 40 may include two processes. First, on the AlN layer 30, the lower layer of the nucleation layer 40 is grown by the MOCVD process under the conditions of low temperature and high V / III. Among them, low temperature refers to a temperature of 800°C to 900°C; high V / III refers to a molar ratio of the V group element NH3 and the III group element TMAl being higher than 15. The lower layer of the nucleation layer 40 is grown under the conditions of low temperature and high V / III for better 3D aggregation and nucleation of AlN. After the lower layer of the nucleation layer 40 is grown, the upper layer of the nucleation layer 40 is grown on the lower layer of the nucleation layer 40 under the conditions of high temperature and low V / III to obtain the nucleation layer 40. Among them, high temperature refers to a temperature of 1000°C to 1200°C; low V / III refers to a molar ratio of the V group element NH3 and the III group element TMAl being lower than 10. Growing the upper layer of the nucleation layer 40 under high temperature and low V / III conditions can increase the growth rate of the nucleation layer 40. By growing the lower and upper layers of the nucleation layer 40 under different conditions, both the crystal quality of the nucleation layer 40 and the growth speed of the nucleation layer 40 are guaranteed.
[0081] Specifically, when epitaxially growing the nucleation layer 40, the source flow rate of TMAl in the low-temperature AlN epitaxial process is 260 sccm, and the source flow rate of NH3 is about 4000 sccm; the source flow rate of TMAl in the high-temperature AlN epitaxial process is 190 sccm, and the source flow rate of NH3 is about 1500 sccm.
[0082] In the embodiment of the present invention, the thickness of the lower layer of the nucleation layer 40 is in the range of 20 nm to 80 nm, and the thickness of the upper layer of the nucleation layer 40 is in the range of 100 nm to 150 nm.
[0083] Step S205 , growing a buffer layer 50 on the nucleation layer 40 .
[0084] See also Figure 3 In (e), the buffer layer 50 may be epitaxially grown on the nucleation layer 40 by using a MOCVD process; wherein the material of the nucleation layer 40 is AlN, and the buffer layer 50 may be an AlGaN gradient buffer layer.
[0085] The specific method of epitaxially growing the AlGaN gradient buffer layer on the nucleation layer 40 includes: changing the gas flow rate of TMAl so that the Al components of the AlGaN buffer layer are 70%, 30%, and 15% from bottom to top, respectively, and the AlGaN gradient buffer layer is composed of a first AlGaN buffer layer with an Al element molar content of 70%, a second AlGaN buffer layer with an Al element molar content of 30%, and a third AlGaN buffer layer with an Al element molar content of 15%.
[0086] The thickness of the first AlGaN buffer layer is in the range of 300nm to 400nm; the thickness of the second AlGaN buffer layer is in the range of 300nm to 400nm; the thickness of the third AlGaN buffer layer is in the range of 200nm to 300nm, and the growth temperature of the epitaxial AlGaN gradient buffer layer is in the range of 1000°C to 1150°C.
[0087] Step S206 , growing a GaN layer 60 on the buffer layer 50 .
[0088] In the embodiment of the present invention, the GaN layer 60 is epitaxially grown on the nucleation layer 40 by using the MOCVD process. Figure 3 (f); wherein the thickness of the GaN layer 60 is 1 μm to 2 μm, and the growth temperature is 1150° C. to 1200° C. Specifically, the temperature of the reaction chamber can be raised to 1150° C., the TMAl source can be turned off, and the flow rates of TMGa (trimethyl gallium) and NH3 can be adjusted to 200 sccm and 9000 sccm, respectively, to form a GaN layer 60 with a thickness of 1 μm on the buffer layer 50.
[0089] In an embodiment of the present invention, selective patterning etching is performed on a substrate made of Si, and a patterned substrate 10 is formed by making a plurality of spaced grooves. After the epitaxy begins, Al atoms have a high diffusion barrier on the patterned substrate 10 made of Si, which will cause Al atoms to accumulate rapidly on the surface. Compared with a substrate without patterning, a lower TMAl concentration can achieve the pre-laying Al effect under normal conditions. The use of low-concentration TMAl pre-laying will reduce the diffusion of Al atoms at the AlN / Si interface during the growth process, and the RF loss will be reduced. In addition, after the patterned etching substrate, a diffusion barrier layer 20 is grown inside the plurality of spaced grooves of the patterned substrate 10. Due to the presence of a plurality of spaced grooves in the patterned substrate 10, and the presence of a diffusion barrier layer 20 having a thickness less than the groove depth superimposed in the groove, Al atoms cannot diffuse into the groove, so sufficient gaps are formed between the AlN layer 30 and the diffusion barrier layer 20 to release stress, so that the RF loss of the device generated by the embodiment of the present invention will also be reduced.
[0090] Because of the existence of the patterned substrate 10, AlN will grow laterally epitaxially inside the pattern after it starts to grow epitaxially, and then the pattern slowly merges, leaving nanopores inside the crystal. The existence of these pores indirectly reduces the contact area between the upper AlN layer 30 and the underlying patterned substrate 10, reduces stress to a certain extent, reduces dislocation density, and improves the crystal quality of the epitaxial structure.
[0091] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention.
[0092] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.
[0093] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art can understand and implement other changes to the disclosed embodiments by viewing the drawings and the disclosed content. In the description of the present invention, the term "comprising" does not exclude other components or steps, "one" or "an" does not exclude multiple situations, and "multiple" means two or more, unless otherwise clearly and specifically limited. In addition, certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.
[0094] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.
[0095] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0096] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.
Claims
1. An epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials, characterized in that: The epitaxial structure comprises: A patterned substrate; the patterned substrate is provided with a plurality of grooves arranged at intervals; A diffusion barrier layer superimposed on the plurality of spaced grooves; the thickness of the diffusion barrier layer is less than the depth of the grooves; the material of the patterned substrate is Si; An AlN layer superimposed on the patterned substrate; a gap is provided between the AlN layer and the diffusion barrier layer; a nucleation layer superimposed on the AlN layer; a buffer layer superimposed on the nucleation layer; A GaN layer is stacked on the buffer layer.
2. The epitaxial structure according to claim 1, characterized in that: The bottom surface of the groove is an arc-shaped surface, a conical surface or a flat surface.
3. The epitaxial structure according to claim 1, characterized in that: The thickness of the patterned substrate ranges from 500 μm to 1000 μm.
4. The epitaxial structure according to claim 1, characterized in that: The buffer layer is an AlGaN gradient buffer layer; the AlGaN gradient buffer layer includes, from bottom to top, a first AlGaN buffer layer, a second AlGaN buffer layer and a third AlGaN buffer layer; The molar content of Al in the first AlGaN buffer layer is 70%; the molar content of Al in the second AlGaN buffer layer is 30%; and the molar content of Al in the third AlGaN buffer layer is 15%.
5. The epitaxial structure according to claim 4, characterized in that: The thickness of the first AlGaN buffer layer is in the range of 300nm to 400nm; the thickness of the second AlGaN buffer layer is in the range of 300nm to 400nm; and the thickness of the third AlGaN buffer layer is in the range of 200nm to 300nm.
6. The epitaxial structure according to claim 1, characterized in that: The material of the nucleation layer is AlN; the thickness of the nucleation layer is in the range of 120nm to 230nm.
7. The epitaxial structure according to claim 1, characterized in that: The material of the diffusion barrier layer is Si3N4 or Al2O3; the thickness of the diffusion barrier layer is in the range of 10nm to 50nm.
8. A method for preparing an epitaxial structure for reducing radio frequency loss of silicon-based gallium nitride materials, characterized in that: The preparation method comprises: A substrate is selected, and a plurality of grooves arranged at intervals are etched on the substrate to form a patterned substrate; the material of the patterned substrate is Si; epitaxially growing a diffusion barrier layer in the plurality of spaced trenches; the thickness of the diffusion barrier layer being less than the depth of the trenches; Under low TMAl concentration, AlN is grown upward starting from each region of the upper surface of the patterned substrate except the grooves, until the AlN grown above each region is merged in the upper layer to form an AlN layer, and a gap is formed between the diffusion barrier layer and the AlN layer; the low TMAl concentration refers to a TMAl concentration range of 50 sccm to 200 sccm; growing a nucleation layer on the AlN layer; growing a buffer layer on the nucleation layer; A GaN layer is grown on top of the buffer layer.
9. The preparation method according to claim 8, characterized in that: The formation process of the AlN layer comprises: At an initial TMAl concentration, using MOCVD to form a layer of aluminum film on each area of the upper surface of the patterned substrate except the grooves; The flow rate of TMAl is adjusted to the low TMAl concentration, and NH3 is introduced so that the NH3 reacts with the aluminum film to form an AlN seed layer, and AlN continues to grow on the AlN seed layer until the AlN grown above each region merges on the upper layer to form an AlN layer, and a gap is formed between the diffusion barrier layer and the AlN layer.
10. The preparation method according to claim 8, characterized in that: Growing a nucleation layer on the AlN layer, comprising: On the AlN layer, growing the lower layer of the nucleation layer under low temperature and high V / III conditions; The low temperature refers to a temperature of 800°C to 900°C; the high V / III refers to a molar ratio of the V group element NH3 to the III group element TMAl being higher than 15; The upper layer of the nucleation layer is grown on the lower layer of the nucleation layer under high temperature and low V / III conditions to obtain the nucleation layer; the high temperature refers to a temperature of 1000°C to 1200°C; the low V / III refers to a molar ratio of group V element NH3 to group III element TMAl less than 10.
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