Method, device, equipment and program for screening design short circuit problem of PCB (Printed Circuit Board)
Through automated design rule inspection and error marking processing, the inefficient and error-prone problems in traditional manual inspections are solved, and more accurate and efficient screening of PCB design short circuit problems is achieved, improving design quality and reliability.
Patent Information
- Application Number
- CN202411995997.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-04-18
AI Technical Summary
The short circuit inspection of existing PCB designs mainly relies on manual audits, which are inefficient, error-prone and time-consuming, resulting in poor screening results.
By reading the workspace layer data in the PCB design file, performing design rule checks, automatically identifying and marking potential errors, combining the target field content and spacing attribute information of the error mark, accurately filter out short-circuit errors, and generate coordinate files containing short-circuit error position information.
It improves the accuracy and efficiency of screening short circuit problems, reduces the time and cost of manual review, ensures that problems can be promptly feedback and corrected during the design process, and improves the quality and reliability of PCB design.
Smart Images
Figure CN119846430A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a method, device, equipment and program for screening design short circuit problems of PCB boards. Background Art
[0002] In the electronics manufacturing industry, printed circuit boards (PCBs) are the basic components that connect and support electronic components. Their design quality directly affects the performance and reliability of the final product. As electronic products develop towards miniaturization and multi-functionality, the complexity of PCB design is increasing, and the requirements for design accuracy are becoming more stringent. Therefore, ensuring that PCB design is correct, especially avoiding fatal errors such as short circuits, has become the key to improving product quality and reducing production costs.
[0003] Existing PCB design short circuit inspection mainly relies on manual review. After the designer completes the design using professional EDA software, the software will generate a DRC report containing a large number of warning information that may affect production. These warnings include problems such as insufficient wiring spacing and potential short circuit risks. Engineers need to screen out the real design defects from numerous warnings. This process is time-consuming and error-prone, and usually requires cross-verification by multiple experienced engineers to reduce missed detections.
[0004] However, when screening warning information, the existing screening methods have the problem of poor screening effect due to the large amount of data. Summary of the invention
[0005] The embodiments of the present application provide a method, device, equipment and program for screening design short circuit problems of a PCB board, so as to improve the screening effect.
[0006] In a first aspect, an embodiment of the present application provides a method for screening a design short circuit problem of a PCB board, the method comprising:
[0007] According to the detection result of the work area layer in the PCB design file, the error mark information of the work area layer is obtained;
[0008] Determine a short circuit error marker in the error marker according to the target field content of the error marker in the error marker information and the spacing attribute information;
[0009] According to the position attribute information of the short-circuit error mark, a coordinate file of the short-circuit error mark is generated. The coordinate file is used to respond to user operations to locate the position of the short-circuit error mark on the workspace layer and display the error content of the short-circuit error mark.
[0010] In a possible implementation, according to the detection result of the work area layer in the PCB design file, the error mark information of the work area layer is obtained, including:
[0011] In response to the user's operation on the detection program, the detection program is started to detect the PCB board and obtain the detection result of the work area layer in the PCB design file;
[0012] Scan the detection results of the workspace layer in the PCB design file to obtain the error marking information of the workspace layer.
[0013] In a possible implementation manner, determining a short circuit error marker in the error marker according to the target field content of the error marker in the error marker information and the spacing attribute information includes:
[0014] According to preset keywords, the target field content of the error mark in the error mark information is screened and processed to determine the initial error mark in the error mark;
[0015] A short circuit error marker among the error markers is determined according to the spacing attribute information of the initial error marker.
[0016] In a possible implementation manner, determining a short circuit error marker in the error marker according to the spacing attribute information of the initial error marker includes:
[0017] If the spacing attribute information of the initial error mark does not meet the preset value requirement, the initial error mark is determined to be a short circuit error mark.
[0018] In a possible implementation, the method further includes:
[0019] If the spacing attribute information of the initial error mark meets the preset value requirements, a prompt message indicating that there is no short circuit problem is generated and displayed.
[0020] In a possible implementation manner, generating a coordinate file of the short circuit error marker according to the position attribute information of the short circuit error marker includes:
[0021] According to the short circuit error mark, other error marks in the error mark information and information of other error marks are deleted to obtain the short circuit error mark information;
[0022] Generate a coordinate file of the short-circuit error marker according to the short-circuit error marker information.
[0023] In a possible implementation manner, when there are multiple short circuit error markers, the coordinate file is a list recording the coordinates of the multiple short circuit error markers.
[0024] In a second aspect, an embodiment of the present application provides a device for screening design short circuit problems of a PCB board, comprising:
[0025] A module is used to obtain error marking information of the work area layer according to the detection result of the work area layer in the PCB design file;
[0026] A determination module, used for determining a short circuit error mark in the error mark according to the target field content of the error mark in the error mark information and the spacing attribute information;
[0027] A generation module is used to generate a coordinate file of the short-circuit error mark according to the position attribute information of the short-circuit error mark. The coordinate file is used to respond to user operations to locate the position of the short-circuit error mark on the workspace layer and display the error content of the short-circuit error mark.
[0028] In a third aspect, an embodiment of the present application provides an electronic device, including: a memory, a processor;
[0029] Memory stores computer-executable instructions;
[0030] The processor executes the computer-executable instructions stored in the memory, so that the processor executes the above first aspect and / or various possible implementations of the first aspect.
[0031] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the first aspect above and / or various possible implementations of the first aspect.
[0032] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the above first aspect and / or various possible implementation methods of the first aspect.
[0033] The method, device, equipment and program for screening design short-circuit problems of PCB boards provided in the embodiments of the present application automatically identify and mark potential errors by reading the workspace layer data in the PCB design file and performing design rule checks, accurately screen out short-circuit errors by combining the target field content and spacing attribute information of the error mark, and generate a coordinate file containing short-circuit error location information for users to quickly locate and view error details, thereby solving the problems of low efficiency, easy errors, time and labor consumption in traditional manual inspections and improving the screening effect. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0035] Figure 1 A schematic diagram of a scenario of a method for screening design short circuit problems of a PCB board provided in this application;
[0036] Figure 2 A schematic diagram of a process for screening a design short circuit problem of a PCB board provided in this application;
[0037] Figure 3 A schematic diagram of a process flow of another method for screening design short circuit problems of a PCB board provided in this application;
[0038] Figure 4 A schematic diagram of the structure of a device for screening design short circuit problems of a PCB board provided in this application;
[0039] Figure 5 A schematic diagram of the structure of the electronic device provided in this application.
[0040] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION
[0041] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.
[0042] First, the terms involved in this application are explained:
[0043] PCB (Printed Circuit Board) can be an indispensable part of electronic devices. It is used to fix and support various electronic components and connect these components through pre-printed circuits to achieve the transmission of electronic signals. The design and manufacturing quality of PCB directly affects the functional performance, reliability and service life of electronic devices, and is one of the cornerstones of the development of modern electronic technology.
[0044] Existing PCB design short circuit inspection mainly relies on manual review. After designers complete the design using professional EDA software, a large number of design rule check (DRC) reports will be generated, which contain various warning information that may affect production. These warnings cover a variety of issues ranging from insufficient wiring spacing to potential short circuit risks. However, screening out the real design defects from these thousands of warnings is an extremely tedious and error-prone task. Usually, this process is not only time-consuming, but also requires multiple experienced engineers to participate in cross-verification to minimize the possibility of missed detection.
[0045] However, this method that relies entirely on manual labor has obvious limitations. First, faced with massive amounts of data and complex inspection standards, even the most experienced engineers find it difficult to guarantee 100% accuracy, which leads to the neglect of some key design short-circuit problems, which ultimately causes the scrapping or malfunction of PCB boards. Secondly, long manual inspections greatly consume the company's human resources, especially in the case of tight product development cycles, which undoubtedly increases the cost of the project and the risk of delays. Finally, due to the lack of effective automated tool support, problems that arise during the design process often cannot be fed back and corrected in a timely manner, further exacerbating the severity of the above problems.
[0046] The method for screening design short-circuit problems of PCB boards provided in the present application automatically captures the error mark information of the working area layer in the detection result, and automatically determines the short-circuit error mark in the error mark according to the target field content of the error mark in the error mark information and the spacing attribute information, and generates a coordinate file of the short-circuit error mark. The technical means makes it possible to automatically determine the content of the short-circuit error mark and the specific position in the layer from the detection result, thereby facilitating users to quickly operate and adjust the short-circuit error mark, thereby improving the accuracy and efficiency of the inspection, reducing the time and cost of manual review, and ensuring that problems arising in the design process can be fed back and corrected in a timely manner, thereby significantly improving the quality and reliability of PCB design.
[0047] Figure 1 A schematic diagram of a scenario of a method for screening short circuit problems in a PCB board provided in this application, such as Figure 1 As shown, the specific application scenario of the present application is an inspection system, which can be a server, wherein the server is equipped with an inspection program, and the inspection program is installed with a script for executing the screening method of the PCB board of the embodiment of the present application, wherein the script can use the PCB automatic inspection program to scan out the design short-circuit points with one click, filter invalid problem warnings, and set it to display only the layers with short circuits (the layers without short circuits are not displayed).
[0048] In the embodiment of the present application, the script for executing the screening method of the PCB board of the embodiment of the present application can be a written Skill program, by installing the Skill program under the pcbenv path in Cadence Skill and modifying the relevant parameters; modifying the background menu file, adding the special command name to the MANUFACTURE menu; and starting the PCB design short circuit inspection Skill program through the command name. Thus, the script can be run in the inspection system to execute the screening method of the PCB board of the embodiment of the present application.
[0049] The embodiments of the present application do not limit the execution subject of the method for screening the design short circuit problem of the PCB board, as long as the execution subject can obtain the error mark information of the workspace layer according to the detection result of the workspace layer in the PCB design file; determine the short circuit error mark in the error mark according to the target field content of the error mark in the error mark information and the spacing attribute information; generate a coordinate file of the short circuit error mark according to the position attribute information of the short circuit error mark, and the coordinate file is used to respond to the user's operation to locate the position of the short circuit error mark on the workspace layer and display the error content of the short circuit error mark.
[0050] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.
[0051] Figure 2 A schematic diagram of a process for screening a design short circuit problem of a PCB board provided in this application, such as Figure 2 As shown, the method includes:
[0052] S201. Obtain error marking information of the workspace layer according to the detection result of the workspace layer in the PCB design file.
[0053] Among them, PCB design files can refer to a set of electronic documents that contain all the necessary information for circuit board design, such as component layout, wire connection, drilling location, silk screen logo, solder mask definition, electrical test points and bill of materials, etc., which are used to guide the manufacturing and assembly process of PCB to ensure the functionality and reliability of the final product.
[0054] Workspace layers can refer to multiple levels used to lay out and define different functional areas on the board during the design process. Each layer represents a specific aspect of the board, such as top and bottom copper foil routing, power layers, ground layers, drill information, silk screen layers (for component location and identification), etc. Detailed setup and management of workspace layers is critical to ensure the correctness and functionality of the board design.
[0055] The error marking information of the workspace layer can refer to the problems that do not meet the design specifications that are automatically detected by the design rule checking (DRC) tool during the PCB design process, and the marks made on the corresponding workspace layer. These marks contain detailed information such as the type of error (such as short circuit, open circuit, insufficient spacing, etc.), location, involved networks or components, etc., which can help designers quickly locate and correct defects in the design to ensure the functionality and reliability of the circuit board.
[0056] Among them, in the embodiment of the present application, according to the detection result of the working area layer in the PCB design file, the error marking information of the working area layer is obtained, including:
[0057] In response to the user's operation on the detection program, the detection program is started to detect the PCB board and obtain the detection result of the work area layer in the PCB design file;
[0058] Scan the detection results of the workspace layer in the PCB design file to obtain the error marking information of the workspace layer.
[0059] Among them, responding to the user's operation on the detection program can refer to the process in which the user starts the detection program through an interface or command, thereby enabling the detection program to automatically perform a comprehensive inspection on the workspace layer in the PCB design file.
[0060] After obtaining the detection result of the workspace layer in the PCB design file, the program for executing the method in the embodiment of the present application can scan the detection result and extract specific error mark information from it. Each error mark information can include key data such as the type of error (such as short circuit, open circuit, insufficient spacing, etc.), the precise location where it occurred, the network or component name involved, etc.
[0061] In an embodiment of the present application, the detection program may include: Cadence Skill (Scripting Language for Integrated-Circuit Layout), Allegro PCB Editor, OrCAD Capture, etc.
[0062] Among them, in an embodiment of the present application, the error marking information can exist in the form of a list, for example, by scanning the detection results of the workspace layer in the PCB design file, extracting the detailed information of the error marking in the detection results, and filling in the corresponding fields in the detailed information into the list, thereby obtaining the error marking information.
[0063] S202: Determine a short circuit error marker in the error marker according to the target field content of the error marker in the error marker information and the spacing attribute information.
[0064] Among them, the error mark may refer to the identification of each specific problem found by the detection program in the PCB design. In an embodiment of the present application, each error mark may include detailed information of the error, such as the error type, location, description, etc.
[0065] The target field content may refer to the value of a specific field in the error marking information, which is used to describe the nature and characteristics of the error. For example, the target field includes the error type (such as short circuit, insufficient spacing, open circuit, etc.), location (such as coordinates), description (such as a detailed description of the specific problem), etc.
[0066] Spacing attribute information may refer to data related to the distance between conductors, pads, vias, etc. in a PCB design, such as the minimum allowable spacing, actual spacing, etc.
[0067] A short circuit error mark may refer to an error mark that indicates a short circuit risk between conductors or pads identified by a detection tool during a PCB design inspection process, wherein the short circuit error mark may determine whether there is a short circuit risk by checking whether the spacing between conductors or pads (i.e., spacing attribute information) is less than the minimum allowable value.
[0068] Among them, in the embodiment of the present application, determining the short circuit error mark in the error mark according to the target field content of the error mark in the error mark information and the spacing attribute information includes:
[0069] According to preset keywords, the target field content of the error mark in the error mark information is screened and processed to determine the initial error mark in the error mark;
[0070] A short circuit error marker among the error markers is determined according to the spacing attribute information of the initial error marker.
[0071] Among them, the keyword can refer to the field of the element in the workspace layer in the PCB design file, where the elements can include Line, SMD Pin, VIA, Shape, etc., where Line can refer to the wire on the circuit board, which is the metal path used to connect the pins of each component, SMD Pin can refer to the pin of the surface mount component, which can be directly installed on the surface of the PCB, VIA (via) can refer to the conductive hole used to connect different layers in a multi-layer PCB, which can be a blind hole, buried hole or through hole, Shape can refer to the copper film area of non-standard shape in PCB design, such as a ground plane, a power plane or any user-defined geometric shape.
[0072] According to preset keywords, filtering the target field content of the error mark in the error marking information can refer to extracting error records whose target field content contains specific keywords (such as Line to SMD Pin, Line to Line, Line to VIA, Line to shape) from the error report generated by the detection program.
[0073] A short circuit error mark may refer to an error mark in a PCB design file, which may cause an electrical short circuit during manufacturing or use due to the small spacing between two or more conductive parts (such as traces, pads, vias, or shapes). The specific content of the short circuit error mark may include error code, error description, location information, and spacing value, etc., and the spacing value of the short circuit error mark is usually lower than the minimum safe spacing specified by the design rules. Therefore, the spacing value can be used to determine whether the error mark is a short circuit error mark.
[0074] In an embodiment of the present application, according to the spacing attribute information of the initial error mark, it is determined that the short circuit error mark in the error mark may refer to the error mark whose spacing value is less than a preset threshold value further screened out from the initial error mark. These error marks with too small spacing values may indicate the existence of potential short circuit risks, so special attention and correction are required. Thus, design defects that may cause electrical short circuits can be effectively identified, thereby improving the reliability and safety of the circuit board.
[0075] Among them, in the embodiment of the present application, determining the short circuit error mark in the error mark according to the spacing attribute information of the initial error mark includes:
[0076] If the spacing attribute information of the initial error mark does not meet the preset value requirement, the initial error mark is determined to be a short circuit error mark;
[0077] If the spacing attribute information of the initial error mark meets the preset value requirements, a prompt message indicating that there is no short circuit problem is generated and displayed.
[0078] The preset value requirement may represent the requirement for the relationship between the spacing value corresponding to the spacing attribute information and the preset value, wherein when the spacing attribute information of the initial error mark does not meet the preset value requirement, that is, the spacing value is less than the preset value, then the initial error mark is determined to be a short circuit error mark. When the spacing attribute information of the initial error mark meets the preset value requirement, that is, the spacing value is greater than or equal to the preset value, then the initial error mark is determined to be a non-short circuit error mark.
[0079] After determining that the initial error mark is not a short circuit error mark, a prompt message that there is no short circuit problem may be generated and displayed to prompt the user that the error is not an error of a short circuit problem.
[0080] In some embodiments, when determining whether the initial error mark is a short circuit error mark, if there are multiple initial error marks that meet the preset value requirements, the prompt information can be generated one by one, or generated together after all initial error marks that meet the preset value requirements are determined.
[0081] S203. Generate a coordinate file of the short-circuit error mark according to the position attribute information of the short-circuit error mark. The coordinate file is used to respond to the user's operation to locate the position of the short-circuit error mark on the workspace layer and display the error content of the short-circuit error mark.
[0082] Among them, the coordinate file may refer to a file containing the position information of the short circuit error mark, which is recorded in the form of coordinates and is used to accurately locate each short circuit error mark on the workspace layer of the PCB design software. The coordinate file usually includes the X and Y coordinates of each error mark, and sometimes may also include layer information (such as top layer, bottom layer, etc.). By reading and parsing the coordinate file, the user can quickly find and view the specific short circuit error mark in the PCB design interface, and display the detailed content of the error mark, such as error code, description and spacing value. As a result, the efficiency and accuracy of repairing design errors can be greatly improved.
[0083] For example, in some embodiments, the position attribute information (such as X and Y coordinates) of the error marker information can be formatted into a file (such as CSV or JSON format) so that it can be read and used in the PCB design file. The file is used to accurately locate the position of each short circuit error marker on the workspace layer and display its detailed error content, such as error code, description, and spacing value, so as to help users efficiently identify and fix design problems.
[0084] In an embodiment of the present application, the coordinate file may include the coordinates of multiple short-circuit error marks. After obtaining the coordinate file, the user can click on the coordinates of the corresponding short-circuit error mark to quickly locate the position of the corresponding short-circuit error mark in the workspace layer on the interface of the detection program, and display its detailed error content at that position.
[0085] In the embodiment of the present application, a coordinate file of the short circuit error mark is generated according to the position attribute information of the short circuit error mark, including:
[0086] According to the short circuit error mark, other error marks in the error mark information and information of other error marks are deleted to obtain the short circuit error mark information;
[0087] Generate a coordinate file of the short-circuit error marker according to the short-circuit error marker information.
[0088] Among them, other error flags may refer to error flags other than short circuit error flags.
[0089] In order to generate short-circuit error marker information more quickly, other error markers and their information in the error marker information can be deleted according to the short-circuit error marker, so as to quickly obtain the short-circuit error marker information. In this way, the memory impact caused by regenerating files when processing a large number of error markers can be reduced, and the processing speed can be guaranteed. By screening and deleting non-short-circuit error markers, the final generated file will only contain detailed information of short-circuit error markers, which is convenient for users to quickly locate and repair problems.
[0090] In the embodiment of the present application, when there are multiple short-circuit error markers, the coordinate file is a list recording the coordinates of the multiple short-circuit error markers.
[0091] The method for screening design short-circuit problems of a PCB board provided in an embodiment of the present application automatically identifies and marks potential errors by reading the workspace layer data in the PCB design file and performing a design rule check, accurately screens out short-circuit errors by combining the target field content and spacing attribute information of the error mark, and generates a coordinate file containing short-circuit error position information for users to quickly locate and view error details, thereby solving the problems of low efficiency, easy error, time-consuming and labor-intensiveness in traditional manual inspections and improving the inspection effect.
[0092] Figure 3 A flow chart of another method for screening short circuit problems of PCB boards provided in this application is shown as follows: Figure 3 As shown, the method includes:
[0093] S301, start the automatic inspection program in the PCB design software interface. After the automatic inspection program is started, the script of the screening method for PCB boards in the embodiment of the present application can be executed.
[0094] S302, scan all PCB layers in the current PCB design file workspace, and use the axlDBGetDesign instruction to capture all error warning mark information for analysis.
[0095] Among them, the axlDBGetDesign instruction can be used to capture all error warning mark information in the current design.
[0096] S303, filter out the spacing values of the keywords "Line to SMD Pin / Line toLine / Line to VIA / Line to shape" in all error warning mark information;
[0097] S304, determine whether the spacing value is less than 0. If it is less than 0, it indicates that there is a short circuit point in the PCB design.
[0098] Among them, the spacing value can refer to the minimum distance between two conductive parts (such as traces, pads, vias, or shapes) in the PCB design file. The distance can be measured in millimeters (mm). In the design rule check (DRC), the spacing value is an important parameter to ensure the reliability and manufacturability of the circuit board.
[0099] S305. If there is a short-circuit point in the PCB design, use the axlDRCWaive command to remove other error warning mark information in the interface and retain the error warning mark of the short-circuit point. And record the coordinate point of the current error warning mark and generate a coordinate file list to facilitate PCB design engineers to modify and optimize the error warning coordinate list one by one;
[0100] S306. If there is no short-circuit point in the PCB design, use the axlUIWPrint command to output the information that the check is complete and there is no short-circuit problem point.
[0101] Another PCB board design short circuit problem screening method provided by the embodiment of the present application can automatically replace manual inspection, which not only eliminates omissions caused by human negligence, significantly improves the design quality, but also greatly improves the inspection efficiency, reduces manpower input, and improves man-hours. Through automated tools, the design team can focus more on complex and innovative design tasks, thereby improving the overall quality and progress management of the project.
[0102] Figure 4 The schematic diagram of the structure of the PCB board design short circuit problem screening device provided in this application is as follows: Figure 4 As shown, the PCB board design short circuit problem screening device 40 provided in this embodiment includes:
[0103] Obtaining module 401, for obtaining error marking information of the working area layer according to the detection result of the working area layer in the PCB design file;
[0104] A determination module 402, configured to determine a short circuit error flag in the error flag according to the target field content of the error flag in the error flag information and the spacing attribute information;
[0105] The generation module 403 is used to generate a coordinate file of the short-circuit error mark according to the position attribute information of the short-circuit error mark. The coordinate file is used to respond to the user's operation to locate the position of the short-circuit error mark on the workspace layer and display the error content of the short-circuit error mark.
[0106] In a possible implementation, the obtaining module 401 may also be specifically used for:
[0107] In response to the user's operation on the detection program, the detection program is started to detect the PCB board and obtain the detection result of the work area layer in the PCB design file;
[0108] Scan the detection results of the workspace layer in the PCB design file to obtain the error marking information of the workspace layer.
[0109] In a possible implementation, the determining module 402 may also be specifically configured to:
[0110] According to preset keywords, the target field content of the error mark in the error mark information is screened and processed to determine the initial error mark in the error mark;
[0111] A short circuit error marker among the error markers is determined according to the spacing attribute information of the initial error marker.
[0112] In a possible implementation, the determining module 402 may also be specifically configured to:
[0113] If the spacing attribute information of the initial error mark does not meet the preset value requirement, the initial error mark is determined to be a short circuit error mark.
[0114] In a possible implementation, the determining module 402 may also be specifically configured to:
[0115] If the spacing attribute information of the initial error mark meets the preset value requirements, a prompt message indicating that there is no short circuit problem is generated and displayed.
[0116] In a possible implementation, the generating module 403 may also be specifically configured to:
[0117] According to the short circuit error mark, other error marks in the error mark information and information of other error marks are deleted to obtain the short circuit error mark information;
[0118] Generate a coordinate file of the short-circuit error marker according to the short-circuit error marker information.
[0119] In a possible implementation, the generating module 403 may also be specifically configured to:
[0120] When there are multiple short-circuit error markers, the coordinate file is a list recording the coordinates of the multiple short-circuit error markers.
[0121] The device for screening design short circuit problems of PCB boards provided in this embodiment can execute the method provided in the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be described in detail here.
[0122] Figure 5 This is a schematic diagram of the structure of the electronic device provided in this application. Figure 5As shown, the electronic device 50 provided in this embodiment includes: at least one processor 501 and a memory 502. Optionally, the device 50 also includes a communication component 503. The processor 501, the memory 502 and the communication component 503 are connected via a bus 504.
[0123] In a specific implementation process, at least one processor 501 executes the computer-executable instructions stored in the memory 502, so that at least one processor 501 executes the above method.
[0124] The specific implementation process of the processor 501 can be found in the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.
[0125] In the above embodiments, it should be understood that the processor can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), etc. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the invention can be directly implemented as a hardware processor, or can be implemented by a combination of hardware and software modules in the processor.
[0126] The memory may include a high-speed memory (Random Access Memory, RAM), and may also include a non-volatile memory (NVM), such as at least one disk storage.
[0127] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of this application is not limited to only one bus or one type of bus.
[0128] The present application also provides a computer program product, including a computer program, which implements the above method when executed by a processor.
[0129] The present application also provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, the above method is implemented.
[0130] The above-mentioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The readable storage medium can be any available medium that can be accessed by a general or special-purpose computer.
[0131] An exemplary readable storage medium is coupled to a processor so that the processor can read information from the readable storage medium and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can be located in an application specific integrated circuit (Application Specific Integrated Circuits, referred to as: ASIC). Of course, the processor and the readable storage medium can also exist in the device as discrete components.
[0132] The division of units is only a logical function division, and there may be other divisions in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, device or unit, which can be electrical, mechanical or other forms.
[0133] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0134] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
[0135] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.
[0136] Those skilled in the art can understand that all or part of the steps of implementing the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned storage medium includes: ROM, RAM, disk or optical disk and other media that can store program codes.
[0137] Finally, it should be noted that those skilled in the art will readily conceive of other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses or adaptations of the present invention, which follow the general principles of the present invention and include common knowledge or customary technical means in the art not disclosed by the present invention, are not limited to the precise structure described above and shown in the drawings, and may be modified and changed in various ways without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.
Claims
1. A method for screening design short circuit problems of PCB boards, characterized in that: The method comprises: According to the detection result of the working area layer in the PCB design file, the error marking information of the working area layer is obtained; Determine a short circuit error flag in the error flag according to the target field content of the error flag in the error flag information and the spacing attribute information; According to the position attribute information of the short circuit error mark, a coordinate file of the short circuit error mark is generated, and the coordinate file is used to respond to the user's operation to locate the position of the short circuit error mark on the workspace layer and display the error content of the short circuit error mark.
2. The method according to claim 1, characterized in that The step of obtaining error marking information of the work area layer according to the detection result of the work area layer in the PCB design file includes: In response to the user's operation on the detection program, the detection program is started to perform detection processing on the PCB board to obtain the detection result of the working area layer in the PCB design file; Scan the detection result of the working area layer in the PCB design file to obtain error marking information of the working area layer.
3. The method according to claim 1, characterized in that The step of determining the short circuit error flag in the error flag according to the target field content of the error flag in the error flag information and the spacing attribute information includes: According to preset keywords, the target field content of the error mark in the error mark information is screened to determine the initial error mark in the error mark; A short circuit error marker among the error markers is determined according to the spacing attribute information of the initial error marker.
4. The method according to claim 3, characterized in that: The step of determining the short circuit error mark in the error mark according to the spacing attribute information of the initial error mark includes: If the spacing attribute information of the initial error mark does not meet the preset value requirement, the initial error mark is determined to be a short circuit error mark.
5. The method according to claim 4, characterized in that The method further comprises: If the spacing attribute information of the initial error mark meets the preset value requirement, a prompt message indicating that there is no short circuit problem is generated and displayed.
6. The method according to claim 1, characterized in that The step of generating a coordinate file of the short circuit error mark according to the position attribute information of the short circuit error mark comprises: According to the short circuit error mark, other error marks in the error mark information and information of the other error marks are deleted to obtain short circuit error mark information; A coordinate file of the short circuit error mark is generated according to the short circuit error mark information.
7. The method according to any one of claims 1 to 6, characterized in that When there are multiple short circuit error markers, the coordinate file is a list recording the coordinates of the multiple short circuit error markers.
8. A device for screening design short circuit problems of PCB boards, characterized in that: include: An obtaining module is used to obtain error marking information of the working area layer according to the detection result of the working area layer in the PCB design file; A determination module, used for determining a short circuit error mark in the error mark according to the target field content of the error mark in the error mark information and the spacing attribute information; A generation module is used to generate a coordinate file of the short circuit error mark according to the position attribute information of the short circuit error mark, and the coordinate file is used to respond to the user's operation to locate the position of the short circuit error mark on the workspace layer and display the error content of the short circuit error mark.
9. An electronic device, characterized in that: include: Memory, processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory, so that the processor performs the method according to any one of claims 1 to 7.
10. A computer program product, characterized in that The invention comprises a computer program, which implements the method according to any one of claims 1 to 7 when being executed by a processor.