Integrated circuit pin coplanarity detection method and system

Abstract

The present invention relates to the field of pin coplanarity detection, and in particular to a pin coplanarity detection method and system for integrated circuits. The method first obtains grayscale images of an integrated circuit chip at different illumination angles, calculates the brightness characteristic value of each pin area in each grayscale image, selects multiple optimal illumination angles from all illumination angles, analyzes the non-coplanarity characteristics of each pin area in the grayscale image at each optimal illumination angle, obtains the non-coplanarity significance of the pin area, obtains the non-coplanarity possibility of each pin of the integrated circuit chip according to the correlation between the brightness characteristic value of the same pin area in the grayscale image at each optimal illumination angle and each optimal illumination angle, and the non-coplanarity significance of the same pin area in the grayscale image at each optimal illumination angle, and detects the non-coplanar pins. The present invention can reduce the interference of the oxidation phenomenon of the pin on the coplanarity detection, and improve the accuracy of the coplanarity detection of the integrated circuit chip pins.

Description

Technical Field

[0001] The present invention relates to the field of pin coplanarity detection, and in particular to a pin coplanarity detection method and system for an integrated circuit. Background Art

[0002] The pins of an integrated circuit (IC) chip are the "bridge" connecting the internal circuit of the chip with the printed circuit board. During the production process of integrated circuit chips, packaging is required to provide a stable and reliable working environment for the chip and prevent the integrated circuit from being affected by external environments such as dust, moisture, and static electricity. The integrated circuit packaging process may affect the position of the integrated circuit pins, causing the pins to be non-coplanar, thereby affecting the packaging quality. Therefore, the coplanarity of the integrated circuit pins needs to be tested after the packaging is completed.

[0003] In the related art, machine vision inspection is usually performed on integrated circuit chips under a fixed-angle light source to identify non-coplanar pins. However, since there is oxidation on the surface of the pins of the integrated circuit chip, under a fixed-angle light source, the oxidized pins and the non-coplanar pins will show relatively similar image features, resulting in existing methods mistaking the pins with oxidation as non-coplanar pins, thereby reducing the accuracy of the coplanarity detection of the integrated circuit chip pins. Summary of the invention

[0004] In order to solve the technical problem that under a fixed angle light source, the existing method will mistake the pins with oxidation phenomenon as non-coplanar pins, thereby reducing the accuracy of the coplanarity detection of the integrated circuit chip pins, the purpose of the present invention is to provide a pin coplanarity detection method and system for integrated circuits, and the technical scheme adopted is as follows:

[0005] The present invention provides a method for detecting the coplanarity of pins of an integrated circuit, the method comprising:

[0006] Obtaining grayscale images of the integrated circuit chip under different illumination angles of the light source, performing threshold segmentation on each grayscale image, and obtaining multiple pin regions of each grayscale image and a brightness characteristic value of each pin region;

[0007] Filtering out a plurality of optimal illumination angles from all illumination angles according to the distribution of the grayscale values ​​of the pixels of each pin region in the grayscale image at each illumination angle and the brightness characteristic value of each pin region;

[0008] Take any grayscale image of the best illumination angle as the target grayscale image, take any pin area in the target grayscale image as the target pin area, select the symmetrical pin area of ​​the target pin area from the target grayscale image, and obtain the brightness abnormality of the target pin area according to the difference in the brightness characteristic value between the target pin area and the symmetrical pin area; obtain the roughness of the target pin area according to the distribution of the grayscale values ​​of the pixels in the target pin area, the brightness characteristic value of the target pin area and the illumination intensity of the light source; obtain the non-coplanar significance of the target pin area according to the brightness abnormality and the roughness of the target pin area;

[0009] Obtaining the non-coplanarity possibility of each pin of the integrated circuit chip according to the correlation between the brightness characteristic value of the same pin area in the grayscale images of different optimal illumination angles and each optimal illumination angle, and the non-coplanarity significance of the same pin area in the grayscale images of each optimal illumination angle;

[0010] Based on the non-coplanar possibility, the non-coplanar pins of the integrated circuit chip are detected.

[0011] Furthermore, the step of selecting a plurality of optimal illumination angles from all illumination angles includes:

[0012] Taking any illumination angle as the illumination angle to be measured, analyzing the discrete degree of the grayscale value of the pixel point of each pin area in the grayscale image of the illumination angle to be measured, and obtaining the brightness disorder of each pin area in the grayscale image of the illumination angle to be measured;

[0013] Any pin area in the grayscale image of the illumination angle to be measured is taken as the pin area to be measured, and the absolute value of the difference in brightness disorder between the pin area to be measured and each adjacent pin area is taken as the brightness distribution difference value between the pin area to be measured and each adjacent pin area; the average value of the brightness distribution difference values ​​between the pin area to be measured and all adjacent pin areas is taken as the overall distribution difference value of the pin area to be measured;

[0014] The overall distribution difference value and the brightness disorder of the pin area to be tested are integrated and negatively correlated to obtain the imaging quality coefficient of the pin area to be tested; the imaging quality coefficient and the brightness characteristic value of the pin area to be tested are integrated to obtain the imaging quality evaluation value of the pin area to be tested;

[0015] Normalizing the average of the imaging quality evaluation values ​​of all pin regions in the grayscale image of the illumination angle to be measured to obtain an imaging quality index of the illumination angle to be measured;

[0016] The illumination angle whose imaging quality index is greater than a preset index threshold is taken as a candidate illumination angle, and the longest continuous plurality of candidate illumination angles is taken as the optimal illumination angle.

[0017] Furthermore, the step of selecting the symmetric pin area of ​​the target pin area includes:

[0018] In the target grayscale image, a symmetric pin area of ​​the target pin area is selected from other pin areas except the target pin area, and the distance from the center of the symmetric pin area to the center of the integrated circuit chip is equal to the distance from the center of the target pin area to the center of the integrated circuit chip.

[0019] Further, obtaining the brightness abnormality degree of the target pin area includes:

[0020] Among the multiple symmetrical pin regions of the target pin region, a symmetrical pin region on the same side as the target pin region is used as the symmetrical pin region on the same side of the target pin region;

[0021] A symmetrical pin region in the same row as the target pin region is used as the first pin region in the same row of the target pin region; a symmetrical pin region in the same row as the symmetrical pin region on the same side is used as the second pin region in the same row of the symmetrical pin region on the same side;

[0022] The absolute value of the difference between the brightness characteristic values ​​of the target pin region and the symmetrical pin region on the same side is used as the first brightness abnormal value of the target pin region;

[0023] The brightness characteristic value of the target pin area is used as the numerator, the brightness characteristic value of the first pin area in the same row of the target pin area is used as the denominator, and the ratio is used as the first brightness ratio value between the target pin area and the first pin area in the same row; the brightness characteristic value of the pin area symmetrical on the same side of the target pin area is used as the numerator, the brightness characteristic value of the pin area symmetrical on the same side of the second pin area in the same row of the target pin area is used as the denominator, and the ratio is used as the second brightness ratio value between the pin area symmetrical on the same side and the second pin area in the same row; the absolute value of the difference between the first brightness ratio value and the second brightness ratio value is used as the second brightness abnormal value of the target pin area;

[0024] The first abnormal brightness value and the second abnormal brightness value are combined to obtain the abnormal brightness degree of the target pin area.

[0025] Further, obtaining the roughness of the target pin area includes:

[0026] The illumination intensity of the light source is used as the numerator, the brightness characteristic value of the target pin area is used as the denominator, and the ratio is used as the scattering degree of the target pin area;

[0027] The information entropy of the grayscale value of the pixel in the target pin area and the scattering degree of the target pin area are integrated to obtain the roughness of the target pin area.

[0028] Further, obtaining the non-coplanar significance of the target pin area includes:

[0029] Performing negative correlation mapping on the roughness of the target pin area to obtain the non-oxidation possibility of the target pin area;

[0030] The brightness abnormality degree and the non-oxidation possibility of the target pin area are integrated and normalized to obtain the non-coplanar significance of the target pin area.

[0031] Further, the non-coplanarity possibility of obtaining each pin of the integrated circuit chip includes:

[0032] The sequence formed by sorting all the best illumination angles is used as the best illumination angle sequence; the sequence formed by sorting the brightness characteristic values ​​of the same pin area in the grayscale images of all the best illumination angles according to the arrangement order of the best illumination angles in the best illumination angle sequence is used as the brightness characteristic value sequence of each pin of the integrated circuit chip;

[0033] Performing negative correlation mapping on the absolute value of the Pearson correlation coefficient between the optimal illumination angle sequence and the brightness characteristic value sequence of each pin of the integrated circuit chip to obtain a first non-coplanarity degree of each pin of the integrated circuit chip;

[0034] The average value of the non-coplanar significance of the same pin area in the grayscale images of all the best illumination angles is used as the second non-coplanar degree of each pin of the integrated circuit chip;

[0035] The first non-coplanarity degree and the second non-coplanarity degree are integrated and normalized to obtain the non-coplanarity possibility of each pin of the integrated circuit chip.

[0036] Further, the detecting of non-coplanar pins of the integrated circuit chip includes:

[0037] The pins whose non-coplanarity probability is greater than a preset probability threshold are used as non-coplanar pins of the integrated circuit chip.

[0038] Further, the obtaining of a plurality of pin regions of each grayscale image and a brightness characteristic value of each pin region comprises:

[0039] Input each grayscale image into the Otsu threshold segmentation algorithm to obtain the optimal segmentation threshold for each grayscale image;

[0040] In each grayscale image, a connected domain formed by pixels whose grayscale values ​​are greater than the optimal segmentation threshold is taken as a pin region;

[0041] The average grayscale value of all pixels in each pin area in the grayscale image is taken as the brightness feature value of each pin area.

[0042] The present invention also proposes a pin coplanarity detection system for an integrated circuit, the system comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor implementing any one of the steps of a pin coplanarity detection method for an integrated circuit when executing the computer program.

[0043] The present invention has the following beneficial effects:

[0044] The present invention takes into account that under a single fixed-angle light source, the existing method will mistake pins with oxidation as non-coplanar pins, thereby reducing the accuracy of coplanarity detection of integrated circuit chip pins. Therefore, grayscale images of the integrated circuit chip under different lighting angles of the light source are first obtained. Considering that the grayscale images collected under some lighting angles are not conducive to subsequent visual detection, multiple optimal lighting angles are screened out, so that the image performance quality of the pins of the integrated circuit chip under multiple optimal lighting angles is better, which is conducive to improving the accuracy of subsequent coplanarity detection of the pins. Considering that the pins with oxidation or non-coplanar pins have a large difference in brightness performance in the grayscale image compared with other normal pins, the degree of brightness abnormality caused by non-coplanarity or oxidation in the target pin area can be reflected by the acquired brightness abnormality degree. Considering that the pins with oxidation The grayscale value distribution of pixels in the grayscale image is relatively chaotic, and it will produce a strong scattering phenomenon to the light, resulting in its brightness characteristic value being smaller than the light intensity. Therefore, the possibility of oxidation in the target pin area can be reflected by the obtained roughness, and then the degree to which the target pin area exhibits non-coplanar characteristics can be reflected by the non-coplanar significance, thereby reducing the interference of oxidation on coplanar detection; at the same time, considering that the brightness performance of the pin area in the grayscale image of a non-coplanar pin of an integrated circuit chip under multiple optimal illumination angles has a weak correlation with the change of the optimal illumination angle, therefore, all the possibilities that can be reflected by the non-coplanar possibility for each pin of the integrated circuit chip to have non-coplanar phenomenon are combined, thereby further reducing the interference of oxidation on coplanar detection, thereby accurately detecting the non-coplanar pins of the integrated circuit chip, and improving the accuracy of the coplanarity detection of the integrated circuit chip pins. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present invention or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0046] Figure 1 A flow chart of a pin coplanarity detection method for an integrated circuit provided by an embodiment of the present invention;

[0047] Figure 2 A schematic diagram of a pin region of an integrated circuit chip provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the following is a detailed description of the pin coplanarity detection method and system of an integrated circuit proposed by the present invention, its specific implementation method, structure, features and effects, in combination with the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" does not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics in one or more embodiments may be combined in any suitable form.

[0049] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

[0050] The specific scheme of the pin coplanarity detection method and system of an integrated circuit provided by the present invention is described in detail below with reference to the accompanying drawings.

[0051] See also Figure 1 , which shows a flow chart of a pin coplanarity detection method of an integrated circuit provided by an embodiment of the present invention, the method comprising:

[0052] Step S1: obtaining grayscale images of the integrated circuit chip under different illumination angles of the light source, performing threshold segmentation on each grayscale image, and obtaining multiple pin regions of each grayscale image and a brightness characteristic value of each pin region.

[0053] In an embodiment of the present invention, a horizontal platform is first set up, and the horizontal platform is set to a black background so as to better obtain the pin image of the integrated circuit chip, and a light source is set above the integrated circuit chip, and the illumination angle of the light source is adjusted at the same time, and a camera located directly above the integrated circuit chip is used to collect the original image of the integrated circuit chip under different illumination angles, wherein the illumination intensity of the light source remains unchanged during the entire image acquisition process. In an embodiment of the present invention, the illumination intensity is set to 2510cd, wherein cd is a common unit of illumination intensity, and the specific value of the illumination intensity can also be set by the implementer according to the specific implementation scenario, which is not limited here. In an embodiment of the present invention, the adjustment range of the illumination angle is set to The illumination angle refers to the angle between the incident light direction of the light source and the horizontal plane. In the actual image acquisition process, it can start from the maximum illumination angle or the minimum illumination angle, and each time The illumination angle can be adjusted by adjusting the adjustment interval. The adjustment range and adjustment interval of the illumination angle can also be set by the implementer according to the specific implementation scenario and are not limited here.

[0054] In order to reduce the amount of calculation for subsequent image processing and improve the processing speed, in one embodiment of the present invention, the original images collected at different lighting angles are grayed and converted into single-channel grayscale images. It should be noted that graying is a technical means well known to those skilled in the art and will not be described in detail here.

[0055] After collecting grayscale images of the integrated circuit chip under different lighting angles of the light source, it is also necessary to extract the area representing the pin in each grayscale image and calculate the brightness feature value of each pin area, so as to facilitate the subsequent analysis of the brightness characteristics of each pin area in the grayscale image under different lighting angles based on the brightness feature value, thereby improving the accuracy of non-coplanar pin detection.

[0056] Preferably, in one embodiment of the present invention, the method for obtaining the plurality of pin regions of each grayscale image and the brightness characteristic value of each pin region specifically includes:

[0057] Each grayscale image is input into the Otsu threshold segmentation algorithm to obtain the optimal segmentation threshold for each grayscale image. Since the pins are usually made of metal and have strong reflectivity, the grayscale value of the integrated circuit chip pin area is larger than the grayscale value of other areas. Therefore, in each grayscale image, the connected domain composed of pixels with grayscale values ​​greater than the optimal segmentation threshold is taken as the pin area. The larger the grayscale value of the pin area in the grayscale image, the stronger the brightness of the pin area. Therefore, the average grayscale value of all pixels in each pin area in the grayscale image can be used as the brightness feature value of each pin area.

[0058] Step S2: Filter out a plurality of optimal illumination angles from all illumination angles according to the distribution of the grayscale values ​​of the pixels of each pin region in the grayscale image at each illumination angle and the reduced brightness characteristic value of each pin region.

[0059] After the surface of the integrated circuit chip pin is irradiated by the light source, two kinds of reflected light will be generated, one is scattered light and the other is mirror reflected light. As the inclination angle of the light source increases, the proportion of scattered reflection will increase, resulting in the intensity of the reflected light no longer being single, thereby affecting the image characteristics of the pin area in the collected grayscale image, resulting in poor quality of the grayscale image collected under some illumination angles, which is not conducive to subsequent pin coplanarity detection. Therefore, the embodiment of the present invention first analyzes the distribution of pixel grayscale values ​​of each pin area in the grayscale image of each illumination angle and the reduced brightness characteristic value of each pin area, and selects multiple optimal illumination angles from all illumination angles, so that the imaging quality of the pins of the integrated circuit chip at each optimal illumination angle is better, so as to improve the accuracy of subsequent pin coplanarity detection.

[0060] Preferably, in one embodiment of the present invention, the method for acquiring multiple optimal illumination angles specifically includes:

[0061] Take any illumination angle as the illumination angle to be measured, analyze the discrete degree of the grayscale value of the pixel point of each pin area in the grayscale image of the illumination angle to be measured, and obtain the brightness disorder of each pin area in the grayscale image of the illumination angle to be measured. The larger the brightness disorder, the worse the brightness uniformity of each pin area in the grayscale image of the illumination angle to be measured, and the poorer the imaging quality of each pin area in the grayscale image of the illumination angle to be measured.

[0062] In an embodiment of the present invention, the standard deviation or variance of the grayscale values ​​of all pixels of each pin area in the grayscale image of the measured illumination angle can be used as the brightness chaos of each pin area in the grayscale image of the measured illumination angle to realize the analysis of the discrete degree of the grayscale values ​​of the pixels of each pin area in the grayscale image of the measured illumination angle, which is not limited here.

[0063] Any pin area in the grayscale image of the measured illumination angle is taken as the pin area to be measured, and the absolute value of the difference in the reduced brightness chaos between the pin area to be measured and each adjacent pin area is taken as the brightness distribution difference value between the pin area to be measured and each adjacent pin area. The larger the brightness distribution difference value, the greater the difference in brightness uniformity between the pin area to be measured and each adjacent pin area. Therefore, the average value of the reduced brightness distribution difference value between the pin area to be measured and all adjacent pin areas can be taken as the overall distribution difference value of the pin area to be measured. The larger the overall distribution difference value, the worse the imaging quality of the pin area to be measured.

[0064] It should be noted that the pin area adjacent to the pin area to be tested refers to the pin area adjacent to the same side. Figure 2 , which shows a schematic diagram of the pin area of ​​an integrated circuit chip provided by an embodiment of the present invention, wherein, if the pin area to be tested is not at a boundary position, for example, pin area P is the pin area to be tested, then pin areas P1 and P2 are adjacent pin areas of the pin area to be tested P; if the pin area to be tested is at a boundary position, for example, pin area P1 is the pin area to be tested, then pin area P is the adjacent pin area of ​​the pin area to be tested P1.

[0065] Furthermore, the reduced overall distribution difference value and the reduced brightness chaos of the pin area to be tested can be combined and negatively correlated to obtain the imaging quality coefficient of the pin area to be tested. At the same time, the larger the brightness characteristic value of the pin area to be tested, the stronger the brightness performance of the pin area to be tested, and the better its imaging quality. Therefore, the reduced imaging quality coefficient and the reduced brightness characteristic value of the pin area to be tested can be combined to obtain the imaging quality evaluation value of the pin area to be tested. The larger the imaging quality evaluation value, the better the imaging quality of the pin area to be tested.

[0066] In the embodiment of the present invention, the sum or product of the reduced overall distribution difference value and the reduced brightness disorder of the pin area to be tested can be used as the imaging quality coefficient of the pin area to be tested, thereby achieving a combination of the two, which is not limited here.

[0067] In an embodiment of the present invention, the sum or product of the reduced imaging quality coefficient and the reduced brightness characteristic value of the pin area to be tested can be used as the imaging quality evaluation value of the pin area to be tested, thereby achieving a combination of the two, which is not limited here.

[0068] As an example, in one embodiment of the present invention, the expression of the imaging quality evaluation value of the pin area to be tested may be specifically, for example, as follows:

[0069]

[0070] in, Indicates the imaging quality evaluation value of the pin area to be tested; Indicates the reduced brightness clutter of the pin area to be tested; Indicates the first Reduce brightness clutter in each pin area; Indicates the number of pin areas adjacent to the pin area to be tested; Indicates the pin area to be tested and the adjacent The brightness distribution difference between the pin areas; Indicates the overall distribution difference value of the pin area to be tested; Indicates the imaging quality factor of the pin area to be tested; Indicated by natural constant An exponential function with base is used for negative correlation mapping processing; Indicates the reduced brightness characteristic value of the pin area to be tested.

[0071] It should be noted that in other embodiments of the present invention, negative correlation mapping may be achieved through other basic mathematical operations, which will not be elaborated herein.

[0072] The same method as above can be used to obtain the reduced imaging quality evaluation value of each pin area in the grayscale image of the measured illumination angle, and then the average value of the reduced imaging quality evaluation values ​​of all pin areas in the grayscale image of the measured illumination angle can be normalized, and the calculation result can be limited to The larger the imaging quality index is, the better the overall quality of each pin area in the grayscale image under the measured illumination angle is, which is more conducive to the subsequent pin coplanarity detection.

[0073] In one embodiment of the present invention, the normalization processing can be specifically, for example, maximum and minimum value normalization processing, and the normalization in subsequent steps can all adopt maximum and minimum value normalization processing. In other embodiments of the present invention, other normalization methods can be selected according to the specific range of numerical values, which will not be described in detail.

[0074] The imaging quality index of each illumination angle can be obtained by the same method as above, and then the illumination angle that reduces the imaging quality index by more than the preset index threshold can be taken as the candidate illumination angle, and the longest continuous multiple candidate illumination angles can be taken as the optimal illumination angle. For example, assuming that the illumination angles are 1, 2, 3, 4, 5, 6, 7, 8, 9, among which 1, 2, 4, 5, 6, 8, 9 are the candidate illumination angles, the longest continuous candidate illumination angles are 4, 5, 6, and the candidate illumination angles 4, 5, 6 are taken as the optimal illumination angles.

[0075] The preset indicator threshold is set to 0.75, and the specific value of the preset indicator threshold can also be set by the implementer according to the specific implementation scenario, and is not limited here.

[0076] Step S3: Take any grayscale image of the best illumination angle as the target grayscale image, take any pin area in the target grayscale image as the target pin area, select the symmetrical pin area of ​​the target pin area from the target grayscale image, and obtain the brightness abnormality of the target pin area according to the difference in the reduced brightness characteristic value between the target pin area and the reduced symmetrical pin area; obtain the roughness of the target pin area according to the distribution of the grayscale values ​​of the pixels in the target pin area, the reduced brightness characteristic value of the target pin area and the illumination intensity of the light source; obtain the non-coplanar significance of the target pin area according to the reduced brightness abnormality and the reduced roughness of the target pin area.

[0077] Since the image characteristics of oxidized pins or non-coplanar pins are different at different optimal illumination angles, the grayscale image at a single optimal illumination angle is first analyzed, and the grayscale image at any optimal illumination angle is used as the target grayscale image, and any pin area in the target grayscale image is used as the target pin area. If the target pin area corresponds to a pin that has not been oxidized or is coplanar, then at a single optimal illumination angle, the brightness of the target pin area is relatively consistent with that of other symmetrical pin areas. If the target pin area corresponds to a pin that is non-coplanar, the warping of the pin will cause the reflection of the pin to be relatively stronger, so that the brightness of the target pin area is higher than that of other symmetrical pin areas. The sinking of the foot will cause the reflection of the pin to be relatively weaker, so that the brightness of the target pin area is lower than that of other symmetrical pin areas. If the target pin area corresponds to a pin that has been oxidized, the oxidation will cause the pin surface to be rough, which will cause a strong scattering phenomenon to the light, resulting in the brightness of the target pin area being lower than that of other symmetrical pin areas. In other words, no matter whether the target pin area corresponds to a non-coplanar pin or a pin that has been oxidized, it will cause the target pin area and other symmetrical pin areas. Therefore, the embodiment of the present invention first selects the symmetrical pin area of ​​the target pin area from the target grayscale image, and then analyzes the non-coplanar characteristics of the target pin area based on the brightness difference between the target pin area and the symmetrical pin area.

[0078] Preferably, in one embodiment of the present invention, the method for acquiring the symmetric pin area of ​​the target pin area specifically includes:

[0079] In the target grayscale image, select the symmetrical pin area of ​​the target pin area from other pin areas except the target pin area, and reduce the distance from the center of the symmetrical pin area to the center of the integrated circuit chip to be equal to the distance from the center of the target pin area to the center of the integrated circuit chip. In other words, the target pin area and each symmetrical pin area are symmetrical about the vertical center line of the integrated circuit chip and are also symmetrical about the horizontal center line of the integrated circuit chip. Please refer to Figure 2 , where if pin area Q is the target pin area, then pin areas P, Q1 and Q2 are symmetrical pin areas of the target pin area Q.

[0080] It should be noted that the number of pins on one side of the integrated circuit chip detected by the embodiment of the present invention is an even number, so as to ensure that the number of symmetrical pin areas of the target pin area is 3, which facilitates the smooth progress of subsequent calculation and analysis.

[0081] Furthermore, the degree of brightness abnormality in the target pin area can be obtained based on the difference in the reduced brightness characteristic values ​​between the target pin area and the reduced symmetrical pin area. The degree of brightness abnormality can be reflected by the degree of brightness abnormality in the target pin area due to non-coplanarity or oxidation. Subsequently, the non-coplanar characteristics of the target pin area can be analyzed based on the degree of brightness abnormality.

[0082] Preferably, in one embodiment of the present invention, the method for obtaining the abnormal brightness level of the target pin area specifically includes:

[0083] Among the multiple symmetrical pin regions of the target pin region, a symmetrical pin region on the same side of the target pin region is used as the symmetrical pin region on the same side of the target pin region; a symmetrical pin region in the same row as the target pin region is used as the first pin region in the same row of the target pin region; a symmetrical pin region in the same row as the symmetrical pin region on the same side is used as the second pin region in the same row of the symmetrical pin region on the same side, see Figure 2 , where if pin area Q is the target pin area, then pin area Q1 is the pin area symmetrical on the same side of the target pin area Q, pin area P is the first pin area in the same row of the target pin area Q, and pin area Q2 is the second pin area in the same row of the pin area Q1 symmetrical on the same side.

[0084] The absolute value of the difference in the reduced brightness characteristic values ​​between the target pin area and the symmetrical pin area on the same side is taken as the first brightness anomaly value of the target pin area. The larger the first brightness anomaly value is, the greater the difference in brightness performance between the target pin area and the symmetrical pin area on the same side is, which further indicates that the target pin area is more likely to have abnormal brightness performance caused by non-coplanarity or oxidation.

[0085] The reduced brightness characteristic value of the target pin area is used as the numerator, the reduced brightness characteristic value of the first pin area in the same line of the target pin area is used as the denominator, and the ratio is used as the first brightness ratio value between the target pin area and the first pin area in the same line; the reduced brightness characteristic value of the symmetrical pin area on the same side of the target pin area is used as the numerator, the reduced brightness characteristic value of the second pin area in the same line of the symmetrical pin area on the same side is used as the denominator, and the ratio is used as the second brightness ratio value between the symmetrical pin area on the same side and the second pin area in the same line; the absolute value of the difference between the reduced first brightness ratio value and the reduced second brightness ratio value is used as the second brightness abnormality value of the target pin area. The larger the second brightness abnormality value is, the greater the difference is in the brightness ratio between the target pin area and the pin area in the same line, and the brightness ratio between the symmetrical pin area on the same side and the pin area in the same line, which further indicates that the target pin area is more likely to have abnormal brightness performance due to non-coplanarity or oxidation.

[0086] Furthermore, the reduction of the first brightness abnormal value and the reduction of the second brightness abnormal value may be combined to obtain the brightness abnormality degree of the target pin area.

[0087] In the embodiment of the present invention, the sum or product of the first brightness abnormal value and the reduced second brightness abnormal value may be used as the brightness abnormality degree of the target pin area, thereby achieving a combination of the two, which is not limited here.

[0088] As an example, in one embodiment of the present invention, the expression of the brightness abnormality degree of the target pin area may be specifically, for example, as follows:

[0089]

[0090] in, Indicates the abnormal brightness level of the target pin area; a reduced brightness characteristic value representing the target pin area; Represents the reduced brightness feature value of the symmetrical pin area on the same side as the target pin area; Represents a reduced brightness characteristic value of a first peer pin region of a target pin region; Represents the lowered brightness characteristic value of the second same row pin area of ​​the symmetrical pin area on the same side.

[0091] Since the brightness abnormality degree obtained above can only reflect the possibility that the target pin area has abnormal brightness due to non-coplanarity or oxidation, further analysis is needed to reduce the interference of oxidation. Considering that the grayscale value distribution of pixels of pins with oxidation in the grayscale image is relatively chaotic, and they will produce a strong scattering phenomenon to light, resulting in their brightness characteristic values ​​being smaller than the light intensity, the distribution of pixel grayscale values ​​in the target pin area, the reduced brightness characteristic value of the target pin area and the light intensity of the light source can be further analyzed. The possibility of oxidation in the target pin area can be reflected by the obtained roughness. Subsequently, the roughness and brightness abnormality of the target pin area can be combined to accurately analyze the non-coplanar characteristics of the target pin area and reduce the interference of oxidation on the analysis process.

[0092] Preferably, in one embodiment of the present invention, the method for obtaining the roughness of the target pin area specifically includes:

[0093] The light intensity of the light source is taken as the numerator, the reduced brightness characteristic value of the target pin area is taken as the denominator, and the ratio is taken as the scattering degree of the target pin area. The greater the scattering degree, the rougher the target pin area is and the more likely it is that oxidation exists.

[0094] At the same time, the greater the information entropy of the grayscale values ​​of pixels in the target pin area, the more chaotic the distribution of the grayscale values ​​of pixels in the target pin area, and the more likely it is that oxidation will occur. Therefore, the information entropy of the grayscale values ​​of pixels in the target pin area and the reduced scattering degree of the target pin area can be combined to obtain the roughness of the target pin area, wherein the calculation of information entropy is a technical means well known to those skilled in the art and is not limited here.

[0095] In an embodiment of the present invention, the sum or product of the information entropy of the grayscale value of the pixel point in the target pin area and the reduced scattering degree of the target pin area can be used as the roughness of the target pin area to achieve a combination of the two, which is not limited here.

[0096] As an example, in one embodiment of the present invention, the expression of the roughness of the target pin area may be specifically, for example, as follows:

[0097]

[0098] in, Indicates the roughness of the target pin area; The information entropy representing the grayscale value of pixels in the target pin area; Indicates the light intensity of the light source; a reduced brightness characteristic value representing the target pin area; Indicates the degree of scattering in the target pin area.

[0099] Furthermore, the non-coplanarity significance of the target pin area can be obtained by combining the reduction of brightness abnormality and the reduction of roughness in the target pin area. The non-coplanarity significance reflects the degree to which the target pin area exhibits non-coplanar characteristics, while reducing the interference of oxidation on coplanarity detection.

[0100] Preferably, in one embodiment of the present invention, the method for obtaining the non-coplanar significance of the target pin area specifically includes:

[0101] The reduced roughness of the target pin area is negatively correlated with the non-oxidation possibility of the target pin area, and the greater the non-oxidation possibility, the smaller the possibility of oxidation in the target pin area. At the same time, if the abnormal degree of reduced brightness of the target pin area is greater, it means that the target pin area is more likely to show non-coplanar image characteristics. Therefore, the abnormal degree of reduced brightness and the reduced non-oxidation possibility of the target pin area can be combined and normalized to obtain the non-coplanar significance of the target pin area.

[0102] In the embodiment of the present invention, the combination of the two can be achieved by calculating the sum or product of the reduction in brightness abnormality and the reduction in non-oxidation possibility in the target pin area, which is not limited here.

[0103] As an example, in one embodiment of the present invention, the expression of the non-coplanar significance of the target pin area can be specifically, for example, as follows:

[0104]

[0105] in, Indicates the non-coplanarity significance of the target pin area; Indicates the abnormal brightness level of the target pin area; Indicates the roughness of the target pin area; Indicates the non-oxidation potential of the target pin area; Represents the normalization function, which is used for normalization processing; Indicates the preset first adjustment parameter, which is used to prevent the denominator from being 0. The value range is In one embodiment of the present invention, Set to 0.01, The specific value of can also be set by the implementer according to the specific implementation scenario and is not limited here.

[0106] The non-coplanarity saliency of each pin region in the target grayscale image and the non-coplanarity saliency of each pin region in the grayscale image at each optimal illumination angle can be obtained by the same method as above.

[0107] Step S4: Based on the correlation between the reduced brightness characteristic value of the same pin area in the grayscale images of different optimal illumination angles and each optimal illumination angle, and the reduced non-coplanarity significance of the same pin area in the grayscale images of each optimal illumination angle, the possibility of non-coplanarity of each pin of the integrated circuit chip is obtained.

[0108] The above process is only analyzed under a single illumination angle. When the degree of oxidation in the pin area is low, when the coplanarity detection of the pin is performed directly through the non-coplanar significance obtained above, the pin with a low degree of oxidation will still be mistaken as a non-coplanar pin, resulting in a deviation in the detection result. Compared with the pin with oxidation, the correlation between the brightness characteristic value of the pin area in the grayscale image of a non-coplanar pin of the integrated circuit chip at different optimal illumination angles and the change of the optimal illumination angle is weaker. Therefore, the correlation between the reduced brightness characteristic value of the same pin area in the grayscale image of different optimal illumination angles and each optimal illumination angle can be further analyzed. At the same time, combined with the reduced non-coplanar significance of the same pin area in the grayscale image of each optimal illumination angle, the non-coplanarity possibility of each pin of the integrated circuit chip is obtained. The non-coplanarity possibility reflects the possibility of non-coplanarity for each pin of the integrated circuit chip, further reducing the interference of oxidation on the pin coplanarity detection, and improving the accuracy of subsequent coplanarity detection of the integrated chip pins.

[0109] Preferably, in one embodiment of the present invention, the method for obtaining the non-coplanarity possibility of each pin of the integrated circuit chip specifically includes:

[0110] First, a sequence formed by sorting all the best illumination angles is used as the best illumination angle sequence. In an embodiment of the present invention, the best illumination angles can be sorted in a manner of small to large or from large to small, which is not limited here. According to the arrangement order of each best illumination angle in the sequence of reduced best illumination angles, a sequence formed by sorting the reduced brightness characteristic values ​​of the same pin area in the grayscale images of all the best illumination angles is used as the brightness characteristic value sequence of each pin of the integrated circuit chip. For example, if each best illumination angle is arranged in a manner of small to large, then the reduced brightness characteristic values ​​of the same pin area in the grayscale images of all the best illumination angles are also arranged in a manner of small to large according to each best illumination angle, thereby obtaining the brightness characteristic value sequence of each pin of the integrated circuit chip, wherein the same pin area in the grayscale images of all the best illumination angles represents the same pin of the integrated circuit chip.

[0111] Then, the absolute value of the Pearson correlation coefficient between the sequence of reducing the optimal illumination angle and the sequence of reducing the brightness characteristic value of each pin of the integrated circuit chip is negatively correlated to obtain the first non-coplanarity degree of each pin of the integrated circuit chip. The larger the first non-coplanarity degree of a pin, the more likely it is that the pin has a non-coplanarity phenomenon.

[0112] At the same time, the greater the reduced non-coplanarity significance of the pin area of ​​a certain pin of the integrated circuit chip in the grayscale images of each optimal illumination angle, the more likely the pin is to be non-coplanar. Therefore, the average value of the reduced non-coplanarity significance of the same pin area in the grayscale images of all optimal illumination angles is taken as the second non-coplanarity degree of each pin of the integrated circuit chip.

[0113] Then, the reduction of the first non-coplanarity degree and the reduction of the second non-coplanarity degree can be combined and normalized, and the calculation result can be limited to range, thereby obtaining the non-coplanarity possibility of each pin of the integrated circuit chip.

[0114] In the embodiment of the present invention, the combination of the first non-coplanarity degree and the second non-coplanarity degree can be achieved by calculating the sum or product of the two, which is not limited here.

[0115] As an example, in one embodiment of the present invention, the expression for the non-coplanarity possibility of each pin of the integrated circuit chip can be specifically, for example, as follows:

[0116]

[0117] in, Indicates the number of integrated circuit chips Possibility of non-coplanarity of the pins; Indicates the optimal illumination angle sequence and the first Pearson correlation coefficient between the sequences of reduced brightness eigenvalues ​​of the pins; Indicates the number of integrated circuit chips The first non-coplanarity degree of the pins; Indicates The first grayscale image of the best illumination angle Reduce the non-coplanarity significance of the pin area; The number indicating the optimal lighting angle; Indicates the number of integrated circuit chips The second non-coplanarity degree of the pins; Represents the normalization function, which is used for normalization processing; Indicates the preset second adjustment parameter, which is used to prevent the denominator from being 0. The value range is In one embodiment of the present invention, Set to 0.01, The specific value of can also be set by the implementer according to the specific implementation scenario and is not limited here.

[0118] It should be noted that in other embodiments of the present invention, negative correlation mapping may be achieved through other basic mathematical operations, which will not be elaborated herein.

[0119] At this point, the non-coplanarity possibility of each pin of the integrated circuit chip is obtained, and subsequently all non-coplanar pins can be detected and identified based on the non-coplanarity possibility, thereby realizing the detection of pin coplanarity.

[0120] Step S5: Based on reducing the possibility of non-coplanarity, the non-coplanar pins of the integrated circuit chip are detected.

[0121] The non-coplanarity possibility of each pin obtained above eliminates the interference of oxidation phenomenon. The greater the non-coplanarity possibility of a pin of an integrated circuit chip, the more likely the pin is a non-coplanar pin. Therefore, based on reducing the non-coplanarity possibility, the non-coplanar pins of the integrated circuit chip can be detected to avoid mistaking pins with oxidation phenomenon as non-coplanar pins, thereby improving the accuracy of coplanarity detection of integrated circuit chip pins.

[0122] Preferably, in one embodiment of the present invention, the method for detecting non-coplanar pins of an integrated circuit chip specifically includes:

[0123] Pins with reduced non-coplanarity probability greater than a preset probability threshold are used as non-coplanar pins of the integrated circuit chip, wherein the preset probability threshold is set to 0.8. The preset probability threshold can also be set by the implementer according to the specific implementation scenario and is not limited here.

[0124] An embodiment of the present invention provides a pin coplanarity detection system for an integrated circuit, the system comprising a memory, a processor and a computer program, wherein the memory is used to store a corresponding computer program, the processor is used to run the corresponding computer program, and when the computer program runs in the processor, the method described in steps S1 to S5 can be implemented.

[0125] It should be noted that the sequence of the above embodiments of the present invention is only for description and does not represent the advantages and disadvantages of the embodiments. The processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0126] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

Claims

1. A method for detecting the coplanarity of pins of an integrated circuit, characterized in that: The method comprises: Obtaining grayscale images of the integrated circuit chip under different illumination angles of the light source, performing threshold segmentation on each grayscale image, and obtaining multiple pin regions of each grayscale image and a brightness characteristic value of each pin region; Filtering out a plurality of optimal illumination angles from all illumination angles according to the distribution of the grayscale values ​​of the pixels of each pin region in the grayscale image at each illumination angle and the brightness characteristic value of each pin region; Take any grayscale image of the best illumination angle as the target grayscale image, take any pin area in the target grayscale image as the target pin area, select the symmetrical pin area of ​​the target pin area from the target grayscale image, and obtain the brightness abnormality of the target pin area according to the difference in the brightness characteristic value between the target pin area and the symmetrical pin area; obtain the roughness of the target pin area according to the distribution of the grayscale values ​​of the pixels in the target pin area, the brightness characteristic value of the target pin area and the illumination intensity of the light source; obtain the non-coplanar significance of the target pin area according to the brightness abnormality and the roughness of the target pin area; Obtaining the non-coplanarity possibility of each pin of the integrated circuit chip according to the correlation between the brightness characteristic value of the same pin area in the grayscale images of different optimal illumination angles and each optimal illumination angle, and the non-coplanarity significance of the same pin area in the grayscale images of each optimal illumination angle; Based on the non-coplanar possibility, detecting non-coplanar pins of the integrated circuit chip; The obtaining of the roughness of the target pin area comprises: The illumination intensity of the light source is used as the numerator, the brightness characteristic value of the target pin area is used as the denominator, and the ratio is used as the scattering degree of the target pin area; The information entropy of the grayscale value of the pixel in the target pin area and the scattering degree of the target pin area are integrated to obtain the roughness of the target pin area; The obtaining of the non-coplanar significance of the target pin area comprises: Performing negative correlation mapping on the roughness of the target pin area to obtain the non-oxidation possibility of the target pin area; The brightness abnormality degree and the non-oxidation possibility of the target pin area are integrated and normalized to obtain the non-coplanar significance of the target pin area; The possibility of obtaining non-coplanarity of each pin of the integrated circuit chip includes: The sequence formed by sorting all the best illumination angles is used as the best illumination angle sequence; the sequence formed by sorting the brightness characteristic values ​​of the same pin area in the grayscale images of all the best illumination angles according to the arrangement order of the best illumination angles in the best illumination angle sequence is used as the brightness characteristic value sequence of each pin of the integrated circuit chip; Performing negative correlation mapping on the absolute value of the Pearson correlation coefficient between the optimal illumination angle sequence and the brightness characteristic value sequence of each pin of the integrated circuit chip to obtain a first non-coplanarity degree of each pin of the integrated circuit chip; The average value of the non-coplanar significance of the same pin area in the grayscale images of all the best illumination angles is used as the second non-coplanar degree of each pin of the integrated circuit chip; The first non-coplanarity degree and the second non-coplanarity degree are integrated and normalized to obtain the non-coplanarity possibility of each pin of the integrated circuit chip.

2. The method for detecting the coplanarity of pins of an integrated circuit according to claim 1, characterized in that: The step of selecting a plurality of optimal illumination angles from all illumination angles comprises: Taking any illumination angle as the illumination angle to be measured, analyzing the discrete degree of the grayscale value of the pixel point of each pin area in the grayscale image of the illumination angle to be measured, and obtaining the brightness disorder of each pin area in the grayscale image of the illumination angle to be measured; Any pin area in the grayscale image of the illumination angle to be measured is taken as the pin area to be measured, and the absolute value of the difference in brightness disorder between the pin area to be measured and each adjacent pin area is taken as the brightness distribution difference value between the pin area to be measured and each adjacent pin area; the average value of the brightness distribution difference values ​​between the pin area to be measured and all adjacent pin areas is taken as the overall distribution difference value of the pin area to be measured; The overall distribution difference value and the brightness disorder of the pin area to be tested are integrated and negatively correlated to obtain the imaging quality coefficient of the pin area to be tested; the imaging quality coefficient and the brightness characteristic value of the pin area to be tested are integrated to obtain the imaging quality evaluation value of the pin area to be tested; Normalizing the average of the imaging quality evaluation values ​​of all pin regions in the grayscale image of the illumination angle to be measured to obtain an imaging quality index of the illumination angle to be measured; The illumination angle whose imaging quality index is greater than a preset index threshold is taken as a candidate illumination angle, and the longest continuous plurality of candidate illumination angles is taken as the optimal illumination angle.

3. The method for detecting the coplanarity of pins of an integrated circuit according to claim 1, characterized in that: The step of selecting the symmetric pin area of ​​the target pin area includes: In the target grayscale image, a symmetric pin area of ​​the target pin area is selected from other pin areas except the target pin area, and the distance from the center of the symmetric pin area to the center of the integrated circuit chip is equal to the distance from the center of the target pin area to the center of the integrated circuit chip.

4. The method for detecting the coplanarity of pins of an integrated circuit according to claim 1, characterized in that: The step of obtaining the brightness abnormality of the target pin area includes: Among the multiple symmetrical pin regions of the target pin region, a symmetrical pin region on the same side as the target pin region is used as the symmetrical pin region on the same side of the target pin region; A symmetrical pin region in the same row as the target pin region is used as the first pin region in the same row of the target pin region; a symmetrical pin region in the same row as the symmetrical pin region on the same side is used as the second pin region in the same row of the symmetrical pin region on the same side; The absolute value of the difference between the brightness characteristic values ​​of the target pin region and the symmetrical pin region on the same side is used as the first brightness abnormal value of the target pin region; The brightness characteristic value of the target pin area is used as the numerator, the brightness characteristic value of the first pin area in the same row of the target pin area is used as the denominator, and the ratio is used as the first brightness ratio value between the target pin area and the first pin area in the same row; the brightness characteristic value of the pin area symmetrical on the same side of the target pin area is used as the numerator, the brightness characteristic value of the pin area symmetrical on the same side of the second pin area in the same row of the target pin area is used as the denominator, and the ratio is used as the second brightness ratio value between the pin area symmetrical on the same side and the second pin area in the same row; the absolute value of the difference between the first brightness ratio value and the second brightness ratio value is used as the second brightness abnormal value of the target pin area; The first abnormal brightness value and the second abnormal brightness value are combined to obtain the abnormal brightness degree of the target pin area.

5. The method for detecting the coplanarity of pins of an integrated circuit according to claim 1, characterized in that: The detecting of the non-coplanar pins of the integrated circuit chip comprises: The pins whose non-coplanarity probability is greater than a preset probability threshold are used as non-coplanar pins of the integrated circuit chip.

6. The method for detecting the coplanarity of pins of an integrated circuit according to claim 1, characterized in that: The step of obtaining a plurality of pin regions of each grayscale image and a brightness characteristic value of each pin region comprises: Input each grayscale image into the Otsu threshold segmentation algorithm to obtain the optimal segmentation threshold for each grayscale image; In each grayscale image, a connected domain formed by pixels whose grayscale values ​​are greater than the optimal segmentation threshold is taken as a pin region; The average grayscale value of all pixels in each pin area in the grayscale image is taken as the brightness feature value of each pin area.

7. A pin coplanarity detection system for an integrated circuit, the system comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

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