Method and device for detecting defects of substrate

Abstract

The invention relates to a method and a device for detecting substrate defects. The method for detecting the substrate defects comprises the following steps: providing a substrate to be detected, wherein the substrate to be detected comprises a top surface and a bottom surface which are oppositely distributed along a first direction; forming a plurality of test structures arranged at intervals along a second direction, each test structure comprising PN junctions located in the to-be-tested substrate, and the PN junctions in at least two test structures having different junction depths; acquiring a plurality of reverse bias leakage currents corresponding to the plurality of test structures respectively; and judging whether at least one reverse bias leakage current of which the order of magnitude is higher than the order of magnitude of other reverse bias leakage currents exists in the plurality of reverse bias leakage currents, and if so, determining that defects exist in the substrate to be detected. According to the invention, the operation of defect detection in the to-be-detected substrate is simplified, the to-be-detected substrate is prevented from being damaged, and the defect detection efficiency is effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a method and device for detecting substrate defects. Background Art

[0002] Currently, the semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs, each with smaller and more complex circuits than the previous generation. In the course of IC development, functional density (i.e., the number of interconnected devices per chip area) has generally increased, while geometry size (i.e., the smallest component that can be produced using a manufacturing process) has decreased. In addition to IC components becoming smaller and more complex, the wafers on which ICs are manufactured have become larger and larger, which places increasingly higher demands on the quality of the wafers.

[0003] The current method for detecting the position of defects such as dislocations inside substrate wafers is mainly physical destruction. However, the physical destruction method requires the introduction of masks and physical destruction steps, which is not only time-consuming and labor-intensive, but also requires damage to the substrate, resulting in an increase in the production cost of semiconductor structures and a decrease in production efficiency.

[0004] Therefore, how to accurately determine whether there are defects inside the substrate and the specific location of the defects, while avoiding damage to the substrate, so as to reduce the production cost of the semiconductor structure and improve the production efficiency of the semiconductor structure, is a technical problem that needs to be solved urgently. Summary of the invention

[0005] The present invention provides a method and device for detecting substrate defects, which are used to determine whether there are defects inside the substrate while avoiding damage to the substrate, and can determine the position of the defects in the substrate, thereby reducing the production cost of semiconductor structures and improving the production efficiency of semiconductor structures.

[0006] According to some embodiments, the present invention provides a method for detecting substrate defects, comprising the following steps:

[0007] Providing a substrate to be tested, wherein the substrate to be tested includes a top surface and a bottom surface that are relatively distributed along a first direction;

[0008] Forming a plurality of test structures spaced apart along a second direction, each of the test structures comprising a PN junction located in the substrate to be tested, and the junction depths of the PN junctions in at least two of the test structures being different, and the second direction being parallel to the top surface of the substrate to be tested;

[0009] Acquire a plurality of reverse bias leakage currents respectively corresponding to the plurality of test structures;

[0010] It is determined whether at least one of the plurality of reverse bias leakage currents has a higher order of magnitude than the other reverse bias leakage currents. If so, it is confirmed that there is a defect in the substrate to be tested.

[0011] In some embodiments, the specific steps of forming a plurality of test structures spaced apart along the second direction include:

[0012] defining a plurality of test areas arranged at intervals along the second direction in the substrate to be tested;

[0013] A first doping region and a second doping region located within the first doping region are formed in each of the test regions respectively, the doping depth of the second doping region is less than the doping depth of the first doping region, the first doping region includes first doping ions, the second doping region includes second doping ions, and the conductivity type of the first doping ions is opposite to the conductivity type of the second doping ions.

[0014] In some embodiments, before forming the first doping region in each of the test regions and the second doping region in the first doping region, the following steps are also included:

[0015] An isolation structure is formed in the substrate to be tested and is located between adjacent test areas.

[0016] In some embodiments, the difference between the junction depths of the PN junctions in any two adjacent test regions is equal; and / or the difference between the junction depths of the PN junctions in any two adjacent test regions is unequal.

[0017] In some embodiments, the specific steps of forming a first doping region and a second doping region located within each of the test regions include:

[0018] Implanting the first doping ions into the plurality of test regions respectively, and forming a plurality of the first doping regions with the same depth in the plurality of test regions respectively;

[0019] The second doping ions are respectively implanted into the plurality of test regions to form a plurality of second doping regions with different depths in the test regions.

[0020] In some embodiments, the specific steps of forming a first doping region and a second doping region located within each of the test regions include:

[0021] Implanting the first doping ions into the plurality of test regions respectively, and forming a plurality of the first doping regions with different depths in the plurality of test regions respectively;

[0022] The second doping ions are respectively implanted into the plurality of test regions to form a plurality of second doping regions with different depths in the test regions, so that the junction depths of the PN junctions in the plurality of test regions are different.

[0023] In some embodiments, the widths of the first doped regions in the plurality of test regions along the second direction are the same; and / or the widths of the second doped regions in the plurality of test regions along the second direction are the same.

[0024] In some embodiments, the specific steps of obtaining a plurality of reverse bias leakage currents respectively corresponding to the plurality of test structures include:

[0025] Forming a first lead-out structure electrically connected to the first doped region and a second lead-out structure electrically connected to the second doped region on the substrate to be tested;

[0026] A test signal is transmitted to the PN junction through the first lead-out structure and the second lead-out structure, and the reverse bias leakage current corresponding to the PN junction is obtained.

[0027] In some embodiments, determining whether there is at least one reverse bias leakage current among the plurality of reverse bias leakage currents whose order of magnitude is higher than that of the other reverse bias leakage currents, and if so, confirming that there is a defect in the substrate to be tested further comprises:

[0028] It is determined whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents. If so, it is confirmed that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current of higher magnitude.

[0029] In some embodiments, the substrate to be tested is a silicon substrate; and determining whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents, and if so, confirming that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a higher magnitude further comprises:

[0030] Determine whether the reverse bias leakage current with a lower magnitude among the two reverse bias leakage currents with different magnitudes is within a threshold range. If not, confirm that there is also a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a lower magnitude, and the threshold range is a picoampere range.

[0031] According to some other embodiments, the present invention further provides an apparatus for detecting substrate defects, comprising:

[0032] A carrying structure, used for carrying a substrate to be tested, wherein the substrate to be tested comprises a top surface and a bottom surface relatively distributed along a first direction, wherein the substrate to be tested has a plurality of test structures arranged at intervals along a second direction, wherein each of the test structures comprises a PN junction located in the substrate to be tested, and the junction depths of the PN junctions in at least two of the test structures are different, and the second direction is parallel to the top surface of the substrate to be tested;

[0033] The detection structure includes a detector and a processor electrically connected to the detector, wherein the detector is used to obtain multiple reverse bias leakage currents corresponding to the multiple test structures respectively, and the processor is used to determine whether there is at least one reverse bias leakage current among the multiple reverse bias leakage currents whose order of magnitude is higher than the order of magnitude of the other reverse bias leakage currents. If so, it is confirmed that there are defects in the substrate to be tested.

[0034] In some embodiments, the substrate to be tested is a silicon substrate; the processor is used to determine whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents, and if so, confirm that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a higher magnitude;

[0035] The processor is also used to determine whether the reverse bias leakage current with a lower magnitude among the two reverse bias leakage currents with different magnitudes is within a threshold range. If not, it is confirmed that there is also a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a lower magnitude, and the threshold range is a picoampere range.

[0036] The method and device for detecting substrate defects provided by the present invention provide multiple test structures arranged at intervals in the substrate to be tested, wherein the multiple test structures include PN junctions located in the substrate to be tested, and the junction depths of the PN junctions in at least two of the test structures are different, and whether there is a defect in the substrate to be tested can be judged according to whether the magnitude of the reverse bias leakage current of the PN junctions with different junction depths has a transition of an order of magnitude, without physically destroying the substrate to be tested, which not only simplifies the operation of defect detection in the substrate to be tested, but also avoids damage to the substrate to be tested, and effectively improves the efficiency of defect detection. In addition, the present invention can also locate the position of the defect in the substrate to be tested according to the junction depth position corresponding to the reverse bias leakage current with a transition of an order of magnitude, thereby further improving the accuracy and reliability of defect detection in the substrate to be tested. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 is a flow chart of a method for detecting substrate defects in a specific embodiment of the present invention;

[0038] Figure 2 is a schematic cross-sectional view of a substrate to be tested in a specific embodiment of the present invention;

[0039] Figure 3 is a cross-sectional schematic diagram after a plurality of test structures are formed in a substrate to be tested in a specific embodiment of the present invention;

[0040] Figure 4 It is a top view schematic diagram of a test structure in a specific implementation manner of the present invention. DETAILED DESCRIPTION

[0041] The specific implementation of the method and device for detecting substrate defects provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0042] This specific embodiment provides a method for detecting substrate defects. Figure 1 FIG. 1 is a flow chart of a method for detecting substrate defects in a specific embodiment of the present invention. Figure 1 As shown, the method for detecting substrate defects comprises the following steps:

[0043] Step S11, providing a substrate to be tested, wherein the substrate to be tested includes a top surface and a bottom surface that are relatively distributed along a first direction;

[0044] Step S12, forming a plurality of test structures spaced apart along a second direction, each of the test structures comprising a PN junction located in the substrate to be tested, and at least two of the test structures have different junction depths of the PN junctions, and the second direction is parallel to the top surface of the substrate to be tested;

[0045] Step S13, obtaining a plurality of reverse bias leakage currents corresponding to the plurality of test structures respectively;

[0046] Step S14, determining whether there is at least one reverse bias leakage current among the plurality of reverse bias leakage currents whose order of magnitude is higher than that of the other reverse bias leakage currents; if so, confirming that there is a defect in the substrate to be tested.

[0047] Figure 2 is a schematic cross-sectional view of a substrate to be tested in a specific embodiment of the present invention, Figure 3 is a cross-sectional schematic diagram after a plurality of test structures are formed in a substrate to be tested in a specific embodiment of the present invention, Figure 4 2 is a schematic top view of a test structure in a specific embodiment of the present invention. In some embodiments, the specific steps of forming a plurality of test structures 30 spaced apart along the second direction D2 include:

[0048] A plurality of test areas are defined in the substrate 20 to be tested and arranged at intervals along the second direction D2;

[0049] A first doping region 301 and a second doping region 302 located within the first doping region 301 are formed in each of the test regions, respectively. The doping depth of the second doping region 302 is less than the doping depth of the first doping region 301. The first doping region 301 includes first doping ions, and the second doping region 302 includes second doping ions. The conductivity type of the first doping ions is opposite to the conductivity type of the second doping ions.

[0050] Specifically, the substrate 20 to be tested may be, but is not limited to, a silicon substrate. This specific embodiment is described by taking the substrate 20 to be tested as a silicon substrate as an example. The substrate 20 to be tested includes a top surface 201 and a bottom surface 202 that are relatively distributed along the first direction D1. Figure 2 As shown. A plurality of test regions are first defined in the substrate 20 to be tested and arranged at intervals at least along the second direction D2, and the test regions are used to form the test structure 30. For each of the test regions, the first doping ions are first implanted into the test region from the top surface 201 of the substrate 20 to be tested, so as to form the first doping region 301 located in the substrate 20 to be tested; then, the second doping ions are implanted into the first doping region 301 from the top surface 201 of the substrate 20 to be tested, so as to form the second doping region 302 located in the first doping region 301 and having a depth less than that of the first doping region 301, as shown. Figure 3 and Figure 4 As shown, the test structure including the first doping region 301 and the second doping region 302 is formed in the test region. The contact interface between the first doping region 301 and the second doping region 302 located in the same test region is the PN junction, and the distance between the PN junction and the top surface 201 of the substrate 20 to be tested along the first direction D1 is the junction depth of the PN junction. Figure 3 Three test structures are shown in the figure, and the junction depths of the PN junctions in the three test structures (i.e., the distance between the PN junction and the top surface 201 of the substrate 20 to be tested along the first direction D1) are respectively the first distance L1, the second distance L2 and the third distance L3, and the first distance L1 is smaller than the second distance L2, and the second distance L2 is smaller than the third distance L3.

[0051] In one example, the projection of the first doping region 301 on the top surface 201 of the substrate to be tested 20 surrounds the periphery of the projection of the second doping region 302 on the top surface 201 of the substrate to be tested 20, so as to meet the requirements of the planar CMOS process. In one example, the first doping ion is a P-type ion, such as an indium ion, a gallium ion or a boron ion; the second doping ion is an N-type ion, such as a boron ion or an arsenic ion. In another example, the first doping ion is an N-type ion, and the second doping ion is a P-type ion. In order to avoid the difference in reverse bias leakage current caused by the difference in the type and doping concentration of the doping ion, thereby further improving the accuracy and reliability of the defect detection of the substrate to be tested, in one example, the type of the first doping ion and the doping concentration of the first doping ion in the first doping region 301 in the multiple test structures are the same, and the type of the second doping ion and the doping concentration of the second doping ion in the second doping region 302 in the multiple test structures are the same.

[0052] In some embodiments, before forming the first doping region 301 and the second doping region 302 located in each of the test regions, the following steps are further included:

[0053] An isolation structure is formed in the substrate 20 to be tested and is located between adjacent test regions.

[0054] Specifically, by forming the isolation structure between the test structures located in adjacent test areas in the substrate to be tested 20, crosstalk of electrical signals between adjacent test structures can be avoided, thereby further improving the accuracy of defect detection. In one example, the isolation structure includes an isolation groove extending from the top surface 201 of the substrate to be tested 20 along the first direction D1 to the inside of the substrate to be tested 20 and an insulating material layer filling the isolation groove. The insulating material layer may be made of silicon dioxide.

[0055] In some embodiments, the difference between the junction depths of the PN junctions in any two adjacent test regions is equal; and / or the difference between the junction depths of the PN junctions in any two adjacent test regions is unequal.

[0056] In one example, the difference between the junction depths of the PN junctions in any two adjacent test areas is equal, so as to simplify the formation process of the multiple test structures. In another example, the difference between the junction depths of the PN junctions in at least two of the test areas is unequal, so as to meet the needs of defect detection in a specific area and improve the flexibility of defect detection.

[0057] In some embodiments, the specific steps of forming the first doping region 301 and the second doping region 302 located in the first doping region 301 in each of the test regions include:

[0058] Implanting the first doping ions into the plurality of test regions respectively, and forming a plurality of first doping regions 301 having the same depth in the plurality of test regions respectively;

[0059] The second doping ions are implanted into the plurality of test regions respectively, so as to form a plurality of second doping regions 302 with different depths in the test regions respectively.

[0060] For example, the first doping ions may be respectively implanted into the plurality of test regions to simultaneously form a plurality of first doping regions 301 with the same depth in the plurality of test regions, so as to further simplify the formation process of the plurality of test structures. Afterwards, the second doping ions may be respectively implanted into the plurality of first doping regions 301 to form a second doping region 302 in each of the first doping regions 301, and the doping depths of the second doping regions 302 in the plurality of first doping regions 301 are different, so that the junction depths of the PN junctions in the plurality of test structures are different.

[0061] In some embodiments, the specific steps of forming the first doping region 301 and the second doping region 302 located in the first doping region 301 in each of the test regions include:

[0062] Implanting the first doping ions into the plurality of test regions respectively, and forming a plurality of first doping regions 301 with different depths in the plurality of test regions respectively;

[0063] The second doping ions are implanted into the plurality of test regions respectively, and a plurality of second doping regions 302 with different depths are formed in the test regions respectively, so that the junction depths of the PN junctions in the plurality of test regions are different.

[0064] For example, the first doping ions may be respectively implanted into the plurality of test regions to form a plurality of first doping regions 301 with different depths in the plurality of test regions, and then the second doping ions may be respectively implanted into the plurality of test regions to form a plurality of second doping regions 302 with different depths in the test regions, that is, the depths of the plurality of first doping regions 301 and the depths of the plurality of second doping regions 302 are different, such as Figure 3 As shown, it is convenient to flexibly adjust the junction depth of the PN junction in each of the test structures to improve the flexibility of defect detection.

[0065] In order to avoid affecting the result of the reverse bias leakage current detection due to the different widths of the first doping region 301 or the different widths of the second doping region 302, thereby further improving the accuracy and reliability of defect detection, in some embodiments, the widths of the first doping regions 301 in multiple test areas along the second direction are the same; and / or the widths of the second doping regions 302 in multiple test areas along the second direction are the same.

[0066] In some embodiments, the specific steps of obtaining a plurality of reverse bias leakage currents respectively corresponding to the plurality of test structures include:

[0067] Forming a first lead-out structure 41 electrically connected to the first doping region 301 and a second lead-out structure 42 electrically connected to the second doping region 302 on the substrate to be tested;

[0068] A test signal is transmitted to the PN junction through the first lead-out structure 41 and the second lead-out structure 42 , and the reverse bias leakage current corresponding to the PN junction is obtained.

[0069] Specifically, the first lead-out structure 41 and the second lead-out structure 42 are both located on the top surface 201 of the substrate 20 to be tested, and the first lead-out structure 41 is electrically connected to the first doped region 301, and the second lead-out structure 42 is electrically connected to the second doped region 302. During the test, a test signal is transmitted to the PN junction through the first lead-out structure 41 and the second lead-out structure 42, so that a reverse bias voltage is applied to the PN junction to obtain the reverse bias leakage current corresponding to the PN junction.

[0070] In some embodiments, determining whether there is at least one reverse bias leakage current among the plurality of reverse bias leakage currents whose order of magnitude is higher than that of the other reverse bias leakage currents, and if so, confirming that there is a defect in the substrate to be tested further comprises:

[0071] It is determined whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents. If so, it is confirmed that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current of higher magnitude.

[0072] For example, when there are no defects in the substrate 20 to be tested, although there are differences in the magnitude of the reverse bias leakage current at different junction depths in the substrate 20 to be tested, they should all be at the same order of magnitude. When the magnitude of the reverse bias leakage current at a junction depth has an order of magnitude transition, that is, when the order of magnitude of the reverse bias leakage current at a junction depth is higher than the order of magnitude of the reverse bias leakage current at other junction depths, it is determined that there are defects such as dislocations in the substrate 20 to be tested, because the defects will become the recombination centers of carriers, thereby causing the reverse bias leakage current to increase exponentially. At the same time, the position of the defect can be determined according to the position where the magnitude of the reverse bias leakage current has a transition, that is, the defect is located at the junction depth corresponding to the reverse bias leakage current with a higher order of magnitude. In this specific embodiment, at least one reverse bias leakage current having an order of magnitude higher than the order of magnitude of other reverse bias leakage currents means that the magnitude of at least one reverse bias leakage current is at least 1 order of magnitude higher than the magnitude of other reverse bias leakage currents. In this specific embodiment, the two reverse bias leakage currents of different orders of magnitude refer to that, for the two reverse bias leakage currents, the difference between the order of magnitude of one of the reverse bias leakage currents and the order of magnitude of the other reverse bias leakage current is at least 1, for example, the magnitude of one of the reverse bias leakage currents is at least 1 order of magnitude higher than the magnitude of the other reverse bias leakage current.

[0073] In order to more accurately and comprehensively detect the defects and the locations of the defects in the substrate 20 to be tested, in some embodiments, the substrate 20 to be tested is a silicon substrate; judging whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents, and if so, confirming that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a higher magnitude, the specific steps further include:

[0074] Determine whether the reverse bias leakage current with a lower magnitude among the two reverse bias leakage currents with different magnitudes is within a threshold range. If not, confirm that there is also a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a lower magnitude, and the threshold range is a picoampere range.

[0075] This specific embodiment also provides a device for detecting substrate defects. The device for detecting substrate defects can be used as follows: Figure 1-Figure 4 The method for detecting substrate defects shown in the figure performs defect detection on the substrate to be tested. Figure 1-Figure 4 As shown, the device for detecting substrate defects comprises:

[0076] A carrying structure, used for carrying a substrate to be tested 20, wherein the substrate to be tested 20 comprises a top surface 201 and a bottom surface 202 which are relatively distributed along a first direction D1, wherein the substrate to be tested 20 has a plurality of test structures arranged at intervals along a second direction D2, wherein each of the test structures comprises a PN junction located in the substrate to be tested 20, and the junction depths of the PN junctions in at least two of the test structures are different, and the second direction D2 is parallel to the top surface of the substrate to be tested 20;

[0077] The detection structure includes a detector and a processor electrically connected to the detector, wherein the detector is used to obtain multiple reverse bias leakage currents corresponding to the multiple test structures respectively, and the processor is used to determine whether there is at least one reverse bias leakage current among the multiple reverse bias leakage currents whose order of magnitude is higher than the order of magnitude of the other reverse bias leakage currents. If so, it is confirmed that there is a defect in the substrate 20 to be tested.

[0078] In some embodiments, the substrate 20 to be tested is a silicon substrate; the processor is used to determine whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents, and if so, confirm that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a higher magnitude;

[0079] The processor is also used to determine whether the reverse bias leakage current with a lower magnitude among the two reverse bias leakage currents with different magnitudes is within a threshold range. If not, it is confirmed that there is also a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a lower magnitude, and the threshold range is a picoampere range.

[0080] The method and device for detecting substrate defects provided in this specific embodiment are provided with multiple test structures arranged at intervals in the substrate to be tested, wherein the multiple test structures include PN junctions located in the substrate to be tested, and the junction depths of the PN junctions in at least two of the test structures are different, and whether there is a defect in the substrate to be tested can be judged based on whether the magnitude of the reverse bias leakage current of the PN junctions with different junction depths has a transition of an order of magnitude, without physically destroying the substrate to be tested, which not only simplifies the operation of defect detection in the substrate to be tested, but also avoids damage to the substrate to be tested, and effectively improves the efficiency of defect detection. In addition, this specific embodiment can also locate the position of the defect in the substrate to be tested according to the junction depth position corresponding to the reverse bias leakage current with a transition of an order of magnitude, thereby further improving the accuracy and reliability of defect detection in the substrate to be tested.

[0081] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for detecting substrate defects, characterized in that: The steps include: Providing a substrate to be tested, wherein the substrate to be tested includes a top surface and a bottom surface that are relatively distributed along a first direction; Forming a plurality of test structures spaced apart along a second direction, each of the test structures comprising a PN junction located in the substrate to be tested, and the junction depths of the PN junctions in at least two of the test structures being different, and the second direction being parallel to the top surface of the substrate to be tested; Acquire a plurality of reverse bias leakage currents respectively corresponding to the plurality of test structures; It is determined whether at least one of the plurality of reverse bias leakage currents has a higher order of magnitude than the other reverse bias leakage currents. If so, it is confirmed that there is a defect in the substrate to be tested.

2. The method for detecting substrate defects according to claim 1, characterized in that: The specific steps of forming a plurality of test structures spaced apart along the second direction include: defining a plurality of test areas arranged at intervals along the second direction in the substrate to be tested; A first doping region and a second doping region located within the first doping region are formed in each of the test regions respectively, the doping depth of the second doping region is less than the doping depth of the first doping region, the first doping region includes first doping ions, the second doping region includes second doping ions, and the conductivity type of the first doping ions is opposite to the conductivity type of the second doping ions.

3. The method for detecting substrate defects according to claim 2, characterized in that: Before forming a first doping region in each of the test regions and a second doping region located in the first doping region, the following steps are also included: An isolation structure is formed in the substrate to be tested and is located between adjacent test areas.

4. The method for detecting substrate defects according to claim 2, characterized in that: The difference between the junction depths of the PN junctions in any two adjacent test regions is equal; and / or the difference between the junction depths of the PN junctions in any two adjacent test regions is unequal.

5. The method for detecting substrate defects according to claim 2, characterized in that: The specific steps of forming a first doping region and a second doping region located in each of the test regions include: Implanting the first doping ions into the plurality of test regions respectively, and forming a plurality of the first doping regions with the same depth in the plurality of test regions respectively; The second doping ions are respectively implanted into the plurality of test regions to form a plurality of second doping regions with different depths in the test regions.

6. The method for detecting substrate defects according to claim 2, characterized in that: The specific steps of forming a first doping region and a second doping region located in each of the test regions include: Implanting the first doping ions into the plurality of test regions respectively, and forming a plurality of the first doping regions with different depths in the plurality of test regions respectively; The second doping ions are respectively implanted into the plurality of test regions to form a plurality of second doping regions with different depths in the test regions, so that the junction depths of the PN junctions in the plurality of test regions are different.

7. The method for detecting substrate defects according to claim 2, characterized in that: The widths of the first doped regions in the plurality of test regions along the second direction are the same; and / or the widths of the second doped regions in the plurality of test regions along the second direction are the same.

8. The method for detecting substrate defects according to claim 2, characterized in that: The specific steps of obtaining a plurality of reverse bias leakage currents respectively corresponding to the plurality of test structures include: Forming a first lead-out structure electrically connected to the first doped region and a second lead-out structure electrically connected to the second doped region on the substrate to be tested; A test signal is transmitted to the PN junction through the first lead-out structure and the second lead-out structure, and the reverse bias leakage current corresponding to the PN junction is obtained.

9. The method for detecting substrate defects according to claim 1, characterized in that: The specific step of determining whether there is at least one reverse bias leakage current among the plurality of reverse bias leakage currents whose order of magnitude is higher than that of the other reverse bias leakage currents, and if so, confirming that there is a defect in the substrate to be tested further includes: It is determined whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents. If so, it is confirmed that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current of higher magnitude.

10. The method for detecting substrate defects according to claim 9, characterized in that: The substrate to be tested is a silicon substrate; determining whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents, and if so, confirming that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a higher magnitude further comprises: Determine whether the reverse bias leakage current with a lower magnitude among the two reverse bias leakage currents with different magnitudes is within a threshold range. If not, confirm that there is also a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a lower magnitude, and the threshold range is a picoampere range.

11. A device for detecting substrate defects, characterized in that: include: A carrying structure, used for carrying a substrate to be tested, wherein the substrate to be tested comprises a top surface and a bottom surface relatively distributed along a first direction, wherein the substrate to be tested has a plurality of test structures arranged at intervals along a second direction, wherein each of the test structures comprises a PN junction located in the substrate to be tested, and the junction depths of the PN junctions in at least two of the test structures are different, and the second direction is parallel to the top surface of the substrate to be tested; The detection structure includes a detector and a processor electrically connected to the detector, wherein the detector is used to obtain multiple reverse bias leakage currents corresponding to the multiple test structures respectively, and the processor is used to determine whether there is at least one reverse bias leakage current among the multiple reverse bias leakage currents whose order of magnitude is higher than the order of magnitude of the other reverse bias leakage currents. If so, it is confirmed that there are defects in the substrate to be tested.

12. The device for detecting substrate defects according to claim 11, characterized in that: The substrate to be tested is a silicon substrate; the processor is used to determine whether there are two reverse bias leakage currents of different magnitudes among the plurality of reverse bias leakage currents, and if so, confirm that there is a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a higher magnitude; The processor is also used to determine whether the reverse bias leakage current with a lower magnitude among the two reverse bias leakage currents with different magnitudes is within a threshold range. If not, it is confirmed that there is also a defect in the junction depth of the PN junction corresponding to the reverse bias leakage current with a lower magnitude, and the threshold range is a picoampere range.

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