Signal delay compensation method based on single-bus active carrier phase synchronization

Abstract

The invention discloses a signal delay compensation method based on single-bus active carrier phase synchronization, which comprises the following steps of: after carrier synchronization is completed, acquiring high-frequency circulation data in a high-frequency multiplication sampling mode, and calculating a high-frequency circulation value; the high-frequency circulation value serves as a feedback value of perturbation and observation, and increase and decrease of a delay compensation value are controlled; and obtaining a dynamic delay compensation value through disturbance iteration. Based on an existing hardware sampling circuit, high-frequency-multiplication collection of high-frequency circulation values can be achieved, then a synchronization signal delay compensation value is indirectly changed, and the circulation values after carrier synchronization are reduced. The algorithm is easy to implement, high in speed and high in precision, and can be continuously and dynamically adjusted in the operation process so as to cope with changes of hardware conditions, operation environments and working conditions of the inverter. And the control stability when the multiple inverters are connected in parallel is improved, and the high market popularization value is achieved.

Description

Technical Field

[0001] The invention relates to a signal delay compensation method based on single bus active carrier phase synchronization, belonging to the technical field of parallel synchronous compensation control of multiple inverters. Background Art

[0002] With the development of the photovoltaic industry, the increase in market demand for energy storage, the emergence of different power ranges and power scalable usage scenarios, and the increasing demand for multiple parallel inverters. When multiple inverters are connected in parallel, in order to suppress the occurrence of high-frequency circulating currents, carrier synchronization is required. The general carrier synchronization method is active carrier phase synchronization based on a single bus.

[0003] In the single-bus active carrier phase synchronization method, the delay of the synchronization signal needs to be compensated, otherwise, there will be a fixed phase difference based on the carrier synchronization, and this phase difference is equivalent to the signal delay time.

[0004] At the same time, due to differences in hardware and differences in inverter operating conditions and environments, there will be certain fluctuations in the synchronization signal compensation time, and it is impossible to collect a generalized compensation value through experimental methods.

[0005] It is clear that the synchronization signal delay changes dynamically, and under-compensation or over-compensation of the signal delay will cause the high-frequency circulating current output by the inverter to increase. Therefore, when synchronizing the carrier, the more accurate the compensation of the synchronization signal delay time, the lower the high-frequency circulating current will be. Summary of the invention

[0006] The purpose of the present invention is to solve the deficiencies of the above-mentioned prior art, and to propose a signal delay compensation method based on single-bus active carrier phase synchronization to address the problem that the synchronization signal delay compensation is subject to more interference, resulting in larger compensation errors.

[0007] In order to achieve the above object, the technical solution adopted by the present invention is:

[0008] A signal delay compensation method based on single bus active carrier phase synchronization. After carrier synchronization is completed, high-frequency circulating current data is collected by high-frequency sampling, and the high-frequency circulating current value is calculated; the high-frequency circulating current value is used as the feedback value of disturbance observation to control the increase or decrease of the delay compensation value; and the dynamic delay compensation value is obtained by disturbance iteration.

[0009] Preferably, the high-frequency circulating current value I cycle The calculation formula is:

[0010] Where n is the multiple of high frequency sampling, In is the current circulation value, and m is the number of collected samples.

[0011] Preferably, the dynamic delay compensation value

[0012] in, is the dynamic delay compensation value of the previous cycle; the feedback value T is the basic compensation value obtained by the experiment.

[0013] Preferably, the dynamic delay compensation value The calculation formula is:

[0014] in is the high-frequency circulating current value in this cycle, is the high-frequency circulating current value in the previous cycle, sgn() is the circulating current feedback value comparison function, ΔT delay is the step value of delay compensation, It is the dynamic delay compensation value of the previous cycle.

[0015] Preferably, Limiting is performed.

[0016] The beneficial effects of the present invention are mainly reflected in:

[0017] 1. Based on the existing hardware sampling circuit, high-frequency circulating current values ​​can be collected at high frequencies, thereby indirectly changing the synchronization signal delay compensation value and reducing the circulating current value after carrier synchronization.

[0018] 2. The algorithm is simple to implement, fast, and highly accurate. It will continue to adjust dynamically during operation to cope with changes in inverter hardware conditions, operating environment, and operating conditions.

[0019] 3. It increases the control stability when multiple inverters are connected in parallel, and has a higher market promotion value. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0021] Figure 1 It is a dynamic process diagram of the disturbance iteration delay compensation value in the present invention.

[0022] Figure 2 The present invention is a flowchart of a signal delay compensation method based on single bus active carrier phase synchronization.

[0023] Figure 3 It is a flowchart of the calculation process of the dynamic delay compensation value in the present invention.

[0024] Figure 4 It is a schematic diagram of the high-frequency circulation for frequency doubling sampling in the present invention.

[0025] Figure 5It is a schematic diagram of high-frequency circulating current and fundamental current in the present invention. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. It should also be noted that, for ease of description, only the parts related to the relevant inventions are shown in the accompanying drawings. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0028] The present invention provides a signal delay compensation method based on single bus active carrier phase synchronization, such as Figure 1 As shown, after the carrier synchronization is completed, the high-frequency circulating current data is collected by high-frequency sampling, and the high-frequency circulating current value is calculated; the high-frequency circulating current value is used as the feedback value of the disturbance observation to control the increase or decrease of the delay compensation value; the dynamic delay compensation value is obtained through disturbance iteration.

[0029] The method of single-bus active carrier phase synchronization belongs to the existing technology, that is, corresponding synchronization control is performed according to the carrier. During the synchronization control process, delay compensation is involved. In the traditional method, delay compensation is generally obtained through experiments to obtain a relatively generalized fixed compensation value. However, differences in working conditions and environment will produce large fluctuations and cannot meet the precise compensation requirements.

[0030] In this case, the high-frequency component of the output current is collected by high-frequency sampling, where the fundamental current and the high-frequency circulating current are Figure 5 As shown, the specific circulating current ripple on the current fundamental wave is related to the switching frequency, etc., and the dynamic change compensation synchronization signal delay time, that is, by changing the delay compensation value, dynamically disturbing the high-frequency component value in the output current, and then using the value of the high-frequency circulating current as the feedback value of the disturbance observation, to control the increase or decrease of the delay compensation value, and finally determine the most suitable delay compensation value or the suitable range of delay compensation value under this hardware condition through disturbance iteration.

[0031] In a specific embodiment, the high-frequency circulating current value I cycle The calculation formula is:

[0032] Where n is the multiple of high frequency sampling, In is the current circulation value, and m is the number of collected samples.

[0033] n represents the multiple of high frequency sampling, that is, sampling the circulating current value at n times the fundamental sampling frequency on the basis of the fundamental current. In this embodiment, the high-frequency current value is sampled by multiplying the sampling frequency of the inverter's fundamental current by 8 times, that is, n is 8.

[0034] The sampling method is to use the equal phase difference conversion method of SOC in DSP ADC sampling. The specific sampling implementation process is as follows Figure 4 As shown, there is a difference of Δt between each sampling point.

[0035] m represents the number of samples of the average value of the high-frequency circulating current calculated based on a certain delay compensation value, that is, the maximum value under each n-fold frequency sampling. After collecting the maximum value of the n-fold frequency circulating current m times, the average value is calculated as the high-frequency circulating current value under this delay compensation value.

[0036] In one embodiment, the dynamic delay compensation value

[0037] in, is the dynamic delay compensation value of the previous cycle; the feedback value T is the basic compensation value obtained by the experiment.

[0038] Specifically, the basic compensation value obtained from the experiment is added as a feedforward quantity to accelerate the convergence speed of the overall calculation.

[0039] In one embodiment, the dynamic delay compensation value The calculation formula is:

[0040] in is the high-frequency circulating current value in this cycle, is the high-frequency circulating current value in the previous cycle, sgn() is the circulating current feedback value comparison function, ΔT delay is the step value of delay compensation, It is the dynamic delay compensation value of the previous cycle.

[0041] The sign function sgn() is used as an observer to compare the circulating current feedback value, determine the increase or decrease of the delay compensation value, and increase or decrease the fixed delay compensation amount by step (ΔTdelay) based on the delay compensation value of the previous cycle.

[0042] The high-frequency circulating current value is obtained and calculated using the compensation value formula. Finally, after multiple disturbance observation iterations, the delay compensation value will stabilize within a very small range.

[0043] The calculation process of this formula is as follows Figure 3 As shown, the compensation operation is implemented based on perturbation iteration.

[0044] In a specific embodiment, Figure 2 As shown, the specific steps include:

[0045] Calculate the high-frequency circulation acquisition values ​​within this period:

[0046] Get the high-frequency circulation acquisition value in the previous cycle:

[0047] Difference of high frequency circulating current values ​​in two cycles, namely

[0048] The difference result is put into the sign function sgn() to calculate whether the result is positive or negative.

[0049] The function calculation result and the delay compensation step value ΔT delay Multiply them together to obtain the adjustment amount of the delay compensation value observed from the feedback result.

[0050] The previous delay compensation value The delay compensation value in this cycle is obtained by adding the currently obtained step value of the delay compensation, wherein the initial value can be added once in the first cycle at the beginning of the calculation.

[0051] Set the delay compensation value of this cycle Delay for one cycle.

[0052] The delay compensation value is limited to prevent abnormal output of the delay compensation value due to circulation sampling problems.

[0053] The calculated delay compensation value Output to the outside.

[0054] The embodiment of the present invention has an obvious contrast before and after the delay compensation value adjustment method is intervened and before the method is intervened. After the carrier is synchronized and before the method is intervened, the delay compensation value is obtained by simply using an experimental method for calculation. It is found that after the carrier is synchronized, the circulating current value ranges from 1.5A to 2.5A, but after the method is intervened, the circulating current value is less than 800mA under the same circumstances, so this method is obviously effective.

[0055] From the above description, it can be found that based on the existing hardware sampling circuit, high-frequency circulating current values ​​can be collected at high frequency, thereby indirectly changing the synchronization signal delay compensation value and reducing the circulating current value after carrier synchronization. The algorithm is simple to implement, fast, and highly accurate. It will continue to dynamically adjust during operation to cope with changes in inverter hardware conditions, operating environment, and working conditions. It increases the control stability when multiple inverters are connected in parallel, and has a high market promotion value.

[0056] The term "comprise" or any other similar term is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus / device that includes a list of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article, or apparatus / device.

[0057] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A signal delay compensation method based on single bus active carrier phase synchronization, characterized in that: After carrier synchronization is completed, high-frequency circulating current data is collected through high-frequency sampling, and the high-frequency circulating current value is calculated; the high-frequency circulating current value is used as the feedback value of the disturbance observation to control the increase or decrease of the delay compensation value; the dynamic delay compensation value is obtained through disturbance iteration.

2. According to claim 1, a signal delay compensation method based on single bus active carrier phase synchronization is characterized in that: High frequency circulating current value I cycle The calculation formula is: Where n is the multiple of high frequency sampling, In is the current circulation value, and m is the number of collected samples.

3. According to claim 2, a signal delay compensation method based on single bus active carrier phase synchronization is characterized in that: in, is the dynamic delay compensation value of the previous cycle; the feedback value T is the basic compensation value obtained by the experiment.

4. According to claim 2, a signal delay compensation method based on single bus active carrier phase synchronization is characterized in that: Dynamic delay compensation value The calculation formula is: in is the high-frequency circulating current value in this cycle, is the high-frequency circulating current value in the previous cycle, sgn() is the circulating current feedback value comparison function, ΔT delay is the step value of delay compensation, It is the dynamic delay compensation value of the previous cycle.

5. The signal delay compensation method based on single bus active carrier phase synchronization according to claim 4 is characterized in that: right Limiting is performed.

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