Three-level converter neutral-point voltage control and leakage current suppression method based on SVPWM (Space Vector Pulse Width Modulation)

Abstract

The invention provides a three-level converter midpoint voltage control and leakage current suppression method based on SVPWM (Space Vector Pulse Width Modulation), which comprises the following steps of: firstly, defining a basic output voltage vector of a three-level converter, and dividing a space voltage vector diagram sector; thirdly, combining the small vectors and the small vectors as well as the small vectors and the medium vectors, ensuring that the sum of midpoint currents generated by the combined vectors is zero, and forming a first constraint condition; taking a zero vector and a large vector as fixed output, introducing a combined vector, and ensuring that the action time of the introduced front and rear axle arm states is unchanged to obtain a second constraint condition; and establishing a third constraint condition according to the small vector, the neutral-point voltage unbalance degree and the active power flow direction. Unbinding and optimizing a three-phase bridge arm switch state so as to suppress leakage current; and in combination with the constraint condition and the optimization sequence, solving the vector action time, and generating a driving signal. According to the method, the neutral-point voltage can be accurately controlled, the leakage current can be effectively suppressed, the switching frequency is reduced, smooth switching is realized, and the operation performance of the converter is improved.

Description

Technical Field

[0001] The invention relates to the technical field of power electronics, and in particular to a method for controlling a midpoint voltage and suppressing a leakage current of a three-level converter based on SVPWM. Background Art

[0002] As an important power electronic converter, NPC (Neutral Point Clamped) three-level converter occupies an important position in the field of power electronic application technology, especially in NPC three-level converter technology.

[0003] Midpoint voltage control and leakage current suppression are technical difficulties of NPC three-level converters. In NPC three-level converters, the imbalance of midpoint voltage will destroy the symmetrical structure of the voltage space vector in the equilibrium state, resulting in uneven voltage stress on busbar capacitors and power devices, thereby affecting the life of capacitors and power devices, and further affecting the safe, stable and reliable operation of the converter. Especially in motor control applications, the imbalance of midpoint voltage will also affect the control characteristics of the motor. Therefore, to ensure the long-term and reliable operation of NPC three-level converters, the balance of midpoint potential must be effectively controlled. In addition, NPC three-level converters also have the problem of leakage current suppression. Non-isolated NPC three-level inverters are widely used in the field of photovoltaic power generation due to their small size, low cost and high efficiency. However, in the absence of a system transformer, the presence of photovoltaic array-to-ground capacitance will cause high-frequency common-mode voltage to act on parasitic capacitance, and form a loop through filters, parasitic capacitance and grid impedance, thereby generating high-frequency common-mode current, i.e. leakage current. High-frequency leakage current will not only increase the harmonic content of grid-connected current, causing electromagnetic interference problems, but also pose certain safety hazards.

[0004] In the traditional NPC three-level converter control method, in order to balance the midpoint voltage, a strategy of adjusting the redundant vector action time is usually adopted. Although this method can balance the midpoint voltage to a certain extent, its adjustment ability is limited and it cannot accurately control the midpoint current. In addition, the traditional SVPWM (Space Vector Pulse Width Modulation) method often requires fine partitioning and complex calculations when achieving midpoint voltage balance and leakage current suppression, resulting in a cumbersome implementation process and a large amount of calculation. In the prior art, although there are some methods that reduce low-order harmonics and leakage current by introducing a midpoint voltage balance loop or optimizing the modulation strategy, these methods can often only partially solve the problem and cannot effectively suppress leakage current while ensuring midpoint voltage balance. In addition, the implementation complexity is high and it is difficult to be widely promoted in practical applications. Summary of the invention

[0005] In view of this, it is necessary to provide a three-level converter neutral point voltage control and leakage current suppression method based on SVPWM to solve the technical difficulties of the NPC three-level converter.

[0006] In order to solve the above problems, an embodiment of the present invention provides a method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM, comprising: Based on the NPC three-level converter topology, a basic output voltage vector of the NPC three-level converter is defined, a space voltage vector diagram of the NPC three-level converter is drawn, and the space voltage vector diagram of the NPC three-level converter is divided into a plurality of sectors; wherein the basic output voltage vector includes a large vector, a medium vector, a small vector and a zero vector; Analyze the influence of the small vectors of each sector on the midpoint voltage, combine the small vectors with the small vectors, and the small vectors with the midpoint vectors to form two types of combined vectors; ensure that the sum of the midpoint currents generated by each combined vector in one cycle is zero, and obtain the first constraint condition; Taking the zero vector and the large vector as fixed output vectors, according to the volt-second balance principle, the action time of the large vector and the zero vector in each sector is calculated; when the combined vector is introduced to synthesize the space voltage vector, it is ensured that the action time of each switch state of each phase bridge arm remains unchanged before and after the introduction of the combined vector, and the second constraint condition is obtained; Based on the relationship between the variation of the small vector action time, the degree of midpoint voltage imbalance and the active power flow direction, the third constraint condition is established; Unbind the switch states of the three-phase bridge arms, sort and optimize the switch states of each phase bridge arm separately to suppress leakage current; In combination with the first constraint, the second constraint, the third constraint and the optimized switch state sequence, the action time of the basic output voltage vector in each sector is solved to generate a drive signal for the switch tube of each phase bridge arm.

[0007] Preferably, the basic output voltage vector of the NPC three-level converter is defined based on the NPC three-level converter topology structure, including: The NPC three-level converter includes a phase a bridge arm, a phase b bridge arm and a phase c bridge arm. Each phase bridge arm includes four switching tubes and a pair of clamping diodes. The four switching tubes and the pair of clamping diodes are connected to the midpoint of the upper and lower capacitors on the DC side. The voltage at the midpoint of the upper and lower capacitors on the DC side is the midpoint voltage. Each phase bridge arm has three state outputs: P, O, and N. If the first and second switches of the bridge arm are turned on at the same time, it is represented by P; if the second and third switches of the bridge arm are turned on at the same time, it is represented by O; if the third and fourth switches of the bridge arm are turned on at the same time, it is represented by N. Based on the three switching states P, O, and N of each phase bridge arm of the NPC three-level converter, 27 different switching state combinations of the three-phase bridge arms are obtained; Each switch state combination corresponds to a basic output voltage vector; where: Zero vector: The voltage vector with zero amplitude in the NPC three-level converter, represented as OOO; Small vector: voltage vector with small amplitude in NPC three-level converter, including but not limited to POO and ONN; Medium vector: a voltage vector with a magnitude between the large vector and the small vector, including but not limited to PON and OPN; Large vector: The voltage vector with the largest amplitude in the NPC three-level converter, including but not limited to PPN and PNN.

[0008] Preferably, the step of drawing a spatial voltage vector diagram of an NPC three-level converter includes: Considering the influence of midpoint voltage imbalance, the midpoint voltage imbalance λ is defined as:

[0009] In the formula, V dc1 , V dc2 and V dc They represent the upper capacitor voltage on the DC side, the lower capacitor voltage on the DC side and the total voltage respectively; The spatial voltage vector diagram is plotted for λ>0, λ=0 and λ<0.

[0010] Preferably, the step of calculating the action time of the large vector and the zero vector in each sector according to the volt-second balance principle includes: For sector I, according to the volt-second balance principle, we get:

[0011] In the formula, V r represents a space vector, T s is the switching cycle, V pnn represents the voltage corresponding to the large vector PNN, V ppn represents the voltage corresponding to the large vector PPN, V ooo represents the voltage corresponding to the zero vector OOO, t I_1 is the action time of the large vector PNN in sector I, t I_2 is the action time of the large vector PPN in sector I, t I_0 is the action time of zero vector OOO in sector I; Vα , V β They represent the voltages of the two phases in the stationary coordinate system, j is an imaginary unit; For other sectors, the same method as sector I is used to calculate the action time of large vectors and zero vectors in the sector.

[0012] Preferably, the method of ensuring that the sum of the midpoint currents generated by each combination vector in one cycle is zero, and obtaining the first constraint condition, includes: In order to maintain the balance of the midpoint voltage and ensure that the sum of the midpoint currents generated by all combination vectors in one cycle is zero, the first constraint condition is obtained as follows: the action time of each combination vector is equal.

[0013] Preferably, when the combined vector is introduced to synthesize the space voltage vector, it is ensured that the action time of each switch state of each phase bridge arm remains unchanged before and after the combined vector is introduced, and the second constraint condition is obtained, including: A combination vector is introduced into a fixed output voltage vector sequence to synthesize a space voltage vector; In order to ensure the stability of the output voltage after the combined vector is introduced, it is necessary to ensure that the P, O, and N state action time of each phase bridge arm remains unchanged before and after the combined vector is introduced. Therefore, the second constraint condition is: the action time of each switch state of each phase bridge arm remains unchanged before and after the combined vector is introduced; For sector I, the expression of the second constraint condition is:

[0014] In the formula, t 10 , t 11 , t 12 , t 13 , t 14 and t 15 They respectively represent the corresponding action times of the basic output voltage vectors OOO, PNN, PPN, PPO, PON and OPN in sector I; for other sectors, there is also a constraint relationship between the action times of the output voltage vectors as expressed in the second constraint condition.

[0015] Preferably, the third constraint condition is established based on the relationship between the variation of the small vector action time, the degree of midpoint voltage imbalance, and the active power flow direction, including: λ is used to represent the unbalance degree of the midpoint voltage. When λ>0, the upper capacitor voltage is greater than the lower capacitor voltage; when λ<0, the upper capacitor voltage is less than the lower capacitor voltage. Kpower is used to represent the flow direction of active power. Kpower>0 means that the active power flows from the DC side of the converter to the AC side. Kpower<0 means that the active power flows from the AC side of the converter to the DC side. Kpower=0 means that there is no active power flow. The small vector of the NPC three-level converter will generate midpoint current, which in turn affects the midpoint voltage. When the voltages of the upper and lower capacitors are inconsistent, the midpoint voltage is unbalanced. The voltages of the upper and lower capacitors can be adjusted by controlling the action time of the small vector to bring the midpoint voltage into a balanced state. The expression of the third constraint is:

[0016] In the formula, △ t is the variation of the small vector action time, k dc_P and k dc_I are the proportional and integral adjustment coefficients of the PI controller respectively; Sign is the flow direction of active power; s is the complex frequency variable in the Laplace transform.

[0017] Preferably, the step of unbinding the switch states of the three-phase bridge arms and individually sorting and optimizing the switch states of each phase bridge arm to suppress leakage current includes: The switch states of the three-phase bridge arms are untied, and the switch states of each phase bridge arm are sorted independently; According to the switching state action time of each phase bridge arm, the switching sequence of the switching state is optimized to reduce the number of switching times; By optimizing the switching state sequence, the vector that generates a common-mode voltage amplitude exceeding a preset threshold is avoided, thereby reducing the change rate of the common-mode voltage and suppressing the leakage current.

[0018] The SVPWM-based three-level converter midpoint voltage control and leakage current suppression method provided by the present invention has the following beneficial effects compared with the prior art: 1) The present invention introduces two types of combination vectors (small vector combined with small vector, small vector combined with medium vector), and ensures that the action time of each combination vector is equal, so as to ensure that the sum of the midpoint current generated by each combination in one cycle is zero. This design effectively maintains the balance of the midpoint voltage and avoids the problem of uneven voltage stress of busbar capacitance and power devices caused by unbalanced midpoint voltage.

[0019] 2) The present invention reduces the number of switching times and achieves smooth switching by unbinding the switch states of the three-phase bridge arms and sorting and optimizing the switch states of each phase bridge arm separately. This optimization avoids the problem of large common-mode voltage amplitude caused by switch state jump in traditional SVPWM, thereby effectively suppressing leakage current.

[0020] 3) By optimizing the output voltage vector sequence, the use of small vectors with large common-mode voltage (such as PPO, ONN, etc.) is avoided, further reducing the change rate of the common-mode voltage, thereby significantly reducing the generation of leakage current. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A flow chart of a method for controlling the midpoint voltage and suppressing the leakage current of a three-level converter based on SVPWM provided by the present invention; Figure 2 A topological structure diagram of the main circuit of the NPC three-level converter provided by the present invention; Figure 3 (a) shows the NPC three-level space vector diagram when the midpoint voltage imbalance λ is greater than zero; Figure 3 (b) shows the NPC three-level space vector diagram when the midpoint voltage imbalance λ is equal to zero; Figure 3 (c) shows the NPC three-level space vector diagram when the midpoint voltage imbalance λ is less than zero; Figure 4 (a) is the equivalent circuit diagram of the small vector PPO in sector I; Figure 4 (b) is the equivalent circuit diagram of the small vector OON in sector I; Figure 4 (c) is the equivalent circuit diagram of the small vector POO in sector I; Figure 4 (d) is the equivalent circuit diagram of the small vector ONN in sector I; Figure 4 (e) is an equivalent circuit diagram of the medium-vector PON in sector I; Figure 5 It is the action sequence when the switch states of the three-phase bridge arms in sector I are bound; Figure 6 It is the action sequence of the switch state of each phase bridge arm in sector I after unbinding; Figure 7 To optimize the action sequence of the switch state of each phase bridge arm in the rear sector I; Figure 8 (a) shows the voltage waveform of the upper and lower capacitors on the DC side when modulation strategy I is adopted; Figure 8 (b) shows the output current waveform of the NPC three-level converter when modulation strategy I is adopted; Figure 9 (a) shows the common-mode voltage waveform when modulation strategy I is adopted; FIG9( b ) is the waveform of the enlarged area in FIG9( a ); Fig.10The leakage current waveform of the converter when the modulation strategy I is adopted; Figure 11 (a) shows the voltage waveform of the upper and lower capacitors on the DC side when modulation strategy II is adopted; Figure 11 (b) shows the output current waveform of the NPC three-level converter when modulation strategy II is adopted; Figure 12 (a) shows the common-mode voltage waveform when modulation strategy II is adopted; FIG12( b ) is the waveform of the enlarged area in FIG12( a ); Fig.13 This is the converter leakage current waveform when modulation strategy II is adopted. DETAILED DESCRIPTION

[0022] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not used to limit the scope of the present invention.

[0023] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0024] The traditional SVPWM modulation strategy is difficult to take into account both the midpoint voltage balance and leakage current suppression at the same time, and the implementation process is cumbersome and requires large amounts of calculation. In the prior art, although there are some methods that reduce low-order harmonics and leakage current by introducing a midpoint voltage balance loop or optimizing the modulation strategy, these methods can only partially solve the problem and it is difficult to effectively suppress leakage current while ensuring midpoint voltage balance. In addition, the traditional method has a jump phenomenon during the switching state switching process, which leads to increased switching losses, reduced system efficiency, and difficulty in achieving smooth switching.

[0025] In view of this, the present invention provides a method for controlling the midpoint voltage and suppressing the leakage current of a three-level converter based on SVPWM, which aims to achieve accurate control of the midpoint voltage by introducing two types of combined vectors and reasonably configuring their action time. At the same time, by unbinding and optimizing the order of the switch states of the three-phase bridge arms, the number of switch switching is reduced, smooth switching is achieved, and leakage current is effectively suppressed. The following will be explained and introduced through multiple embodiments.

[0026] Figure 1 The flowchart of the method for controlling the midpoint voltage and suppressing the leakage current of the three-level converter based on SVPWM provided by the present invention is shown in FIG. Figure 1As shown, the SVPWM-based three-level converter midpoint voltage control and leakage current suppression method includes the following steps.

[0027] Step S1, based on the NPC three-level converter topology, define the basic output voltage vector of the NPC three-level converter, draw the NPC three-level converter space voltage vector diagram, and divide the NPC three-level converter space voltage vector diagram into multiple sectors; wherein the basic output voltage vector includes a large vector, a medium vector, a small vector and a zero vector.

[0028] Specifically, the method provided by the present invention is described by taking the application of a diode neutral point clamped (NPC) three-level converter in a photovoltaic storage microgrid as an example. Figure 2 This is a topological diagram of the main circuit of the NPC three-level converter provided by the present invention. Figure 2 The NPC three-level converter includes a phase a bridge arm, a phase b bridge arm and a phase c bridge arm. Each phase bridge arm contains four switching tubes and a pair of clamping diodes. The four switching tubes and the pair of clamping diodes are connected to the midpoint O1 of the upper and lower capacitors (C1 and C2) on the DC side; the voltage at the midpoint O1 of the upper and lower capacitors on the DC side is the midpoint voltage.

[0029] Each phase arm of the NPC three-level converter outputs three different voltage levels, including a positive level P, a zero level O, and a negative level N. Figure 2 In the example, each phase bridge arm has three state outputs: P, O, and N. If the first and second switch tubes of the bridge arm are turned on at the same time, it is represented by P; if the second and third switch tubes of the bridge arm are turned on at the same time, it is represented by O; if the third and fourth switch tubes of the bridge arm are turned on at the same time, it is represented by N. PV1 is the parasitic capacitance of the positive electrode of the photovoltaic panel to the ground, C PV2 is the parasitic capacitance of the negative electrode of the photovoltaic panel to the ground, C PV2 ≈C PV1 =C PV .

[0030] The inconsistency of the parameters of the upper and lower capacitors C1 and C2 will affect the midpoint voltage of the NPC three-level converter. Considering the impact of the midpoint voltage imbalance, the midpoint voltage imbalance λ is defined as:

[0031] In the formula, V dc1 , V dc2 and V dc They represent the upper capacitor voltage on the DC side, the lower capacitor voltage on the DC side and the total voltage respectively.

[0032] In this embodiment, the space voltage vector diagram is drawn when λ>0, λ=0 and λ<0. When the midpoint voltage imbalance λ is greater than zero, the NPC three-level space vector diagram is shown in Figure 3 (a). When the midpoint voltage imbalance λ is equal to zero, the NPC three-level space vector diagram is shown in Figure 3 (b). When the midpoint voltage imbalance λ is less than zero, the NPC three-level space vector diagram is shown in Figure 3 (c).

[0033] 3 (a) to 3 (c), in this embodiment, each vector diagram is divided into six sectors, each of which is an equilateral triangle, and is respectively denoted as I, II, III, IV, V and VI. In each vector diagram, there are a total of 19 basic vectors in the six sectors, corresponding to 27 switch states.

[0034] Based on the three possible switch states P, O, and N of each phase bridge arm, 27 different switch state combinations of the three-phase bridge arm are obtained, and each switch state combination corresponds to a basic output voltage vector. According to the magnitude of the vector amplitude, the basic voltage vector can be divided into zero vector, small vector, medium vector, and large vector. Among them: Zero vector: The voltage vector with zero amplitude in the NPC three-level converter, represented as OOO; Small vector: voltage vector with small amplitude in NPC three-level converter, including but not limited to POO and ONN; Medium vector: a voltage vector with a magnitude between the large vector and the small vector, including but not limited to PON and OPN; Large vector: The voltage vector with the largest amplitude in the NPC three-level converter, including but not limited to PPN and PNN.

[0035] Step S2, analyzing the influence of the small vectors of each sector on the midpoint voltage, combining the small vectors with the small vectors, and the small vectors with the midpoint vectors to form two types of combined vectors; ensuring that the sum of the midpoint currents generated by each combined vector in one cycle is zero, and obtaining the first constraint condition.

[0036] It should be noted that both the small vector and the middle vector of the NPC three-level converter will generate a midpoint current. i NP , thus affecting the balance of the midpoint voltage, as shown in Table 1. However, neither the zero vector nor the large vector will generate midpoint current and will not affect the balance of the midpoint voltage.

[0037] Table 1 Midpoint currents corresponding to the middle and small vectors in the six sectors i NP

[0038] According to the analysis of Figure 3 (a) and Figure 3 (c), when the initial values ​​of the upper and lower capacitor voltages are inconsistent (i.e., λ≠0), λ will affect the small vector and the middle vector, but will have no effect on the zero vector and the large vector. When using the SVPWM strategy, the basic output voltage vector usually contains a middle vector or a small vector. In this case, there will be a mutual influence between λ and the small vector and the middle vector, which may cause a serious imbalance in the voltages of the upper and lower capacitors, thereby damaging the capacitors. Therefore, for the case of λ≠0, it is first necessary to use the middle vector or the small vector to adjust the midpoint voltage so that λ approaches zero. Secondly, it is necessary to reasonably configure the small vector and the middle vector in the basic output voltage vector to ensure that the sum of the midpoint currents generated in one cycle is zero. This is the key to achieving active control of the midpoint voltage.

[0039] In sector I, although OOO, PPN and PNN can be used as output voltage vectors to synthesize Vr, these vectors cannot actively adjust the midpoint voltage. Therefore, it is necessary to introduce a small vector to adjust the balance of the midpoint voltage while ensuring that the sum of the midpoint currents generated by all output voltage vectors in one cycle is zero. In addition, the number of switching times of the switch tube of each phase bridge arm must also be considered. When the output voltage vector contains OOO, PNN and PPN, the switching state of the a-phase bridge arm involves O and P, which are switched at least twice; the switching state of the b-phase bridge arm involves O, N and P, which are switched at least 4 times; the switching state of the c-phase bridge arm involves O and N, which are switched at least 2 times. In order to reduce switching losses, the number of switching times of the switch tube of each phase bridge arm should be minimized. Therefore, the additional small vector or mid-vector introduced should meet the following two conditions: 1) The switching state of the a-phase bridge arm only contains O and P; 2) The switching state of the c-phase bridge arm only contains O and N.

[0040] According to the contents of the above embodiment and in combination with Table 1, the combination of small vectors or medium vectors in sector I can be configured, wherein the action time of all voltage vectors in each combination is the same, as shown in Table 2. Similarly, the combination of small vectors or medium vectors in other sectors can be configured with reference to Table 2. The combination methods in Table 2 can be divided into two categories: the first category is the combination of small vectors and medium vectors, and the second category is the combination of small vectors and small vectors. The first category can be further divided into 5 combinations, and the second category can be further divided into 4 combinations. Taking the first combination in the first category as an example, the small vector PPO can be used to actively adjust the balance of the midpoint voltage, combined with two medium vectors PON and OPN. As long as their action time is the same, it can be ensured that the sum of the midpoint currents generated in one cycle is zero, thereby maintaining the balance of the midpoint voltage.

[0041] Table 2 Two combinations of medium or small vectors in sector I

[0042] By combining two small vectors together, their effects on the midpoint current can be offset. For example, if one small vector causes the midpoint current to flow into the midpoint, and another small vector causes the midpoint current to flow out of the midpoint, then their combination can make the sum of the midpoint currents zero in one cycle, thereby maintaining the balance of the midpoint voltage.

[0043] The first type of combined vector is composed of a small vector and a middle vector. For example, in a certain sector, a small vector and two middle vectors can be selected for combination. By properly configuring their action time, the sum of the midpoint currents generated by them in one cycle is zero.

[0044] The second type of combination vector is composed of two small vectors. By selecting two small vectors with opposite effects on the midpoint current, the sum of the midpoint current generated by their combination in one cycle is zero. There are five combination methods for the first type of combination vector and four combination methods for the second type of combination vector.

[0045] In order to maintain the balance of the midpoint voltage and ensure that the sum of the midpoint currents generated by all combination vectors in one cycle is zero, the first constraint condition is: the action time of each combination vector is equal. For example, in sector I, a small vector PPO can be selected to be combined with medium vectors PON and OPN. By reasonably configuring their action time, the sum of the midpoint currents generated by them in one cycle is zero.

[0046] For sector I, when λ=0, in order to ensure that the sum of the midpoint currents generated by vectors PPO, PON and OPN is zero within one cycle, the first constraint condition is: the action time of each combination vector is equal. The expression of the first constraint condition is: t 13 = t 14 = t 15 = t com In the formula, t 13 , t 14 and t 15 They represent the corresponding action time of the basic output voltage vectors PPO, PON and OPN in sector I respectively; t com is a variable, t com ≤min( t I_0 , 0.5 t I_2). For other sectors, under the premise that the first constraint condition remains unchanged, the expression can be adaptively adjusted according to the needs.

[0047] For other sectors, the same first constraint condition is adopted to ensure that the action time of the combined vector is equal and the midpoint voltage is balanced.

[0048] By ensuring that the action time of the combined vector is equal, fluctuation of the mid-point voltage can be avoided and the mid-point voltage can be kept balanced.

[0049] Step S3, taking the zero vector and the large vector as fixed output vectors, according to the volt-second balance principle, calculating the action time of the large vector and the zero vector in each sector; when introducing the combined vector to synthesize the spatial voltage vector, ensure that the action time of each switch state of each phase bridge arm remains unchanged before and after the introduction of the combined vector, and obtain the second constraint condition.

[0050] According to the above embodiments, the midpoint voltage can be adjusted from an unbalanced state to a balanced state by adjusting the small vector. In order to maintain the balance of the midpoint voltage, it is also necessary to reasonably configure the small vector or the middle vector in the basic output voltage vector. First, a suitable basic output voltage vector can be selected according to Figure 3 (b). V r It represents the spatial voltage vector of the three-phase NPC three-level converter. According to the principle of adjacent three vectors, it can be known that in sector I, only the zero vector and two large vectors are used as the basic output voltage vectors to synthesize V r .when V r Located in sector I, according to the volt-second balance principle:

[0051] In the formula, V r represents a space vector, T s is the switching cycle, V pnn represents the voltage corresponding to the large vector PNN, V ppn represents the voltage corresponding to the large vector PPN, V ooo represents the voltage corresponding to the zero vector OOO, t I_1 is the action time of the large vector PNN in sector I, t I_2 is the action time of the large vector PPN in sector I, t I_0 is the action time of zero vector OOO in sector I; V α ,V β They represent the voltages of the two phases in the stationary coordinate system, j Is an imaginary unit.

[0052] According to the above equation, we can solve t I_0 , t I_1 and t I_2 The value of , thus obtaining the action time of the zero vector (OOO) and the two large vectors (PPN, PNN) in sector I. V r When located in other sectors, the action time of the zero vector and the large vector in the corresponding sector can be derived by similar equations.

[0053] When λ=0, it can be seen from Figure 3(b) that V PPN =0.5(V PON +V OPN ), V PPN =2V PPO Therefore, the same space vector can be synthesized using OOO, PNN, PPN, PPO, PON and OPN as new basic output voltage vectors V r , and the action time of the switch state of each phase bridge arm remains unchanged. The basic output voltage vectors in other sectors can also be configured according to the above method, as shown in Table 3.

[0054] Table 3 Basic output voltage vectors in six sectors

[0055] In sector I, when only OOO, PNN and PPN are used to synthesize V r From the above embodiment, it can be seen that the action time of the a-phase bridge arm in the O state is tI_0, the action time of the P state is tI_1+tI_2; the action time of the b-phase N state is t I_1 , the time of O state is t I_0 The duration of the P state is t I_2 ; The time of the c-phase N state is t I_1 + t I_2 , the time of O state is t I_0 When OOO, PNN, PPN, PPO, PON and OPN are used as new output voltage vectors to synthesize Vr Although the combined vector is introduced, the action time of the P, O, and N states of each phase bridge arm remains unchanged before and after the introduction. Based on this, the expression of the second constraint condition can be derived as follows:

[0056] In the formula, t 10 , t 11 , t 12 , t 13 , t 14 and t 15 They respectively represent the corresponding action times of the basic output voltage vectors OOO, PNN, PPN, PPO, PON and OPN in sector I. For other sectors, the action times of the output voltage vectors also have the same constraint relationship as above, and the second constraint condition also applies, and its expression can be adaptively adjusted according to demand.

[0057] The second constraint condition provided in this embodiment ensures the stability and consistency of the output voltage by keeping the action time of the P, O, and N states of each phase bridge arm unchanged before and after the introduction.

[0058] Step S4, establishing a third constraint condition based on the relationship between the change in the small vector action time, the degree of midpoint voltage imbalance, and the active power flow direction; When the NPC three-level converter is connected to the load or grid in AC mode, the equivalent circuit diagram of the middle vector and small vector in sector I is shown in Figure 4. When the active power is transmitted from the DC side to the AC side of the converter, the small vectors PPO and POO will cause the upper capacitor to discharge, thereby reducing the voltage of the upper capacitor. On the contrary, when the active power is transmitted from the AC side to the DC side, the small vectors PPO and POO will charge the upper capacitor, causing the voltage of the upper capacitor to rise. Therefore, the voltage of the upper capacitor can be controlled by adjusting the action time of the small vector PPO or POO. Similarly, the voltage of the lower capacitor can be controlled by adjusting the action time of the small vector ONN or OON. In the middle vector PON state, the midpoint current i NP Equal to i b , which will also affect the balance of the midpoint voltage. However, the impact on the upper and lower capacitor voltages cannot be determined based on the direction of active power flow. Therefore, when the initial voltages of the upper and lower capacitors are inconsistent, the voltages of the upper and lower capacitors can be controlled by adjusting the action time of the small vectors (PPO, POO, ONN, and OON) in sector I, so that the midpoint voltage reaches a balanced state. Similarly, other sectors can also achieve balanced control of the midpoint voltage by adjusting the action time of the small vectors.

[0059] In the embodiment of the present invention, λ is used to represent the degree of imbalance of the midpoint voltage. When λ>0, the upper capacitor voltage is greater than the lower capacitor voltage; when λ<0, the upper capacitor voltage is less than the lower capacitor voltage. Kpower is used to represent the flow direction of active power. Kpower>0 means that the active power flows from the DC side of the converter to the AC side. Kpower<0 means that the active power flows from the AC side of the converter to the DC side. Kpower=0 means that there is no active power flow. The small vector of the NPC three-level converter will generate a midpoint current, which in turn affects the midpoint voltage. When the voltages of the upper and lower capacitors are inconsistent, the midpoint voltage is unbalanced. The voltages of the upper and lower capacitors can be adjusted by controlling the action time of the small vector to bring the midpoint voltage into a balanced state.

[0060] When λ≠0, it is necessary to adjust the action time of the small vector according to the imbalance degree λ of the midpoint voltage and the direction of active power flow, so as to adjust the balance of the midpoint voltage.

[0061] Taking the small vector PPO of sector I as an example, when λ>0 and Kpower>0, the upper capacitor voltage is higher than the lower capacitor voltage, and the active power flows from the DC side to the AC side. It is necessary to increase the action time of the small vector PPO to discharge the upper capacitor and reduce the upper capacitor voltage.

[0062] When λ>0 and Kpower<0, the upper capacitor voltage is higher than the lower capacitor voltage, and the active power flows from the AC side to the DC side. It is necessary to reduce the action time of the small vector PPO to charge the upper capacitor and reduce the upper capacitor voltage.

[0063] When λ<0 and Kpower>0, the voltage of the lower capacitor is higher than that of the upper capacitor, and the active power flows from the DC side to the AC side. It is necessary to reduce the action time of the small vector PPO to discharge the lower capacitor and increase the voltage of the upper capacitor; When λ<0 and Kpower<0, the voltage of the lower capacitor is higher than that of the upper capacitor, and the active power flows from the AC side to the DC side. It is necessary to increase the action time of the small vector PPO to charge the lower capacitor and increase the voltage of the upper capacitor. Similarly, the relationship between the action time of other small vectors in Table 2 and the upper and lower capacitor voltages and the direction of active power flow is similar. A sign function Sign is defined according to the direction of active power flow, and the expression is as follows:

[0064] According to the above analysis, the change of the small vector action time △t has a certain correlation with λ and Kpower. The expression of the third constraint condition is:

[0065] In the formula, △ t is the variation of the small vector action time, k dc_P and k dc_I are the proportional and integral adjustment coefficients of the PI controller respectively; Sign is the flow direction of active power; s is the complex frequency variable in the Laplace transform.

[0066] When λ≠0, combining the expression of the first constraint condition and the expression of the third constraint condition, the expression of the small vector PPO action time can be obtained as: t 13 = t com +△ t The above formula can also be used to refer to the action time of other small vectors in Table 2 and the constraints of λ and Kpower.

[0067] For the action time of other small vectors and the constraints of λ and Kpower in Table 2, the third constraint mentioned above can also be referred to. It can be seen from the expression of the third constraint that, in theory, as long as Sign≠0, the action time of the small vector and the value of λ form a closed-loop regulation, and will eventually enter a steady state, when λ is equal to 0, and △t will also be equal to 0, which means that the action time of the combined vectors PPO, PON and OPN will also be equal. Therefore, even if the initial voltages of the upper and lower capacitors are inconsistent (that is, λ≠0), by introducing a small vector for closed-loop regulation, the midpoint voltage can be restored to balance and the sum of the midpoint currents generated by all output voltage vectors in one cycle can be ensured to be zero. The third constraint provided in this embodiment uses closed-loop regulation to make the midpoint voltage imbalance degree λ approach zero, thereby realizing active control of the midpoint voltage.

[0068] Step S5, unbinding the switch states of the three-phase bridge arms, and individually sorting and optimizing the switch states of each phase bridge arm to suppress leakage current.

[0069] Specifically, in the implementation process of traditional SVPWM, the switch states of the three-phase bridge arms are bound to each other. Therefore, the switching times of the three-phase bridge arm switches and the switching state jumps are closely related to the arrangement order of the basic output voltage vectors. In sector I, the arrangement order of the basic output voltage vectors is OOO, PNN, PPN, PPO, PON and OPN, and their corresponding action times are respectively t 10 , t 11 , t 12 , t13 , t 14 and t 15 , the action sequence of the three-phase bridge arm switch state is as follows Figure 5 As shown. Figure 5 It can be seen that in one sampling period, the switch state of the a-phase bridge arm switched 4 times; the switch state of the b-phase bridge arm switched 8 times, and there was a situation where it jumped directly from the N state to the P state; the switch state of the c-phase bridge arm switched 6 times. In addition, the switch state of the b-phase bridge arm jumped, causing its four switch tubes to switch states at the same time, increasing the risk of switch damage and failing to achieve smooth switching.

[0070] In order to reduce the number of switching times and achieve smooth switching, the switch states of the three-phase bridge arms can be unbundled. Unbundling means that the switch states of the three-phase bridge arms are processed separately, and the switch states of each phase bridge arm can be sorted and optimized independently instead of switching synchronously. This method can effectively reduce the number of unnecessary switching times, reduce switching losses, and reduce the change of common-mode voltage.

[0071] like Figure 6 As shown, according to the principle of the phase duty cycle method, the sequence of the three switching states N, O and P can be adjusted while keeping the action time (or duty cycle) of each phase bridge arm unchanged, without changing the output voltage of each phase bridge arm. By unbundling the switching states of the three-phase bridge arm and sorting the switching states of each phase bridge arm separately, the output voltage of the three-phase bridge arm will not be affected.

[0072] By individually sequencing the switching states of each phase bridge arm, the switching order of the switching states can be optimized, making the switching smoother and reducing the jump of the switching state. This can not only reduce the switching loss, but also reduce the amplitude of the common mode voltage, thereby suppressing the leakage current.

[0073] from Figure 6 It can be seen that within one sampling period, the switch state of the a-phase bridge arm switched twice, in the order of O→P→O; the switch state of the b-phase bridge arm switched four times, in the order of N→O→P→O→N, and no state jump occurred; the switch state of the c-phase bridge arm switched twice, in the order of N→O→N. Figure 5 In comparison, after the switch states of the three-phase bridge arms are untied, the number of switching times is significantly reduced, and smooth switching is achieved.

[0074] In step S5, first, the switch states of the three-phase bridge arms are untied, and the switch states of each phase bridge arm are independently sorted. Then, according to the switch state action time of each phase bridge arm, the switching order of the switch state is optimized to reduce the number of switch switching. Then, by optimizing the switch state sequence, the vector that generates a common mode voltage amplitude exceeding a preset threshold is avoided, thereby reducing the change rate of the common mode voltage and suppressing the leakage current.

[0075] For the active control of the midpoint voltage of the three-phase three-level converter, the suppression of leakage current must also be considered. Figure 2 It can be seen that the leakage current i of the positive and negative electrodes of the photovoltaic panel is PV1 、i PV2 They are:

[0076] In the formula, C PV1 Represents the parasitic capacitance of the positive electrode of the photovoltaic panel to the ground, C PV2 Represents the parasitic capacitance of the negative pole of the photovoltaic panel to the ground; V PV1 Indicates the voltage between the positive pole of the photovoltaic panel and the ground. V PV2 Indicates the voltage of the negative pole of the photovoltaic panel to the ground.

[0077] Since the parasitic capacitance is much smaller than the upper and lower bus capacitors, only high-frequency voltage signals can generate a large leakage current on them, and the high-frequency voltage signals on the upper and lower bus capacitors are very small, that is, V NO1 = V PV1 = V PV2 .use V CM represents the common mode voltage, which can be derived from the bridge arm voltage of the three-phase NPC three-level converter V CM The expression is:

[0078] In the formula, v ao , v bo and v co are the voltages of the three-phase bridge arms of the converter respectively.

[0079] Then, the expressions of the positive and negative leakage currents of the photovoltaic panels are:

[0080] In the formula, CPV Represents the parasitic capacitance of the photovoltaic panel to the ground.

[0081] From the above formula, we can see that reducing the change rate of the common mode voltage d V CM / d t The leakage current can be effectively suppressed.

[0082] Table 4 Three-phase bridge arm switch state corresponding to V CM

[0083] According to the above analysis, the common-mode voltage is closely related to the bridge arm voltage, and the bridge arm voltage is mainly affected by the modulation strategy. The common-mode voltage corresponding to each voltage vector in Figure 3 V CM As shown in Table 4, the common-mode voltage amplitude of the zero vectors PPP and NNN is the largest, followed by the small vectors PPO, ONN, NON, OPP, NNO and POP. Due to the large number of partitions in traditional SVPWM, the switching process between zones is not smooth enough, resulting in a large common-mode voltage amplitude, which is prone to generate a large leakage current, thus affecting the safety and reliability of the photovoltaic microgrid. In order to suppress the leakage current, it is usually necessary to avoid using vectors that generate a common-mode voltage amplitude exceeding a preset threshold. In this embodiment, the preset threshold refers to a pre-set common-mode voltage amplitude threshold, and the preset threshold is set to V dc / 6. Taking the first combination of the first category in Table 2 as an example, combined with Figure 6 It can be seen that the basic output voltage vector in sector I contains small vectors ONN and PPO. Figure 6 The output voltage vector sequence in is optimized, and the optimized sequence is as follows Figure 7 shown.

[0084] exist Figure 7 In the figure, the sum of the action time of the P and O states of the b-phase bridge arm is greater than the action time of the O state of the a-phase bridge arm. Therefore, when the a-phase bridge arm is in the O state, the b-phase bridge arm will not be in the N state, which means that the small vector ONN will not appear in the basic output voltage vector. At the same time, the action time of the P state of the b-phase bridge arm is less than the action time of the N state of the c-phase bridge arm. Therefore, when the b-phase bridge arm is in the P state, the c-phase bridge arm will definitely be in the N state, which means that the small vector PPO will not appear in the basic output voltage vector. In addition, the a-phase bridge arm will not appear in the N state, and the c-phase bridge arm will not appear in the P state, so the small vectors OPP, POP, NON and NNO will not appear in the basic output voltage vector. Figure 7The switching state sequence of the a-phase bridge arm is O→P→O; the switching state sequence of the b-phase bridge arm is P→O→N→O→P; the switching state sequence of the c-phase bridge arm is N→O→N. Through the above analysis, it can be seen that after optimizing the action sequence of the three-phase switch state, although some small vectors will still appear in the basic output voltage vector, they do not include small vectors PPO, OPP, POP, NON, NNO and ONN. Similarly, the action sequence of the three-phase bridge arm switch state in other sectors can also be optimized using the above method to avoid using vectors that will generate large common mode voltages. The action sequence of the three-phase bridge arm switch state in the six sectors is shown in Table 5.

[0085] Table 5 Action sequence of the three-phase bridge arm switch states in six sectors

[0086] Combining Table 4 and Table 5, we can see that Figure 7 The common-mode voltage corresponding to all basic output voltage vectors in V CM The magnitude is less than or equal to V dc / 6, can further suppress the common mode voltage. Among them, V dc Represents the total voltage on the DC side of the NPC three-level converter. Similarly, for other combinations in the first category or all combinations in the second category introduced in Table 2, similar methods can also be used to suppress leakage current.

[0087] Step S6, combining the first constraint condition, the second constraint condition, the third constraint condition and the optimized switch state sequence, solves the action time of the basic output voltage vector in each sector, and generates a drive signal for the switch tube of each phase bridge arm.

[0088] In this embodiment, when the space vector V r When it is within its sector, it can be based on Figure 7 The action sequence of the switch state of each phase bridge arm in the optimized sector I is obtained. At the same time, the action time of the basic output voltage vector (see Table 3 for details) can be calculated by combining the first constraint, the second constraint and the third constraint. For the remaining 4 combinations in the first combination mode and the 4 combinations in the second combination mode, the above method can be referred to to solve the action time of the basic output voltage vector in each sector.

[0089] According to the action time of the basic output voltage vector obtained by solving, the action time of the P, O, and N states of each phase bridge arm is calculated. According to the action time of the switch state of each phase bridge arm, the corresponding drive signal is generated to control the on and off of the switch tube. Through the optimized switch state sequence, the switching process of the switch tube is ensured to be smooth, and the switching loss and electromagnetic interference are reduced.

[0090] In summary, firstly, the zero vector (OOO) and two large vectors in each sector are used as fixed output vectors, and their action times are calculated according to the volt-second balance principle. Then, any combination vector in Table 2 is introduced to realize the active control of the midpoint voltage. Next, the three-phase bridge arm switch state is untied, and the bridge arm switch state of each phase is sorted separately, and then the sorted switch state is optimized. According to the optimized switch state sequence, combined with the three constraints, the action time of all output voltage vectors is solved, and then the drive signal of each phase bridge arm switch tube of the three-phase three-level converter is obtained.

[0091] The SVPWM-based three-level converter midpoint voltage control and leakage current suppression method provided by the present invention has the following beneficial effects compared with the prior art: 1) The present invention introduces two types of combination vectors (small vector combined with small vector, small vector combined with medium vector), and ensures that the action time of each combination vector is equal, so as to ensure that the sum of the midpoint current generated by each combination in one cycle is zero. This design effectively maintains the balance of the midpoint voltage and avoids the problem of uneven voltage stress of busbar capacitance and power devices caused by unbalanced midpoint voltage.

[0092] 2) The present invention reduces the number of switching times and achieves smooth switching by unbinding the switch states of the three-phase bridge arms and sorting and optimizing the switch states of each phase bridge arm separately. This optimization avoids the problem of large common-mode voltage amplitude caused by switch state jump in traditional SVPWM, thereby effectively suppressing leakage current.

[0093] 3) By optimizing the output voltage vector sequence, the use of small vectors with large common-mode voltage (such as PPO, ONN, etc.) is avoided, further reducing the change rate of the common-mode voltage, thereby significantly reducing the generation of leakage current.

[0094] In a preferred embodiment of the present invention, in order to fully verify the effectiveness of the proposed method, we constructed a Figure 2 The simulation model with the same system structure is shown, and two different modulation strategies are used for comparative analysis.

[0095] Modulation strategy I adopts a relatively basic scheme, that is, only the zero vector and two large vectors in the six sectors are used as the output voltage vectors, without introducing the combination vectors listed in Table 2, and also without optimizing the bridge arm switch state sequence after unbundling.

[0096] Modulation strategy II is an improvement on strategy I. It not only introduces the combination vectors in Table 2 (taking the first group as an example) to enhance the active control capability of the midpoint voltage, but also finely optimizes the switch state sequence of the bridge arm after unbinding.

[0097] In order to simulate the actual application scenario, this embodiment sets the simulation condition of the photovoltaic storage microgrid system and off-grid operation. In the main circuit, the capacitance of the upper and lower capacitors on the DC side is set to 6800uF, and the parasitic capacitance C PV2 With C PV1 The values ​​of are approximately equal, both 30nF. The output filter adopts an LCL structure, with specific parameters of L1=600uH, C=9uF, and L2=300uH. In the simulation model, the DC side is simulated by a DC voltage source to simulate the output of the photovoltaic storage device. The specific working conditions are set as follows: the photovoltaic storage module transmits power to the grid through the NPC three-level converter, the DC side output voltage is constant at 750V, the initial voltages of the upper and lower capacitors are set to 400V and 350V respectively, and the active current reference instruction is set to 30A (amplitude).

[0098] Under this condition, the modulation strategy I was first used for simulation test, and the waveforms of the upper and lower capacitor voltages, common mode voltage, leakage current and output current were plotted. As shown in Figure 8 (a), the upper and lower capacitor voltages are basically maintained near their initial values. This is mainly because the modulation strategy I does not introduce a midpoint voltage regulation mechanism, resulting in the midpoint voltage being unable to achieve effective balance, which is consistent with the theoretical analysis. Figure 8 (b) shows the output current waveform of the NPC three-level converter. The simulation results show that the amplitude of the output current is completely consistent with the reference given value.

[0099] Furthermore, Figure 9 shows the common-mode voltage waveform of the NPC three-level converter, where Figure 9 (a) is the common-mode voltage waveform when modulation strategy I is adopted, and Figure 9 (b) is the waveform of the enlarged area in Figure 9 (a). It can be observed in the figure that the common-mode voltage is ±U dc / 3 fluctuates up and down. This is because modulation strategy I does not optimize the bridge arm switch state sequence, resulting in the output voltage vector containing a small vector with a large common-mode voltage amplitude, which is consistent with theoretical analysis. Fig.10 The leakage current waveform of the NPC three-level converter is given. The figure shows that the maximum value of the leakage current is slightly greater than 0.1A, but still meets the requirements of the national standard.

[0100] Under the same working conditions, we used modulation strategy II to conduct simulation tests and presented the waveforms of upper and lower capacitor voltages, common mode voltage, leakage current, bridge arm line voltage, and output current. As shown in Figure 11 (a), the upper and lower capacitor voltages gradually stabilized at V dc / 2 (i.e. 375V), and the fluctuation amplitude is extremely small. This simulation result strongly proves that even when the initial values ​​of the capacitor voltages are inconsistent, modulation strategy II can still accurately adjust the midpoint voltage to ensure that it remains in a balanced state. Compared with Figure 8 (a), the superiority of modulation strategy II in midpoint voltage balance control is fully demonstrated.

[0101] Figure 11 (b) shows the output current waveform of the NPC three-level converter. The simulation results show that the amplitude of the output current is completely consistent with the preset reference value, which further verifies the effectiveness of modulation strategy II. In addition, Figure 12 presents the common-mode voltage waveform of the NPC three-level converter. It can be seen from the figure that the common-mode voltage only contains 0, ± U dc Compared with Figure 9, the results show that modulation strategy II is better than modulation strategy I in terms of common mode voltage suppression.

[0102] Fig.13 The leakage current waveform of the NPC three-level converter is given. The figure shows that the maximum leakage current is less than 0.1A, which fully meets the requirements of the national standard. Fig.10 In comparison, modulation strategy II also shows superior performance in leakage current suppression.

[0103] In summary, the modulation strategy II proposed in the present invention not only has excellent midpoint voltage active control capability, but also can effectively suppress leakage current while ensuring high-quality output waveform. These advantages make the modulation strategy II extremely valuable in the application of NPC three-level converters.

[0104] The above-described embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the present invention. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the attached claims.

[0105] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for controlling the midpoint voltage and suppressing the leakage current of a three-level converter based on SVPWM, characterized in that: include: Based on the NPC three-level converter topology, a basic output voltage vector of the NPC three-level converter is defined, a space voltage vector diagram of the NPC three-level converter is drawn, and the space voltage vector diagram of the NPC three-level converter is divided into a plurality of sectors; wherein the basic output voltage vector includes a large vector, a medium vector, a small vector and a zero vector; Analyze the influence of the small vectors of each sector on the midpoint voltage, combine the small vectors with the small vectors, and the small vectors with the midpoint vectors to form two types of combined vectors; ensure that the sum of the midpoint currents generated by each combined vector in one cycle is zero, and obtain the first constraint condition; Taking the zero vector and the large vector as fixed output vectors, according to the volt-second balance principle, the action time of the large vector and the zero vector in each sector is calculated; when the combined vector is introduced to synthesize the space voltage vector, it is ensured that the action time of each switch state of each phase bridge arm remains unchanged before and after the introduction of the combined vector, and the second constraint condition is obtained; Based on the relationship between the variation of the small vector action time, the degree of midpoint voltage imbalance and the active power flow direction, the third constraint condition is established; Unbind the switch states of the three-phase bridge arms, and sort and optimize the switch states of each phase bridge arm separately to suppress leakage current; In combination with the first constraint, the second constraint, the third constraint and the optimized switch state sequence, the action time of the basic output voltage vector in each sector is solved to generate a drive signal for the switch tube of each phase bridge arm.

2. The method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 1, characterized in that: The basic output voltage vector of the NPC three-level converter is defined based on the NPC three-level converter topology structure, including: The NPC three-level converter includes a phase a bridge arm, a phase b bridge arm and a phase c bridge arm. Each phase bridge arm includes four switching tubes and a pair of clamping diodes. The four switching tubes and the pair of clamping diodes are connected to the midpoint of the upper and lower capacitors on the DC side. The voltage at the midpoint of the upper and lower capacitors on the DC side is the midpoint voltage. Each phase bridge arm has three state outputs: P, O, and N. If the first and second switches of the bridge arm are turned on at the same time, it is represented by P; if the second and third switches of the bridge arm are turned on at the same time, it is represented by O; if the third and fourth switches of the bridge arm are turned on at the same time, it is represented by N. Based on the three switch states P, O, and N of each phase bridge arm, 27 different switch state combinations of the three-phase bridge arm are obtained, and each switch state combination corresponds to a basic output voltage vector; among them: Zero vector: The voltage vector with zero amplitude in the NPC three-level converter, represented as OOO; Small vector: voltage vector with small amplitude in NPC three-level converter, including but not limited to POO and ONN; Medium vector: a voltage vector with a magnitude between the large vector and the small vector, including but not limited to PON and OPN; Large vector: The voltage vector with the largest amplitude in the NPC three-level converter, including but not limited to PPN and PNN.

3. The method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 2, characterized in that: The method of drawing a spatial voltage vector diagram of an NPC three-level converter comprises: Considering the influence of midpoint voltage imbalance, the midpoint voltage imbalance λ is defined as: In the formula, V dc1 , V dc2 and V dc They represent the upper capacitor voltage on the DC side, the lower capacitor voltage on the DC side and the total voltage respectively; The spatial voltage vector diagram is plotted for λ>0, λ=0 and λ<0.

4. The method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 3, characterized in that: The calculation of the action time of the large vector and the zero vector in each sector according to the volt-second balance principle includes: For sector I, according to the volt-second balance principle, we get: In the formula, V r represents a space vector, T s is the switching cycle, V pnn represents the voltage corresponding to the large vector PNN, V ppn represents the voltage corresponding to the large vector PPN, V ooo represents the voltage corresponding to the zero vector OOO, t I_1 is the action time of the large vector PNN in sector I, t I_2 is the action time of the large vector PPN in sector I, t I_0 is the action time of zero vector OOO in sector I; V α , V β They represent the voltages of the two phases in the stationary coordinate system, j is an imaginary unit; For other sectors, the same method as sector I is used to calculate the action time of large vectors and zero vectors in the sector.

5. The method for controlling the midpoint voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 4, characterized in that: The first constraint condition is obtained by ensuring that the sum of the midpoint currents generated by each combination vector in one cycle is zero, including: In order to maintain the balance of the midpoint voltage and ensure that the sum of the midpoint currents generated by all combination vectors in one cycle is zero, the first constraint condition is obtained: the action time of each combination vector is equal.

6. The method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 5, characterized in that: When the combined vector is introduced to synthesize the space voltage vector, it is ensured that the action time of each switch state of each phase bridge arm remains unchanged before and after the combined vector is introduced, and the second constraint condition is obtained, including: A combination vector is introduced into a fixed output voltage vector sequence to synthesize a space voltage vector; In order to ensure the stability of the output voltage after the combined vector is introduced, it is necessary to ensure that the P, O, and N state action time of each phase bridge arm remains unchanged before and after the combined vector is introduced. Therefore, the second constraint condition is: the action time of each switch state of each phase bridge arm remains unchanged before and after the combined vector is introduced; For sector I, the expression of the second constraint condition is: In the formula, t 10 , t 11 , t 12 , t 13 , t 14 and t 15 They respectively represent the corresponding action times of the basic output voltage vectors OOO, PNN, PPN, PPO, PON and OPN in sector I; for other sectors, the action times of the output voltage vectors also have a constraint relationship as expressed in the second constraint condition expression.

7. The method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 6, characterized in that: The third constraint condition is established based on the relationship between the change in the time of the small vector action and the degree of midpoint voltage imbalance and the direction of active power flow, including: λ is used to represent the unbalance degree of the midpoint voltage. When λ>0, the upper capacitor voltage is greater than the lower capacitor voltage; when λ<0, the upper capacitor voltage is less than the lower capacitor voltage. Kpower is used to represent the flow direction of active power. Kpower>0 means that the active power flows from the DC side of the converter to the AC side. Kpower<0 means that the active power flows from the AC side of the converter to the DC side. Kpower=0 means that there is no active power flow. The small vector of the NPC three-level converter will generate midpoint current, which in turn affects the midpoint voltage. When the voltages of the upper and lower capacitors are inconsistent, the midpoint voltage is unbalanced. The voltages of the upper and lower capacitors can be adjusted by controlling the action time of the small vector to bring the midpoint voltage into a balanced state. The expression of the third constraint is: In the formula, △ t is the variation of the small vector action time, k dc_P and k dc_I are the proportional and integral adjustment coefficients of the PI controller respectively; Sign is the flow direction of active power; s is the complex frequency variable in the Laplace transform.

8. The method for controlling the neutral point voltage and suppressing the leakage current of a three-level converter based on SVPWM according to claim 1, characterized in that: The step of unbinding the switch states of the three-phase bridge arms and individually sorting and optimizing the switch states of each phase bridge arm to suppress leakage current includes: The switch states of the three-phase bridge arms are untied, and the switch states of each phase bridge arm are sorted independently; According to the switching state action time of each phase bridge arm, the switching sequence of the switching state is optimized to reduce the number of switching times; By optimizing the switching state sequence, the vector that generates a common-mode voltage amplitude exceeding a preset threshold is avoided, thereby reducing the change rate of the common-mode voltage and suppressing the leakage current.

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