Motor rotary transformer feedback signal delay phase acquisition method, device and equipment

By calculating the correlation values ​​of the excitation signal and the rotary change feedback signal, obtaining the delay phase calculation value and compensating, the problem of inaccurate phase of the feedback signal of the motor rotor position information is solved, and accurate delay phase acquisition and motor rotor position decoding are achieved.

CN119853548APending Publication Date: 2025-04-18CHONGQING CHANGAN AUTOMOBILE CO LTD
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Patent Information

Application Number
CN202510063327.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-15
Publication Date
2025-04-18

AI Technical Summary

Technical Problem

In the prior art, the phase of the feedback signal of the motor rotor position information is inaccurate, and the phase offset between the rotational feedback signal and the excitation signal cannot be accurately eliminated.

Method used

By obtaining the first phase value and the rotation feedback signal of the current period of the excitation signal, the calculated square value of the excitation signal and the theoretical synchronization phase of the rotation feedback signal are calculated, and the current, next compensation and previous compensation square values ​​of the phase synchronous excitation signal are obtained, the delay phase calculation value is calculated, and judgment and compensation are performed until the preset conditions are met.

Benefits of technology

Real-time dynamic and accurate acquisition of delay phase is achieved, reducing chip hardware requirements, suitable for chip applications without hard decoding, and solving the problem of inaccurate phase of feedback signal.

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Abstract

The invention discloses a motor resolver feedback signal delay phase acquisition method, device and equipment, and relates to the technical field of motor control. The method comprises the following steps: acquiring a first phase value of an excitation signal in a current period and a resolver feedback signal; obtaining a calculation square value of the excitation signal according to the resolver feedback signal; obtaining a theoretical synchronous phase of the rotary transformer feedback signal according to the first phase value, and further obtaining a current square value, a next compensation square value and a previous compensation square value of a phase synchronous excitation signal corresponding to the theoretical synchronous phase; obtaining a delay phase calculation value according to the calculation square value, the current square value, the next compensation square value and the previous compensation square value; and when the delay phase calculation value does not meet the preset condition, acquiring a first phase value of the excitation signal in the next period and a resolver feedback signal until the acquired delay phase calculation value meets the preset condition, and outputting the delay phase calculation value. According to the invention, the delay phase can be accurately obtained only by sampling the resolver excitation and feedback signals.
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Description

Technical Field

[0001] The present application relates to the field of motor control technology, and in particular to a method, device and equipment for acquiring a delayed phase of a motor resolver feedback signal. Background Art

[0002] In motor control, it is crucial to obtain the motor rotor position information. At present, the feedback Sin / Cos signal with the motor rotor position information is sensed by the rotary transformer, and then the feedback Sin / Cos signal is modulated and processed to decode the motor rotor position information. However, there is a delay phase between the feedback Sin / Cos signal and the excitation signal, including sampling delay, signal processing delay, hardware filtering delay, etc. Therefore, in order to decode the motor rotor position by using the feedback Sin / Cos signal, it is necessary to perform phase compensation on the signal.

[0003] In the related art, a method for extracting a sine and cosine envelope is provided, and the method for extracting a sine and cosine envelope includes: inputting a first sinusoidal excitation signal generated by an FPGA into a resolver after Delta-Sigma modulation to obtain a first resolver feedback signal, and determining a first delay time according to the first resolver feedback signal; repeatedly collecting multiple first delay times to determine a second delay time, and when a second sinusoidal excitation signal is generated by the FPGA, generating a first square wave signal with the same frequency and sign as the second sinusoidal excitation signal after synchronously delaying the second delay time; determining a sine and cosine envelope process signal according to the acquired second resolver feedback signal determined based on the second sinusoidal excitation signal and the square wave signal, and extracting the sine and cosine envelope according to the sine and cosine envelope process signal, so as to realize automatic compensation for the delay of the excitation signal and avoid deviation of the extracted envelope.

[0004] However, this method determines the delay time by clock counting, which is relatively more dependent on the chip clock count and is relatively fixed. It cannot more accurately take into account the errors of abnormal fluctuations caused by the generation, filtering, and interference of the resolver signal, and thus cannot accurately eliminate the phase offset between the resolver feedback signal and the excitation signal. Summary of the invention

[0005] The present application provides a method, device and equipment for obtaining the delayed phase of a motor resolver feedback signal, which can solve the technical problem of inaccurate phase of a feedback signal containing motor rotor position information existing in the prior art.

[0006] In a first aspect, the present application provides a method for obtaining a delayed phase of a motor resolver feedback signal, the method comprising:

[0007] Get the first phase value of the excitation signal in the current cycle and the resolver feedback signal;

[0008] Obtaining a calculated square value of an excitation signal according to the resolver feedback signal;

[0009] Obtaining the theoretical synchronous phase of the resolver feedback signal according to the first phase value, and then obtaining the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase;

[0010] Obtaining a delay phase calculation value according to the above-mentioned calculated square value, the current square value, the next compensation square value and the previous compensation square value;

[0011] When the delayed phase calculation value does not meet the preset condition, the first phase value of the next cycle of the excitation signal and the resolver feedback signal are obtained until the obtained delayed phase calculation value meets the preset condition and is output.

[0012] In combination with the first aspect, in one implementation, the preset condition is: the absolute value of the difference between the average value of the first N delayed phase calculation values ​​and the delayed phase calculation value is less than an error threshold; and N is an integer greater than or equal to 50.

[0013] In combination with the first aspect, in one implementation, the resolver feedback signal includes a resolver feedback sine signal and a resolver feedback cosine signal;

[0014] The calculated square value of the excitation signal is: the sum of the squares of the resolver feedback sine signal and the resolver feedback cosine signal.

[0015] In combination with the first aspect, in one implementation, obtaining a current square value, a next compensation square value, and a previous compensation square value of a phase synchronization excitation signal corresponding to a theoretical synchronization phase specifically includes:

[0016] The theoretical synchronization phase is equivalently converted to the preset phase accuracy and then rounded down, and then one is added or subtracted respectively to obtain three integer phases;

[0017] According to the preset excitation signal square table, the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the three integer phases are obtained.

[0018] In combination with the first aspect, in one implementation, converting the theoretical synchronization phase into a preset phase accuracy equivalently includes:

[0019] The above theoretical synchronization phase is converted into an angle equivalent to be in the range of [0, 2π], and then multiplied by 4096 and divided by 2π.

[0020] In combination with the first aspect, in one implementation, obtaining a theoretical synchronization phase of the resolver feedback signal according to the first phase value specifically includes:

[0021] Get the current delay phase calculation value;

[0022] The sum of the first phase value and the current delayed phase calculation value is taken as the theoretical synchronization phase; wherein the initial delayed phase calculation value is zero.

[0023] In combination with the first aspect, in one implementation, obtaining a delayed phase calculation value according to the above-mentioned calculated square value, the current square value, the next compensated square value and the previous compensated square value specifically includes:

[0024] The difference between the above-calculated square value and the current square value is A, the difference between the above-calculated square value and the next compensation square value is B, and the difference between the above-calculated square value and the previous compensation square value is C;

[0025] If B<A and B<C, the sum of the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value;

[0026] If C<B and C<A, the difference between the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value;

[0027] Otherwise, the current delay phase calculation value is used as the obtained delay phase calculation value.

[0028] In combination with the first aspect, in one implementation, obtaining the first phase value of the current cycle of the excitation signal specifically includes:

[0029] Collect the first phase of the excitation signal in this cycle;

[0030] According to the delay period, the first phase is subjected to delay compensation processing, and then an angle equivalent conversion is performed to obtain a first phase value, and the first phase value is within the range of [0, 2π].

[0031] In a second aspect, the present application provides a device for acquiring a delayed phase of a motor resolver feedback signal, the device comprising:

[0032] A first acquisition module, which is used to acquire the first phase value of the excitation signal in the current cycle and the resolver feedback signal;

[0033] A calculation module, which is used to obtain the calculated square value of the excitation signal according to the above-mentioned resolver feedback signal, and obtain the theoretical synchronous phase of the resolver feedback signal according to the first phase value, and then obtain the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase;

[0034] A second acquisition module, which is used to acquire a delayed phase calculation value according to the above-mentioned calculated square value, the current square value, the next compensation square value and the previous compensation square value;

[0035] The output module is used to obtain the first phase value of the next cycle of the excitation signal and the resolver feedback signal when the delayed phase calculation value does not meet the preset condition, until the obtained delayed phase calculation value meets the preset condition and is output.

[0036] In the third aspect, the present application provides a motor resolver feedback signal delayed phase acquisition device, the above-mentioned device includes a processor, a memory, and a motor resolver feedback signal delayed phase acquisition program stored in the above-mentioned memory and executable by the above-mentioned processor, wherein when the above-mentioned motor resolver feedback signal delayed phase acquisition program is executed by the above-mentioned processor, the steps of the motor resolver feedback signal delayed phase acquisition method as mentioned above are implemented.

[0037] The beneficial effects of the technical solution provided by this application include:

[0038] The acquisition method, device and equipment of the present application obtain the calculated square value of the excitation signal according to the obtained resolver feedback signal, obtain the theoretical synchronous phase of the resolver feedback signal according to the first phase value of the current cycle of the obtained excitation signal, and then obtain the current square value, next compensation square value and previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase, and then obtain the delayed phase calculation value according to the calculated square value, current square value, next compensation square value and previous compensation square value obtained above, and make a judgment; when the delayed phase calculation value meets the preset conditions, it is directly output for motor rotor position decoding; when the delayed phase calculation value does not meet the preset conditions, the first phase value of the next cycle of the excitation signal and the resolver feedback signal are obtained until the obtained delayed phase calculation value meets the preset conditions and is output; therefore, the delayed phase can be obtained in real time, dynamically and accurately only by sampling the resolver excitation and feedback signals, with lower requirements on chip hardware, and is suitable for chip applications without hard decoding. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 This is a flow chart of an embodiment of a method for obtaining a delayed phase of a motor resolver feedback signal of the present application;

[0040] Figure 2 This is a flow chart of another embodiment of the method for obtaining the delayed phase of the motor resolver feedback signal of the present application;

[0041] Figure 3 This is a functional module diagram of an embodiment of a device for acquiring a delayed phase of a motor resolver feedback signal of the present application;

[0042] Figure 4 Schematic diagram of the hardware structure of the motor resolver feedback signal delayed phase acquisition device involved in the embodiment of the present application. DETAILED DESCRIPTION

[0043] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0044] In a first aspect, an embodiment of the present application provides a method for acquiring a delayed phase of a motor resolver feedback signal.

[0045] In one embodiment, referring to Figure 1 , Figure 1 This is a flow chart of the first embodiment of the method for obtaining the delayed phase of the motor resolver feedback signal of the present application. Figure 1 As shown, the method for obtaining the delayed phase of the motor resolver feedback signal includes:

[0046] S1. Obtain the first phase value of the excitation signal in the current cycle and the resolver feedback signal;

[0047] S2. Obtaining the calculated square value of the excitation signal according to the resolver feedback signal;

[0048] S3. Obtain the theoretical synchronous phase of the resolver feedback signal according to the first phase value of the current cycle, and then obtain the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase;

[0049] S4. Obtain the delay phase calculation value according to the above calculated square value, the current square value, the next compensation square value and the previous compensation square value;

[0050] S5. When the delayed phase calculation value does not meet the preset condition, the first phase value of the next cycle of the excitation signal and the resolver feedback signal are obtained until the obtained delayed phase calculation value meets the preset condition and is output.

[0051] The order of the above steps S2 and S3 can be swapped.

[0052] In this embodiment, according to the obtained resolver feedback signal, the calculated square value of the excitation signal is obtained, and according to the first phase value of the current cycle of the obtained excitation signal, the theoretical synchronous phase of the resolver feedback signal is obtained, and then the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase are obtained, and then the delayed phase calculation value can be obtained according to the calculated square value, the current square value, the next compensation square value and the previous compensation square value obtained above, and a judgment is made; when the delayed phase calculation value meets the preset conditions, it is directly output for motor rotor position decoding; when the delayed phase calculation value does not meet the preset conditions, the first phase value of the next cycle of the excitation signal and the resolver feedback signal are obtained until the obtained delayed phase calculation value meets the preset conditions and is output; therefore, only by sampling the resolver excitation and feedback signals, the delayed phase can be obtained in real time, dynamically and accurately, with lower requirements on chip hardware, and is suitable for chip applications without hard decoding.

[0053] Based on the above embodiment, in this embodiment, the above preset condition is: the absolute value of the difference between the average value of the first N delayed phase calculation values ​​and the delayed phase calculation value is less than the error threshold; N is an integer greater than or equal to 50.

[0054] In this embodiment, by comparing the currently acquired delayed phase calculation value with the average value of the previous delayed phase calculation values, it is possible to effectively determine whether the delayed phase calculation is completed. In addition, in order to avoid the situation where the delayed phase calculation value is unstable due to unstable excitation signal sampling, N is an integer greater than or equal to 50.

[0055] Further, in one embodiment, the resolver feedback signal includes a resolver feedback sine signal and a resolver feedback cosine signal. The step S2 of obtaining the calculated square value of the excitation signal according to the resolver feedback signal specifically includes: calculating the square sum of the resolver feedback sine signal and the resolver feedback cosine signal.

[0056] The calculated square value of the excitation signal is: the sum of the squares of the resolver feedback sine signal and the resolver feedback cosine signal.

[0057] In this embodiment, according to the excitation signal Resolver feedback Sin signal Resolver feedback Cos signal The theoretical relationship between the three:

[0058]

[0059] The square sum of the resolver feedback Sin / Cos signal can be calculated in real time; where θ is the rotor angle, ω is the excitation frequency, and t is the time. is the sampling delay phase of the excitation signal.

[0060] Further, in one embodiment, in the above step S3, obtaining the current square value, the next compensation square value and the previous compensation square value of the phase synchronization excitation signal corresponding to the theoretical synchronization phase specifically includes:

[0061] First, the theoretical synchronization phase is equivalently converted to a preset phase accuracy and then rounded down, and then one is added or subtracted respectively to obtain three integer phases.

[0062] The rounded phase value ζ is then added by 1 and subtracted by 1, which respectively represent the dimension values ​​of adding one compensation and subtracting one compensation.

[0063] Then, according to the preset excitation signal square table, that is, Sin 2 The one-dimensional table of values ​​is used to obtain the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the three integer phases.

[0064] In this embodiment, the current square value of the phase synchronization excitation signal corresponding to the rounded phase value ζ is Sin 2 (ζ); The rounded phase value ζ plus one, the corresponding next compensation square value of the phase synchronous excitation signal is Sin 2 (ζ +1 ); The rounded phase value ζ minus one, the corresponding phase synchronization excitation signal of the previous compensation square value is Sin 2 (ζ -1 ).

[0065] Furthermore, the theoretical synchronization phase is equivalently converted to a preset phase accuracy, specifically including:

[0066] The above theoretical synchronization phase is converted into an angle equivalent to be in the range of [0, 2π], and then multiplied by 4096 and divided by 2π.

[0067] In this embodiment, since the acquired theoretical synchronization phase may exceed the range of [0, 2π], it is necessary to first perform an equivalent angle conversion on the theoretical synchronization phase so that the phase is within the range of [0, 2π], and then equivalently convert it to 4096 degrees of precision of 2π.

[0068] Further, in one embodiment, in the above step S3, obtaining the theoretical synchronization phase of the resolver feedback signal according to the first phase value specifically includes:

[0069] First, obtain the current delay phase calculation value.

[0070] Then, the sum of the first phase value and the current delayed phase calculation value is taken as the theoretical synchronous phase; wherein the initial delayed phase calculation value is zero, that is, when the first phase value of the first cycle of the excitation signal is obtained, the delayed phase calculation value at this time is zero.

[0071] In this embodiment, the theoretical value of the feedback signal in phase, that is, the theoretical synchronous phase, can be obtained by adding the real phase of the excitation signal to the delayed phase of the resolver feedback signal.

[0072] Preferably, obtaining the delay phase calculation value according to the above-mentioned calculated square value, the current square value, the next compensation square value and the previous compensation square value specifically includes:

[0073] First, the difference between the above-calculated square value and the current square value is A, the difference between the above-calculated square value and the next compensation square value is B, and the difference between the above-calculated square value and the previous compensation square value is C;

[0074] Then, compare the size relationship between A, B, and C.

[0075] If B<A and B<C, the sum of the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value;

[0076] If C<B and C<A, the difference between the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value;

[0077] Otherwise, that is, other than the above two cases, the current delayed phase calculation value is used as the obtained delayed phase calculation value.

[0078] Preferably, the preset step size is

[0079] In this embodiment, the three differences A, B, and C are compared to determine the direction of delayed phase compensation, and then the delayed phase is compensated. If B < A and B < C, it means that the real-time resolver feedback Sin / Cos square sum is close to the value after the next step compensation, so a preset step needs to be added to the current delayed phase calculation value; if C < B and C < A, it means that the real-time resolver feedback Sin / Cos square sum is close to the value after the previous step compensation, so a preset step needs to be subtracted from the current delayed phase calculation value; in this way, by compensating by stepwise approximation substitution, the accurate delayed phase can be accumulated.

[0080] Further, in one embodiment, obtaining the first phase value of the current cycle of the excitation signal specifically includes:

[0081] First, the first phase of the excitation signal in this cycle is acquired.

[0082] Then, according to the delay period, the first phase is subjected to delay compensation processing, and then an angle equivalent conversion is performed to obtain a first phase value, and the first phase value is within the range of [0, 2π].

[0083] In this embodiment, since the DSADC (Delta Sigma Analog to Digital Converter, a high-precision digital analog converter) sampling has a delay of 1.5 cycles, the first phase Φ of each cycle of the sampled excitation signal is 0 All of them need to be delayed compensated, that is, the actual phase value of the first phase point of any cycle of the excitation signal Φ = Φ 0 -1.5×2π. In addition, since the actual phase value may exceed the range of [0, 2π], it is necessary to perform an equivalent angle conversion process on the phase so that the phase output range is within the range of [0, 2π].

[0084] like Figure 2 As shown, the above acquisition method specifically includes:

[0085] A1.DSADC module samples the first phase value of the current cycle of the excitation signal and the resolver feedback Sin / Cos signal;

[0086] A2. The sum of the first phase value Φ plus the current delayed phase calculation value ψ is used as the theoretical synchronous phase ζ of the feedback signal in phase 0 , and 0 After equivalent conversion to the preset phase accuracy, the phase value ζ is rounded down to obtain the rounded phase value;

[0087] A3. Calculate the rounded phase value ζ±1 (representing the dimension value of plus one compensation and minus one compensation) to obtain three integer values ​​of ζ, ζ+1 and ζ-1, which are used as the three dimension values ​​for table lookup, and then perform table lookup to obtain the corresponding three Sin 2 Value: Sin 2 (ζ -1 )、Sin 2 (ζ) and Sin 2 (ζ +1 ), which is the square value of the phase synchronous excitation signal of the theoretical resolver feedback signal;

[0088] A4. Calculate the square sum of the resolver feedback Sin signal Sin(θ) and the resolver feedback Cos signal Cos(θ), and define:

[0089] A=Sin 2 (θ)+Cos 2 (θ)-Sin 2 (ζ)

[0090] B=Sin 2 (θ)+Cos 2 (θ)-Sin 2 (ζ +1 )

[0091] C=Sin 2 (θ)+Cos 2 (θ)-Sin 2 (ζ -1 )

[0092] A5. Determine whether B<A and B<C. If so, go to A6. Otherwise, go to A7.

[0093] A6. Using the current delay phase calculation value ψ and the preset step length The sum of is taken as the newly acquired delay phase calculation value and transferred to A10.

[0094] A7. Determine whether C<B and C<A. If so, go to A8. Otherwise, go to A9.

[0095] A8. Using the current delay phase calculation value ψ and the preset step length The difference is taken as the newly acquired delay phase calculation value and transferred to A10.

[0096] A9. Using the current delay phase calculation value as the newly obtained delay phase calculation value;

[0097] A10. Determine whether the absolute value of the difference between the newly obtained delayed phase calculation value and the average value of the previous N delayed phase calculation values ​​is less than the error threshold; if so, output the newly obtained delayed phase calculation value, otherwise, go to A11.

[0098] A11. Sample the first phase value of the next cycle of the excitation signal and the resolver feedback Sin / Cos signal, and turn to A2.

[0099] In this embodiment, when the absolute value of the difference between the newly acquired delayed phase calculation value and the average value of the previous N delayed phase calculation values ​​is determined to be less than the error threshold, the delayed phase acquisition is determined to be completed, and the calculation is stopped. The delayed phase value is directly output and used directly for phase compensation of the motor rotor angle decoding to obtain accurate angle value and angular velocity value.

[0100] Optionally, a moving average method is used to calculate a moving average of the first N delayed phases, that is, an average of the first 50 delayed phase calculation values. The initial delayed phase calculation value is set to 0, and when there are less than 50 delayed phase calculation values, 0 is used to fill the gap.

[0101] In other embodiments, the above N may also be set to 200 or 300.

[0102] The acquisition method of this embodiment is based on the first phase point of the excitation signal plus the calculated delayed phase, which is theoretically the synchronous phase of the resolver feedback signal, and the square value of the excitation signal is obtained by looking up the table, and then fed back for comparison and logical judgment with the resolver feedback signal to obtain the positive and negative phases that need to be compensated, and perform corresponding compensation until the accurate delayed phase of the resolver feedback Sin / Cos signal is obtained, which is directly used for the phase compensation of the resolver angle decoding; it is achieved by sampling the resolver excitation and feedback signals and performing logical operations at the software layer to dynamically calculate the delayed phase in real time for the phase compensation of the resolver angle decoding, thereby obtaining a more accurate motor rotor angle, so as to solve the problem of inaccurate phase of the feedback Sin / Cos signal with the motor rotor position information, and avoid errors in abnormal fluctuations caused by the generation, filtering, and other interferences of the resolver feedback signal.

[0103] In a second aspect, an embodiment of the present application also provides a device for acquiring a delayed phase of a motor resolver feedback signal.

[0104] In one embodiment, referring to Figure 3 , Figure 3 This is a functional module diagram of an embodiment of a device for acquiring a delayed phase of a motor resolver feedback signal of the present application. Figure 3 As shown, the above-mentioned motor resolver feedback signal delayed phase acquisition device includes a first acquisition module, a calculation module, a second acquisition module and an output module.

[0105] The first acquisition module is used to acquire the first phase value of the current cycle of the excitation signal and the resolver feedback signal.

[0106] The above-mentioned calculation module is used to obtain the calculated square value of the excitation signal according to the above-mentioned resolver feedback signal, and to obtain the theoretical synchronous phase of the resolver feedback signal according to the first phase value, and then to obtain the current square value, the next compensation square value and the previous compensation square value of the phase-synchronous excitation signal corresponding to the theoretical synchronous phase.

[0107] The second acquisition module is used to acquire the delay phase calculation value according to the calculated square value, the current square value, the next compensation square value and the previous compensation square value.

[0108] The output module is used to obtain the first phase value of the next cycle of the excitation signal and the resolver feedback signal when the delayed phase calculation value does not meet the preset condition, until the obtained delayed phase calculation value meets the preset condition and is output.

[0109] Furthermore, in one embodiment, the motor resolver feedback signal delayed phase acquisition device further includes a judgment module, which is used to judge whether the acquired delayed phase calculation value meets a preset condition, and to set a preset condition. The preset condition is: the absolute value of the difference between the average value of the first N delayed phase calculation values ​​and the delayed phase calculation value is less than the error threshold; N is an integer greater than or equal to 50.

[0110] Furthermore, in one embodiment, the calculation module is used to:

[0111] The square sum of the resolver feedback sine signal and the resolver feedback cosine signal is calculated as the calculated square value of the excitation signal.

[0112] Furthermore, in one embodiment, the calculation module is also used for:

[0113] The theoretical synchronization phase is equivalently converted to the preset phase accuracy and then rounded down, and then one is added or subtracted respectively to obtain three integer phases;

[0114] According to the preset excitation signal square table, the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the three integer phases are obtained.

[0115] Furthermore, in one embodiment, the calculation module is also used for:

[0116] The above theoretical synchronization phase is converted into an angle equivalent to be in the range of [0, 2π], and then multiplied by 4096 and divided by 2π.

[0117] Furthermore, in one embodiment, the calculation module is also used for:

[0118] Get the current delay phase calculation value;

[0119] The sum of the first phase value and the current delayed phase calculation value is taken as the theoretical synchronization phase; wherein the initial delayed phase calculation value is zero.

[0120] Furthermore, in one embodiment, the second acquisition module is used to:

[0121] The difference between the above-calculated square value and the current square value is A, the difference between the above-calculated square value and the next compensation square value is B, and the difference between the above-calculated square value and the previous compensation square value is C;

[0122] If B<A and B<C, the sum of the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value;

[0123] If C<B and C<A, the difference between the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value;

[0124] Otherwise, the current delay phase calculation value is used as the obtained delay phase calculation value.

[0125] Furthermore, in one embodiment, the first acquisition module is further used for:

[0126] Collect the first phase of the excitation signal in this cycle;

[0127] According to the delay period, the first phase is subjected to delay compensation processing, and then an angle equivalent conversion is performed to obtain a first phase value, and the first phase value is within the range of [0, 2π].

[0128] Among them, the functional implementation of each module in the above-mentioned motor resolver feedback signal delayed phase acquisition device corresponds to the steps in the above-mentioned motor resolver feedback signal delayed phase acquisition method embodiment, and its functions and implementation processes are no longer repeated here one by one.

[0129] In a third aspect, an embodiment of the present application provides a device for acquiring a delayed phase of a motor resolver feedback signal. The device for acquiring a delayed phase of a motor resolver feedback signal may be a personal computer (PC), a laptop computer, a server, or other device with data processing capabilities.

[0130] Reference Figure 4 , Figure 4 The hardware structure diagram of the motor resolver feedback signal delay phase acquisition device involved in the embodiment of the present application is shown in FIG. In the embodiment of the present application, the motor resolver feedback signal delay phase acquisition device may include a processor, a memory, a communication interface, and a communication bus.

[0131] The communication bus may be of any type and is used to interconnect the processor, the memory, and the communication interface.

[0132] The communication interface includes an input / output (I / O) interface, a physical interface, and a logical interface, etc., which are used to interconnect the devices inside the motor resolver feedback signal delay phase acquisition device, and an interface used to interconnect the motor resolver feedback signal delay phase acquisition device with other devices (such as other computing devices or user devices). The physical interface can be an Ethernet interface, a fiber optic interface, an ATM interface, etc.; the user device can be a display, a keyboard, etc.

[0133] The memory can be various types of storage media, such as random access memory (RAM), read-only memory (ROM), non-volatile RAM (NVRAM), flash memory, optical storage, hard disk, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), etc.

[0134] The processor may be a general-purpose processor, and the general-purpose processor may call the motor resolver feedback signal delayed phase acquisition program stored in the memory, and execute the motor resolver feedback signal delayed phase acquisition method provided in the embodiment of the present application. For example, the general-purpose processor may be a central processing unit (CPU). Among them, the method executed when the motor resolver feedback signal delayed phase acquisition program is called can refer to the various embodiments of the motor resolver feedback signal delayed phase acquisition method of the present application, which will not be repeated here.

[0135] Those skilled in the art will understand that Figure 4 The hardware structure shown in the figure does not constitute a limitation on the present application, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0136] It should be noted that the serial numbers of the above-mentioned embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

[0137] The terms "including" and "having" and any variations thereof in the specification and claims of this application and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices. The terms "first", "second" and "third" are used to distinguish different objects, etc., and do not represent a sequence, nor do they limit "first", "second" and "third" to different types.

[0138] In the description of the embodiments of the present application, "exemplary", "for example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary", "for example" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a specific way.

[0139] In the description of the embodiments of the present application, unless otherwise specified, “ / ” means or, for example, A / B can mean A or B; the “and / or” in the text is merely a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, “multiple” refers to two or more than two.

[0140] In some processes described in the embodiments of the present application, multiple operations or steps that appear in a specific order are included, but it should be understood that these operations or steps may not be executed in the order in which they appear in the embodiments of the present application or in parallel, and the sequence number of the operation is only used to distinguish the different operations, and the sequence number itself does not represent any execution order. In addition, these processes may include more or fewer operations, and these operations or steps may be executed in sequence or in parallel, and these operations or steps may be combined.

[0141] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD) as described above, and includes a number of instructions for a terminal device to execute the methods described in each embodiment of the present application.

[0142] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A method for obtaining a delayed phase of a motor resolver feedback signal, characterized in that: The method comprises: Get the first phase value of the excitation signal in the current cycle and the resolver feedback signal; Obtaining a calculated square value of an excitation signal according to the resolver feedback signal; Obtaining the theoretical synchronous phase of the resolver feedback signal according to the first phase value, and then obtaining the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase; Obtaining a delay phase calculation value according to the calculated square value, the current square value, the next compensation square value and the previous compensation square value; When the delayed phase calculation value does not meet the preset condition, the first phase value of the next cycle of the excitation signal and the resolver feedback signal are obtained until the obtained delayed phase calculation value meets the preset condition and is output.

2. The method for obtaining the delayed phase of the motor resolver feedback signal according to claim 1, characterized in that: The preset condition is: the absolute value of the difference between the average value of the first N delayed phase calculation values ​​and the delayed phase calculation value is less than the error threshold; N is an integer greater than or equal to 50.

3. The method for obtaining the delayed phase of the motor resolver feedback signal according to claim 1, characterized in that: The resolver feedback signal includes a resolver feedback sine signal and a resolver feedback cosine signal; The calculated square value of the excitation signal is: the sum of the squares of the resolver feedback sine signal and the resolver feedback cosine signal.

4. The method for obtaining the delayed phase of the motor resolver feedback signal according to claim 1, characterized in that: The current square value, the next compensation square value and the previous compensation square value of the phase synchronization excitation signal corresponding to the theoretical synchronization phase are obtained, specifically including: The theoretical synchronization phase is equivalently converted to a preset phase accuracy, rounded down, and then added or subtracted by one to obtain three integer phases; According to the preset excitation signal square table, the current square value, the next compensation square value and the previous compensation square value of the phase synchronous excitation signal corresponding to the three integer phases are obtained.

5. The method for acquiring the delayed phase of the motor resolver feedback signal according to claim 4, characterized in that: The theoretical synchronization phase is equivalently converted to a preset phase accuracy, specifically including: The theoretical synchronization phase is converted into an angle equivalent so as to be within the range of [0, 2π], and then multiplied by 4096 and divided by 2π.

6. The method for obtaining the delayed phase of the motor resolver feedback signal according to claim 1, characterized in that: The theoretical synchronous phase of the resolver feedback signal is obtained according to the first phase value, specifically including: Get the current delay phase calculation value; The sum of the first phase value and the current delayed phase calculation value is taken as the theoretical synchronization phase; wherein the initial delayed phase calculation value is zero.

7. The method for acquiring the delayed phase of the motor resolver feedback signal according to claim 6, characterized in that: According to the calculated square value, the current square value, the next compensation square value and the previous compensation square value, obtaining the delay phase calculation value specifically includes: The difference between the calculated square value and the current square value is A, the difference between the calculated square value and the next compensated square value is B, and the difference between the calculated square value and the previous compensated square value is C; If B<A and B<C, the sum of the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value; If C<B and C<A, the difference between the current delay phase calculation value and the preset step length is used as the obtained delay phase calculation value; Otherwise, the current delay phase calculation value is used as the obtained delay phase calculation value.

8. The method for obtaining the delayed phase of the motor resolver feedback signal according to claim 1, characterized in that: Get the first phase value of the current cycle of the excitation signal, including: Collect the first phase of the excitation signal in this cycle; According to the delay period, the first phase is subjected to delay compensation processing, and then an angle equivalent conversion is performed to obtain a first phase value, and the first phase value is within the range of [0, 2π].

9. A device for acquiring delayed phase of a motor resolver feedback signal, characterized in that: The device comprises: A first acquisition module, which is used to acquire the first phase value of the excitation signal in the current cycle and the resolver feedback signal; A calculation module, which is used to obtain a calculated square value of the excitation signal according to the resolver feedback signal, and to obtain a theoretical synchronous phase of the resolver feedback signal according to the first phase value, and then obtain a current square value, a next compensation square value and a previous compensation square value of the phase synchronous excitation signal corresponding to the theoretical synchronous phase; A second acquisition module, which is used to acquire a delayed phase calculation value according to the calculated square value, the current square value, the next compensation square value and the previous compensation square value; The output module is used to obtain the first phase value of the next cycle of the excitation signal and the resolver feedback signal when the delayed phase calculation value does not meet the preset condition, until the obtained delayed phase calculation value meets the preset condition and is output.

10. A device for acquiring delayed phase of a motor resolver feedback signal, characterized in that: The device includes a processor, a memory, and a motor resolver feedback signal delayed phase acquisition program stored in the memory and executable by the processor, wherein when the motor resolver feedback signal delayed phase acquisition program is executed by the processor, the steps of the motor resolver feedback signal delayed phase acquisition method as described in any one of claims 1 to 8 are implemented.