Constant transconductance circuit of DDA instrument amplifier and DDA instrument amplifier

Abstract

The invention discloses a constant transconductance circuit of a DDA instrument amplifier and the DDA instrument amplifier. The constant transconductance circuit comprises BJT input pair transistors and is used for converting a pair of differential input voltages into a pair of differential output currents and generating a pair of emitter voltages and a pair of collector voltages. When the pair of differential input voltages changes, the transconductance replica circuit generates transconductance replica current according to the pair of collector voltages so as to introduce the current change generated by the BJT input pair transistors along with the change of the pair of differential input voltages into the source degeneration circuit. Furthermore, a constant ratio between the pair of differential output currents and the pair of differential input voltages is ensured. The BJT device is adopted, and compared with a traditional CMOS transconductance circuit, the BJT transconductance circuit has lower noise and offset. By utilizing the source electrode degeneration and transconductance replication technology of input geminate transistors, constant transconductance can be maintained in a wider input voltage range, and high linearity can be maintained in a wide input range.

Description

Technical Field

[0001] The invention relates to the field of electronic circuits, and in particular to a constant transconductance circuit of a DDA instrument amplifier and the DDA instrument amplifier. Background Art

[0002] DDA (Differential Difference Amplifier) ​​instrument amplifier has the characteristics of low power consumption, low noise, high input impedance and high common mode rejection ratio. It can amplify the weak electrical signals generated by the sensor without distortion to facilitate subsequent signal acquisition. Therefore, it has been widely used in instrument detection equipment.

[0003] Existing DDA instrumentation amplifiers mostly use CMOS transconductance circuits to convert differential voltage signals into differential current signals to achieve the function of signal amplification. However, the inherent characteristics of CMOS devices determine that CMOS transconductance circuits have large noise and offset. In addition, CMOS transconductance circuits can maintain a constant transconductance when the input signal is small, but as the input signal increases, the transconductance will degenerate. Therefore, input signals out of range will reduce the linearity of the CMOS transconductance circuit. Furthermore, the source end of the CMOS device in the CMOS transconductance circuit is directly connected to the power supply, which makes it easy for the power supply noise to couple into the CMOS transconductance circuit, thereby weakening the ability of the CMOS transconductance circuit to resist power supply and ground interference. Summary of the invention

[0004] The present invention provides a constant transconductance circuit of a DDA instrument amplifier and a DDA instrument amplifier to solve at least one of the above technical problems.

[0005] The technical solution of the present invention to solve the above technical problem is as follows: A constant transconductance circuit of a DDA instrument amplifier, comprising: A differential input terminal group, used for receiving a pair of differential input voltages; A BJT input pair tube, comprising a base group, a collector group and an emitter group; the base group is connected to the differential input terminal group in a one-to-one correspondence, and the BJT input pair tube is used to convert the pair of differential input voltages into a pair of differential output currents and output them at the collector group, and generate a pair of emitter voltages at the emitter group, and generate a pair of collector voltages at the collector group; A source degeneration circuit and a transconductance replica circuit, wherein the source degeneration circuit is connected to the emitter group of the BJT input pair tube; the transconductance replica circuit is connected to the collector group of the BJT input pair tube and the source degeneration circuit; When the pair of differential input voltages changes, the transconductance replica circuit generates a transconductance replica current according to the pair of collector voltages, so as to introduce the current change of the BJT input pair tube caused by the change of the pair of differential input voltages into the source degeneration circuit, thereby making the ratio of the pair of differential output currents to the pair of differential input voltages constant.

[0006] Based on the above technical solution, the present invention can also be improved as follows.

[0007] Further, it also includes a power supply terminal; the differential input terminal group includes a first differential input terminal and a second differential input terminal; the BJT input pair includes a first transistor and a second transistor; the base of the first transistor is connected to the first differential input terminal, the collector is connected to the power supply terminal, and the emitter is connected to the source degeneration circuit; the base of the second transistor is connected to the second differential input terminal, the collector is connected to the power supply terminal, and the emitter is connected to the source degeneration circuit; The pair of differential input voltages are converted into the pair of differential output currents through the first transistor and the second transistor, and are outputted in one-to-one correspondence with the collector of the first transistor and the collector of the second transistor.

[0008] Further, the source degeneration circuit comprises: A first source degeneration resistor, one end of which is connected to the emitter of the first transistor and the other end of which is grounded; A second source degeneration resistor has one end connected to the emitter of the second transistor and the other end grounded.

[0009] Further, the transconductance replica circuit includes: a first MOS transistor, wherein the gate of the first MOS transistor is connected to the collector of the first transistor, the source is connected to the power supply terminal, and the drain is connected to one end of the first source degeneration resistor, and is used to generate a first transconductance current according to the collector voltage of the first transistor, so as to introduce a current change of the first transistor generated by a change of a differential input voltage into the first source degeneration resistor; a second MOS transistor, wherein the gate of the second MOS transistor is connected to the collector of the second triode, the source is connected to the power supply terminal, and the drain is connected to one end of the second source degeneration resistor, and is used to generate a second transconductance current according to the collector voltage of the second triode, so as to introduce the current change of the second triode generated by the change of another differential input voltage into the second source degeneration resistor.

[0010] Furthermore, it also includes a first differential current output terminal and a second differential current output terminal; the transconductance replica circuit also includes: a third MOS transistor, wherein a gate of the third MOS transistor is connected to the gate of the first MOS transistor, a source of the third MOS transistor is connected to the power supply end, and a drain of the third MOS transistor is connected to the first differential current output end; A fourth MOS tube, wherein a gate of the fourth MOS tube is connected to the gate of the second MOS tube, a source of the fourth MOS tube is connected to the power supply end, and a drain of the fourth MOS tube is connected to the second differential current output end.

[0011] Furthermore, it also includes a power isolation control circuit, which is connected to the power supply end, the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube, the source of the fourth MOS tube and the collector group of the BJT input pair tube, and is used to isolate the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube and the source of the fourth MOS tube from being directly connected to the power supply end.

[0012] Further, the power isolation control circuit includes: A common mode detection circuit, connected to the collector group of the BJT input pair tube, used for generating a common mode voltage signal according to a pair of collector voltages of the BJT input pair tube; A comparator, wherein the non-inverting input terminal is connected to a fixed reference voltage signal, and the inverting input terminal is connected to the common mode detection circuit, and is used to compare the common mode voltage signal with the fixed reference voltage signal to generate a comparison result; a current source connected to the output end of the comparator, the power supply end, and the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube, and the source of the fourth MOS tube, and used for adjusting the voltage of the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube, and the source of the fourth MOS tube according to the comparison result.

[0013] Furthermore, it also includes a first bias current source and a second bias current source; the first bias current source is connected between the power supply terminal and the collector of the first transistor, and is used to provide a constant bias current to the first transistor; the second bias current source is connected between the power supply terminal and the collector of the second transistor, and is used to provide a constant bias current to the second transistor.

[0014] Furthermore, it also includes a limiting current source, one end of which is connected between the first source degeneration resistor and the second source degeneration resistor, and the other end is grounded, for providing a constant limiting current.

[0015] The beneficial effects of the present invention are as follows: a constant transconductance circuit of a DDA instrument amplifier of the present invention uses a BJT device as an input pair tube, and the noise and offset of the BJT device are lower than those of the CMOS device. Therefore, the constant transconductance circuit of the present invention has lower noise and offset than the traditional CMOS transconductance circuit. At the same time, the present invention uses a source degeneration circuit and a transconductance replica circuit to cooperate with the input pair tube. When a pair of differential input voltages changes, the transconductance replica circuit generates a transconductance replica current according to a pair of collector voltages, so as to introduce the current change generated by the BJT input pair tube with the change of a pair of differential input voltages into the source degeneration circuit, thereby making the ratio between a pair of differential output currents and a pair of differential input voltages constant. By utilizing the source degeneration and transconductance replication technology of the BJT input pair tube, the present invention can achieve constant transconductance in a wider input voltage range, ensuring high linearity in a wide input range.

[0016] Based on the above-mentioned constant transconductance circuit of a DDA instrument amplifier, the present invention also provides a DDA instrument amplifier.

[0017] A DDA instrument amplifier, comprising: A differential voltage output terminal, used for outputting a differential voltage amplified signal; A transconductance closed-loop circuit, the transconductance closed-loop circuit comprising a resistance proportional feedback circuit, a transconductance amplifier circuit and a current-voltage conversion circuit; Wherein, the resistance proportional feedback circuit is connected to the differential voltage output terminal and is used to sample the differential voltage amplified signal to generate a differential sampling voltage; The transconductance amplifier circuit is connected to the resistance proportional feedback circuit and is used to amplify the differential sampling voltage and convert it into a differential sampling current; At least one constant transconductance circuit as described above, at least one of the constant transconductance circuits is connected to at least one pair of differential input voltages and converts the at least one pair of differential input voltages into at least one pair of differential output currents; an adding circuit, connected to the transconductance amplifier circuit and at least one of the constant transconductance circuits, for performing an adding operation on the differential sampling current and the at least one pair of differential output currents to generate a differential total current; The current-voltage conversion circuit is connected to the adding circuit and the differential voltage output terminal, and is used to perform voltage conversion on the differential total current to generate the differential voltage amplification signal.

[0018] The beneficial effects of the present invention are as follows: a DDA instrument amplifier of the present invention adopts the above-mentioned constant transconductance circuit to perform voltage-current conversion, so the DDA instrument amplifier of the present invention also has lower noise and offset and can maintain higher linearity in a wider input voltage range; in addition, the DDA instrument amplifier of the present invention adopts multi-transconductance multiplexing to realize multi-input application, and the number of constant transconductance circuits can be flexibly set according to the number of actual input signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a structural block diagram of a constant transconductance circuit of a DDA instrument amplifier of the present invention; Figure 2 for Figure 1 Circuit diagram of Figure 3 It is a structural schematic diagram of a constant transconductance circuit of a DDA instrument amplifier of the present invention; Figure 4 for Figure 3 Circuit diagram of Figure 5 The structure block diagram of a DDA instrument amplifier of the present invention. DETAILED DESCRIPTION

[0020] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0021] like Figure 1 As shown, a constant transconductance circuit 100 of a DDA instrument amplifier includes: A differential input terminal group 1 is used to connect a pair of differential input voltages VIP / VIN; The BJT input pair tube 2 comprises a base group B1 / B2, a collector group C1 / C2 and an emitter group E1 / E2; the base group B1 / B2 is connected to the differential input terminal group 1 in a one-to-one correspondence, and the BJT input pair tube 2 is used to convert the pair of differential input voltages VIP / VIN into a pair of differential output currents IOP / ION and output them at the collector group C1 / C2, and generate a pair of emitter voltages VE1 / VE2 at the emitter group E1 / E2, and generate a pair of collector voltages VC1 / VC2 at the collector group C1 / C2; A source degeneration circuit 3 and a transconductance replica circuit 4, wherein the source degeneration circuit 3 is connected to the emitter group E1 / E2 of the BJT input pair tube 2; the transconductance replica circuit 4 is connected to the collector group C1 / C2 of the BJT input pair tube 2 and the source degeneration circuit 3; When the pair of differential input voltages VIP / VIN changes, the transconductance replica circuit 4 generates a transconductance replica current according to the pair of collector voltages VC1 / VC2, so as to introduce the current change of the BJT input pair tube 2 caused by the change of the pair of differential input voltages VIP / VIN into the source degeneration circuit 3, thereby making the ratio of the pair of differential output currents IOP / ION to the pair of differential input voltages VIP / VIN constant.

[0022] The constant transconductance circuit 100 of a DDA instrument amplifier of the present invention adopts a BJT device as an input pair tube. The noise and offset of the BJT device are lower than those of the CMOS device. Therefore, the constant transconductance circuit 100 of the present invention has lower noise and offset than the traditional CMOS transconductance circuit. At the same time, the present invention adopts a source degeneration circuit 3 and a transconductance replica circuit 4 to cooperate with the input pair tube. When a pair of differential input voltages VIP / VIN changes, the transconductance replica circuit 4 generates a transconductance replica current according to a pair of collector voltages VC1 / VC2, so as to introduce the current change generated by the BJT input pair tube 2 with the change of a pair of differential input voltages VIP / VIN into the source degeneration circuit 3, thereby making the ratio relationship between a pair of differential output currents IOP / ION and a pair of differential input voltages VIP / VIN constant. By utilizing the source degeneration and transconductance replication technology of the BJT input pair tube 2, the present invention can achieve constant transconductance in a wider input voltage range, ensuring high linearity in a wide input range.

[0023] In some embodiments, Figure 2 As shown, the constant transconductance circuit 100 of the present invention further includes a power supply terminal 5; the differential input terminal group 1 includes a first differential input terminal 11 and a second differential input terminal 12; the BJT input pair tube 2 includes a first transistor NPN1 and a second transistor NPN2; the base B1 of the first transistor NPN1 is connected to the first differential input terminal 11, the collector C1 is connected to the power supply terminal 5, and the emitter E1 is connected to the source degeneration circuit 3; the base B2 of the second transistor NPN2 is connected to the second differential input terminal 12, the collector C2 is connected to the power supply terminal 5, and the emitter E2 is connected to the source degeneration circuit 3; The pair of differential input voltages VIP / VIN are converted into the pair of differential output currents IOP / ION through the first transistor NPN1 and the second transistor NPN2, and are outputted one-to-one correspondingly to the collector C1 of the first transistor NPN1 and the collector C2 of the second transistor NPN2.

[0024] Specifically, the first transistor NPN1 and the second transistor NPN2 are both BJT devices. Compared with CMOS devices, BJT devices have significant advantages in noise and offset, which are derived from the characteristics of the devices themselves; therefore, the present invention adopts a BJT input pair 2 composed of the first transistor NPN1 and the second transistor NPN2, which not only reduces the noise level but also improves the matching accuracy between devices compared to the traditional CMOS architecture. Such improvements enable the present invention to provide clearer and more stable outputs during signal amplification, thereby surpassing conventional CMOS solutions in performance.

[0025] In some embodiments, Figure 2 As shown, the source degeneration circuit 3 includes: A first source degeneration resistor R1, one end of which is connected to the emitter E1 of the first transistor NPN1, and the other end of which is grounded; The second source degeneration resistor R2 has one end connected to the emitter E2 of the second transistor NPN2 and the other end grounded.

[0026] Specifically, in the transconductance of the CMOS architecture, the source degeneration resistor effectively limits the change of the drain-source voltage by introducing a resistor between the source and the ground; when the drain-source voltage changes, the source degeneration resistor will absorb part of the voltage change, thereby reducing the nonlinear distortion of the input tube transconductance.

[0027] In the present application, the input pair of tubes is a BJT device, and the emitter of the BJT device is equivalent to the source of the CMOS tube; therefore, the first source degeneration resistor R1 and the second source degeneration resistor R2 introduced between the emitter and the ground in the present invention can also limit the change of the voltage between the collector and the emitter; when the voltage between the collector and the emitter changes, the source degeneration resistor will absorb part of the voltage change, thereby reducing the nonlinear distortion of the input tube transconductance, and thus can improve the transconductance of the BJT input pair tube 2.

[0028] In some embodiments, Figure 2 As shown, the transconductance replica circuit 4 includes: a first MOS transistor M1, wherein the gate of the first MOS transistor M1 is connected to the collector C1 of the first transistor NPN1, the source is connected to the power supply terminal 5, and the drain is connected to one end of the first source degeneration resistor R1, and is used to generate a first transconductance current according to the collector voltage VC1 of the first transistor NPN1, so as to introduce a current change of the first transistor NPN1 generated by a change of a differential input voltage VIP into the first source degeneration resistor R1; The second MOS transistor M2 has a gate connected to the collector C2 of the second transistor NPN2, a source connected to the power supply terminal 5, and a drain connected to one end of the second source degeneration resistor R2, and is used to generate a second transconductance current according to the collector voltage VC2 of the second transistor NPN2, so as to introduce the current change of the second transistor NPN2 generated by the change of another differential input voltage VIN into the second source degeneration resistor R2.

[0029] Specifically, when a pair of differential input voltages VIP / VIN changes, that is, the base voltages of the first transistor NPN1 and the second transistor NPN2 change, the collector voltages of the first transistor NPN1 and the second transistor NPN2 change, and then the gate voltages of the first MOS transistor M1 and the second MOS transistor M2 change, thereby changing the leakage currents of the first MOS transistor M1 and the second MOS transistor M2, and the leakage currents of the first MOS transistor M1 and the second MOS transistor M2 are the transconductance replica currents.

[0030] Since the BJT input pair 2 is used to convert a pair of differential input voltages VIP / VIN into a pair of differential output currents IOP / ION and output them at the collector group C1 / C2; therefore, the change in the leakage current of the first MOS tube M1 and the second MOS tube M2 reflects the change in the pair of differential output currents IOP / ION.

[0031] The present invention adopts a source degeneration circuit 3 and a transconductance replica circuit 4 to cooperate with an input pair of transistors. When a pair of differential input voltages VIP / VIN changes, the transconductance replica circuit 4 generates a transconductance replica current according to a pair of collector voltages VC1 / VC2, so as to introduce the current change generated by the BJT input pair 2 with the change of a pair of differential input voltages VIP / VIN into the source degeneration circuit 3, thereby making the ratio of a pair of differential output currents IOP / ION to a pair of differential input voltages VIP / VIN constant.

[0032] In some embodiments, Figure 2 As shown, the constant transconductance circuit 100 of the present invention further includes a differential current output terminal group 6, wherein the differential current output terminal group 6 includes a first differential current output terminal 61 and a second differential current output terminal 62; the transconductance replica circuit 4 further includes: a third MOS transistor M3, wherein the gate of the third MOS transistor M3 is connected to the gate of the first MOS transistor M1, the source of the third MOS transistor M3 is connected to the power supply terminal 5, and the drain of the third MOS transistor M3 is connected to the first differential current output terminal 61; A fourth MOS transistor M4 , wherein the gate of the fourth MOS transistor M4 is connected to the gate of the second MOS transistor M2 , the source of the fourth MOS transistor M4 is connected to the power supply terminal 5 , and the drain of the fourth MOS transistor M4 is connected to the second differential current output terminal 62 .

[0033] Specifically, the third MOS tube M3 and the first MOS tube M1 form a current mirror for replicating the leakage current of the first MOS tube M1; meanwhile, the fourth MOS tube M4 and the second MOS tube M2 form a current mirror for replicating the leakage current of the second MOS tube M2; therefore, the current outputted by the first differential current output terminal 61 and the second differential current output terminal 62 connected to the drains of the third MOS tube M3 and the fourth MOS tube M4 represent a pair of differential output currents IOP / ION.

[0034] The transconductance replica circuit 4 formed by the first MOS transistor M1 , the second MOS transistor M2 , the third MOS transistor M3 and the fourth MOS transistor M4 has a simple structure and is easy to implement.

[0035] In some embodiments, Figure 3 As shown, the constant transconductance circuit 100 of the present invention further includes a power isolation control circuit 7, which is connected to the power supply terminal 5, the source of the first MOS tube M1, the source of the second MOS tube M2, the source of the third MOS tube M3, the source of the fourth MOS tube M4 and the collector group C1 / C2 of the BJT input pair tube 2, and is used to isolate the source of the first MOS tube M1, the source of the second MOS tube M2, the source of the third MOS tube M3 and the source of the fourth MOS tube M4 from being directly connected to the power supply terminal 5.

[0036] Specifically, the power isolation control circuit 7 is used to isolate the source of the first MOS tube M1, the source of the second MOS tube M2, the source of the third MOS tube M3 and the source of the fourth MOS tube M4 from being directly connected to the power supply terminal 5, so as to avoid the interference of the power supply being directly coupled to the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 to cause a sudden change in the output current, thereby improving the power supply rejection ratio and enhancing the anti-interference ability of the power supply and the ground.

[0037] In some embodiments, Figure 4 As shown, the power isolation control circuit 7 includes: A common mode detection circuit 71 is connected to the collector group C1 / C2 of the BJT input pair tube 2 and is used to generate a common mode voltage signal VCOM according to a pair of collector voltages VC1 / VC2 of the BJT input pair tube 2; A comparator A, whose non-inverting input terminal is connected to the fixed reference voltage signal VCM, and whose inverting input terminal is connected to the common mode detection circuit 71, is used to compare the common mode voltage signal VCOM with the fixed reference voltage signal VCM to generate a comparison result; The current source I0 is connected to the output end of the comparator A, the power supply end 5, and the source of the first MOS tube M1, the source of the second MOS tube M2, the source of the third MOS tube M3, and the source of the fourth MOS tube M4, and is used to adjust the voltage of the source of the first MOS tube M1, the source of the second MOS tube M2, the source of the third MOS tube M3, and the source of the fourth MOS tube M4 according to the comparison result.

[0038] Specifically, the common mode detection circuit 71 is used to detect the common mode voltage of a pair of collector voltages VC1 / VC2 to obtain a common mode voltage signal VCOM, that is, VCOM=(VC1+VC2) / 2; the comparator A compares the common mode voltage signal VCOM with the input fixed reference voltage signal VCM to obtain a comparison result. Then, the current source I0 is adjusted according to the comparison result to change the source voltage of the first MOS tube M1 and the second MOS tube M2; the change of the source voltage of the first MOS tube M1 and the second MOS tube M2 causes the leakage current of the first MOS tube M1 and the second MOS tube M2 to change; the change of the leakage current of the first MOS tube M1 and the second MOS tube M2 causes the gate voltage of the first MOS tube M1 and the second MOS tube M2 to change; the change of the gate voltage of the first MOS tube M1 and the second MOS tube M2 is the change of the pair of collector voltages VC1 / VC2 of the BJT input pair 2. For example, when the common mode voltage signal VCOM is less than the fixed reference voltage signal VCM, the comparator A controls the current source I0 to decrease, and the pair of collector voltages VC1 / VC2 increases.

[0039] The common mode detection circuit 71, the comparator A and the current source I0 form a closed-loop feedback system, whose gain is large enough, and the common mode voltage signal VCOM=(VC1+VC2) / 2 and the fixed reference voltage signal VCM make the input of the closed loop, so that the final error is zero, that is, VCOM=(VC1+VC2) / 2=VCM. The purpose of this is to make the current source I0 unaffected by the power supply, thereby avoiding the interference of the power supply directly coupling to the first MOS tube M1, the second MOS tube M2, the third MOS tube M3 and the fourth MOS tube M4 to cause a sudden change in the output current, thereby improving the power supply rejection ratio and enhancing the anti-interference ability of the power supply and the ground.

[0040] In some embodiments, Figure 4 As shown, the constant transconductance circuit 100 of the present invention also includes a first bias current source I1 and a second bias current source I2; the first bias current source I1 is connected between the power supply terminal 5 and the collector of the first transistor NPN1, and is used to provide a constant bias current to the first transistor NPN1; the second bias current source I2 is connected between the power supply terminal 5 and the collector of the second transistor NPN2, and is used to provide a constant bias current to the second transistor NPN2.

[0041] Specifically, the first bias current source I1 and the second bias current source I2 provide a constant bias current for the first transistor NPN1 and the second transistor NPN2; when a pair of differential input voltages VIP / VIN changes, the emitter voltage of the first transistor NPN1 and the second transistor NPN2 changes, so that the voltage across the first source degeneration resistor R1 and the second source degeneration resistor R2 changes, and then the current flowing through the first source degeneration resistor R1 and the second source degeneration resistor R2 changes. Since the first transistor NPN1 and the second transistor NPN2 are biased at a constant current, the current flowing through the first transistor NPN1 and the second transistor NPN2 remains unchanged; since a pair of differential input voltages VIP / VIN changes, the current flowing through the first transistor NPN1 and the second transistor NPN2 remains unchanged, then the gate voltage of the first MOS tube M1 and the second MOS tube M2 changes, and then the leakage current of the first MOS tube M1 and the second MOS tube M2 changes.

[0042] The first transistor NPN1 and the second transistor NPN2 are biased under a constant current, which can reduce the impact of power supply fluctuations on the circuit, ensure circuit stability, and improve the anti-interference ability of the circuit.

[0043] In some embodiments, Figure 4 As shown, the constant transconductance circuit 100 of the present invention further includes a limiting current source I3 , one end of which is connected between the first source degeneration resistor R1 and the second source degeneration resistor R2 , and the other end is grounded, for providing a constant limiting current.

[0044] Specifically, a change in a pair of differential input voltages VIP / VIN causes a change in the current flowing through the first source degradation resistor R1 and the second source degradation resistor R2 and causes a change in the leakage current of the first MOS tube M1 and the second MOS tube M2; since the current flowing through the first transistor NPN1 and the second transistor NPN2 remains unchanged and the limiting current source I3 is constant; therefore, the change in the leakage current of the first MOS tube M1 and the second MOS tube M2 is equal to the change in the current of the first source degradation resistor R1 and the second source degradation resistor R2. Therefore, when a pair of differential input voltages VIP / VIN changes, the transconductance replica circuit 4 generates a transconductance replica current according to a pair of collector voltages VC1 / VC2, so as to introduce the current change generated by the BJT input pair tube 2 with the change of a pair of differential input voltages VIP / VIN into the source degradation circuit 3, thereby making the ratio of a pair of differential output currents IOP / ION to a pair of differential input voltages VIP / VIN constant.

[0045] Based on the above-mentioned constant transconductance circuit 100 of a DDA instrument amplifier, the present invention further provides a DDA instrument amplifier.

[0046] like Figure 5As shown, a DDA instrument amplifier includes: The differential voltage output terminal 200 is used to output the differential voltage amplified signal VOP / VON; A transconductance closed-loop circuit 300, wherein the transconductance closed-loop circuit 300 includes a resistance proportional feedback circuit 301, a transconductance amplifier circuit 302 and a current-voltage conversion circuit 303; The resistor proportional feedback circuit 301 is connected to the differential voltage output terminal 200 and is used to sample the differential voltage amplified signal VOP / VON to generate a differential sampling voltage; The transconductance amplifier circuit 302 is connected to the resistance proportional feedback circuit 301 and is used to amplify the differential sampling voltage and convert it into a differential sampling current; At least one constant transconductance circuit 100 as described above, at least one constant transconductance circuit 100 is connected to at least one pair of differential input voltages VIP / VIN, and converts the at least one pair of differential input voltages VIP / VIN into at least one pair of differential output currents IOP / ION; An adding circuit 400, connected to the transconductance amplifier circuit 302 and at least one of the constant transconductance circuits 100, for performing an adding operation on the differential sampling current and the at least one pair of differential output currents IOP / ION to generate a differential total current; The current-to-voltage conversion circuit 303 is connected to the adding circuit 400 and the differential voltage output terminal 200 , and is used to perform voltage conversion on the differential total current to generate the differential voltage amplification signal VOP / VON.

[0047] Specifically, the transconductance amplifier circuit 302 may also adopt the constant transconductance circuit 100 of the present invention; the current-to-voltage conversion circuit 303 is used to convert the current signal into a voltage signal and provide a high gain; and the resistance proportional feedback circuit 301 determines the closed-loop gain.

[0048] A DDA instrument amplifier of the present invention adopts the above-mentioned constant transconductance circuit 100 to perform voltage-current conversion, so the DDA instrument amplifier of the present invention also has lower noise and offset and can maintain higher linearity in a wider input voltage range; in addition, the DDA instrument amplifier of the present invention adopts multi-transconductance multiplexing to achieve multi-input applications, and the number of constant transconductance circuits can be flexibly set according to the number of actual input signals.

[0049] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A constant transconductance circuit of a DDA instrument amplifier, characterized in that: include: A differential input terminal group, used for receiving a pair of differential input voltages; BJT input pair, including base group, collector group and emitter group; The base electrode groups are connected to the differential input terminal groups one by one, and the BJT input pair tubes are used to convert the pair of differential input voltages into a pair of differential output currents and output them at the collector electrode group, and generate a pair of emitter voltages at the emitter electrode group, and generate a pair of collector voltages at the collector electrode group; A source degeneration circuit and a transconductance replica circuit, wherein the source degeneration circuit is connected to the emitter group of the BJT input pair tube; the transconductance replica circuit is connected to the collector group of the BJT input pair tube and the source degeneration circuit; When the pair of differential input voltages changes, the transconductance replica circuit generates a transconductance replica current according to the pair of collector voltages, so as to introduce the current change of the BJT input pair tube caused by the change of the pair of differential input voltages into the source degeneration circuit, thereby making the ratio of the pair of differential output currents to the pair of differential input voltages constant.

2. The constant transconductance circuit according to claim 1, characterized in that: It also includes a power supply terminal; the differential input terminal group includes a first differential input terminal and a second differential input terminal; the BJT input pair includes a first transistor and a second transistor; the base of the first transistor is connected to the first differential input terminal, the collector is connected to the power supply terminal, and the emitter is connected to the source degeneration circuit; the base of the second transistor is connected to the second differential input terminal, the collector is connected to the power supply terminal, and the emitter is connected to the source degeneration circuit; The pair of differential input voltages are converted into the pair of differential output currents through the first transistor and the second transistor, and are outputted in one-to-one correspondence with the collector of the first transistor and the collector of the second transistor.

3. The constant transconductance circuit according to claim 2, characterized in that: The source degeneration circuit comprises: A first source degeneration resistor, one end of which is connected to the emitter of the first transistor and the other end of which is grounded; A second source degeneration resistor has one end connected to the emitter of the second transistor and the other end grounded.

4. The constant transconductance circuit according to claim 3, characterized in that: The transconductance replica circuit comprises: a first MOS transistor, wherein the gate of the first MOS transistor is connected to the collector of the first transistor, the source is connected to the power supply terminal, and the drain is connected to one end of the first source degeneration resistor, and is used to generate a first transconductance current according to the collector voltage of the first transistor, so as to introduce a current change of the first transistor generated by a change of a differential input voltage into the first source degeneration resistor; a second MOS transistor, wherein the gate of the second MOS transistor is connected to the collector of the second triode, the source is connected to the power supply terminal, and the drain is connected to one end of the second source degeneration resistor, and is used to generate a second transconductance current according to the collector voltage of the second triode, so as to introduce the current change of the second triode generated by the change of another differential input voltage into the second source degeneration resistor.

5. The constant transconductance circuit according to claim 4, characterized in that: Also includes a first differential current output terminal and a second differential current output terminal; The transconductance replica circuit further includes: a third MOS transistor, wherein a gate of the third MOS transistor is connected to the gate of the first MOS transistor, a source of the third MOS transistor is connected to the power supply end, and a drain of the third MOS transistor is connected to the first differential current output end; A fourth MOS tube, wherein a gate of the fourth MOS tube is connected to the gate of the second MOS tube, a source of the fourth MOS tube is connected to the power supply end, and a drain of the fourth MOS tube is connected to the second differential current output end.

6. The constant transconductance circuit according to claim 5, characterized in that: It also includes a power isolation control circuit, which is connected to the power supply end, the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube, the source of the fourth MOS tube and the collector group of the BJT input pair tube, and is used to isolate the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube and the source of the fourth MOS tube from being directly connected to the power supply end.

7. The constant transconductance circuit according to claim 6, characterized in that: The power isolation control circuit comprises: A common mode detection circuit, connected to the collector group of the BJT input pair tube, used for generating a common mode voltage signal according to a pair of collector voltages of the BJT input pair tube; A comparator, wherein the non-inverting input terminal is connected to a fixed reference voltage signal, and the inverting input terminal is connected to the common mode detection circuit, and is used to compare the common mode voltage signal with the fixed reference voltage signal to generate a comparison result; a current source connected to the output end of the comparator, the power supply end, and the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube, and the source of the fourth MOS tube, and used for adjusting the voltage of the source of the first MOS tube, the source of the second MOS tube, the source of the third MOS tube, and the source of the fourth MOS tube according to the comparison result.

8. The constant transconductance circuit according to claim 2, characterized in that: It also includes a first bias current source and a second bias current source; the first bias current source is connected between the power supply terminal and the collector of the first transistor, and is used to provide a constant bias current to the first transistor; The second bias current source is connected between the power supply terminal and the collector of the second transistor, and is used for providing a constant bias current to the second transistor.

9. The constant transconductance circuit according to claim 3, characterized in that: It also includes a limiting current source, one end of which is connected between the first source degeneration resistor and the second source degeneration resistor, and the other end is grounded, for providing a constant limiting current.

10. A DDA instrument amplifier, characterized in that: include: A differential voltage output terminal, used for outputting a differential voltage amplified signal; A transconductance closed-loop circuit, the transconductance closed-loop circuit comprising a resistance proportional feedback circuit, a transconductance amplifier circuit and a current-voltage conversion circuit; Wherein, the resistance proportional feedback circuit is connected to the differential voltage output terminal and is used to sample the differential voltage amplified signal to generate a differential sampling voltage; The transconductance amplifier circuit is connected to the resistance proportional feedback circuit and is used to amplify the differential sampling voltage and convert it into a differential sampling current; At least one constant transconductance circuit according to any one of claims 1 to 9, wherein at least one of the constant transconductance circuits is connected to at least one pair of differential input voltages and converts the at least one pair of differential input voltages into at least one pair of differential output currents; an adding circuit, connected to the transconductance amplifier circuit and at least one of the constant transconductance circuits, for performing an adding operation on the differential sampling current and the at least one pair of differential output currents to generate a differential total current; The current-voltage conversion circuit is connected to the adding circuit and the differential voltage output terminal, and is used to perform voltage conversion on the differential total current to generate the differential voltage amplification signal.

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