Calibration method for PN code injection of assembly line ADC

By using a differential structure in the pipeline ADC to eliminate input signal interference and simplify related operations using symbol functions, the problem of susceptibility to interference and high hardware consumption in the prior art is solved, and efficient and accurate calibration results are achieved.

CN119853690APending Publication Date: 2025-04-18NANJING MODULUS ZHIXIN MICROELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202411928449.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-25
Publication Date
2025-04-18

AI Technical Summary

Technical Problem

The existing digital background calibration technology is easily disturbed by input signals during the calibration process, resulting in unsatisfactory related results and poor calibration results. At the same time, the traditional related operations are complex and hardware consumption is high.

Method used

By injecting input signals with opposite polarity into the sub-ADC of the pipeline ADC to be calibrated, the input signal interference is eliminated using the differential structure, and symbolic functions are used instead of complex correlation operations, simplifying the operation process and reducing hardware resource consumption.

Benefits of technology

It improves the robustness and accuracy of calibration, reduces hardware resource consumption, realizes real-time calibration capabilities, and enhances the adaptability and stability of ADC in complex environments.

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Abstract

The invention requests to protect a PN code injection calibration method for an assembly line ADC (Analog to Digital Converter). The system is mainly composed of a 16bit 125Ms / s pipeline ADC model, a PN code generator model and a calibration network model. Firstly, an assembly line ADC model and a PN code generator model are built, error parameters in the ADC model are injected and adjusted through PN codes to obtain output signals with errors, the output signals and pseudorandom sequence codes are sent to a signal correlation operation module to obtain correlation results, and then actual weights are obtained in an iterative network. And performing fast Fourier transform (FFT) on the extracted correlation results to obtain correlation result spectrograms before and after the method, and evaluating the correlation results. According to the calibration algorithm, the problems of difficulty in error function extraction, poor calibration effect and the like in a PN code injection calibration algorithm of the assembly line ADC are solved.
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Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a digital background calibration technology for Pipeline ADC. Background Art

[0002] The pipeline analog-to-digital converter (Pipeline ADC) has gradually become a research hotspot in recent years because it adopts a pipeline structure to decompose the total accuracy into each pipeline stage, perfectly achieving a compromise between ADC accuracy and speed. At the same time, it is widely used in various industries, medical fields and other fields. However, when the accuracy of the pipeline is relatively large, the capacitor mismatch and the limited gain and unit bandwidth of the operational amplifier become the main factors restricting the performance. Therefore, calibration technology is proposed to overcome these error sources. Analog compensation technology is also one of the main calibration technologies. However, with the continuous decline of CMOS process and power supply voltage, analog compensation technology is restricted. In recent years, digital background calibration technology has become a research hotspot because of its real-time calibration, small changes to the analog domain and flexible changes. Using digital background calibration technology, the internal errors of the ADC are tracked and processed without interrupting the operation of the analog-to-digital converter to achieve the calibration function. The advantages are obvious compared to analog compensation technology.

[0003] The main digital background calibration technologies at present can be divided into reference digital background calibration and statistical digital background calibration according to their characteristics. The reference digital background calibration is mainly composed of a low-speed high-precision ADC, an ADC to be calibrated, and an LMS iterative network. The reference ADC generates the expected output and the output of the ADC to be calibrated after frequency reduction, and the error function is processed and sent to the iterative network for calibration. This calibration method adds a reference ADC, which increases its area, and the two ADCs of different speeds need to be well isolated, which increases the design difficulty. Another digital background calibration method based on statistics, its main calibration idea is to inject a PN sequence that is unrelated to the input signal Vin into the signal path, modulate the pseudo-random sequence code, and use the statistical characteristics of the PN code to estimate the actual inter-stage gain in the digital domain to calibrate the PipelineADC. The digital background calibration method based on statistics is popular because of its easy calibration, small changes to the analog circuit, and good calibration effect. Through the processing of correlation, the relevant results are extracted, and the influence of non-ideal error sources is eliminated after iteration, thereby realizing the calibration of the analog-to-digital converter. Although the statistical calibration method can eliminate the influence of errors, it still has many disadvantages. During the calibration process, for PN codes, both input signals and quantization noise can be considered as noise, which will affect the extraction and accuracy of the correlation operation results. In addition, since the correlation operation process is to add and average the signals after multiplication, it consumes a lot of hardware, resulting in poor calibration results. In addition, factors such as the determination of the initial value and the size of the step will affect the calibration effect, which may lead to problems such as long calibration time and local optimal value oscillation. It is necessary to manually adjust the initial parameter conditions to achieve better calibration results.

[0004] After searching, the prior art CN202410202172, a pipeline ADC digital calibration method based on improved sieve line, relates to the field of analog-to-digital converter calibration, including: a PN code sequence injection module, a pipeline ADC module and a calibration circuit module. After injecting a pseudo-random sequence code into the MDAC, relevant calculation operations are performed, and then the steepest gradient descent algorithm is used for calibration, and the speed and accuracy of the iteration are improved by adjusting the step size. When the parameters to be calibrated tend to converge, the iteration is stopped, and the converged value is substituted into the update to achieve calibration.

[0005] There are the following shortcomings:

[0006] (1) The pseudo-random sequence injected by the above method will be interfered by the input signal when performing correlation operation, which is equivalent to the existence of noise for extracting correlation results, resulting in unclear extraction of error parameters and poor calibration results;

[0007] (2) When performing related operations, the multiplication is performed, the addition is performed, and then the average is calculated. This is a complex operation and will bring unnecessary burden to the hardware. Summary of the invention

[0008] The present invention aims to solve the above problems of the prior art. A calibration method for PN code injection of pipeline ADC is proposed. The technical solution of the present invention is as follows:

[0009] A calibration method for PN code injection of a pipeline ADC comprises the following steps:

[0010] S1: Build the ideal model of pipeline ADC and the PN code generator model, obtain the non-ideal ADC model by adjusting the error parameters in the ideal ADC model, and inject the PN code at the input of the stage to be calibrated to generate the ADC digital output with error, and use the generated PN code and the digital output with error as the input of the error extraction model;

[0011] S2: Build a signal correlation operation model, use the output signal generated by S1 and the PN code signal to perform correlation operation to extract the correlation results, and perform spectrum analysis on the correlation results;

[0012] S3: Send the relevant results generated by S2 to the iterative network, extract the actual weights required and update them to achieve calibration.

[0013] Furthermore, the step S1 of building the pipeline ADC model and the PN code generator model specifically includes: using Matlab\Simulink software, adding non-ideal factors including time jitter, operational amplifier limited gain, capacitor mismatch and comparator mismatch error to the pipeline ADC, and establishing a 16-bit 125M / S pipeline ADC non-ideal model. The pipeline ADC model is a "2.5×7+2" structure, the first seven pipeline sub-stages are 2.5bit / stage, the last stage uses a 2bit Flash ADC, and an identical sub-ADC is also built in the pipeline sub-stage to be calibrated; at the same time, a 15-stage pseudo-random sequence code is generated in the pseudo-random code generation module, and a total of 2 15 -1 state, the output after modulation is Where V ref Represents the reference voltage of the current stage analog-to-digital converter.

[0014] Furthermore, the step S1 obtains a non-ideal ADC model by adjusting the error parameters in the ideal ADC model, specifically comprising: injecting a sequence code generated by a PN code into the input end of the pipeline ADC; injecting a sine wave signal with an amplitude of 0.5 and a frequency of 42.36 MHz into the input end, and outputting a digital output code D containing the PN code and the error at the same sampling point. +With D - ; Use these two sets of data to get the error function, and iterate to get the actual weight. The following is the expression for iteration: Where μ is the step size for iteration, D + With D - The sum is an operation of eliminating the input signal to extract the correlation result by using a structure similar to the difference. PN is the injection value of the pseudo-random sequence model at the input end, and ra refers to the weight for iteration. In the extraction of the false correlation result, by injecting an input signal with opposite polarity, the signal D is obtained. + With D - After that, the adder is used to obtain the error function to be extracted: D out =D + +D - ; Through the statistical characteristics of PN code, using D out The correlation operation is performed on the PN code, and the operation of the correlation operation is to add after multiplication to obtain the error function related to the actual weight and the estimated weight.

[0015] Furthermore, the use of D out When the correlation operation is performed with the pseudo-random sequence PN code, the error function obtained is positively correlated with the difference between the actual weight and the expected weight: Where r is the coefficient of PN code modulation, ra es is the estimated weight value, and ra is the actual weight value.

[0016] Furthermore, the error function extraction process utilizes the statistical characteristics of the PN code. The error function obtained by correlation operation is positively correlated with the difference between the actual inter-stage gain and the expected inter-stage gain. The related operation function is: The result is They represent the output of the digital code quantized after the input signals with opposite polarities are input in the differential structure. When the two results are added, the input signal is eliminated as the noise of the extracted correlation result because the polarities of the input signals are opposite. The signal at this time is only related to the PN code and the error source between channels.

[0017] Furthermore, the overall output of the ADC can be expressed as:

[0018]

[0019] Among them, V in the above formula in Refers to the analog signal input to the analog-to-digital converter for quantization, Q n It refers to the quantization error at the current stage. Because the pipeline is quantized step by step, after the signal is quantized at the current stage, the unquantized range will be passed to the back-end ADC for further quantization. n,nIt refers to the quantization error of the last-stage Flash ADC, which is also the final quantization error of the entire pipeline ADC.

[0020] The advantages and beneficial effects of the present invention are as follows:

[0021] 1. The present invention aims at the problems of interference from input signals, unsatisfactory correlation results and noise in the digital background calibration algorithm of PN code injection, and proposes a digital calibration method based on PN code injection to improve the problem. By adjusting the structure, the interference of the input signal as noise on the extracted correlation is avoided, the extraction of the correlation function is improved, and the overall performance of the analog-to-digital converter is improved.

[0022] 2. At the same time, the traditional calibration method is to extract directly through the correlation operation, which is a cumulative multiplication and sum process. This means that hardware implementation will take up a large part of the resources. Therefore, the present invention proposes a method of taking the sign bit of the correlation result instead of accumulating the product. This method is simple in operation, can also achieve the calibration effect, and consumes less hardware resources.

[0023] The innovations and beneficial effects of the present invention are mainly reflected in the following aspects:

[0024] Innovation

[0025] 1. The differential structure is used to eliminate input signal interference: The present invention cleverly uses the differential structure to eliminate the interference of the input signal on the PN code correlation operation by injecting an input signal with opposite polarity into the sub-ADC of the pipeline ADC to be calibrated and then summing the output signals. This innovation ensures that the calibration algorithm can accurately extract error parameters under any input signal, thereby improving the robustness and accuracy of the calibration.

[0026] 2. Sign function replaces correlation operation: The multiplication and accumulation operation used in the traditional digital calibration algorithm is highly complex and consumes a lot of hardware. In the present invention, the sign function is used for the correlation result, which greatly simplifies the operation process, reduces resource consumption, and maintains the effectiveness of calibration. This innovation not only reduces hardware costs, but also speeds up the calibration process.

[0027] 3. Iterative algorithm suitable for real-time calibration: The calibration method of the present invention adopts an iterative weight update method, which can perform real-time calibration while the analog-to-digital converter is working normally, avoiding the problem that the traditional calibration method needs to interrupt the ADC. The step size of the iterative algorithm is controllable and can be flexibly adjusted according to the requirements of calibration accuracy and speed, ensuring the efficiency and accuracy of calibration.

[0028] Beneficial Effects

[0029] 1. Improve calibration accuracy: By eliminating the influence of the input signal, the present invention can more accurately extract the non-ideal parameters of the ADC, thereby improving the calibration accuracy, so that the pipeline ADC can still maintain good conversion performance in the presence of error sources such as capacitor mismatch and limited gain of operational amplifiers.

[0030] 2. Reduce hardware resource consumption: Using symbolic functions to replace complex correlation operations simplifies the design of the calibration network, reduces hardware resource consumption, and improves the cost performance of the entire system.

[0031] 3. Real-time calibration capability: The present invention can perform calibration while the analog-to-digital converter is operating, and has the ability to track and correct non-ideal parameter changes in real time, thereby enhancing the adaptability and stability of the ADC in complex environments.

[0032] Why is it not easy to think of?

[0033] These innovations are not easy to think of because they require a deep understanding of the limitations of traditional calibration methods and an in-depth study of the statistical characteristics of PN codes. In the field of digital calibration, analog compensation technology is widely used because of its intuitiveness and maturity, while combining statistical calibration with differential structure, sign function and other technologies to solve the problem requires interdisciplinary knowledge and creative thinking. In addition, the concept of real-time calibration needs to take into account the compatibility between the ADC's operating mode and the calibration algorithm, which also increases the difficulty of innovation. Therefore, these innovations of the present invention are in-depth insights and breakthroughs in the prior art, reflecting high technical creativity and practicality. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 Schematic diagram of the pipeline ADC structure used in the calibration method of the preferred embodiment provided by the present invention

[0035] Figure 2 It is a calibration implementation block diagram provided by an example of the present invention;

[0036] Figure 3 It is a block diagram of the present invention for eliminating noise interference of correlation operation by using differential structure;

[0037] Figure 4 It is a diagram of a network model for calibration of a sign function adopted by the present invention;

[0038] Figure 5 It is the simulation diagram of PN code autocorrelation and cross-correlation;

[0039] Figure 6 It is a spectrum comparison diagram of the pipeline denoising related results in the present invention. DETAILED DESCRIPTION

[0040] The following will describe the technical solutions in the embodiments of the present invention in detail in conjunction with the accompanying drawings in the embodiments of the present invention. The described embodiments are only part of the embodiments of the present invention.

[0041] The technical solution of the present invention to solve the above technical problems is:

[0042] The present invention includes the following models: a pipeline ADC model, a calibration network model and a pseudo-random sequence generator model. The pseudo-random sequence generator model injects a sequence code for amplitude adjustment into the input of each level of ADC to be calibrated; the pipeline model includes a sub-level ADC module that can adjust the error source, a sub-ADC module in the ADC to be calibrated and a Flash ADC of the last level; the calibration network model mainly includes a correlation operation model and an iterative update weight model. The actual weight is obtained by injecting a PN code into the ADC and performing a correlation operation at the back end, and then the actual weight is obtained by using an iterative algorithm and substituted into the synthesis module of the output signal for calibration.

[0043] The present invention proposes an improved calibration algorithm for the existing statistical calibration algorithm, including the PN code injection calibration algorithm. In view of the problems that the original calibration algorithm is interfered by the input signal noise, resulting in inaccurate calibration, long time period of the related calculation process, and high hardware consumption, a digital calibration method for PN code injection of pipeline ADC is proposed. This method injects an input signal of opposite polarity into the sub ADC built in the ADC to be calibrated to obtain an output signal D + With D - , after summing, the calibration items that are not related to the pseudo-random sequence can be obtained, thereby eliminating the flooding of the PN sequence signal by the input signal, making the correlation result extracted by the correlation operation more accurate, thereby improving the calibration effect of the back end. In addition, using the symbol function to replace the result of the correlation calculation can reduce resource consumption, simplify the complexity of the circuit, and save hardware resource consumption.

[0044] A digital calibration method for PN code injection of pipeline ADC, such as Figure 2 As shown in the figure, the overall framework of this method includes: 16-bit 125MS / s pipeline ADC, amplitude The pseudo-random code sequence generator and the calibration network part including the related operation and iteration part. The main function of the pipeline ADC model is to form a non-ideal ADC. The non-ideal factors include errors such as capacitor mismatch, limited gain and limited bandwidth of the operational amplifier; the sequence code generator mainly generates pseudo-random sequence codes and injects them into the input of the inter-stage ADC to be calibrated; the main function of the calibration network part is to execute the calibration algorithm, and calibrate the digital code after iterating the required calibration coefficient to obtain the final calibration signal.

[0045] The pipeline ADC model consists of 7-stage 2.5-bit primary ADC and 2-bit Flash ADC. In order to avoid errors caused by comparator offset, a redundant structure is adopted. The primary ADC consists of sub-ADC and MDAC modules. The sub-ADC mainly quantizes the input signal and injects input signals with opposite polarities into different channels. Figure 3 As shown, the corresponding output signal is obtained. In the present invention, the sub-ADC is added to the ADC to be calibrated, and only a comparator needs to be added to the circuit. For analog circuits, this solution is feasible. The MDAC mainly completes the amplification of the residual value and transmits it to the next ADC for further quantization.

[0046] In the pseudo-random sequence generator, a set of pseudo-random sequences is generated through a linear feedback shift register, and the output of the last register is taken as the output of the sequence code. For an n-level pseudo-random sequence generator, it can generate 2 n -1 state. For a sequence code with binary numbers 0 and 1, the probability of 0 and 1 being generated can be considered equal. When the generated sequence is analyzed by power spectrum, it can be seen that it presents characteristics similar to white noise. At the same time, the analysis of the autocorrelation and cross-correlation of the sequence shows that the cross-correlation between the sequence and other signals is close to 0, such as Figure 5 As shown, when correlation operation is performed with its own signal, it has a good correlation, and when correlation operation is performed with other signals, the cross-correlation tends to 0.

[0047] In this embodiment, the digital calibration circuit, such as Figure 2 As shown in the figure, the generated pseudo-random sequence code is injected into the input of the circuit to be calibrated to extract the inter-stage gain offset caused by capacitor mismatch. In order to avoid exceeding the quantization range of the ADC after the PN code is injected, the amplitude of the PN code is adjusted, and the size of the PN code generated is As the sequence code is injected into the signal path, the quantization at the back end also includes the PN code with error information. Using the statistical characteristics of the PN code, the error term can be obtained and the error source can be calibrated through iteration.

[0048] In this embodiment, a digital calibration method for PN code injection of a pipeline ADC is disclosed, such as Figure 3As shown, in this calibration method, a PN code with statistical characteristics is injected into the input of a pipeline ADC that can adjust the error source. When the PN code is quantized through a signal path, a digital output containing an error parameter is obtained. The output is placed in a calibration circuit, the error parameter is extracted, and the error digital output is adjusted and output, thereby achieving calibration. Due to the change in weights in the entire pipeline ADC, in this implementation, the calibration of the first three stages is mainly considered. Therefore, three different PN code sequences are also required to be generated and injected into the corresponding calibration ADC.

[0049] like Figure 2 As shown in the figure, the ADC of the first stage is calibrated, and the structures of the other two stages are the same. For the special working mode of the pipeline ADC, the quantization is carried out step by step. After the input signal is quantized by the previous ADC, it is passed to the next stage for quantization. Finally, the digital code output by each stage is integrated and output. For an n-stage pipeline ADC, its ideal digital output is And the corresponding weight expression is Where D i is the digital code corresponding to each level output, W i is the corresponding weight, and the weight of each level is equal to the inverse of the amplification factor of the previous level. Due to the existence of the weight, the quantization error of the back end can be regarded as negligible, so in this embodiment, only the error source of the first three levels is calibrated.

[0050] The sequence generator mainly obtains the m sequence by performing modulo-2 operation. In this embodiment, the output binary numbers 0 and 1 are modulated and the output is The sequence generator is essentially composed of a group of shift registers. By selecting the appropriate series and characteristic polynomials, due to the feedback in the system, the state inside the shift register will constantly change under the action of the shift pulse. The last bit of the shift register is taken as the output, and its output sequence is. However, since it is not a true Gaussian noise signal, its correlation function can only be close to white noise. In order to make it present better statistical characteristics, the length of the PN code sequence needs to be long enough to reduce the influence of white noise. In this embodiment, a 15-level characteristic polynomial is used to generate the sequence. At the same time, this will mean that a total of 2 15 -1 state, excluding the all-zero state, a total of 2 15 A pseudo-random sequence of length -1.

[0051] In this embodiment, the calibration network is mainly composed of correlation operations and iterative networks. The output obtained by correlation operations is then passed into the iterative network to achieve calibration. In this process, the operation method usually used is the operation of multiplication followed by addition. In this embodiment, it is proposed to use a symbol function instead and use it to guide the direction of iteration. The amount of operation and hardware consumption are reduced.

[0052] like Figure 2 The flowchart of the embodiment shown in the figure shows that for the Pipeline ADC model, in actual design, a capacitance scaling design strategy is usually adopted. For the analog-to-digital converter, the main source of error is the capacitance mismatch caused by the process or other reasons, which deviates from the ideal capacitance. Errors caused by capacitance mismatch may occur in both the MDAC and the op amp. In order to overcome the capacitance mismatch, calibration technology is needed to improve it. In this embodiment, a PN code injection calibration method is adopted, such as Figure 3 As shown in the figure, different PN codes are injected into the input terminals of different ADCs to be calibrated in a time-sharing manner. Since the pipeline ADC adopts a redundant structure, the comparator itself has a certain tolerance for input signals. However, in order to reduce the burden on the comparator, in this embodiment, the reference voltage is injected. Due to the special working structure of the capacitor scaling structure and pipeline ADC, the back-end ADC is considered to be an ideal structure in this embodiment. For the ADC that needs to be calibrated in the first three stages, the output of its MDAC can be expressed as V out,i =(1+β)[(4+α)V in +(1+Δ)·D i ·V ref ] Where 1+β refers to the error coefficient caused by the limited gain and limited bandwidth of the op amp, 4+α and 1+Δ represent the effect of capacitor mismatch on the output, V ref It represents the reference voltage of the pipeline ADC.

[0053] The digital output of the overall pipeline ADC is

[0054] When the digital code output of each level is substituted, we can get:

[0055]

[0056] Where Q n,1 is the quantization error of each stage, ra is the actual inter-stage gain value, ra es,i is the estimated value of the inter-stage gain. When the actual inter-stage gain is obtained and the estimated value of the inter-stage gain is equal to the actual inter-stage gain, Where Q n,nis the quantization error corresponding to the flash ADC of the last stage, and the second term corresponds to the quantization error of the entire ADC, and the pipeline ADC is calibrated. Therefore, the key to this calibration method is to obtain accurate actual inter-stage gain.

[0057] like Figure 2 As shown, the generated pseudo-random code is injected into the input of the ADC to be calibrated. In order to avoid division operation, the synthesis of the output signal at this time is regarded as the sum of multiplications between stages. At this time, the overall output of the ADC can be expressed as:

[0058]

[0059] The pseudo-random signal is directly injected into the signal path, and the final output also includes the digital output corresponding to the PN code with an error coefficient.

[0060] In this embodiment, two groups of identical structures are used in the sub ADC in the inter-stage ADC to be calibrated, but the polarities of their input signals are opposite. Therefore, two groups of outputs can be obtained, namely and

[0061] In this embodiment, the two groups of outputs are summed and then correlated with the injected pseudo-random code. Using the statistical characteristics of the PN code, the items unrelated to the PN code are equal to zero under ideal conditions. However, the actual PN code is not an ideal white noise signal, so after the PN code is correlated with the signal, the result will not be ideal. And because the input signal has a larger amplitude than the PN code, the extracted signal is submerged by the input signal and is not an ideal signal. Therefore, in this embodiment, and The result after summing is correlated with the injected pseudo-random sequence, so that the interference of the input signal on the operation can be avoided. The related operation function is The result is

[0062] It can be seen that the error function is positively correlated with the difference between the actual inter-stage gain and the expected inter-stage gain. The error function is subjected to fast Fourier analysis on Matlab, and the spectrum before and after the processing of this embodiment can be obtained as follows: Figure 6 As shown in the figure, after the processing, the energy of the spectrum is well concentrated in the error function part, while eliminating the influence of the input signal.

[0063] After the relevant operation, the error function is sent to the iterative network. In the iterative network, the calibration network is as follows: Figure 4 As shown, the iterative equation is:

[0064]

[0065] Where μ refers to the iteration step size. When the step size is large, the iteration can be performed quickly, but the accuracy is not enough. When the step size is small, the iteration result is more accurate, but the iteration time is longer, so it is necessary to compromise between the two to find a suitable step size. The sign function of the relevant operation result is used to guide the direction of the weight iteration update, so as to achieve the approximation of the estimated weight and the actual weight. Therefore, the correct weight result is used to generate the digital output code, thereby achieving calibration.

[0066] In summary, the present invention proposes a digital calibration method for PN code injection of pipeline ADC based on the traditional pipeline ADC calibration technology. Compared with the traditional calibration method, the algorithm of the present invention can better extract the error function without significantly increasing the complexity of analog and digital circuit design, reduce the input signal as noise, and the impact on signal extraction, which is conducive to the improvement of subsequent calibration accuracy and speed.

[0067] The innovations and beneficial effects of the present invention are mainly reflected in the following aspects:

[0068] Innovation

[0069] 1. The differential structure is used to eliminate input signal interference: The present invention cleverly uses the differential structure to eliminate the interference of the input signal on the PN code correlation operation by injecting an input signal with opposite polarity into the sub-ADC of the pipeline ADC to be calibrated and then summing the output signals. This innovation ensures that the calibration algorithm can accurately extract error parameters under any input signal, thereby improving the robustness and accuracy of the calibration.

[0070] 2. Sign function replaces correlation operation: The multiplication and accumulation operation used in the traditional digital calibration algorithm is highly complex and consumes a lot of hardware. In the present invention, the sign function is used for the correlation result, which greatly simplifies the operation process, reduces resource consumption, and maintains the effectiveness of calibration. This innovation not only reduces hardware costs, but also speeds up the calibration process.

[0071] 3. Iterative algorithm suitable for real-time calibration: The calibration method of the present invention adopts an iterative weight update method, which can perform real-time calibration while the analog-to-digital converter is working normally, avoiding the problem that the traditional calibration method needs to interrupt the ADC. The step size of the iterative algorithm is controllable and can be flexibly adjusted according to the requirements of calibration accuracy and speed, ensuring the efficiency and accuracy of calibration.

[0072] Beneficial Effects

[0073] 1. Improve calibration accuracy: By eliminating the influence of the input signal, the present invention can more accurately extract the non-ideal parameters of the ADC, thereby improving the calibration accuracy, so that the pipeline ADC can still maintain good conversion performance in the presence of error sources such as capacitor mismatch and limited gain of operational amplifiers.

[0074] 2. Reduce hardware resource consumption: Using symbolic functions to replace complex correlation operations simplifies the design of the calibration network, reduces hardware resource consumption, and improves the cost performance of the entire system.

[0075] 3. Real-time calibration capability: The present invention can perform calibration while the analog-to-digital converter is operating, and has the ability to track and correct non-ideal parameter changes in real time, thereby enhancing the adaptability and stability of the ADC in complex environments.

[0076] Why is it not easy to think of

[0077] These innovations are not easy to think of because they require a deep understanding of the limitations of traditional calibration methods and an in-depth study of the statistical characteristics of PN codes. In the field of digital calibration, analog compensation technology is widely used because of its intuitiveness and maturity, while combining statistical calibration with differential structure, sign function and other technologies to solve the problem requires interdisciplinary knowledge and creative thinking. In addition, the concept of real-time calibration needs to take into account the compatibility between the ADC's operating mode and the calibration algorithm, which also increases the difficulty of innovation. Therefore, these innovations of the present invention are in-depth insights and breakthroughs in the prior art, reflecting high technical creativity and practicality.

[0078] The systems, devices, modules or units described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, the computer may be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0079] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0080] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0081] The above embodiments should be understood to be only used to illustrate the present invention and not to limit the protection scope of the present invention. After reading the contents of the present invention, technicians can make various changes or modifications to the present invention, and these equivalent changes and modifications also fall within the scope defined by the claims of the present invention.

Claims

1. A calibration method for PN code injection of a pipeline ADC, characterized in that: The following steps are involved: S1: Build the ideal model of pipeline ADC and the PN code generator model, obtain the non-ideal ADC model by adjusting the error parameters in the ideal ADC model, and inject the PN code at the input of the stage to be calibrated to generate the ADC digital output with error, and use the generated PN code and the digital output with error as the input of the error extraction model; S2: Build a signal correlation operation model, use the output signal generated by S1 and the PN code signal to perform correlation operation to extract the correlation results, and perform spectrum analysis on the correlation results; S3: Send the relevant results generated by S2 to the iterative network, extract the actual weights required and update them to achieve calibration.

2. A PN code injection calibration method for pipeline ADC according to claim 1, characterized in that: The step S1 of building the pipeline ADC model and the PN code generator model specifically includes: using Matlab\Simulink software, adding non-ideal factors including time jitter, operational amplifier limited gain, capacitor mismatch and comparator mismatch error to the pipeline ADC, and establishing a 16-bit 125M / S pipeline ADC non-ideal model. The pipeline ADC model is a "2.5×7+2" structure, the first seven pipeline sub-stages are 2.5bit / stage, the last stage uses a 2bit Flash ADC, and an identical sub-ADC is also built in the pipeline sub-stage to be calibrated; at the same time, a 15-stage pseudo-random sequence code is generated in the pseudo-random code generation module, and a total of 2 15 -1 state, the output after modulation is V ref It represents the reference voltage, which is the reference standard used by ADC to convert analog signals into digital signals. It determines the maximum and minimum voltage range of the analog signal that the ADC can recognize and the resolution of the ADC. For the ADC, if the input signal exceeds the reference voltage, the output digital code will be incorrect. Therefore, in order to reduce the impact of the PN code injected into the input end on the ADC, the size of the PN code is adjusted according to the amplitude of the reference voltage before injection.

3. A PN code injection calibration method for pipeline ADC according to claim 1, characterized in that: The step S1 obtains a non-ideal ADC model by adjusting the error parameters in the ideal ADC model, specifically comprising: injecting a sequence code generated by a PN code into the input end of the pipeline ADC; injecting a sine wave signal with an amplitude of 0.5 and a frequency of 42.36 MHz into the input end, and outputting a digital output code D containing the PN code and the error at the same sampling point; + With D - ; Use these two sets of data to get the error function, and iterate to get the actual weight. The following is the expression for iteration: Where μ is the step size for iteration, D + With D - The sum is an operation of eliminating the input signal to extract the correlation result by using a structure similar to the difference. PN is the injection value of the pseudo-random sequence model at the input end, and ra refers to the weight for iteration. In the extraction of the false correlation result, by injecting an input signal with opposite polarity, the signal D is obtained. + With D - After that, the adder is used to obtain the error function to be extracted: D out =D + +D - ; Through the statistical characteristics of PN code, using D out The correlation operation is performed on the PN code, and the operation of the correlation operation is to add after multiplication to obtain the error function related to the actual weight and the estimated weight.

4. A PN code injection calibration method for pipeline ADC according to claim 3, characterized in that: The utilization of D out When the correlation operation is performed with the pseudo-random sequence PN code, the error function obtained is positively correlated with the difference between the actual weight and the expected weight: Where r is the coefficient of PN code modulation, ra es is the estimated weight value, and ra is the actual weight value.

5. A digital calibration method for PN code injection of pipeline ADC according to claim 4, characterized in that the error function extraction process utilizes the statistical characteristics of the PN code, and the error function obtained by correlation operation is positively correlated with the difference between the actual inter-stage gain and the expected inter-stage gain, and the related operation function is The result is They respectively represent the output of the digital code quantized after the input signals with opposite polarities are input in the differential structure; when the two results are added, the input signal is eliminated as the noise of the extracted correlation result because the polarities of the input signals are opposite, and the signal at this time is only related to the PN code and the error source between channels.

6. A digital calibration method for PN code injection of pipeline ADC according to claim 5, characterized in that: The overall output of the ADC can be expressed as: Among them, V in the above formula in Refers to the analog signal input to the analog-to-digital converter for quantization, Q n It refers to the quantization error at the current stage. Because the pipeline is quantized step by step, after the signal is quantized at the current stage, the unquantized range will be passed to the back-end ADC for further quantization. n,n It refers to the quantization error of the last-stage Flash ADC, which is also the final quantization error of the entire pipeline ADC.

Citation Information

Patent Citations

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