Silicon carbide power device cellular structure, preparation method thereof and semiconductor device

Abstract

The embodiment of the invention discloses a silicon carbide power device cellular structure, a preparation method thereof and a semiconductor device, and belongs to the technical field of semiconductors. The silicon carbide power device cellular structure comprises a substrate; the gate structure comprises at least two first gate structures, and the at least two first gate structures are arranged in the substrate at intervals; the source electrode structure is arranged on the substrate and at least surrounds partial side surfaces of the two first grid electrode structures; a part of the source structure between the two first gate structures extends towards the bottom surface of the substrate to form a protruding structure, and a part of the protruding structure forms an electric field shielding structure. The gate oxide electric field can be better shielded by adding the source electrode structure, in addition, more carriers can be provided by adding the source electrode structure, the concentration of the source electrode structure can be further reduced by increasing the area, and therefore the anti-short-circuit capacity of the device is properly improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a silicon carbide power device cell structure and a preparation method thereof, and a semiconductor device. Background Art

[0002] Silicon carbide has excellent properties such as wide bandgap, high thermal conductivity, high breakdown field strength, and high electron saturation velocity, and is widely used in power devices, but high cost is still a factor limiting its development. Trench gate silicon carbide power devices have higher channel mobility, and the device cell size can be smaller, with a greater channel density, which makes it have lower forward on-resistance, improve output performance and reduce chip area.

[0003] However, due to the high breakdown electric field and high dielectric constant of silicon carbide, the gate oxide dielectric layer of the trench gate silicon carbide power device is more likely to break down, resulting in poor device reliability. In order to solve this problem, an electric field shielding layer is usually set on the device. However, the effect of the electric field shielding layer in shielding the gate oxide electric field is poor. Summary of the invention

[0004] In view of the above problems, the present application provides a silicon carbide power device cell structure and a preparation method thereof, and a semiconductor device, which increases the area of ​​the source structure, and part of the source structure constitutes an electric field shielding layer, which can better shield the gate oxide electric field. In addition, the increase in the source structure can provide more carriers, and the increase in area can further reduce the concentration of the source structure, thereby appropriately increasing the short-circuit resistance of the device.

[0005] In order to achieve the above objectives, this application provides the following technical solutions:

[0006] A first aspect of an embodiment of the present application provides a silicon carbide power device cell structure, including:

[0007] substrate;

[0008] A gate structure, the gate structure comprising at least two first gate structures, and the at least two first gate structures are spaced apart and arranged in the substrate;

[0009] A source structure, the source structure is disposed on the substrate and at least surrounds a portion of side surfaces of at least two of the first gate structures;

[0010] The source structure located between any two adjacent first gate structures extends toward the bottom surface of the substrate to form a protruding structure; a portion of the protruding structure constitutes an electric field shielding structure.

[0011] In an achievable implementation, the source structure and the protruding structure both include a first conductivity type source layer and a second conductivity type source active layer;

[0012] The second conductive type source active layer is disposed on the substrate, and the first conductive type source layer is disposed on the second conductive type source active layer;

[0013] The first conductive type source layer and the second conductive type source active layer both extend toward the bottom surface of the substrate;

[0014] At least a portion of the second conductive type source active layer in the protruding structure forms the electric field shielding structure.

[0015] In an achievable implementation, the source structure and the protruding structure both include a first conductivity type source layer and a second conductivity type source active layer;

[0016] The second conductive type source active layer is disposed on the substrate, and the first conductive type source layer is disposed on the second conductive type source active layer;

[0017] At least a portion of the second conductive type source active layer in the protruding structure forms the electric field shielding structure.

[0018] In one possible implementation, the source structure surrounds a portion of a side surface of the first gate structure.

[0019] In one possible implementation, the source structure surrounds the top of the first gate structure.

[0020] In an achievable implementation, the first gate structure has a first extension portion; the first extension portion extends in a direction away from the first gate structure.

[0021] In an achievable implementation, the gate structure further includes a second gate structure; the second gate structure is located between the two first gate structures.

[0022] In an achievable implementation, the second gate structure is a planar gate structure, the second gate structure is located above the electric field shielding structure, and the bottom surface of the second gate structure is in contact with the protruding structure.

[0023] In an achievable implementation, the second gate structure is a trench gate structure, and the second gate structure is located in the protruding structure.

[0024] In a feasible implementation manner, the source structure further surrounds a portion of the side surface of the second gate structure.

[0025] In an achievable implementation, in the first cross section, the first conductivity type source layer of the protruding structure covers at least a portion of a side surface of the second gate structure.

[0026] In an achievable implementation, in the first cross section, the first conductivity type source layer of the protruding structure covers at least a portion of a bottom surface of the second gate structure.

[0027] In a feasible implementation, the second conductive type source active layer of the protruding structure covers the first conductive type source layer, so that the second conductive type source active layer of the protruding structure covers the entire bottom surface and all side surfaces of the second gate structure.

[0028] In an achievable implementation, in the second cross section, the second conductivity type source active layer of the protruding structure covers at least a portion of the bottom surface of the second gate structure;

[0029] The first cross section and the second cross section are different cross sections.

[0030] In an achievable implementation, the second gate structure has a main body and a second extension portion, the second extension portion is connected to a side surface of the main body and extends toward the first gate structure;

[0031] The main trunk direction of the main trunk portion is a first direction, the extending direction of the second extending portion is a second direction, and the first direction and the second direction intersect.

[0032] In a feasible implementation manner, the end portion of the second conductivity type source active layer of the protruding structure in the second direction does not exceed the extending portion.

[0033] In one possible implementation, the second extension portion includes a plurality of;

[0034] A plurality of second extension portions are disposed on a plane parallel to the substrate at one side of the second gate structure and are arranged at intervals along the first direction.

[0035] In an achievable implementation, the second gate structure includes a plurality of second gate structures, and the plurality of second gate structures are arranged at intervals along the second direction;

[0036] The second extension portion of each second gate structure is located on the same side of the corresponding second gate structure.

[0037] In a feasible implementation manner, the second extension portion of each second gate structure is located at an opposite side of the corresponding gate structure.

[0038] In one possible implementation, the second extension portion includes a plurality of;

[0039] On a plane parallel to the substrate, a plurality of second extension portions are disposed on opposite sides of the second gate structure along a second direction; and a plurality of second extension portions located on the same side are arranged at intervals along the first direction.

[0040] In an achievable implementation, the second extension portions located on both sides of the same second gate structure are arranged opposite to each other along the second direction;

[0041] Alternatively, the second extension portions located on both sides of the same second gate structure are staggered along the second direction.

[0042] In a feasible implementation, the silicon carbide power device cell structure further includes a source electrode layer, and the source electrode layer is disposed on the source structure and connected to the source structure.

[0043] In an achievable implementation, the silicon carbide power device cell structure further includes a second conductivity type source ohmic contact layer, and the source electrode layer and the source structure are connected via the second conductivity type source ohmic contact layer.

[0044] In an achievable implementation, along a thickness direction intersecting the substrate, the second conductivity type source ohmic contact layer is located between the first gate structure and the second gate structure.

[0045] In a feasible implementation, the base includes a substrate and an epitaxial layer, and the epitaxial layer is arranged on the substrate.

[0046] In an achievable implementation, the gate structure includes a gate and a gate dielectric layer, and the gate dielectric layer covers a bottom surface and side surfaces of the gate.

[0047] A second aspect of an embodiment of the present application provides a method for preparing a silicon carbide power device cell structure, comprising:

[0048] providing a substrate;

[0049] A source structure and a gate structure are formed on the substrate, wherein the gate structure includes two first gate structures; the source structure at least surrounds part of the side surfaces of the two first gate structures, and the part of the source structure located between the two first gate structures extends toward the bottom surface of the substrate to form a protruding structure; part of the protruding structure constitutes an electric field shielding structure.

[0050] In an achievable implementation, the step of forming the source structure includes:

[0051] forming a protruding structure, wherein the protruding structure is disposed in the substrate;

[0052] A source structure is formed, the source structure surrounds a portion of the outer peripheral surface of the protruding structure and is connected to the first source structure; a portion of the protruding structure constitutes the electric field shielding structure.

[0053] In an achievable implementation, after the step of forming the source structure and before the step of forming the gate structure, the method further includes:

[0054] A second conductive type source ohmic contact layer is formed, wherein the second conductive type source ohmic contact layer is disposed on the source structure.

[0055] In one possible implementation, the step of forming the gate structure includes:

[0056] forming at least two first gate structures disposed at intervals, each of the first gate structures penetrating the source structure in a direction perpendicular to the substrate, so that the source structure surrounds a portion of the outer peripheral surface of each first gate structure;

[0057] A second gate structure is formed, wherein the second gate structure is located within the protruding structure.

[0058] In one possible implementation, the step of providing a substrate includes:

[0059] providing a substrate;

[0060] An epitaxial layer is formed, wherein the epitaxial layer is disposed on the substrate.

[0061] A third aspect of an embodiment of the present application provides a semiconductor device, comprising the silicon carbide power device cell structure described in the first aspect.

[0062] The embodiment of the present application provides a silicon carbide power device cell structure and a preparation method thereof, and a semiconductor device, including a source structure arranged on a substrate, the source structure at least surrounding part of the side surfaces of two first gate structures; a part of the source structure located between the two first gate structures extends toward the bottom surface of the substrate to form a protrusion structure, and a part of the protrusion structure has an electric field shielding structure. In this way, the area of ​​the source structure is increased, and part of the source structure constitutes an electric field shielding layer, which can be better used to shield the gate oxide electric field. In addition, the increase of the source structure can provide more carriers, and the increase in area can further reduce the concentration of the source structure, thereby appropriately increasing the short-circuit resistance of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] Figure 1 A schematic diagram of the structure of a silicon carbide power device cell structure provided in an embodiment of the present application;

[0064] Figure 2 for Figure 1 The cross-sectional view along the AA direction;

[0065] Figure 3 for Figure 1 The cross-sectional view along the BB direction;

[0066] Figure 4 A process flow chart of a method for preparing a silicon carbide power device cell structure provided in an embodiment of the present application;

[0067] Figure 5 A partial schematic diagram of forming a protruding structure in a method for preparing a cellular structure of a silicon carbide power device provided in an embodiment of the present application;

[0068] Figure 6 A schematic diagram of forming a protruding structure in a method for preparing a cellular structure of a silicon carbide power device provided in an embodiment of the present application;

[0069] Figure 7 A schematic diagram of forming a source structure in a method for preparing a cell structure of a silicon carbide power device provided in an embodiment of the present application;

[0070] Figure 8 A schematic diagram of a second gate trench on a first cross section in a method for preparing a silicon carbide power device cell structure provided in an embodiment of the present application;

[0071] Fig. 9 A schematic diagram of a second gate trench on a second cross section in a method for preparing a silicon carbide power device cell structure provided in an embodiment of the present application;

[0072] Fig.10 A schematic diagram of forming a first gate trench in a method for preparing a silicon carbide power device cell structure provided in an embodiment of the present application;

[0073] Fig.11 A gate structure is formed in the method for preparing a silicon carbide power device cell structure provided in an embodiment of the present application.

[0074] Description of reference numerals:

[0075] 100-base; 110-substrate; 120-epitaxial layer;

[0076] 200-gate structure; 210-first gate structure; 220-second gate structure; 221-trunk; 222-second extension; 211-gate; 212-gate dielectric layer; 240: first gate trench; 250: second gate trench;

[0077] 300 - source structure; 310 - first conductivity type source layer; 320 - second conductivity type source active layer; 330 - protrusion structure;

[0078] 400-insulation layer;

[0079] 500- a second conductive type source ohmic contact layer;

[0080] 600- source electrode layer;

[0081] 700: first photoresist layer; 710: first mask opening;

[0082] 800: second photoresist layer; 810: second mask opening;

[0083] 900 - fourth photoresist layer. DETAILED DESCRIPTION

[0084] In the related art, in order to protect the gate dielectric layer and improve the reliability of trench silicon carbide power devices, high-energy ion implantation is usually performed on the epitaxial layer to form an electric field shielding layer, which is located on both sides of the gate trench and has a bottom lower than the bottom of the trench, to shield the electric field at the bottom of the trench gate. However, the above electric field shielding layer has a poor shielding effect on the gate oxide electric field.

[0085] In response to the above technical problems, the embodiments of the present application provide a silicon carbide power device cell structure and a preparation method thereof, and a semiconductor device, including a source structure, which is arranged on a substrate and surrounds at least part of the side surfaces of two first gate structures; a portion of the source structure located between the two first gate structures extends toward the bottom surface of the substrate to form an electric field shielding structure. In this way, adding a source structure can better shield the gate oxide electric field. In addition, the addition of the source structure can provide more carriers, and the increase in area can further reduce the concentration of the source structure, thereby appropriately increasing the short-circuit resistance of the device.

[0086] In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be described in more detail below in conjunction with the drawings in the embodiments of the present application. In the drawings, the same or similar reference numerals throughout represent the same or similar parts or parts with the same or similar functions. The described embodiments are part of the embodiments of the present application, not all of the embodiments. The embodiments described below with reference to the drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limitations on the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0087] Reference Figure 1As shown, an embodiment of the present application provides a silicon carbide power device cell structure.

[0088] Reference Figures 1 to 3 As shown, the silicon carbide power device cell structure includes a substrate 100 .

[0089] The base 100 includes a substrate 110. The substrate 110 is a supporting component of the cell structure of the silicon carbide power device, and is used to support other components arranged thereon. The substrate 110 may be made of a semiconductor material. For example, the material of the substrate 110 may include silicon carbide.

[0090] An epitaxial layer 120 is disposed on the front side of the substrate 110 , and a drain electrode layer is disposed on the back side of the substrate 110 . The front side of the substrate 110 refers to the upper surface of the substrate 110 , and the back side of the substrate 110 refers to the lower surface of the substrate 110 .

[0091] It should be noted that, in this embodiment, the doping concentration of the epitaxial layer 120 is not limited, and can be prepared according to actual needs. In addition, there is no limitation on the conductivity type of the epitaxial layer 120. Exemplarily, the conductivity type of the epitaxial layer 120 can be the first conductivity type N type, or the conductivity type of the epitaxial layer 120 can be the first conductivity type P type.

[0092] In this embodiment, the conductivity type of the epitaxial layer 120 is mainly described by taking the first conductivity type N type as an example.

[0093] Reference Figures 1 to 3 As shown, the cell structure of the silicon carbide power device includes a gate structure 200 , and the gate structure 200 includes at least two first gate structures 210 . The at least two first gate structures 210 are spaced apart and arranged in the substrate 100 .

[0094] Reference Figures 1 to 3 As shown, the first gate structure 210 includes a gate dielectric layer 212, and the gate dielectric layer 212 covers the bottom and side surfaces of the first gate structure 210. In a specific preparation process, an epitaxial layer 120 can be first grown on the substrate 110, and then the epitaxial layer 120 can be patterned to form a gate trench in the epitaxial layer 120, and then a gate dielectric layer 212 is formed on the inner wall of the gate trench by thermal oxidation or deposition process, and then a gate is formed, and the gate fills the area surrounded by the gate dielectric layer 212; in this way, the gate dielectric layer 212 covers the bottom and side surfaces of the gate. Among them, the material of the gate dielectric layer 212 includes silicon oxide. The material of the gate includes but is not limited to polysilicon.

[0095] Illustratively, a deposition process can be used to first grow a gate dielectric layer 212 on the sidewalls of the gate trench, wherein the gate dielectric layer 212 also covers the top surface of the exposed epitaxial layer 120, and then doped polysilicon is deposited in the gate trench to fill the gate trench to form a gate, and the polysilicon and the gate dielectric layer are etched back to retain the gate dielectric layer and the gate in the gate trench, thereby forming a first gate structure 210.

[0096] The cell structure of the silicon carbide power device includes a source structure 300, which is arranged on the substrate 100 and surrounds at least part of the side surfaces of at least two first gate structures 210. In one example, the source structure 300 can surround part of the side surfaces of the first gate structure 210, so as to ensure that the substrate 100 has a source structure and a drain structure, thereby ensuring that the transistor operates normally. It should be understood that the source structure 300 can surround the top, bottom or other positions of the side surfaces of the first gate structure 210. Exemplarily, the source structure 300 can surround the first gate structure 210, so as to ensure that the source structure 300 is located at the top of the epitaxial layer 120, reduce the doping difficulty of the source structure 300, and help reduce the production cost of the source structure 300.

[0097] In order to better shield the gate oxide electric field and ensure the output characteristics of the silicon carbide power device, in an embodiment of the present application, the source structure 300 located between any two adjacent first gate structures 210 extends toward the bottom surface of the substrate 100 to form a protruding structure 330, and part of the protruding structure 330 constitutes an electric field shielding structure.

[0098] In this way, on the one hand, the area of ​​the source structure 300 can be increased, so that the gate oxide electric field can be better shielded. In addition, the increase of the source structure 300 can provide more carriers, and the increase in area can further reduce the concentration of the source structure, thereby appropriately increasing the short-circuit resistance of the device; on the other hand, the extended part of the source structure 300, when used as an electric field shielding structure, can effectively shield the gate oxide electric field when the device is in a reverse blocking state, thereby maximizing the shielding effect on the gate oxide electric field.

[0099] In one possible implementation, referring to Figures 1 to 3 As shown, the source structure 300 and the protruding structure 330 both include a first conductive type source layer 310 and a second conductive type source active layer 320 , wherein the second conductive type source active layer 320 is disposed on the substrate 100 , and the first conductive type source layer 310 is disposed on the second conductive type source active layer 320 .

[0100] The first conductivity type source layer 310 and the second conductivity type source active layer 320 both extend toward the bottom surface of the substrate 100 ; at least a portion of the second conductivity type source active layer 320 forms an electric field shielding structure.

[0101] The first conductivity type may be N-type, and the second conductivity type may be P-type; or the first conductivity type may be P-type, and the second conductivity type may be N-type.

[0102] In the embodiment of the present application, the second conductivity type source active layer 320 is the first conductivity type P type, and the conductivity type of the first conductivity type source layer 310 is the second conductivity type P type.

[0103] When a forward voltage is applied to the first gate structure 210, the second conductive type source active layer 320 surrounds a portion of the first gate structure 210 to form an inversion zone, that is, a channel zone, so that the conductivity type of the channel zone is the same as the conductivity type of the first conductive type source layer 310, thereby placing the silicon carbide power device cell structure in an on state.

[0104] Compared with the first conductive type source layer 310, the second conductive type source active layer 320 is closer to the bottom surface of the substrate 100, which can increase the depth of the electric field shielding structure. When the device is in the reverse blocking state, the gate oxide electric field formed by the silicon carbide power can be timely and effectively, thereby maximizing the shielding effect of the gate oxide electric field.

[0105] In an achievable implementation, the first gate structure 210 has a first extension portion; the first extension portion extends in a direction away from the first gate structure 210. In other words, the first extension portion at least protrudes from one side of the first gate structure 210. In this way, the contact area between the source structure 300 and the first gate structure 210 can be increased, and the channel area of ​​the silicon carbide power device during forward conduction can be increased as much as possible, and the forward conduction resistance can be reduced, thereby improving the performance of the silicon carbide power device.

[0106] In addition, the control capability of the first gate structure 210 over the channel region can be further enhanced, thereby improving the switching performance of the silicon carbide power device.

[0107] In one possible implementation, referring to Figure 2 As shown, the gate structure 200 may further include a second gate structure 220 ; the second gate structure 220 is located between the two first gate structures 210 and connected to the electric field shielding structure.

[0108] It should be noted that the reason for further setting the second gate structure 220 is that, in the prior art, since silicon carbide has a high breakdown electric field and a high dielectric constant, the gate oxide dielectric layer of the trench gate silicon carbide power device is more easily broken down, resulting in poor device reliability. In order to solve this problem, an electric field shielding layer is generally provided on the device, but the introduction of the electric field shielding layer will lead to an increase in the forward on-resistance, so the forward on-resistance needs to be further reduced while ensuring the reliability of the gate oxide dielectric layer.

[0109] Therefore, in the embodiment of the present application, a second gate structure 220 is provided, so that a deep electric field shielding structure is formed, which helps to increase a channel at the electric field shielding structure without affecting the electric field shielding effect. It is possible to increase the channel of the silicon carbide power device while ensuring the reliability of the gate oxide, thereby reducing the forward on-resistance of the silicon carbide power device and improving the output performance of the silicon carbide power device.

[0110] In an achievable implementation, the second gate structure 220 may be a planar gate structure, the second gate structure 220 is located above the protruding structure 330, and the bottom surface of the second gate structure 220 is in contact with the protruding structure 330. Planar gate means that the gate and the gate dielectric layer are both located on the surface of the silicon wafer to form a horizontal current channel. The gate dielectric layer of the second gate structure 220 covers the bottom surface of the gate.

[0111] In an achievable implementation, the second gate structure 220 may be a trench gate structure, and the second gate structure 220 is located in the protruding structure 330. In the trench gate, the gate is embedded in the silicon wafer to form a vertical current channel.

[0112] In this embodiment, the second gate structure 220 also includes a gate 211 and a gate dielectric layer 212 , and the gate dielectric layer 212 covers the bottom surface and side surfaces of the gate 211 .

[0113] In the present application, refer to Figure 2 As shown, the second gate structure 220 is mainly described as a trench gate structure. Compared with the planar gate silicon carbide power device cellular structure, the trench gate silicon carbide power device cellular structure can have a smaller cellular structure size and a higher channel mobility. Therefore, the trench gate silicon carbide power device greatly reduces the resistance of the silicon carbide power device during forward conduction, and improves the performance of the silicon carbide power device cellular structure.

[0114] In one feasible embodiment, the source structure 300 also surrounds part of the side surface of the second gate structure 220, so that the second gate structure 220, the source structure 300 and part of the epitaxial layer 120 constitute a transistor. In this way, more cell structures can be arranged within the same area, thereby increasing the overall current handling capacity of the power device or reducing the size of the device to meet the needs of higher power density and more compact design.

[0115] In order to clearly describe the relative position relationship between the source structure 300 and the protruding structure 330 and the second gate structure 220, two cross sections are used as examples for illustration. Figure 1 A cross-sectional view is made along the AA direction of the middle section line to form a first cross section. Figure 1 A sectional view is made along the section line BB to form a second cross section.

[0116] Please refer to Figure 2 As shown, in the first cross section, the first conductive type source layer 310 of the protruding structure 330 covers at least a portion of the side surface of the second gate structure 220. In one example, the first conductive type source layer 310 of the protruding structure 330 covers a portion of the side surface of the second gate structure 220. In another example, the first conductive type source layer 310 of the protruding structure 330 covers all the side surfaces of the second gate structure 220.

[0117] The embodiment of the present application can effectively increase the control area of ​​the second gate structure 220 on the current of the source structure (protruding structure 330) by adjusting the contact area between the first conductive type source layer 310 of the protruding structure 330 and the second gate structure 220, and can make the electric field distribution of the second gate structure 220 in the channel region more uniform, thereby improving the control ability of the carrier movement in the channel, which helps to achieve more precise current control and higher device performance.

[0118] In order to further reasonably regulate the contact area between the first conductive type source layer 310 of the protruding structure 330 and the second gate structure 220, the silicon carbide power device cell structure provided in the embodiment of the present application has the first conductive type source layer 310 of the protruding structure 330 covering at least a portion of the bottom surface of the second gate structure 220 in the first cross section.

[0119] In other words, the first conductive type source layer 310 of the protruding structure 330 may cover all side surfaces and part of the bottom surface of the second gate structure 220 , or the first conductive type source layer 310 of the protruding structure 330 may cover all side surfaces and the bottom surface of the second gate structure 220 .

[0120] Further, in the first cross section, the second conductive type source active layer 320 of the protruding structure 330 covers the first conductive type source layer 310 , so that the second conductive type source active layer 320 of the protruding structure 330 covers the entire bottom surface and all side surfaces of the second gate structure 220 .

[0121] In this way, the area of ​​the second conductive type source active layer 320 can be increased. On the one hand, when the device is in a reverse blocking state, the electric field shielding effect of the second conductive type source active layer 320 can be greatly improved. On the other hand, it helps to improve the current carrying capacity and thermal stability of the silicon carbide power device cell structure, thereby extending the service life of the silicon carbide power device cell structure.

[0122] In a feasible implementation, in the second cross section, the second conductive type source active layer 320 of the protruding structure 330 covers at least a portion of the bottom surface of the second gate structure 220 ; wherein the first cross section and the second cross section are different cross sections.

[0123] With such arrangement, at certain positions, part of the side surface of the second gate structure 220 is surrounded by the source structure 300. When voltage is applied to the second gate structure 220, the second gate structure 220, the source structure 300 and part of the epitaxial layer 120 can be more effectively turned on, thereby forming a transistor with more stable performance and lower on-resistance.

[0124] Please refer to Figure 1 and Figure 2 As shown, in an achievable implementation, the second gate structure 220 has a main stem 221 and a second extension 222, the second extension 222 is connected to the side of the main stem 221, and extends toward the first gate structure 210. The main stem direction of the main stem 221 is the first direction, and the extension direction of the second extension 222 is the second direction, and the first direction and the second direction intersect; the second conductive type source active layer 320 does not exceed the second extension 222 along the extension direction. Among them, the first direction is the attachment direction. Figure 1 The middle X direction, the second direction is the Figure 1 Center Y direction.

[0125] In the embodiment of the present application, the first gate structure 210 and the second gate structure 220 are both trench gates, so the first gate structure 210 is formed in the first gate trench, and the second gate structure 220 is formed in the second gate trench, wherein the second gate trench extends toward the first gate trench. Figure 1 and Figure 2 As shown, the extension direction of the first gate trench can refer to Figure 2 As shown in the direction of arrow a, the extension direction of the second gate trench can refer to Figure 2 As shown in the directions of arrows b2 and b1.

[0126] The electric field shielding structure located around the second gate trench is connected to the source structure 300 . Thus, the electric field shielding structure located around the second gate trench can further shield the electric field located around the first gate trench.

[0127] In addition, the second extension portion 222 of the second gate structure 220 is surrounded by the source structure 300, and a channel is formed between the second gate structure 220 and the source structure 300. For example, two channels are added between the second gate structure 220 and the source structure 300. The added channels can be referred to in the attached Figure 1 The area indicated by the arrow b2 can provide a channel in the circumferential direction of the second gate structure 220, thereby reducing the forward on-resistance of the silicon carbide power device and better improving the reliability of the silicon carbide power device.

[0128] In the present application, refer to Figure 1 As shown, the second conductive type source active layer 320 does not exceed the second extension portion 222 along the extension direction. It should be noted that if the second conductive type source active layer 320 exceeds the second extension portion 222, the groove will be completely wrapped, the channel does not exist, and the effect of increasing the channel of the silicon carbide power device is not achieved. Therefore, in this embodiment, such a limitation can ensure the existence of the channel, which in turn helps to increase the channel of the silicon carbide power device.

[0129] In one possible implementation, referring to Figure 1 As shown, there may be a plurality of second extension portions 222 , and the arrangement of the plurality of second extension portions 222 of the second gate structure 220 may be set according to actual needs.

[0130] For example, along a direction parallel to the plane where the substrate 100 is located, a plurality of second extension portions 222 may be disposed on one side of the second gate structure 220 and arranged at intervals along the first direction.

[0131] It should be noted that there are multiple second gate structures 220 and multiple first gate structures 210 , and the multiple second gate structures 220 are arranged at intervals along the second direction, and each second gate structure 220 is located between any two adjacent first gate structures 210 .

[0132] When there are multiple second gate structures 220 , the second extension portion 222 of each second gate structure 220 is located on the same side of the corresponding second gate structure 220 ; for example, the second extension portion 222 of each second gate structure 220 is located on the left or right side of the corresponding second gate structure 220 .

[0133] Alternatively, the second extension portions 222 of each second gate structure 220 are located on different sides of the corresponding gate structure 200. For example, in any two adjacent second gate structures 220, the second extension portion 222 of one second gate structure 220 is arranged on its left side, and the second extension portion 222 of the other second gate structure 220 is arranged on its right side. In this way, the arrangement of the second extension portions 222 can be diversified, so that more second extension portions 222 can be arranged on a limited structure, increasing the channel length of the silicon carbide power device cell structure, and helping to achieve a more complex and high-performance circuit design.

[0134] In one feasible embodiment, the second extension portion 222 includes multiple second extension portions 222; on a plane parallel to the substrate 100, the multiple second extension portions 222 are arranged on opposite sides of the second gate structure 220 along the second direction; and the multiple second extension portions 222 located on the same side are arranged at intervals along the first direction.

[0135] In this way, the number of the second extension portions 222 can be increased as much as possible, thereby increasing the length of the channel as much as possible, reducing the forward on-resistance of the silicon carbide power device, and better improving the reliability of the silicon carbide power device.

[0136] When a plurality of second extension portions 222 are arranged on opposite sides of the second gate structure 220 along the second direction, the second extension portions 222 located on both sides of the same second gate structure 220 are arranged opposite to each other along the second direction; or, the second extension portions 222 located on both sides of the same second gate structure 220 are arranged in a staggered manner along the second direction. In this way, by flexibly arranging the layout of the second extension portions 222 located on both sides of the same second gate structure 220, the current distribution in the silicon carbide power device can be further optimized, the current crowding effect inside the device can be significantly reduced, and the current carrying capacity of the device can be improved.

[0137] In one possible implementation, referring to Figure 2 As shown, the silicon carbide power device cell structure further includes a source electrode layer 600, which is disposed on the source structure 300 and connected to the source structure 300. It should be understood that when the source structure 300 includes a first conductive type source layer 310 and a second conductive type source active layer 320 that are stacked, the source electrode layer 600 is electrically connected to the second conductive type source active layer 320.

[0138] It should be understood that the source electrode layer 600 and the second conductive type source active layer 320 can be directly electrically connected or indirectly electrically connected. In one example, the source electrode layer 600 and the second conductive type source active layer 320 are connected to each other to form electrical conduction, which can simplify the preparation process of the silicon carbide power device cell structure and reduce the production cost of the semiconductor structure. In another example, please refer to the attached Figure 1 To Attachment Figure 3 The silicon carbide power device cell structure further includes a second conductive type source ohmic contact layer 500, and the source electrode layer 600 and the source structure 300 are connected through the second conductive type source ohmic contact layer 500, or in other words, the source electrode layer 600 and the second conductive type source active layer 320 are connected through the second conductive type source ohmic contact layer 500.

[0139] This embodiment uses the second conductive type source ohmic contact layer 500 to provide a low resistance path, making the electrical conduction between the source electrode layer 600 and the second conductive type source active layer 320 more efficient, thereby reducing the contact resistance and improving the conductive performance of the device. In addition, the second conductive type source ohmic contact layer 500 also helps to optimize the carrier transmission path and improve the current driving capability and overall performance of the silicon carbide power device.

[0140] In one possible implementation, referring to Figure 2 and Figure 3 As shown, an insulating layer 400 may also be included, and the insulating layer 400 covers the gate structure 200 to achieve insulation between the first gate structure 210 and the second gate structure 220. The insulating layer 400 may include silicon oxide, silicon nitride or other insulating materials.

[0141] Reference Figure 4 As shown, the embodiment of the present application also provides a method for preparing a silicon carbide power device cell structure, comprising the following steps:

[0142] Step S100: providing a substrate.

[0143] Step S200: forming a source structure and a gate structure on the substrate, wherein the gate structure includes two first gate structures; the source structure at least surrounds part of the side surfaces of the two first gate structures, and a part of the source structure located between the two first gate structures extends toward the bottom surface of the substrate to form a protruding structure; a part of the protruding structure constitutes an electric field shielding structure.

[0144] In the cell structure of the silicon carbide power device prepared by the preparation method, adding a source structure can be better used to shield the gate oxide electric field. In addition, the addition of the source structure can provide more carriers, and the increase in area can further reduce the concentration of the source structure, thereby appropriately increasing the short-circuit resistance of the device.

[0145] Please refer to Figure 5 In a possible implementation, the method for preparing a silicon carbide power device cell further includes:

[0146] The step of providing a substrate includes:

[0147] providing a substrate;

[0148] An epitaxial layer is formed, wherein the epitaxial layer is disposed on a substrate.

[0149] Exemplarily, an epitaxial layer may be formed on a substrate using an epitaxial process, and the conductivity type of the epitaxial layer is the same as the conductivity type of the substrate. For example, the conductivity type of the substrate and the conductivity type of the epitaxial layer are both the first conductivity type, and the first conductivity type may be N-type or P-type. As an example, the first conductivity type may be N-type.

[0150] In a possible implementation, the step of forming a source structure includes:

[0151] A protruding structure is formed, and the protruding structure is disposed in the substrate.

[0152] For example, please refer to Figure 5 , forming a first photoresist layer 700 , and patterning the first photoresist layer 700 to form a first mask opening 710 in the first photoresist layer 700 . The first mask opening 710 exposes a portion of the substrate 100 .

[0153] The first photoresist layer 700 is used as a mask, and an ion doping process is used to dope the substrate 100 exposed in the first mask opening 710 to form a second conductive type source active layer 320. It should be noted that when the substrate 100 includes a substrate 110 and an epitaxial layer 120, this step is to dope the epitaxial layer 120 to form a second conductive type source active layer 320 in the epitaxial layer 120.

[0154] Thereafter, the first photoresist layer 700 is removed.

[0155] Please refer to Figure 6 , and then forming a second photoresist layer 800, and patterning the second photoresist layer 800 to form a second mask opening 810 in the second photoresist layer 800. The second mask opening 810 exposes a portion of the second conductive type source active layer 320. In other words, the area of ​​the second mask opening 810 is smaller than the area of ​​the first mask opening 710.

[0156] Using the second photoresist layer 800 as a mask, the second conductive type source active layer 320 exposed in the second mask opening 810 is doped by ion doping to form the first conductive type source layer 310. The first conductive type source layer 310 and the second conductive type source active layer 320 are composed.

[0157] Thereafter, the second photoresist layer 800 is removed.

[0158] A source structure is formed, which surrounds a portion of the outer peripheral surface of the protruding structure and is connected to the first source structure; the portion of the protruding structure constitutes an electric field shielding structure.

[0159] Please refer to Figure 7 , a third photoresist layer (not shown in the figure) is formed, and the third photoresist layer covers the first conductive type source layer 310 of the protruding structure 330, exposing the rest of the substrate 100.

[0160] The third photoresist layer is used as a mask and an ion doping process is adopted to at least dope the portion exposed on the substrate 100 or the epitaxial layer 120 to form a second conductivity type source active layer 320 .

[0161] The second conductive type source active layer 320 is doped by ion doping to form the first conductive type source layer 310 in the second conductive type source active layer 320. The first conductive type source layer 310 and the second conductive type source active layer 320 formed here constitute the source structure 300.

[0162] In a possible implementation, after the step of forming the source structure and before the step of forming the gate structure, the method further includes:

[0163] A second conductive type source ohmic contact layer is formed, and the second conductive type source ohmic contact layer is disposed in the source structure. It should be noted that the second conductive type source ohmic contact layer disposed in the source structure may be located in the first conductive type source layer 310 of the source structure 300, or in the second conductive type source active layer 320 of the source structure 300, or in both the first conductive type source layer 310 and the second conductive type source active layer 320 constituting the source structure 300.

[0164] In a possible implementation, the step of forming a gate structure includes:

[0165] Forming at least two first gate structures spaced apart from each other, each first gate structure having a source structure extending through it in a direction perpendicular to the substrate, so that the source structure surrounds a portion of the outer peripheral surface of each first gate structure;

[0166] A second gate structure is formed, wherein the second gate structure is located in the protruding structure.

[0167] For example, please refer to Figure 8 and Fig. 9 The protruding structure 330 is patterned to form a second gate trench 250 in the protruding structure 330, and the depth direction of the second gate trench 250 is perpendicular to the substrate 100. The bottom of the second gate trench 250 can be located in the first conductive type source layer 310 of the protruding structure 330, and can also be located in the second conductive type source active layer 320.

[0168] Please refer to Fig.10 , a fourth photoresist layer 900 is formed, and the fourth photoresist layer 900 fills the second gate trench 250 and covers the top surface of the protruding structure 330 and a portion of the top surface of the source structure 300 .

[0169] The fourth photoresist layer 900 is used as a mask to remove the exposed portion of the source structure 300 and the portion of the substrate 100 to form a first gate trench 240 . The depth of the first gate trench 240 is less than the depth of the second gate trench 250 .

[0170] Thereafter, the fourth photoresist layer 900 is removed.

[0171] Please refer to Fig.11 , a first gate structure 210 is formed in the first gate trench 240 , and a second gate structure 220 is formed in the second gate trench 250 .

[0172] Please continue to refer to Figure 2 After the step of forming the gate structure, the method for preparing the cell structure of the silicon carbide power device further includes:

[0173] forming an insulating layer covering the gate structure;

[0174] The insulating layer is patterned to form a source metal contact hole in the insulating layer that exposes a portion of the second conductive type source active layer.

[0175] A source electrode layer is fabricated to complete the preparation of a trench gate silicon carbide power device.

[0176] Exemplarily, the material of the insulating layer 400 includes silicon oxide, silicon nitride, aluminum oxide or other insulating materials.

[0177] The present application also provides a semiconductor device, including the silicon carbide power device cell structure described in any of the above embodiments. The semiconductor device formed by this embodiment is not limited to devices such as metal oxide semiconductor field effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor, referred to as MOSFET), insulated gate bipolar transistors (Insulated Gate Bipolar Transistor, referred to as IGBT), etc. All devices with silicon carbide power device cell structures are within the scope of this patent.

[0178] It should be noted that the beneficial effects of the semiconductor device provided in the embodiment of the present application are the same as the beneficial effects of the silicon carbide power device cell structure provided in the above-mentioned embodiment, and this embodiment will not be described in detail here.

[0179] The semiconductor device provided in the embodiments of the present application can be applied to vehicles, for example, can be applied to key electric drive and electric control components such as the main drive inverter, converter, on-board charger (OBC) and on-board charging pile of the vehicle. The vehicle can be an electric vehicle, a hybrid vehicle or a new energy vehicle.

[0180] Therefore, the embodiment of the present application provides a silicon carbide power device cell structure and a preparation method thereof, and a semiconductor device, including a source structure, the source structure is arranged on the substrate, and at least surrounds part of the side surfaces of the two first gate structures 210; the part of the source structure located between the two first gate structures 210 extends toward the bottom surface of the substrate to form an electric field shielding structure. In this way, adding a source structure can better shield the gate oxide electric field. In addition, the increase in the source structure can provide more carriers, and the increase in area can further reduce the concentration of the source structure, thereby appropriately increasing the short-circuit resistance of the device.

[0181] It should be noted that, in the description of the embodiments of the present application, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, or it can be an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0182] In the description of the embodiments of the present application, the term "and / or" merely indicates an association relationship that describes associated objects, indicating that three relationships may exist. For example, A and / or B may indicate the following three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" indicates any combination of at least two of any one or more of a plurality of. For example, at least one of A, B, and C may indicate any one or more elements selected from a set that includes A, B, and C.

[0183] In the description of the embodiments of the present application, the terms "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the term "plurality" means two or more, unless otherwise precisely and specifically specified.

[0184] In the description of the embodiment of the present application, the terms "first", "second", "third", "fourth", etc. (if present) are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0185] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A silicon carbide power device cell structure, characterized in that: include: Base (100); A gate structure (200), the gate structure (200) comprising at least two first gate structures (210), the at least two first gate structures (210) being arranged in the substrate (100) at intervals; A source structure (300), the source structure (300) being disposed on the substrate (100) and surrounding at least part of the side surfaces of at least two of the first gate structures (210); A portion of the source structure (300) located between any two adjacent first gate structures (210) extends toward the bottom surface of the substrate (100) to form a protruding structure (330); a portion of the protruding structure (330) constitutes an electric field shielding structure.

2. The silicon carbide power device cell structure according to claim 1, characterized in that: The source structure (300) and the protruding structure (330) both include a first conductivity type source layer (310) and a second conductivity type source active layer (320); The second conductive type source active layer (320) is disposed on the substrate (100), and the first conductive type source layer (310) is disposed on the second conductive type source active layer (320); At least a portion of the second conductive type source active layer (320) in the protruding structure (330) forms the electric field shielding structure.

3. The silicon carbide power device cell structure according to claim 2, characterized in that: The source structure (300) surrounds a portion of the side surface of the first gate structure (210).

4. The silicon carbide power device cell structure according to claim 3, characterized in that: The source structure (300) surrounds the top of the first gate structure (210).

5. The silicon carbide power device cell structure according to any one of claims 1 to 4, characterized in that: The first gate structure (210) has a first extension portion; the first extension portion extends in a direction away from the first gate structure (210).

6. The silicon carbide power device cell structure according to any one of claims 1 to 4, characterized in that: The gate structure (200) further includes a second gate structure (220); The second gate structure (220) is located between the two first gate structures (210).

7. The silicon carbide power device cell structure according to claim 6, characterized in that: The second gate structure (220) is a planar gate structure; the second gate structure (220) is located above the protruding structure (330); and the bottom surface of the second gate structure (220) is in contact with the protruding structure (330).

8. The silicon carbide power device cell structure according to claim 6, characterized in that: The second gate structure (220) is a trench gate structure, and the second gate structure (220) is located in the protruding structure (330).

9. The silicon carbide power device cell structure according to claim 8, characterized in that: The source structure (300) also surrounds a portion of the side surface of the second gate structure (220).

10. The silicon carbide power device cell structure according to claim 9, characterized in that: In a first cross section, the first conductive type source layer (310) of the protruding structure (330) covers at least a portion of a side surface of the second gate structure (220).

11. The silicon carbide power device cell structure according to claim 10, characterized in that: In the first cross section, the first conductive type source layer (310) of the protruding structure (330) covers at least a portion of the bottom surface of the second gate structure (220).

12. The silicon carbide power device cell structure according to claim 11, characterized in that: In the first cross section, the second conductive type source active layer (320) of the protruding structure (330) covers the first conductive type source layer (310), so that the second conductive type source active layer (320) of the protruding structure (330) covers the entire bottom surface and all side surfaces of the second gate structure (220).

13. The silicon carbide power device cell structure according to claim 12, characterized in that: In the second cross section, the second conductive type source active layer (320) of the protruding structure (330) covers at least a portion of the bottom surface of the second gate structure (220); The first cross section and the second cross section are different cross sections.

14. The silicon carbide power device cell structure according to any one of claims 8 to 13, characterized in that: The second gate structure (220) comprises a main body (221) and a second extension portion (222), wherein the second extension portion (222) is connected to a side surface of the main body (221) and extends toward the first gate structure (210); The main trunk direction of the main trunk portion (221) is a first direction, the extension direction of the second extension portion (222) is a second direction, and the first direction and the second direction intersect.

15. The silicon carbide power device cell structure according to claim 14, characterized in that: The end of the second conductive type source active layer (320) of the protruding structure (330) in the second direction does not exceed the extending portion (1222).

16. The silicon carbide power device cell structure according to claim 15, characterized in that: The second extension portion (222) includes a plurality of; On a plane parallel to the substrate (100), a plurality of second extension portions (222) are disposed on one side of the second gate structure (220) and are arranged at intervals along the first direction.

17. The silicon carbide power device cell structure according to claim 16, characterized in that: The second gate structure (220) comprises a plurality of second gate structures (220), and the plurality of second gate structures (220) are arranged at intervals along the second direction; The second extension portion (222) of each second gate structure (220) is located on the same side of the corresponding second gate structure (220).

18. The silicon carbide power device cell structure according to claim 17, characterized in that: The second extension portion (222) of each second gate structure (220) is located on the opposite side of the corresponding gate structure (200).

19. The silicon carbide power device cell structure according to claim 15, characterized in that: The second extension portion (222) includes a plurality of; On a plane parallel to the substrate (100), a plurality of second extension portions (222) are arranged on opposite sides of the second gate structure (220) along a second direction; and a plurality of second extension portions (222) located on the same side are arranged at intervals along the first direction.

20. The silicon carbide power device cell structure according to claim 19, characterized in that: The second extension portions (222) located on both sides of the same second gate structure (220) are arranged opposite to each other along the second direction; Alternatively, the second extension portions (222) located on both sides of the same second gate structure (220) are staggered along the second direction.

21. The silicon carbide power device cell structure according to claim 6, characterized in that: The silicon carbide power device cell structure further comprises a source electrode layer (600), wherein the source electrode layer (600) is arranged on the source structure (300) and connected to the source structure (300).

22. The silicon carbide power device cell structure according to claim 21, characterized in that: The silicon carbide power device cell structure further includes a second conductivity type source ohmic contact layer (500), and the source electrode layer (600) and the source structure (300) are connected via the second conductivity type source ohmic contact layer (500).

23. The silicon carbide power device cell structure according to claim 22, characterized in that: Along a thickness direction intersecting the substrate (100), the second conductive type source ohmic contact layer (500) is located between the first gate structure (210) and the second gate structure (220).

24. The silicon carbide power device cell structure according to any one of claims 1 to 4, characterized in that: The base (100) comprises a substrate (110) and an epitaxial layer (120), wherein the epitaxial layer (120) is arranged on the substrate (110).

25. The silicon carbide power device cell structure according to any one of claims 1 to 4, characterized in that: The gate structure (200) comprises a gate (211) and a gate dielectric layer (212), wherein the gate dielectric layer (212) covers the bottom surface and side surfaces of the gate (211).

26. A method for preparing a silicon carbide power device cell structure, characterized in that: The method comprises: providing a substrate; A source structure and a gate structure are formed on the substrate, wherein the gate structure includes two first gate structures; the source structure at least surrounds part of the side surfaces of the two first gate structures, and the part of the source structure located between the two first gate structures extends toward the bottom surface of the substrate to form a protruding structure; part of the protruding structure constitutes an electric field shielding structure.

27. The method for preparing a silicon carbide power device cell structure according to claim 26, characterized in that: The step of forming the source structure comprises: forming a protruding structure, wherein the protruding structure is disposed in the substrate; A source structure is formed, the source structure surrounds a portion of the outer peripheral surface of the protruding structure and is connected to the protruding structure; wherein a portion of the protruding structure constitutes the electric field shielding structure.

28. The method for preparing a silicon carbide power device cell structure according to claim 27, characterized in that: After the step of forming the source structure and before the step of forming the gate structure, the method further includes: A second conductive type source ohmic contact layer is formed, wherein the second conductive type source ohmic contact layer is disposed on the source structure.

29. The method for preparing a silicon carbide power device cell structure according to claim 28, characterized in that: The steps of forming the gate structure include: forming at least two first gate structures spaced apart from each other, each of the first gate structures penetrating the source structure in a direction perpendicular to the substrate, so that the source structure surrounds a portion of a side surface of each first gate structure; A second gate structure is formed, wherein the second gate structure is located within the protruding structure.

30. The method for preparing a silicon carbide power device cell structure according to any one of claims 26 to 29, characterized in that: The step of providing a substrate includes: providing a substrate; An epitaxial layer is formed, wherein the epitaxial layer is disposed on the substrate.

31. A semiconductor device comprising the silicon carbide power device cell structure according to any one of claims 1 to 25.

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