Embedded cooling system and method for manufacturing embedded cooling system
By embedding the cold plate body and manifold cover on the semiconductor device, and using direct dielectric or hybrid bonding technology, the problem of low heat transfer efficiency of existing cooling systems is solved, achieving more efficient cooling effects and longer service life.
Patent Information
- Application Number
- CN202380064929.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-07-28
- Filing Date
- 2023-07-28
- Publication Date
- 2025-04-18
AI Technical Summary
The existing cooling systems have low heat transfer efficiency in the heat dissipation process of high-power density chips, mainly due to the combined thermal resistance of thermal interface materials and the thermal resistance of the interface boundary area.
Embedded cooling assembly, which includes a cold plate body and a manifold cover, is attached to the semiconductor device by direct dielectric bonding or mixed dielectric and metal bonding, eliminating the need for thermal interface materials and shortening the heat transfer path.
It significantly reduces the thermal resistance path of the cooling system, improves cooling efficiency, reduces energy consumption, and extends the service life of the device package.
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Figure CN119856281A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to advanced packaging for microelectronic devices, and in particular to an embedded cooling system for semiconductor device packaging and a method for manufacturing the same. Background Art
[0002] Energy consumption poses a key challenge to the future of large-scale computing, as the world's computing energy requirements are rising at a rate that most people consider unsustainable. Some models predict that by 2030, the information and communications and technology (ICT) ecosystem could exceed 20% of global electricity consumption, with direct electricity consumption in large-scale computing centers accounting for more than one-third of its energy use. Cooling costs make up a significant portion of computing center energy requirements, as even small increases in operating temperatures can adversely affect the performance of microprocessors, memory devices, and other electronic components.
[0003] Heat dissipation of high power density chips is also a key challenge because chip performance improvements, such as through increased gate density and multi-core microprocessors, have led to increased power density and a corresponding increase in heat flux that contributes to high chip temperatures. Such high temperatures are undesirable because they reduce the operating performance, efficiency, and reliability of the chip. Cooling systems used to maintain the chip at a desired operating temperature typically remove heat using one or more heat dissipation devices (e.g., heat sinks, heat pipes, cold pipes, and heat sinks) that are thermally coupled to the chip using a flexible thermally conductive material (TIM) (e.g., thermal paste, thermal adhesive, thermal gap filler, etc.). The thermal interface material maintains thermal contact with the surfaces of the chip and the heat dissipation device to facilitate heat transfer therebetween. Unfortunately, the combined thermal resistance of the thermal interface material and the thermal resistance at the interface boundary region inhibits heat transfer from the chip to the heat dissipation device, thereby undesirably reducing the cooling efficiency of the cooling system.
[0004] Therefore, there is a need in the art for improved high performance cooling systems and methods of making the same. Summary of the invention
[0005] A general aspect includes an embedded cooling assembly for microelectronic device packaging. In one embodiment, the cooling assembly is directly attached to the individualized device. The individualized device typically includes an active side and an opposing back side. The cooling assembly may include (i) a cold plate body, which includes a stack of one or more base plates, wherein one of the base plates is directly attached to the back side of the individualized device without an intervening adhesive, and (ii) a manifold cover attached to the cold plate body. In some embodiments, the cold plate body and the manifold cover define one or more cavities that form a flow path between an inlet opening and an outlet opening disposed through the manifold cover. In some embodiments, the cooling assembly is attached to the individualized device by a direct dielectric bond formed between it and the individualized device. In some embodiments, the cooling assembly is attached to the individualized device by a mix of direct dielectric and direct metallic bonding.
[0006] Implementations of the cooling assembly may include one or more of the following features. In the cooling assembly, the cold plate body extends together with the individualized device so that the side wall of the cold plate body is substantially flush with the side wall of the individualized device. In the cooling assembly, the side surface of the cold plate body is substantially perpendicular to the cooling assembly on the back side of the individualized device. In the cooling assembly, the side surface of the manifold cover is substantially coplanar with the side surface of the cold plate body around the periphery of the cooling assembly. In the cooling assembly, the cold plate body includes an upper base plate and a lower base plate; the manifold cover and the upper base plate define a first cavity and a second cavity; the first cavity is separated from the second cavity, and; the lower base plate and the upper base plate define a third cavity. In the cooling assembly, the third cavity is configured to be fluidically connected to the first cavity and the second cavity via corresponding first openings and second openings formed in the upper base plate.
[0007] Implementation of the cooling assembly may also include one or more of the following features. In the cooling assembly, the cold plate body includes an upper base plate, a lower base plate, and one or more intervening base plates disposed between the upper base plate and the lower base plate; the manifold cover and the upper base plate define a first cavity and a second cavity; the upper base plate and one or more intervening base plates define a third cavity; one or more intervening base plates and the lower base plate define a fourth cavity; the first cavity, the second cavity, the third cavity, and the fourth cavity are fluidly connected via an opening in the base plate to form a flow path; and the flow path includes the first cavity, the third cavity, the fourth cavity, and the second cavity in sequence. In the cooling assembly, the cold plate body is formed of a single crystal or a polycrystalline substrate may include silicon, and; the manifold cover is formed of a metal, polymer, or epoxy resin material. In the cooling assembly, the manifold cover is formed of a material having a different thermal expansion coefficient than the material used to form the one or more base plates, and the manifold cover is attached to the one or more base plates by a flexible adhesive layer disposed between it and the one or more base plates. The cooling assembly includes a cold plate body including a recessed surface or opening in a bottom surface of a base plate directly attached to the singulated device; and a back side of the singulated device and the base plate directly attached to the singulated device define one of the one or more cavities.
[0008] One general aspect includes a device package. In one embodiment, the device package includes a package substrate having a support surface, a cooling assembly mounted on the support surface, and a package cover disposed above the cooling assembly. The cooling assembly may include any one or a combination of the features of the cooling assembly described above. In some embodiments, an edge of the heat sink is supported by a peripheral region of the support surface, and the heat sink is spaced apart from an upper surface of the manifold cover by a gap region.
[0009] Implementations of the device package may include one or more of the following features. A device package wherein the heat sink is formed of a rigid or semi-rigid material such that forces applied to an upper surface of the heat sink are transmitted to a peripheral area of the support surface. A layer of flexible material disposed between the heat sink and the manifold cover. A molded material disposed between the heat sink and the manifold cover, wherein the molded material at least partially encapsulates a cooling component. In the device package, two or more cooling components are mounted on a support surface of a packaging substrate, and the heat sink is disposed above the two or more cooling components. In the device package, a second device or device stack is thermally connected to the manifold cover via one or more thermal interface materials, and the one or more thermal interface materials form a thermal path between the second device or device stack, the heat sink, and the manifold cover.
[0010] A general aspect includes a high-volume manufacturing method. In one embodiment, the method includes aligning a plurality of semiconductor devices formed in an active side of a first substrate with a plurality of cold plate bodies formed in a substrate stack. The substrate stack may include one or more second substrates, each of which is patterned to define a bottom plate. The method may also include bonding the back side of the first substrate to a bonding surface of the substrate stack and singulating a plurality of cooling components from the bonded first substrate and the substrate stack. In one embodiment, each of the cooling components may include a cold plate body directly bonded to the semiconductor device and a manifold cover attached to the cold plate body. Other embodiments of this aspect include corresponding computer components, apparatus, and computer programs recorded on one or more computer storage devices, each of which is configured to perform the actions of the method.
[0011] Implementation of the method may include one or more of the following features. In the method, the cold plate body and the manifold cover of each cooling assembly define one or more cavities in fluid communication with an inlet and an outlet of the manifold cover. In the method, the manifold cover is formed in a third substrate; the third substrate is attached to the second substrate stack by an intervening adhesive layer; and singulating the plurality of integrated devices may include singulating the third substrate attached to the second substrate stack. In the method, a plurality of separate manifold covers are each attached to the second layer stack prior to singulation. In the method, one or more second substrates may include single crystal silicon or polycrystalline silicon. In the method, a plurality of cold plate bodies in at least one of the one or more second substrates may include a recessed surface and a plurality of features protruding upward from the recessed surface. In the method, the bonding surface of the second substrate stack is patterned to define a plurality of recessed surfaces; each of these recessed surfaces defines a cavity having a back side of the substrate; and the cavity is in fluid communication with the inlet and outlet of the manifold cover. Methods wherein side surfaces of the semiconductor devices and the cold plate bodies in each singulated device cooling assembly are substantially coplanar with each other around the perimeter of the cooling system; and the side surfaces are substantially perpendicular to the plane of the bonding interface between the first substrate and the second substrate stack. Methods wherein side surfaces of the manifold cover are substantially coplanar with side surfaces of the base plate or the base plate stack around the perimeter of the cooling assembly. Implementations of the described techniques may include hardware, methods or processing programs or computer software on a computer accessible medium.
[0012] One general aspect includes a method of device manufacturing. In one embodiment, the method includes aligning a plurality of singulated devices to a plurality of base plates or base plate stacks defined in a first substrate stack. The first substrate stack may include one or more first substrates, each of which is patterned to define a base plate. The method also includes bonding the back side of each of the singulated devices to a bonding surface of the first substrate stack. The method may also include singulating a plurality of cooling assemblies from the first substrate stack. Each of the cooling assemblies may include one of a plurality of semiconductor devices, a cold plate body bonded directly to the semiconductor device, and a manifold cover attached to the cold plate body.
[0013] Implementations may include one or more of the following features. The method may include bonding a plurality of support features to the bonding surface of the first substrate stack in gaps between adjacent singulated devices. The support features may be formed of the same material as the singulated devices, such as single crystal silicon. Other embodiments of this aspect include corresponding computer components, apparatus, and computer programs recorded on one or more computer storage devices, each of which is configured to perform the actions of the method. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The above and other objects and advantages of the present disclosure will become apparent upon consideration of the following detailed description in conjunction with the accompanying drawings, in which:
[0015] Figure 1 Schematic side view of the device cooling system and a schematic representation of the corresponding heat transfer path.
[0016] Figure 2 is a schematic top view of an exemplary system panel configured with a plurality of device packages each having an embedded cooling assembly according to an exemplary embodiment of the present disclosure.
[0017] Figure 3A For along Figure 2 Schematic side view of an exemplary device package taken along line AA.
[0018] FIG. 3B to FIG. 3D According to an exemplary embodiment of the present disclosure, Figure 2 Schematic side view of an exemplary device package for use with the system panel illustrated in FIG.
[0019] Figures 4 to 7 is a schematic cross-sectional view of an embedded cooling assembly according to an exemplary embodiment of the present disclosure.
[0020] Figure 8 is a flow chart of a method of manufacturing a cooling assembly according to an exemplary embodiment of the present disclosure.
[0021] 9A to 9D and FIG. 10A to FIG. 10B For Figure 8 Schematic side views of a cooling assembly at different stages of a method.
[0022] Fig.11 is a flow chart of a method of manufacturing a cooling assembly according to an exemplary embodiment of the present disclosure.
[0023] FIG. 12A to FIG. 12B and FIG. 13A to FIG. 13B For Fig.11 Schematic side views of a cooling assembly at different stages of a method.
[0024] The figures herein depict various embodiments of the invention for purposes of illustration only. It should be appreciated that additional or alternative structures, components, systems and methods can be implemented within the principles set forth by the present disclosure. DETAILED DESCRIPTION
[0025] As used herein, the term "substrate" means and includes any workpiece, wafer, or article that provides a base material or supporting surface from or on which components, components, devices, components, modules, systems, or features of the heat generating devices, packaging components, and cooling components described herein can be formed. The term substrate also includes a "semiconductor substrate" that provides a supporting material on which components of a semiconductor device are fabricated or attached; and any material layers, features, and / or electronic devices formed thereon, in, or through it.
[0026] As described below, semiconductor substrates herein generally have a "device side," e.g., a side on which semiconductor device components such as transistors, resistors, and capacitors are fabricated, and a "back side" opposite the device side. The term "active side" should be understood to include the surface of the device side of the substrate, and may include the device side surface of the semiconductor substrate and / or the surface of any material layer, device component, or feature formed thereon or extending outwardly therefrom, and / or any opening formed therein. Thus, it should be understood that the material forming the active side may change depending on the stage of device fabrication and assembly. Similarly, the term "non-active side" (as opposed to the active side) includes the non-active side of the substrate at any stage of device fabrication, including the surface of any material layer, any feature formed thereon or extending outwardly therefrom, and / or any opening formed therein. Thus, the term "active side" or "non-active side" may include the corresponding surface of the semiconductor substrate at the beginning of device fabrication and any surface formed during material removal (e.g., after a substrate thinning operation). Depending on the stage of device fabrication or assembly, the terms "active" and "inactive side" are also used to describe the surfaces of material layers or features formed on, in, or through a semiconductor substrate, regardless of whether those material layers or features ultimately exist in the device being fabricated or assembled.
[0027] Spatially relative terms are used herein to describe relationships between components, such as relationships between substrates, heat generating devices, cooling components, device packaging components, and other features described below. Unless the relationship is otherwise defined, terms such as "above", "above...", "upper", "upward", "outward", "on...", "lower", "below", "below", "lower", and the like are generally referred to the X, Y, and Z directions set forth in the accompanying drawings. Therefore, it should be understood that the spatially relative terms used herein are intended to cover different orientations of the substrate, and unless otherwise indicated, these terms are not limited by the direction of gravity. Unless the relationship is otherwise defined, terms such as "disposed on...", "embedded in...", "coupled to...", "connected by...", "attached to...", "bonded to...", etc., which describe the relationship between components alone or in combination with spatially related terms, include both relationships with intervening components and direct relationships in the absence of intervening components.
[0028] Unless otherwise noted, the term "cooling assembly" generally refers to a cold plate body and a manifold cover attached to the cold plate body. Typically, one or both of the cold plate body and the manifold cover are formed with a recessed surface defining a fluid cavity therebetween. The term "cold plate body" generally refers to a base plate or a stack of base plates directly bonded to each other, which base plate or stack of base plates can be bonded to a semiconductor device. The cold plate body may include a material layer and or metal features formed on a surface of the base plate or stack of base plates that facilitate direct dielectric or hybrid bonding with the semiconductor device. The direct bonding method enables heat from the semiconductor device to be transferred through the cold plate body to a fluid flowing through the cooling assembly without the use of a thermal interface material. Unless otherwise noted, the cooling assembly described herein may be used with any desired fluid (e.g., liquid, gas and / or vapor phase coolant), and the term "cold plate body" should not be construed as limited to any one fluid phase.
[0029] Figure 1 1 is a schematic side view of a device package 10 that is conventionally cooled using an external heat sink 22. The device package 10 typically includes a package substrate 12, a first device 14, a device stack 15, and a heat sink 18, and one or more first TIM layers 16 that thermally couple the device 14 and the device stack 15 to the heat sink 18. The device package 10 is thermally coupled to the external heat sink 22 via a second TIM layer 20. The TIM layers 16 and 20 are typically formed of a flexible material (such as a thermally conductive paste, grease, adhesive material) or other thermally conductive materials (such as fusible metal alloys and the like, such as solder), or a combination thereof. The TIM layers 16, 20 promote thermal contact between components in the device package and between the device package 10 and the heat sink 22.
[0030] Unfortunately, as the heat flux density increases through each constriction size, Figure 1 The cumulative thermal resistance of the system illustrated in is increasingly problematic because the heat cannot be dissipated quickly enough to allow the device to operate at optimal power, thereby reducing the energy efficiency of the device. Also problematic is the transfer of heat between devices within the package, such as the illustrated heat transfer path 24, where heat may be undesirably transferred from a high heat flux device 14 (such as a CPU or GPU) to a low heat flux device stack 14 (such as memory) via the heat sink 18.
[0031] For example, Figure 1As illustrated in , each package component and the corresponding interface boundaries therebetween have corresponding thermal resistances (R1 to R5). Here, R1 is the thermal resistance of the bulk semiconductor material of the device 14, R3 and R5 are the thermal resistances of the corresponding TIM layers 16, 20, R4 is the thermal resistance of the heat sink 18, and R2 represents the thermal resistance at the interface region of the components. In a typical cooling system, R3 and R5 may account for 80% or more of the cumulative thermal resistance of the heat transfer path 26, and R4 may account for 5% or more, while R1 of the device 14 and R2 of the interface account for the remainder. Therefore, embodiments herein provide embedded cooling components that shorten the thermal resistance path between the device and the heat sink, and in some embodiments, reduce thermal connectivity between devices disposed in the same package, such as described below with respect to the accompanying drawings.
[0032] Figure 2 A plan view of an exemplary system panel 200 is illustrated. Figure 3A 2 is a schematic cross-sectional view of a portion of a system panel 200 taken along line AA illustrating an exemplary device package 300a having an embedded cooling assembly 400 according to an exemplary embodiment of the present disclosure. Here, the cooling assembly 400 is attached to the back side 320 of the semiconductor device 304 by a direct dielectric-to-dielectric bond formed therebetween.
[0033] In some embodiments, the cooling assembly 400 is attached to the backside 320 by a mixture of direct dielectric-to-dielectric and metal-to-metal bonding, such as described below with respect to Figure 4 The cooling assembly 400 is typically disposed between the device 304 and the package housing 308, and is thus "embedded" in the device package 300a. In some embodiments, the package housing 308 is formed of a thermally conductive material (eg, metal), and acts as a heat sink.
[0034] Return to view Figure 2, the system panel 200 generally includes a printed circuit board (PCB) 202, a plurality of device packages 300a mounted to the PCB 202, and a coolant delivery system 218 fluidly coupled to each of the device packages 300a. The coolant delivery system 218 may include a coolant fluid source 210 and a plurality of coolant lines 208 fluidly coupling the coolant fluid source 210 to respective inlets 314 and outlets 316 of the device packages 300a. In some embodiments, the cooling assembly 400 is configured to transfer heat from the device 304 to a liquid coolant, such as water or a refrigerant, delivered to the cooling assembly from the coolant fluid source 210. In some embodiments, the cooling assembly 400 transfers heat from the device by vaporizing the refrigerant. In those embodiments, the coolant delivery system 218 may include a compressor (not shown) external to the device package 300a to condense the vapor back into liquid form.
[0035] As shown, each of the device packages 300a may be mounted on a socket 220 ( Figure 3A ) and fastened thereto using a frame-shaped cover 206, which is fastened to the PCB 202 using a plurality of fasteners 212. In some embodiments, the cover 206 can apply a downward force to the device package 300a sufficient to ensure relatively uniform force loading and, therefore, proper pin contact between the device package 300a and the socket 220. In other embodiments, the device package 300a can be mounted using other suitable connection methods, such as solder ball attachment or direct bond interconnect (DBI).
[0036] Turn again Figure 3A , device package 300a includes a package substrate 302, a semiconductor device 304 disposed on the package substrate, a cooling assembly 400, and a package cover 308 disposed above the embedded cooling assembly 400. Package substrate 302 is typically formed of a rigid material (such as epoxy or resin-based laminate) and may include a plurality of conductive components formed therein or thereon for electrically connecting device 304 to PCB 202. In some embodiments, insert 303 may be used in place of package substrate 302. In those embodiments, insert 303 may be configured to electrically connect multiple devices to each other in an advanced packaging scheme, such as Figure 3D As shown in .
[0037] In some embodiments, the device 304 has an active side 318 including device components such as transistors, resistors, and capacitors formed thereon or therein, and an inactive or "backside" surface, where a backside 320 is disposed opposite the active side 318. As shown, the active side 318 is electrically connected to the packaging substrate 302 through the use of conductive bumps 319, which are encapsulated by an underfill layer 321 disposed between the device 304 and the packaging substrate 302. The underfill layer 321 typically includes a cured polymer resin or epoxy that provides mechanical support for the conductive bumps 319 and prevents thermal fatigue that may be caused by a CTE mismatch between the device 304 and the packaging substrate 302.
[0038] As shown, the cooling assembly 400 is disposed between the device 304 and the packaging cover 308, and is thus "embedded" within the device package 300a. Here, the packaging cover 308 extends upward from the surface of the packaging substrate 302 to surround the device 304 and the cooling assembly 400. In some embodiments, the packaging cover 308 may be formed of a semi-rigid or rigid material and may be spaced apart from the manifold cover 326 so that downward forces applied to the packaging cover 308 by the cover 206 are transferred to the packaging substrate 302 and not applied to the manifold cover 326.
[0039] The cooling assembly 400 generally includes a cold plate body 324 bonded directly to the device 304 and a manifold cover 326 coupled to the cold plate body 324 using an adhesive layer 330. Here, the cold plate body 324 and the manifold cover 326 coupled to the cold plate body 324 define a cavity 310 (shown in phantom). Coolant circulates to the cavity 310 via lines 208, which may be coupled to the cooling assembly 400 via fittings disposed in openings forming an inlet 314 and an outlet 316 of the manifold cover 326. In some embodiments, the cooling assembly 400 may be thermally coupled to the back side 320 of the device 304 using a method of forming a direct bond between the surfaces without the use of an intervening adhesive, such as described below with respect to the manufacturing method. The direct bonding method eliminates the need for an intervening adhesive layer or thermal interface material (TIM) layer between the device 304 and the cooling assembly 400. Thus, when coupled to the Figure 1 The device packages described herein provide reduced thermal path thermal resistance 322 when compared to the paths 26 of the device package 10 illustrated in FIG. 1. In some embodiments, the cumulative thermal resistance 322 of the paths is reduced by a factor of 50 or more when compared to the paths 26 of the device package 10.
[0040] FIG. 3B to FIG. 3D 300b to 300d according to an exemplary embodiment of the present disclosure, which may be used to replace Figure 2 and Figure 3A Any of the device packages 300a described in . Figure 3BIn the device package 300b, device package 300b is substantially similar to device package 300a and further includes a thermally conductive flexible material 332, such as a paste, putty, or non-rigid polymer material, disposed between manifold cover 326 and package housing 308. In some embodiments, flexible material 332 is a thermal interface material. Figure 3C In an embodiment of the present invention, the device package 300c is substantially similar to the device package 300a, and further includes a molding material 334 disposed between the manifold cover 326 and the package cover 308. The molding material 334 may include a polymer or epoxy material extending upward from the package substrate to at least partially encapsulate and / or surround the device 304 and the cooling assembly 400. In some embodiments, the molding material 334 may be a thermally conductive material, such as a polymer or epoxy with one or more thermally conductive additives (such as silver and / or graphite). When used, the flexible material 332 and / or the molding material 334 provide mechanical support that improves system reliability and extends the useful life of the device packages 300b to 300c. For example, the flexible material 332 and / or the encapsulating molding material 334 may reduce mechanical stresses that may weaken the interfacial bonding and / or electrical connections between the components of the device package 300a, such as stresses caused by vibration, mechanical and thermal shock, and / or fatigue caused by repeated thermal cycling.
[0041] In some embodiments, package housing 308 is formed of a thermally conductive material, for example, a metal such as aluminum or copper. In some embodiments, package housing 308 is a heat sink that redistributes heat from one or more electronic components within a multi-component device package, such as Figure 3D exemplified in .
[0042] Figure 3D An exemplary multi-component device package 300d is illustrated, which includes multiple devices mounted on a common package substrate (e.g., interposer 303) that facilitate shortened connections between devices 304 and / or device stacks 305. As shown, the multiple devices include a device 304 that is directly bonded to a cooling assembly 400 and a device stack 305, such as a stack of interconnected memory devices that are not directly bonded to an embedded cooling assembly 400. Here, a package cover 308 may be formed of a thermally conductive material and act as a heat sink to transfer heat from the device stack. A flexible material 332 may be disposed between, and in thermal contact with, each of the package cover and cooling assembly 400, and disposed between the package cover 308 and the device stack 305. Thus, heat generated by each of the devices 304 is dissipated via the cooling assembly 400 bonded directly thereto, and heat generated by the device stack 305 is transferred to the cooling assembly 400 of an adjacent device 304 via the flexible material 332 (eg, TIM layer) and the package cover 308 , as shown by thermal path 307 .
[0043] In some embodiments, the device package 300d includes a heat sink 338 (shown in phantom) disposed above the package housing 308 and a TIM layer 340 thermally coupling the package housing 308 to the heat sink 338. In some embodiments, the device package 300d may include an external cooling component, such as a fluid cooling pipe (not shown), disposed on the package housing 308 and thermally coupled to the package housing 308 through the TIM layer 340. In those embodiments, the fluid cooling pipe may be coupled to the same coolant source used to deliver the coolant to the cooling component 400 or may be coupled to a different coolant source.
[0044] Advantageously, the cooling assembly 400 of the device package 300d blocks the thermal path between each of the devices 304 and the device stack 305 and prevents heat from being transferred therebetween. Thus, the device package 300d can be advantageously used to facilitate closely spaced devices on an interposer, such as high power devices and memory stacks, to provide reduced latency while eliminating undesirable heat transfer therebetween.
[0045] Figure 4 FIG. 4 is a schematic cross-sectional view of a cooling assembly 400 for use with the device packages 300a to 300d described above. As shown, the cooling assembly 400 includes a cold plate body 324 and a manifold cover 326 attached to the cold plate body 324. The cold plate body 324 may include one or more base plates, as described below with respect to FIG. Figures 5 to 7 Described, or may include Figure 4 . In some embodiments, the cold plate body 324 is directly attached to the device 304, such as by using a direct bonding method without the use of adhesives or TIM materials. For example, in some embodiments, the device 304 may include a dielectric material layer 430 formed on the back side 320, and the cold plate body 324 may include a dielectric material layer 432 formed on the bottom surface of the base plate 424. In those embodiments, the cold plate body 324 may be attached to the back side 320 via a direct dielectric bond formed between the material layers 430 and 432. Suitable dielectrics that may be used as the dielectric material layers 430, 432 include silicon oxide, silicon nitride, silicon oxynitride, silicon nitride carbon, metal oxides (e.g., aluminum oxide), metal nitrides, silicon carbide, silicon oxycarbide, silicon oxycarbonitride, silicon carbonitride, diamond-like carbon (DLC), or combinations thereof. In some embodiments, one or both of the dielectric material layers 430 , 432 are formed of an inorganic dielectric material (ie, a dielectric material that is substantially free of an organic polymer).
[0046] Typically, one or both of layers 430 and 432 are deposited to a thickness greater than the thickness of the native oxide, such as about 1 nanometer or more, 5 nanometers or more, 10 nanometers or more, 50 nanometers or more, 100 nanometers or more, or 200 nanometers or more. In some embodiments, one or both of layers 430, 432 are deposited to a thickness of 3000 nanometers or less, such as 200 nanometers or less, 100 nanometers or less, or 500 nanometers or less. In some embodiments, a direct dielectric bond is formed using only one of layers 430, 432. For example, a dielectric bond may be formed by depositing a layer of dielectric material on either the cold plate body 324 or the singulated device 304, but not both.
[0047] In some embodiments, each of the lower surface of the cold plate body 324 and the back side 320 of the device 304 further includes a plurality of metal features 434, 436, such as copper inlay pads, formed in the respective dielectric material layers 430, 432. In those embodiments, the cold plate body 324 and the device 304 may be attached using a hybrid of direct dielectric bonding formed between the dielectric material layers 430 and 432 and direct metal bonding formed between the metal features 434 and 436. Methods for forming hybrid bonding are described below. In some embodiments, the base plate 424 may be formed of a material having a coefficient of thermal expansion CTE substantially similar to the CTE of the bulk semiconductor substrate of the device 304. For example, the device 304 may be formed on a single crystal silicon substrate, and the base plate 424 may be formed of a single crystal silicon or polycrystalline silicon substrate.
[0048] Because silicon substrates are typically too brittle to reliably connect the cooling assembly 400 to the coolant delivery lines, the manifold cover 326 can be formed of a different material than the cold plate body 324. In some embodiments, the manifold cover 326 can be formed using a relatively ductile material (e.g., a metal, polymer, or laminate that is less brittle than the material used to form the cold plate body 324). Here, the manifold cover 326 can be attached to the cold plate body 324 using an adhesive layer 330 disposed therebetween. In some embodiments, the adhesive layer 330 is relatively flexible so as to absorb movement between the manifold cover 326 and the cold plate body 324 caused by the difference in CTE of the different materials across repeated thermal cycles.
[0049] like Figure 4, the bottom plate 424 includes a first recessed surface 404, and the manifold cover 326 includes one or more second recessed surfaces 402 that are aligned with the first recessed surface 404 such that the bottom plate 424 and the manifold cover 326 collectively define a fluid cavity 310 therebetween. Here, the cavity 310 is fluidly connected to inlet and outlet openings 406a-406b provided via the manifold cover 326 to form a coolant flow passage 438. As shown, the manifold cover 326 further includes a divider wall 312 that extends downwardly into the cavity 310. The divider wall 312 separates the inlet region from the outlet region of the cavity 310 and directs the fluid into the recessed region of the cold plate body 324. The divider wall 312 thus prevents the fluid from taking a less-resistance flow path from the inlet 406a directly into the outlet 406b. In some embodiments, the manifold cover 326 includes a connector feature 414 extending upward from a surface of the manifold cover 326 and / or threads (not shown) formed in the sidewalls of the openings 406a-406b. The connector feature 414 and / or threads facilitate the connection of a coolant delivery line or are used to couple the manifold cover 326 to a coolant delivery line (e.g., line 208 ( Figure 2 )) attachment of accessories. In some embodiments, the cooling assembly 400 includes a plurality of protruding features 408, such as fins, posts, or struts, extending upward from the recessed surface 404 of the base plate 424. The protruding features 408 can be used to disrupt the laminar fluid flow at the interface surface of the coolant and the base plate 424 to increase heat transfer therebetween.
[0050] Figures 5 to 7 Exemplary assemblies 500, 600, and 700 are illustrated that may be used in place of the cooling assembly 400 described above. Figure 5 In the example shown in , the cooling assembly 500 includes a cold plate body 501 and a manifold cover 526 attached to the cold plate body 501 by using an adhesive layer 330. As shown, the manifold cover 526 is formed to include at least two recessed surfaces 502a-502b separated from each other by a partition wall 512. The cold plate body 501 and the manifold cover 526 together define a plurality of fluidly connected cavities 510a-510c that form a tortuous flow path 538 between an inlet opening 506a and an outlet opening 506b.
[0051] As shown, the cold plate body 501 includes a first bottom plate 524a substantially similar to the bottom plate 424 and a second bottom plate 524b disposed between the first bottom plate 524a and the manifold cover 526. The second bottom plate 524b separates at least two recessed surfaces 502a-502b from the recessed surface 504 in the first bottom plate 524a. Here, the respective recessed surfaces 502a-502b and 504 and the second bottom plate 524b collectively define at least three cavities 510a-510c, which are fluidly connected via openings 514a-514b disposed through the second bottom plate 524b. In one embodiment, the cooling component 500 defines a flow passage 538 that includes (in the flow direction) each of the following in sequence: an inlet opening 506a, a first cavity 510a, two or more openings 514a that fluidly connect the first cavity 510a to the second cavity 510b, a second cavity 510b, two or more openings 514b that fluidly connect the second cavity 510b to the third cavity 510c, a third cavity 510c, and an outlet opening 506b.
[0052] In some embodiments, a plurality of protruding features 508 are formed to extend upwardly from the recessed surface 504. The protruding features 508 disrupt the laminar flow at the interface between the coolant fluid and the recessed surface 504 to increase heat transfer therebetween. In some embodiments, the protruding features 508 define flow channels in the second cavity 510b, which can be used to increase the flow rate of the coolant therethrough. In some embodiments, the ratio of the height of the protruding features 508 to the height of the second cavity 510b (measured in the Z direction) is about 1:3 or greater, such as about 1:2 or greater, or 2:3 or greater, or, for example, about 3:4 or greater.
[0053] exist Figure 6 In the exemplary embodiment illustrated in , the cooling assembly 600 includes a cold plate body 601 and a manifold cover 626 attached to the cold plate body 601 by using an adhesive layer 330. Here, the cold plate body 601 and the manifold cover 626 together define a plurality of fluidly connected cavities 610a to 610d. The cold plate body 601 includes a lower base plate 624a, an upper base plate 624d, and one or more intervening base plates 624b to 624c (two are shown) disposed between the lower base plate 624a and the upper base plate 624d. The manifold cover 626 includes a first recessed surface 602a and a second recessed surface 602b, which are separated from each other by a partition wall 612, so that the manifold cover 626 and the upper base plate 624d define at least two cavities 610a and 610d. One or more intervening bottom plates 624b to 624c have a concave surface 604 formed on the side facing the upper bottom plate 624d, so that the one or more intervening bottom plates 624b to 624c and the upper bottom plate 624d define the cavity 610b. Here, the lower bottom plate 624a is substantially similar to Figure 5The lower base plate 524a is formed to have a recessed surface 504 and a plurality of protruding features 508 extending upward from the recessed surface 504. One or more intervening base plates 624b to 624c and the lower base plate 624a define a cavity 610c.
[0054] As shown, the chambers 610a-610d are in fluid communication with each other via openings 614a-614d formed through the bottom plates 624a-624d. The openings 614a-614d and the chambers 610a-610d together define a coolant flow path 638. In one embodiment, the flow path 638 includes, in order (in the flow direction): an inlet opening 606a, a first chamber 610a, a first opening 614a disposed through the upper bottom plate 624d, a second chamber 610b, one or more second openings 614b disposed through one or more intervening bottom plates 624b-624c, a third chamber 610c, one or more third openings 614c disposed through one or more intervening bottom plates 624b-624c and the upper bottom plate 624d, a fourth chamber 610d, and an outlet opening 606b.
[0055] exist Figure 7 In the example illustrated in , the cooling assembly 700 includes a cold plate body 701 and a manifold cover 526, which collectively define fluidly connected cavities 710a, 710b, and 710c. Here, the cold plate body 701 includes: a lower base plate 724a having a plurality of sidewalls directly bonded to a peripheral region of the back side 320 of the device 304; a second base plate 724b disposed on the lower base plate 724a; and a manifold cover 526 disposed on and attached to the second base plate 524b by using an adhesive layer 330. The lower base plate 724a, the second base plate 724b, and the back side 320 of the device 304 define a cavity 710b, wherein the back side 320 is directly exposed to the fluid passage 738 without an intervening portion of the cold plate body 701 disposed therebetween.
[0056] exist Figure 7 In the embodiment, the manifold cover 526 and the second bottom plate 724b are Figure 5The lower base plate 724a is substantially the same as described, such that the flow path includes inlet opening 506a, first cavity 710a, one or more first openings 514a, second cavity 710b, one or more second openings 514b, third cavity 710c, and outlet opening 506b in succession. However, it is contemplated that lower base plate 724a may be used as the first or lower base plate of any of the exemplary cooling assemblies described herein. In such embodiments, at least one cavity is defined in part by device 304, and back side 320 is directly exposed to the coolant flowing therethrough, respectively. It is believed that the reduced surface area of lower base plate 724a (when compared to the backside surface of device 304) allows for a larger CTE mismatch between the respective substrate materials without sacrificing the reliability of the bonded joint across repeated thermal cycles. In some embodiments, the surface area of lower base plate 724a at the bonding interface is about 60% or less of the surface area of device 304, such as about 50% or less, 40% or less, 30% or less, or, for example, about 20% or less.
[0057] In some embodiments, the device 304 includes a plurality of raised or protruding features 708 formed in or on the back side 320. The protruding features 708 increase fluid turbulence (disrupt laminar flow) at the boundary of the coolant fluid and the back side 320, thereby increasing the rate of heat transfer from the device 304 to the coolant fluid. To further increase heat dissipation from the device, the features 708 can be formed of a thermally conductive metal such as copper, which can be formed using any suitable process such as a photolithography and etching process.
[0058] It should be noted that the substrate used to form the cold plate body described above is not limited to crystalline silicon, as it is contemplated that one or both of the cold plate body and the manifold cover may be formed from a bulk substrate material comprising a metal, metal alloy, ceramic, composite material, or other low CTE material suitable for bonding using the methods described below. For example, the cold plate body may be formed from a bulk material selected from the group comprising copper, aluminum, copper alloys (e.g., copper-molybdenum alloys and copper-tungsten alloys), iron-cobalt-nickel alloys (e.g., from Magellan Industrial Trading Co., Inc. of South Norwalk Connecticut USA), or a plurality of other low CTE materials. ), iron-cobalt-nickel-silver alloys, iron-nickel alloys (e.g., from Magellan The amorphous silicon substrate material may be prepared as described below for bonding and may or may not include a layer of dielectric material deposited on the lower bonding surface. In some embodiments, both the manifold cover and the cold plate body may be formed of an amorphous silicon bulk substrate material. In such embodiments, the manifold cover may be attached to the cold plate body with or without an intervening adhesive layer.
[0059] Figure 8 Flow chart of a method for manufacturing the cooling assembly described above. Generally speaking, the method includes bonding a substrate including a plurality of pre-singulated semiconductor devices to a substrate including a plurality of pre-singulated cooling assemblies to form a bonded substrate stack, and singulating (eg, dicing) individual cooling assemblies from the substrate stack. 9A to 9D and FIG. 10A to FIG. 10B As an example Figure 8 Schematic side cross-sectional view of a substrate according to aspects of the manufacturing method described in .
[0060] At block 802, method 800 includes aligning a first substrate 902 with a second substrate 904, wherein the first substrate 902 includes a plurality of pre-singulated dies, such as semiconductor devices 304, and the second substrate 904 includes a plurality of pre-singulated cold plate bodies 901. Figures 4 to 7 , the cold plate body 901 can be formed of one or more bottom plates 924a-924b (two are shown). As shown, the first substrate 902 includes an active side 318 and a back side 320 opposite the active side 318, wherein the active side 318 includes a plurality of semiconductor devices 304. Generally, the plurality of semiconductor devices 304 are arranged in a rectangular array and are spaced apart from each other by a plurality of scribe lines 906 that extend in the X-direction and the Y-direction to form a grid pattern. The plurality of scribe lines 906 can be defined by the boundaries of the semiconductor devices 304 formed in the active side 318 and typically do not extend through the thickness of the substrate 902 prior to singulation.
[0061] The first substrate 902 may include a bulk material and a plurality of material layers disposed on the bulk material. The bulk material may include any semiconductor material suitable for fabricating semiconductor devices, such as silicon, silicon germanium, germanium, III-V semiconductor materials, II-VI semiconductor materials, or combinations thereof. For example, in some embodiments, the first substrate 902 may include: a single crystal wafer, such as a silicon wafer; a plurality of device components formed in or on the silicon wafer; and a plurality of interconnect layers formed above the plurality of device components. In other embodiments, the substrate may include a reconstructed substrate, such as a substrate formed of a plurality of individualized devices embedded in a support material.
[0062] The bulk material of the first substrate 902 may be thinned after forming the device 304 using one or more back grinding, etching, and polishing operations to remove material from the back side 320. Thinning the first substrate 902 may include using a combination of a grinding process and an etching process to reduce the thickness (in the Z direction) to about 450 microns or less, such as about 300 microns or less, or about 150 microns or less. After thinning, the back side 320 may be polished to a desired smoothness using a chemical mechanical polishing (CMP) process, and a dielectric material layer 430 may be deposited thereon. In some embodiments, the dielectric material layer 430 may be polished to a desired smoothness to prepare the substrate 902 for a bonding process. In some embodiments, the method 800 includes forming a plurality of metal features 434 ( Figure 4 ) as a preparation for a hybrid bonding process, such as by using a metal damascene process.
[0063] In some embodiments, active side 318 is temporarily bonded to a carrier substrate (not shown) before or after the thinning process. When used, the carrier substrate provides support for the thinning operation and / or the thinned material to facilitate substrate handling during one or more of the subsequent manufacturing operations described herein.
[0064] Here, the second substrate 904 is formed of a plurality of substrates 904a-904b (two are shown), each of which includes a unitary bulk material patterned to define a respective plurality of bottom plates 924a-924b. Each of the plurality of substrates 904a-904b may have substantially the same size and shape as the first substrate 902 when viewed from top to bottom (in the Z direction), such that the interfacing surfaces are substantially coextensive with each other. In some embodiments, the thickness (in the Z direction) of each of the substrates 904a-904b is between about 0.5 mm and about 10 mm, or between about 1 mm and about 8 mm, or between about 1 mm and 6 mm, such as about 0.5 mm or more, such as about 1 mm or more, or about 2 mm or more, or about 10 mm or less, such as about 8 mm or less or about 6 mm or less.
[0065] In some embodiments, each of the substrates 904a-904b is patterned using a combination of photolithography and etching processes. For example, in some embodiments, patterning the surface of the substrates 904a-904b includes patterning a mask layer using a photolithography process, and removing material from the surface of the substrates 904a-904b by exposing the surface to a chemically reactive etchant through an opening in the mask layer. In some embodiments, each of the substrates 904a-904b is patterned using a microabrasion process, wherein microabrasive particles are directed toward the substrate surface through openings in a mask template or mask layer formed above or disposed thereon. It should be noted that in each of the exemplary embodiments described above, the sidewalls of the cavities extending from the sides of the respective recessed surfaces 404, 504, 604 and the protruding features 408 and 508 are shown as having a substantially vertical orientation, such as would be produced by a typical isotropic etching process. However, it is contemplated that an anisotropic etching process may also be used to form the openings, and the sidewalls of the cavities or sides of the features may be tilted relative to the recessed surfaces. In other embodiments, such as where the cold plate body comprises an amorphous silicon material such as a metal, metal alloy, ceramic, or composite material described above, the pattern may be formed using any suitable method such as machining, casting, forging, molding, or the like.
[0066] As shown, one or more substrates 904a-904b are aligned with each other and directly bonded to form a second substrate 904. In some embodiments, each of the substrates 904a-904b is formed of a bulk material including silicon (e.g., single crystal silicon or polycrystalline silicon) or consisting primarily of silicon, and the surfaces of the substrates 904a-904b are directly bonded to each other using a direct silicon bonding or silicon fusion bonding method. For example, the silicon surfaces of the substrates 9004a-9004b may be treated using a plasma or fluorine-containing etchant, aligned and contacted with each other, and then heated to a temperature greater than about 700° C., such as between 800° C. and 1000° C., to produce silicon-silicon bonds. In some embodiments, the substrates 904a-904b may be bonded via direct bonds formed between dielectric material layers formed on bulk substrate materials, such as the direct bonding method described with respect to block 804.
[0067] In some embodiments, each of the substrates 904a-904b is formed of the same bulk material or of different bulk materials having substantially similar linear coefficients of thermal expansion (CTE), where CTE is a fractional change in the length of a material (in the XY plane) according to the degree of temperature change. In some embodiments, the substrates 904a-904b are formed of a material having a CTE that is substantially similar or "matched" to the CTE of the bulk material used to form the first substrate 902. In some embodiments, the CTE of the respective substrates 902 and 904a-904b is matched such that the CTE of the substrates 904a-904b is within about + / -20% or less of the CTE of the first substrate 902 when measured across a desired temperature range, such as within + / -15% or less, within + / -10% or less, or within about + / -5% or less. In some embodiments, the CTE of the respective substrates 902 and 904a-904b is matched across a temperature range of about -60°C to about 200°C, or about 60°C to about 175°C. In one exemplary embodiment, the matching CTE materials of the first substrate 902 and the substrates 904a-904b each include silicon. For example, the bulk material of the first substrate 902 may include single crystal silicon, and the bulk material of the substrates 904a-904b may include single crystal silicon or polycrystalline silicon. In some embodiments, the method 800 includes forming a dielectric material layer 432 and optionally forming a plurality of metal features 434 ( Figure 4 ).
[0068] At block 804, method 800 includes directly bonding a plurality of cold plate bodies 901 formed in a second substrate 904 to a plurality of semiconductor devices 304 in a first substrate 902. As described above, the bonding surfaces may each include dielectric material layers 430, 432, and directly bonding the first substrate 902 and the second substrate 904 includes forming a dielectric bond between the dielectric material layers 430, 432. Optionally, the first substrate 902 and the second substrate 904 may be formed using metal features 434, 436 ( Figure 4 ) is a hybrid direct bonding of dielectric bonding and metal bonding between.
[0069] In general, directly bonding the surfaces (of the dielectric material layers 430, 432) includes preparing the surfaces, aligning and contacting the surfaces. Preparing the surfaces may include: smoothing the respective surfaces to achieve a desired surface roughness, such as between 0.1 nm RMS and 3.0 nm RMS; activating the surfaces to weaken or open chemical bonds in the dielectric material; and capping the surfaces with desired species. Smoothing the surfaces may include polishing the substrates 902, 904 using a chemical mechanical polishing (CMP) process. Activating and capping the surfaces (of the dielectric material layers 430, 432) with desired species may include exposing the surfaces to free radical species formed in a plasma.
[0070] In some embodiments, a nitrogen-containing gas (e.g., N2) is used to form the plasma, and the capping species include nitrogen and hydrogen. In some embodiments, a wet cleaning process may be used to activate the surface (430, 432), such as by exposing the surface to an aqueous ammonia solution. In some embodiments, a dielectric bond may be formed using a dielectric material layer deposited on only one of the substrates 902, 904, that is, the dielectric material layer 430 or 432 may be deposited on either the cold plate body 324 or the singulated device 304 but not on both. In those embodiments, a direct dielectric bond may be formed by directly contacting a deposited dielectric material layer of one substrate with a bulk material surface of another substrate (e.g., a bulk semiconductor or polysilicon material surface). In such embodiments, the bulk material surface may include a thin native oxide layer or may be cleaned prior to contact so that it is substantially free of native oxide.
[0071] Forming a direct dielectric bond directly between the substrates at block 804 includes bringing the prepared and aligned surfaces into direct contact at a temperature below 150° C., such as below 100° C., for example below 30° C. or about room temperature (e.g., between 20° C. and 30° C.). Without intending to be bound by theory, it is believed that hydrogen terminated species diffuse from the interfacial bonding surfaces and chemical bonds are formed between the remaining nitrogen species during the direct bonding process. In some embodiments, direct bonding is strengthened using an annealing process in which the substrates are heated to a temperature above about 30° C. and below about 450° C. (e.g., above about 50° C. and below about 250° C., or about 150° C.) and maintained for a duration of about 5 minutes or more (e.g., about 15 minutes). Typically, the bonding strengthens over time even without the application of heat. Thus, in some embodiments, the method does not include heating the substrates.
[0072] In embodiments where hybrid dielectric and metal bonding is used to bond the substrates, the method may further include planarizing or recessing the metal features 434, 436 below the field surface prior to contacting and bonding the dielectric material layers 430, 432. After forming the dielectric bond, the substrates 902, 904 may be heated to a temperature of 150°C or higher for a period of about 1 hour or longer, such as between 8 and 24 hours, to form a direct metallurgical bond between the metal features 434, 436. Suitable direct dielectric and hybrid bonding techniques that may be used to perform aspects of the methods described herein include and Each of these can be purchased from Adeia Holding Corp., San Jose, CA, USA.
[0073] At block 806, method 800 includes attaching a plurality of manifold covers 926 ( Fig. 9B ) is attached to the upward facing surface 922 of the second substrate 904 to form a bonded substrate stack 912. In some embodiments, and as Fig. 9B , the manifold cover 926 is defined by a repeating pattern formed in the third substrate 910. In those embodiments, the third substrate 910 may include a single body having one or more relatively ductile materials, such as a metal, a polymer, an epoxy, or a laminate. In those embodiments, attaching multiple manifold covers 926 may include aligning the third substrate 910 with the second substrates 904a-904b in the Z direction and bonding the third substrate 910 to the substrates 904a-904b using an adhesive layer 908. Here, the adhesive layer 908 may be formed of a flexible material so as to absorb relative movement caused by the CTE mismatch between the substrates 904a-904b and the third substrate 910. In some embodiments, the third substrate 910 is attached to the second substrate 904 to form a plurality of pre-singulated cooling assemblies 900 ( Fig. 9C ) substrate stack 912.
[0074] At activity 808, method 800 includes singulating a plurality of cooling assemblies 900 ( Fig.9D ) and the device 304 bonded thereto. As shown, each cooling assembly 900 includes a cold plate body 901 and a manifold cover 926 attached to the cold plate body 901, and each of these cooling assemblies may have Figures 4 to 7 Any one or combination of the features of the cooling assembly illustrated in .
[0075] like Fig.9D , the method 800 imparts unique structural characteristics to the cooling components 900 such that the bonding surface of each cooling component 900 has the same perimeter as the back side of the corresponding device 304 bonded thereto. Thus, the sidewalls of the cooling components 900 are typically flush with the edges of the device 304 around their common perimeter. In some embodiments, the cooling components 900 are singulated from the second substrate stack 912 using a process that cuts or divides the substrate stack 912 in a vertical plane (i.e., parallel to the Z direction). In those embodiments, the sides of the cooling components 900 are substantially perpendicular to the back side 320 of the device, i.e., the horizontal (XY) plane of the attachment interface between the device 304 and the cooling components 900. In some embodiments, the cooling components 900 are singulated using a saw or laser cutting process.
[0076] exist 9A to 9D800 , substrates 902 and 904 each include a corresponding number of devices 304 and a cold plate body 901 aligned and bonded to one another. However, it should be recognized that in a typical manufacturing process, at least some of the devices fabricated on the substrates may be non-functional or may otherwise fail quality control criteria prior to method 800. In such cases, it may be desirable to replace the non-functional devices with singulated replacement devices formed on the other substrate prior to bonding at block 804. In such implementations, the replacement devices may be singulated from the other substrate after a backside dielectric material layer is deposited and polished thereon and before or after the backside surface is activated. For example, the non-functional devices may be singulated from substrate 902 and removed from the carrier substrate to create an opening. The replacement devices may be mounted to the carrier substrate thereafter but before the bonding surfaces 430 , 432 are activated. Alternatively, the substrates 902 , 904 may be bonded, and thereafter the replacement devices may be individually activated, aligned, and bonded to the open surface of the second substrate 904.
[0077] In other embodiments, such as FIG. 10A to FIG. 10B , a plurality of separate manifold covers 1026 are individually attached to the surface 922 to form the cooling assembly 1000. In those embodiments, the cooling assembly 1000 is bonded directly to the device 304, and the outer sidewalls of the cold plate body 901 are flush with the edges of the device 304. As shown, the sides of the manifold covers 1026 can be recessed (in the X and Y directions) from the sidewalls of the cold plate body 901.
[0078] Fig.11 Flow diagram of a method 1100 for fabricating an embedded cooling assembly using a die-to-substrate bonding process, wherein individual dies are singulated prior to the method. FIG. 12A to FIG. 12B and FIG. 13A to FIG. 13B Illustrating aspects of method 1100.
[0079] At blocks 1102 and 1104, method 1100 includes aligning a plurality of singulated devices 1204 with the first substrate stack 904, for example by using a pick-and-place process, and directly bonding the devices 1204 to the substrate stack, for example by using the direct bonding method described above. Here, the singulated devices 1204 may be attached to the third substrate 910 or the respective manifold cover 1026 ( Fig. 10A The singulated devices 1204, the first substrate stack 904, and the third substrate 910 form a second substrate stack 1212.
[0080] At block 1106 , the method 1100 includes singulating the plurality of cooling assemblies 1200 from the second substrate stack to form a plurality of cooling assemblies 1200 , wherein a perimeter of each device 1204 is recessed from a perimeter of the cold plate body 901 when viewed from the Z direction.
[0081] In some embodiments, the method 1100 includes directly bonding the plurality of support features 1304 to the bonding surface 920 of the first substrate stack 904, such as Fig.13A ), and singulate multiple cooling assemblies 1300 ( Fig. 13B ). Multiple support features 1304 can be formed of the same material (e.g., silicon) and have the same thickness as device 1204. In those embodiments, support features 1304
[0082] may have a perimeter that is substantially coextensive with the perimeter of the cold plate body 901 after singulation at block 1104 .
[0083] The methods described above advantageously provide an embedded fluid-based cooling assembly that eliminates and / or substantially reduces thermal resistance paths typically associated with cooling systems attached to the outside of the device package. The cooling assembly can be attached to the semiconductor device using direct dielectric or hybrid dielectric and metal bonding methods. Such bonding methods allow for a relatively low thermal budget while providing substantially increased bonding strength when compared to conventional silicon-to-silicon bonding methods, such as thermal compression bonding methods.
[0084] The cooling assembly typically includes a cold plate body and a manifold cover attached to the cold plate body, each formed of different materials having different thermal properties. The cold plate body and semiconductor devices are typically formed of CTE matching materials, which eliminates the need for an intervening TIM layer. The manifold cover is typically formed of a material that is less brittle than the cold plate body to allow for a less brittle / more stable connection to a cooling fluid delivery source. Typically, the cold plate body and manifold cover are formed of CTE mismatched materials and are attached to each other using a flexible adhesive layer. The adhesive layer absorbs the linear expansion difference between the manifold cover and the cold plate body during repeated thermal cycles to extend the service life of the cooling assembly.
[0085] The embodiments discussed above are intended to be illustrative and not restrictive. Those skilled in the art will appreciate that individual aspects of the cooling components, device packaging, and methods discussed herein may be omitted, modified, combined, and / or reconfigured without departing from the scope of the present invention. Only the following claims are intended to set boundaries as to the scope encompassed by the present invention.
Claims
1. A cooling assembly attached to a singulation device, the cooling assembly comprising: a cold plate body including a first side adjacent to the individualization device and an opposite second side; as well as a manifold cover attached to the second side, wherein one or both of the bonding surface of the first side of the cold plate body and the bonding surface of the back side of the singulation device comprises a dielectric material, The cold plate body is attached to the singulated device by a direct dielectric bond formed between the bonding surfaces, The cold plate body and the manifold cover define one or more cavities, and The one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover.
2. The cooling assembly of claim 1, further comprising a coolant fluid disposed in the one or more cavities.
3. The cooling assembly according to claim 1, wherein The cold plate body and the singulation device each include copper features disposed in respective bonding surfaces, and The cooling assembly is attached to the singulated device via the direct dielectric bonds formed between the bonding surfaces and direct metallic bonds formed between the copper features.
4. The cooling assembly according to claim 1, wherein The side surface of the cold plate body and the side surface of the singulation device are substantially flush with each other. 5 . The cooling assembly of claim 4 , wherein the side surface of the cold plate body is substantially perpendicular to the back side of the singulated device. 6 . The cooling assembly of claim 1 , wherein a side surface of the manifold cover is substantially coplanar with the side surface of the cold plate body.
7. The cooling assembly of claim 1, wherein the cold plate body comprises a plurality of base plates in a stacked arrangement.
8. The cooling assembly of claim 7, wherein: The plurality of base plates include a lower base plate directly bonded to the singulation device and an upper base plate directly bonded to the lower base plate; and The fluid flow path sequentially includes: a first cavity disposed between the upper base plate and the manifold cover; a second cavity disposed between the upper base plate and the lower base plate; and a third cavity disposed between the manifold cover and the upper base plate.
9. The cooling assembly of claim 7, wherein: The plurality of base plates include a lower base plate, an upper base plate, and one or more intervening base plates disposed between the lower base plate and the upper base plate; and The fluid flow path includes, in sequence: a first chamber disposed between the upper base plate and the manifold cover; a second chamber disposed between the upper base plate and the one or more intervention base plates; a third chamber disposed between the one or more intervention base plates and the lower base plate; and a fourth chamber disposed between the upper base plate and the manifold cover.
10. The cooling assembly of claim 1, wherein: The cold plate body includes one or more single crystal silicon or polycrystalline silicon substrates; and The manifold cover comprises a metal, polymer or epoxy material.
11. The cooling assembly of claim 1 , wherein: The manifold cover and the cold plate body have different coefficients of thermal expansion; and The manifold cover is attached to the cold plate body by a layer of adhesive material.
12. The cooling assembly of claim 1, wherein at least a portion of the back side of the singulated device is directly exposed to the fluid flow path.
13. A cooling assembly attached to a singulation device, the cooling assembly comprising: a cold plate body including a first side adjacent to the singulation device and an opposing second side; as well as a manifold cover attached to the second side, wherein The cold plate body is directly bonded to the individualized device, The side surface of the cold plate body and the side surface of the individualization device are substantially flush with each other, and The cold plate body and the manifold cover define one or more cavities that form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover.
14. The cooling assembly of claim 13, further comprising a coolant fluid disposed in the one or more cavities.
15. The cooling assembly of claim 13, wherein one or both of the bonding surface of the first side of the cold plate body and the bonding surface of the back side of the singulation device comprises a dielectric material, The cold plate body and the singulation device each include a copper feature disposed in the respective bonding surface, and The cooling assembly is attached to the singulated device via direct dielectric bonds formed between the bonding surfaces and direct metallic bonds formed between the copper features.
16. The cooling assembly of claim 13, wherein The side surface of the cold plate body and the side surface of the singulation device are substantially flush with each other.
17. The cooling assembly of claim 16, wherein the side surface of the cold plate body is substantially perpendicular to a back side of the singulated device.
18. The cooling assembly of claim 13, wherein a side surface of the manifold cover is substantially coplanar with the side surface of the cold plate body.
19. The cooling assembly of claim 13, wherein the cold plate body comprises a plurality of base plates in a stacked arrangement.
20. The cooling assembly of claim 19, wherein: The plurality of base plates include a lower base plate directly bonded to the singulation device and an upper base plate directly bonded to the lower base plate; and The fluid flow path sequentially includes: a first cavity disposed between the upper base plate and the manifold cover; a second cavity disposed between the upper base plate and the lower base plate; and a third cavity disposed between the manifold cover and the upper base plate.
21. The cooling assembly of claim 19, wherein: The plurality of base plates include a lower base plate, an upper base plate, and one or more intervening base plates disposed between the lower base plate and the upper base plate; and The fluid flow path includes, in sequence: a first chamber disposed between the upper base plate and the manifold cover; a second chamber disposed between the upper base plate and the one or more intervention base plates; a third chamber disposed between the one or more intervention base plates and the lower base plate; and a fourth chamber disposed between the upper base plate and the manifold cover.
22. The cooling assembly of claim 13, wherein: The cold plate body includes one or more single crystal silicon or polycrystalline silicon substrates; and The manifold cover comprises a metal, polymer or epoxy material.
23. The cooling assembly of claim 13, wherein: The manifold cover and the cold plate body have different coefficients of thermal expansion; and The manifold cover is attached to the cold plate body by a layer of adhesive material.
24. The cooling assembly of claim 13, wherein at least a portion of a back side of the singulated device is directly exposed to the fluid flow path.
25. A cooling assembly attached to a singulation device, the cooling assembly comprising: a cold plate body including a first side bonded to the singulation device and an opposing second side; as well as a manifold cover attached to the second side by a flexible adhesive layer disposed therebetween, wherein The cold plate body and the manifold cover define one or more cavities that form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover, and The cold plate body and the manifold cover are formed of materials having different coefficients of thermal expansion.
26. The cooling assembly of claim 25, further comprising a coolant fluid disposed in the one or more cavities.
27. The cooling assembly of claim 25, wherein The cold plate body and the singulation device each include a copper feature disposed in the respective bonding surface, and The cooling assembly is attached to the singulated device via the direct dielectric bonds formed between the bonding surfaces and direct metallic bonds formed between the copper features.
28. The cooling assembly of claim 25, wherein The side surface of the cold plate body and the side surface of the singulation device are substantially flush with each other.
29. The cooling assembly of claim 28, wherein the side surface of the cold plate body is substantially perpendicular to a back side of the singulated device.
30. The cooling assembly of claim 25, wherein a side surface of the manifold cover is substantially coplanar with the side surface of the cold plate body.
31. The cooling assembly of claim 25, wherein the cold plate body comprises a plurality of base plates in a stacked arrangement.
32. The cooling assembly of claim 31 , wherein: The plurality of base plates include a lower base plate directly bonded to the singulation device and an upper base plate directly bonded to the lower base plate; and The fluid flow path sequentially includes: a first cavity disposed between the upper base plate and the manifold cover; a second cavity disposed between the upper base plate and the lower base plate; and a third cavity disposed between the manifold cover and the upper base plate.
33. The cooling assembly of claim 31 , wherein: The plurality of base plates include a lower base plate, an upper base plate, and one or more intervening base plates disposed between the lower base plate and the upper base plate; and The fluid flow path includes, in sequence: a first chamber disposed between the upper base plate and the manifold cover; a second chamber disposed between the upper base plate and the one or more intervention base plates; a third chamber disposed between the one or more intervention base plates and the lower base plate; and a fourth chamber disposed between the upper base plate and the manifold cover.
34. The cooling assembly of claim 25, wherein: The cold plate body includes one or more single crystal silicon or polycrystalline silicon substrates; and The manifold cover comprises a metal, polymer or epoxy material.
35. The cooling assembly of claim 25, wherein: The manifold cover and the cold plate body have different coefficients of thermal expansion; and The manifold cover is attached to the cold plate body by a layer of adhesive material.
36. The cooling assembly of claim 25, wherein at least a portion of a back side of the singulated device is directly exposed to the fluid flow path.
37. A device package with an embedded cooling assembly, comprising: a package substrate including a support surface; a monolithic device mounted on the support surface; a cold plate body including a first side adjacent to the singulation device and an opposing second side; a manifold cover attached to the second side; as well as A packaging cover is disposed above the manifold cover, wherein The cold plate body and the manifold cover define one or more cavities, and The one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover.
38. The device package of claim 37, wherein One or both of the bonding surface of the first side of the cold plate body and the bonding surface of the back side of the singulation device include a dielectric material, and The cold plate body is attached to the singulated device via a direct dielectric bond formed between the bonding surfaces.
39. The device package of claim 37, wherein The packaging housing is supported by a peripheral region of the support surface, and The packaging housing is spaced apart from the manifold cover by a clearance region.
40. The device package of claim 39, wherein the package housing is formed of a rigid or semi-rigid material such that forces applied to an upper surface of the package housing are transferred to the peripheral region of the support surface.
41. The device package of claim 39, further comprising a flexible material disposed in the gap region.
42. The device package of claim 39, further comprising a molding material disposed in the gap region, wherein the molding material at least partially encapsulates the manifold cover.
43. The device package of claim 37, wherein: two or more singulated devices mounted on the support surface of the packaging substrate in a side-by-side arrangement; The cold plate body is directly attached to at least one of the two or more individualized devices; and The packaging housing is disposed over the two or more singulation devices and the manifold cover.
44. The device package of claim 37, further comprising a second device or device stack mounted on the support surface of the package substrate, wherein the second device or device stack is thermally connected to the manifold cover via one or more thermal interface materials, the one or more thermal interface materials forming a thermal path between the second device or device stack, the package cover and the manifold cover.
45. A method of manufacturing a plurality of cooling assemblies, each comprising a cold plate body and a manifold cover and each directly bonded to a semiconductor device, the method comprising: (a) aligning a first substrate including a plurality of semiconductor devices with a second substrate including a plurality of cold plate bodies; (b) directly bonding a surface of the first substrate to a surface of the second substrate, wherein one or both of the surfaces comprises a dielectric material; and (c) Singulating a plurality of cooling modules and semiconductor devices bonded thereto from the first substrate and the second substrate.
46. The method of claim 45, wherein The cold plate body and the manifold cover of each cooling assembly define one or more cavities, and The one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover.
47. The method of claim 46, wherein each of the cold plate bodies comprises: a bottom plate having a recessed surface that forms a bottom of one of the one or more cavities; as well as A plurality of features project upwardly from the recessed surface.
48. The method of claim 46, wherein The first substrate includes an active side and an opposing back side, and the back side forms a bottom of one of the one or more cavities.
49. The method of claim 48, wherein the back side includes a plurality of features protruding upward into the cavity.
50. The method of claim 45, further comprising: (d) Prior to (c), attaching a third substrate to the second substrate, the third substrate comprising a plurality of manifold covers.
51. The method of claim 45, further comprising: (e) Prior to (c), attaching a plurality of individualized manifold covers to the second substrate.
52. The method of claim 45, wherein the second substrate comprises single crystal silicon or polycrystalline silicon.
53. A method of manufacturing a device package, the device package comprising an embedded cooling assembly, the method comprising: aligning a plurality of singulated semiconductor devices with a first substrate including a plurality of cold plate bodies; directly bonding the plurality of singulated semiconductor devices to the first substrate; as well as A plurality of cooling modules are singulated from the first substrate.
54. The method of claim 53, wherein The cooling assembly includes a manifold cover and a cold plate body, The cold plate body and the manifold cover define one or more cavities, and The one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover.
55. The method of claim 54, wherein each of the cold plate bodies comprises: a bottom plate having a recessed surface that forms a bottom of one of the one or more cavities; as well as A plurality of features project upwardly from the recessed surface.
56. The method of claim 54, wherein The first substrate includes an active side and an opposing back side, and the back side forms a bottom of one of the one or more cavities.
57. The method of claim 56, wherein the back side includes a plurality of features protruding upward into the cavity.
58. The method of claim 53, further comprising: (d) Prior to (c), attaching a third substrate to the second substrate, the third substrate comprising a plurality of manifold covers.
59. The method of claim 53, further comprising: (e) Prior to (c), attaching a plurality of individualized manifold covers to the second substrate.
60. The method of claim 53, wherein the second substrate comprises single crystal silicon or polycrystalline silicon.
61. A method of manufacturing a plurality of device packages, each of the plurality of device packages comprising an embedded cooling assembly, the method comprising: (a) aligning a plurality of singulated semiconductor devices with a first substrate comprising a plurality of cold plate bodies; (b) directly bonding the plurality of individualized semiconductor devices to the first substrate; as well as (c) Individualizing a plurality of cooling modules from the first substrate.
62. The method of claim 61 further comprising: A plurality of support features are bonded to the first substrate in gaps between adjacent singulated devices, wherein the plurality of support features are formed from a silicon substrate.
63. The method of claim 61, wherein Each of the cooling assemblies includes a manifold cover, The cold plate body and the manifold cover of each cooling assembly define one or more cavities, and The one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold cover.
64. The method of claim 63, wherein each of the cold plate bodies comprises: a bottom plate having a recessed surface that forms a bottom of one of the one or more cavities; as well as A plurality of features project upwardly from the recessed surface.
65. The method of claim 63, wherein The first substrate includes an active side and an opposing back side, and the back side forms a bottom of one of the one or more cavities.
66. The method of claim 65, wherein the back side includes a plurality of features protruding upward into the cavity.
67. The method of claim 61, further comprising: (d) Prior to (c), attaching a second substrate to the first substrate, the second substrate comprising a plurality of manifold covers.
68. The method of claim 61, further comprising: (e) Prior to (c), attaching a plurality of individualized manifold covers to the first substrate.
69. The method of claim 61, wherein the first substrate comprises single crystal silicon or polycrystalline silicon.