Pin arrangement method of optical switch array, optical switch array chip and control method

Abstract

The invention relates to the technical field of optical communication, in particular to a pin arrangement method of an optical switch array, an optical switch array chip and a control method. The method comprises the following steps: carrying out region division on an optical switch array according to a connection relation of optical switches to obtain a plurality of regions; arranging the same ground pin for all the optical switches in each area, and arranging different electrical control pins; and arranging the same electrical control pin for all the optical switches at the same position in each area. According to the invention, the optical switches are subjected to region division, so that some optical switches use the same electrical control pin and are connected with different ground pins. The optical switches using the same electrical control pin are connected with different ground pins, so that only the connected ground pins of the optical switches in an electrical conduction state can complete a signal instruction. Therefore, the purposes that each optical switch can be independently controlled, and the number of pins of the optical switch array can be greatly reduced are achieved.

Description

Technical Field

[0001] The present invention relates to the field of optical communication technology, and in particular to a pin arrangement method of an optical switch array, an optical switch array chip and a control method. Background Art

[0002] With the rapid development of the information age, network data traffic has exploded, bringing huge challenges to traditional communications and data exchange. Traditional data interaction is constrained by the bottleneck of electrical development and has disadvantages such as high power consumption and high latency. Optical interconnection using all-optical switching has the advantages of high speed, large bandwidth, low power consumption, and low latency, which meets the current data transmission needs for a new generation of switching technology.

[0003] Silicon-based optoelectronic technology, as one of the current mainstream solutions, has the advantages of being compatible with complementary metal oxide semiconductor (CMOS) process production lines, low cost, and high integration. As the core device for building an all-optical network, silicon-based optical switches on the silicon-on-insulator (SOI) platform can output optical signals input from any port from any port. In addition, silicon-based integrated optoelectronic devices have the advantages of small size, low power consumption, and low driving voltage. They have been widely studied in recent years and are of great significance to the future construction of all-optical high-speed optical communication networks.

[0004] In the large-scale silicon photonic chip manufacturing process, multi-port optical switch arrays often arrange pins on a large scale at the edge of the optical chip to facilitate subsequent packaging because they require multiple electrical pins to control each optical switch. When the number of optical switch ports is too large, it will cause problems such as excessive pin density or insufficient space for pin arrangement. Therefore, finding a method to reduce the number of pins on the optical switch array chip is an important issue that needs to be solved urgently. Summary of the invention

[0005] In view of this, the present invention provides a pin arrangement method of an optical switch array, an optical switch array chip and a control method to solve the problem of excessive pin density in the optical switch array chip in the prior art.

[0006] In a first aspect, the present invention provides a pin arrangement method for an optical switch array, the method comprising: dividing the optical switch array into regions according to the connection relationship of the optical switches to obtain a plurality of regions, wherein the optical switch array includes more than or equal to three columns of optical switches; arranging the same ground pin for all optical switches in each region, and arranging different electrical control pins; arranging the same electrical control pin for all optical switches at the same position in each region.

[0007] In the present invention, the optical switches in the optical switch array are divided into regions so that some of the optical switches can use the same electrical control pin but connect to different ground pins. Although the same electrical signal is applied to the optical switches using the same electrical control pin at the same time, since they are connected to different ground pins, only the optical switches whose ground pins are electrically conductive can complete the signal instruction. In this way, each optical switch can be controlled individually and the number of pins in the optical switch array can be greatly reduced.

[0008] In an optional embodiment, the optical switch array is divided into regions according to the connection relationship of the optical switches to obtain multiple regions, including: obtaining the number of columns of optical switches that have not been divided into regions in the optical switch array, and taking the number of columns as the remaining number of columns; when the remaining number of columns is greater than or equal to three columns and is an even number, dividing the regions by obtaining half of the number of optical switches from the last column of the remaining number of columns to obtain multiple regions; when the remaining number of columns is greater than or equal to three columns and is an odd number, dividing the regions by obtaining half of the number of optical switches obtained by adding one to the remaining number of columns from the last column of the remaining number of columns to obtain multiple regions.

[0009] In the present invention, by dividing the area according to half or nearly half of the number of columns, the balance of the arranged ground pins and electrical control pins can be achieved, thereby reducing the number of arranged ground pins and electrical control pins to a greater extent.

[0010] In an optional implementation, when the number of remaining columns is an even number, the optical switches of half the number of remaining columns are obtained from the last column of the remaining columns to perform area division to obtain multiple areas, including: when the number of remaining columns is A columns, and A is an even number, the first The optical switch levels from column A to column B are divided into areas, each of which includes An optical switch in a column and multiple optical switches connected thereto.

[0011] In an optional implementation, when the number of remaining columns is an odd number, the optical switches of half the number of remaining columns plus one are obtained from the last column of the remaining columns to divide the regions, and multiple regions are obtained, including: when the number of remaining columns is B columns, and B is an odd number, the first The optical switch levels from row to row B are divided into areas, each of which includes An optical switch in a column and multiple optical switches connected thereto.

[0012] In the present invention, by adopting the above-mentioned method to divide the regions, the number of divided regions is clarified, thereby further determining the number of arranged ground pins and electrical control pins.

[0013] In an optional implementation, when the number of remaining columns is one or two, all optical switches in the remaining columns are divided into the same area.

[0014] In the present invention, when the number of remaining columns is small, they are directly divided into the same area, thereby avoiding unnecessary division of more areas and avoiding adding more ground pins.

[0015] In an optional implementation, arranging the same electrical control pin for all optical switches at the same position in each area includes: arranging the same electrical control pin for all optical switches at the same position in the same column in each area.

[0016] In a second aspect, the present invention provides an optical switch array chip, comprising an optical switch array and ground pins and electrical control pins arranged by the pin arrangement method for an optical switch array according to the first aspect of the present invention and any embodiment of the first aspect.

[0017] In the present invention, the number of pins of the optical switch array chip can be reduced, which is convenient for chip design and pin arrangement. Moreover, as the number of optical switch ports increases, the effect of reducing the number of pins becomes more significant.

[0018] In a third aspect, the present invention provides a control method for an optical switch array chip, the method comprising: determining an optical switch that needs to be in a working state according to an input port and an output port when an optical signal is transmitted in the optical switch array; controlling a ground pin and an electrical control pin of a corresponding optical switch to be in an electrically conductive state according to the optical switch that needs to be in a working state, the ground pin and the electrical control pin being arranged using the pin arrangement method for an optical switch array described in the first aspect of the present invention and any embodiment of the first aspect.

[0019] In the present invention, since the above pin arrangement method is used for pin arrangement, when the control method is used to control the optical switch array chip, independent control of each optical switch can be achieved.

[0020] In a fourth aspect, the present invention provides a method for preparing an optical switch array chip, the method comprising: forming an optical switch array on a substrate; arranging ground pins and electrical control pins on the substrate according to the pin arrangement method of the optical switch array described in the first aspect of the present invention and any embodiment of the first aspect to obtain an optical switch array chip; and packaging the optical switch array chip.

[0021] In the present invention, when preparing the optical switch array chip, the above pin arrangement method is used to arrange the ground pins and the electrical control pins, thereby reducing the difficulty of preparation and packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 is a schematic flow chart of a pin arrangement method of an optical switch array according to an embodiment of the present invention; Figure 2 is a schematic structural diagram of an optical switch array according to an embodiment of the present invention; Figure 3 is a structural schematic diagram of another optical switch array according to an embodiment of the present invention; Figure 4 is a schematic diagram of the structure of another optical switch array according to an embodiment of the present invention Figure 5 is a schematic structural diagram of yet another optical switch array according to an embodiment of the present invention; Figure 6 is a flow chart of a control method of an optical switch array chip according to an embodiment of the present invention; Figure 7 The figure is a schematic flow chart of a method for preparing an optical switch array chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0025] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0026] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0027] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0028] At present, in the related art, when designing a multi-port optical switch array, each optical switch unit is equipped with an electrical pin for command control, all optical switches share a common ground, and all electrical pins are distributed at the upper and lower ends of the optical switch array chip for easy packaging. When the optical switch array has many ports, a large number of pins are required, resulting in the inability to orderly design and distribute the space at the upper and lower ends of the chip, which brings great difficulties to the electrical packaging.

[0029] According to an embodiment of the present invention, a pin arrangement method embodiment of an optical switch array is provided. Although a logical sequence is shown in the flow chart, in some cases, the steps shown or described may be performed in a different order than that shown here.

[0030] In this embodiment, a pin arrangement method of an optical switch array is provided. Figure 1 FIG. 1 is a flow chart of a pin arrangement method for an optical switch array according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps: Step S101, divide the optical switch array into regions according to the connection relationship of the optical switches to obtain multiple regions, and the optical switch array includes more than or equal to three columns of optical switches. Specifically, according to the number of input ports and the number of output ports of the optical switch, the optical switch can be divided into 1×N, 2×N, M×N and other types. Among them, the optical switch in the optical switch array of this embodiment is a 1×N optical switch, and N can be taken according to actual needs, for example, N is greater than or equal to 8. The optical switch array includes multiple input ports, multiple output ports, and multiple optical switches arranged between the multiple input ports and the multiple output ports. The multiple optical switches are connected using the connection method in the related art.

[0031] In this embodiment, the number of columns included in the optical switch array is determined based on the number of optical switches and the connection relationship between them, for example. Figure 2As shown, the optical switch array includes seven optical switches, the two output ends of the first optical switch are respectively connected to the input end of the second optical switch and the input end of the third optical switch, the two output ends of the second optical switch are respectively connected to the input end of the fourth optical switch and the input end of the fifth optical switch, and the two output ends of the third optical switch are respectively connected to the input end of the sixth optical switch and the input end of the seventh optical switch, then the number of columns of the optical switch array is 3. Among them, the first optical switch is in the first column, the second optical switch and the third optical switch are in the second column, and the fourth to seventh optical switches are in the third column. The pin arrangement method of this embodiment is mainly for optical switch arrays containing three or more columns. When the optical switch array has only two columns or one column or when the number of optical switches in the optical switch array is small, the pin arrangement method in the related art can be directly adopted.

[0032] In this embodiment, when performing area division, the division is performed based on the connection mode of the optical switches in the optical switch array. That is, the optical switches with a connection relationship are divided into one area. For example, for the above optical switch array with seven optical switches, Figure 2 As shown, the fourth optical switch and the fifth optical switch are connected to the second optical switch respectively, and the second optical switch, the fourth optical switch and the fifth optical switch are divided into the same area (such as the first area). Similarly, the third optical switch, the sixth optical switch and the seventh optical switch are divided into the same area (such as the second area). The remaining first optical switch can be divided into a separate area, or can be divided into the area where the second optical switch is located, or can be divided into the area where the third optical switch is located.

[0033] Step S102: All optical switches in each area are provided with the same ground pin, and different electrical control pins are provided. Specifically, after the area division is completed, all optical switches in the same area are provided with the same ground pin, that is, all optical switches in the same area share the same ground pin. Figure 2 As shown, the first area is provided with the same ground pin GND1, and the second area is provided with a second ground pin GND2. Meanwhile, different electrical control pins are provided for all optical switches in the same area.

[0034] Step S103, arranging the same electrical control pin for all optical switches at the same position in each area. Specifically, after completing the area division, all areas can be compared to determine the optical switches at the same position. The same position can be determined based on the connection mode of the optical switches. The optical switches at the same position can be the optical switches at the same position in the same column. For example, still for the optical switch array with seven optical switches, as Figure 2As shown, the second optical switch and the third optical switch in the first area and the second area are in the same column, and the same electrical control pin Sig1 is arranged for the second optical switch and the third optical switch; the fourth optical switch and the sixth optical switch are both located in the third column, and are both connected to the output end of the previous optical switch at the top, so it is considered that the fourth optical switch and the sixth optical switch are in the same position, and the same electrical control pin Sig2 is arranged for the fourth optical switch and the sixth optical switch. Similarly, the same electrical control pin Sig3 is arranged for the fifth optical switch and the seventh optical switch. For the first optical switch, it is not in the same column as other optical switches, that is, there is no optical switch in the same position as the first optical switch, so an electrical control pin Sig4 is arranged separately for the first optical switch.

[0035] Based on this, each area uses a different ground pin, and the optical switches in the same area use different electrical control pins, which makes it possible to control each optical switch individually. For example, for the optical switch array shown in the figure, based on step S102, the same ground pin GND1 is arranged for all optical switches in the first area, and the same ground pin GND2 is arranged for all optical switches in the second area. At the same time, different electrical control pins are arranged for all optical switches in the first area, such as electrical pins Sig1, Sig2, and Sig3, respectively. The same applies to the second area. At this time, if the fourth optical switch needs to be controlled individually, only the Sig2 and GND1 pins need to be turned on at the same time. At this time, only this optical switch works, and the others have no response. This is because the optical switches controlled by Sig2 in other areas are not connected to the GND1 pin, and the other optical switches in the area where the GND1 pin is connected are not connected to the electrical control pin Sig2.

[0036] For Figure 2 The optical switch array shown, when the pin arrangement method in the related art is adopted, that is, each optical switch unit is equipped with 1 electrical control pin for command control, and all optical switches share a common ground, that is, share 1 ground pin, then the seven optical switches in the optical switch array need to be arranged with seven electrical control pins, plus one ground pin, so eight pins need to be arranged. However, when the pin arrangement method in the above method is adopted, by dividing the two areas, two ground pins need to be arranged, and four electrical control pins are arranged at the same time, so a total of six pins need to be arranged, and even if the first optical switch is divided into a separate area, that is, one more ground pin is added, the total number of pins is seven. It can be seen that compared with the pin arrangement method in the related art, the pin arrangement method provided in this embodiment reduces the number of pins in the optical switch array.

[0037] In addition, it should be noted that the above embodiment is only an example for an array with seven optical switches, and when the optical switch array includes a larger number of optical switches, the pin arrangement method of this embodiment can reduce the number of pins. If the number of optical switches in the optical switch array is small or the number of columns is small, the pin arrangement method in the related art can be directly adopted. Therefore, when the number of optical switches is small, the number of pins to be arranged is also small, which will not cause great difficulties in packaging.

[0038] The pin arrangement method of the optical switch array provided by the embodiment of the present invention divides the optical switches in the optical switch array into regions so that some of the optical switches can use the same electrical control pin but connect to different ground pins. Although the same electrical signal is applied to the optical switches using the same electrical control pin at the same time, since they are connected to different ground pins, only the optical switches whose ground pins are electrically conductive can complete the signal instructions. In this way, the purpose of individually controlling each optical switch and greatly reducing the number of pins in the optical switch array is achieved.

[0039] In this embodiment, a pin arrangement method of an optical switch array is provided, and the method comprises the following steps: Step S201, the optical switch array is divided into regions according to the connection relationship of the optical switches to obtain a plurality of regions, wherein the optical switch array includes optical switches of greater than or equal to three columns. Specifically, since the regions are divided according to the connection relationship of the optical switches, and the input end of the next optical switch in the optical switch array is connected to the output end of the previous optical switch, when the regions are divided according to the connection relationship, the specific division position can be determined from the optical switches in the last column of the optical switch array based on their connection relationship. Among them, the optical switches in the last column can eventually be connected to the optical switches in the first column based on their connection relationship, but if the optical switches in the first column are used as the division position, the entire optical switch array is divided into one region, which is the same as the pin arrangement method in the related art; if the optical switches in the second positive column are used as the division position for pin arrangement, that is, each optical switch in the second positive column and the optical switches connected thereafter are divided into one region, although the number of electrical control pins is reduced compared with the related art, because each region needs to arrange a ground pin, that is, through the region division, the number of ground pins is increased compared with the related art. Therefore, in order to minimize the number of electrical control pins and not increase the number of ground pins too much, that is, to achieve a balance between electrical control pins and ground pins, the area can be divided from the position of half the number of columns of the optical switch array.

[0040] Specifically, the above step S201 includes: Step S2011, obtaining the number of columns of optical switches that are not divided into regions in the optical switch array, and taking the number of columns as the number of remaining columns.

[0041] Step S2012: when the number of remaining columns is greater than or equal to three and is an even number, the optical switches of half the number of remaining columns are obtained from the last column of the remaining columns to perform area division to obtain a plurality of areas.

[0042] Step S2013, when the remaining number of columns is greater than or equal to three and is an odd number, the region is divided according to the optical switches of half the number of columns obtained from the last column of the remaining number of columns plus one, to obtain a plurality of regions.

[0043] Step S2014: when the number of remaining columns is one or two, all optical switches of the remaining columns are divided into the same area.

[0044] Specifically, according to the above analysis, when the area division is performed at the position of half of the number of columns, the number of arranged pins can be reduced to a greater extent. However, when the optical switch array is an odd number, it is impossible to perform the division of half of the number of columns. Therefore, it is necessary to determine the corresponding division method for when the number of columns is an odd number and an even number respectively. For example, according to the above method, when the number of columns is an even number, half of the number of columns is selected for area division each time, and when the number of columns is an odd number, half of the number of columns after the remaining number of columns plus 1 is selected for area division each time. In addition, after selecting half of the number of columns or half of the number of columns after the remaining number of columns plus 1 for area division, if there are more than three columns of optical switches left that have not been divided into areas, the corresponding number of columns can continue to be selected for area division according to whether it is an odd number or an even number. That is, multiple area divisions need to be performed using this area division method.

[0045] Specifically, when the number of columns in the optical switch array that have not been divided into regions is an even number, the position of half the number of columns is determined from the last column to the front for region division, that is, each optical switch in the column where half the number of columns is located and the optical switch connected thereafter are divided into one region. In this way, the region division of half the number of columns is completed, and the remaining half of the number of columns that have not been divided into regions may be an odd number or an even number. When the remaining number of columns is an odd number, the region division is performed by determining the position of half the number of columns after the remaining number of columns is added by one from the last column of the remaining number of columns to the front, and each optical switch in the column where the position of half the number of columns after the remaining number of columns is added by one and the optical switch connected thereafter are divided into one region. The above process is then repeated for multiple region divisions.

[0046] For example, when the number of columns of the optical switch array is ten, when the first area division is performed, the number of remaining columns is ten, and the number of columns which is half of the remaining number of columns is five. The sixth column is used as the division position. If the sixth column includes 32 optical switches, each optical switch and all optical switches connected thereafter are divided into one area, and 32 areas are obtained. After the first area division is completed, the number of remaining columns is five. The third column is used as the division position. If the third column includes 4 optical switches, each optical switch and all optical switches connected thereafter to the fifth column (the last column of the remaining number of columns) are divided into one area, and 4 areas are obtained. After the second area division is completed, the number of remaining columns includes only two columns. At this time, all the remaining optical switches that have not been divided into areas can be divided into the same area.

[0047] In an alternative embodiment, Figure 3 As shown, when the optical switches in the optical switch array are 1×2 optical switches and are connected to form a tree structure as shown in the figure, if the number of remaining columns is A and A is an even number, the first ( ) to A columns, the optical switch levels are divided into areas, each of which includes the first ) column and multiple optical switches connected thereto. If the number of remaining columns is B and B is an odd number, the ( ) to B columns, the optical switch levels are divided into areas, each of which includes the first ) and multiple optical switches connected thereafter. In the divided area GND1-GND (or GND ), the first column of optical switches in each GND area is controlled by the electrical control pin Sig1, the first row of optical switches in the second column of each GND area is controlled by the electrical control pin Sig2, and the optical switches in the last column are controlled by the electrical control pins Siga, Sigb, Sigc and Sigd.

[0048] Step S202: Arrange the same ground pin for all optical switches in each area. Figure 1 Step S102 of the illustrated embodiment will not be described in detail here.

[0049] Step S203: Arrange the same electrical control pin for all optical switches at the same position in each area; see Figure 1 Step S103 of the illustrated embodiment will not be described in detail here.

[0050] Specifically, Figure 4 As shown, when the optical switch array is a 1×16 optical switch array (a total of 4 columns, A=4), the optical switch array pin setting method of the related art is to Figure 4 In the 1×16 optical switch array shown, there are a total of fifteen optical switches, each of which is controlled by a signal through an electrical pin and shares a GND pin, requiring a total of sixteen pins.

[0051] When the method of this embodiment is adopted, the last two columns (the ( ) to A=4) are divided into four regions: ), each area uses the same GND pin, namely GND1, GND2, GND3, GND4, the third column of optical switches uses the same pin Sig1 for signal control, and the optical switches in each divided area of ​​the fourth column of optical switches are set to pins Sig2 and Sig3 respectively. The first and second columns of optical switches are divided into one area, and use pins Sig01, Sig02 and Sig03 for signal control respectively, and the first and second columns of optical switches use the same GND pin, GND0. In this way, the method of this embodiment uses a total of 11 pins, which reduces the number of pins for optical switches on the chip compared to the original 16 pins.

[0052] like Figure 5 As shown, when the optical switch array is a 1×32 optical switch array (a total of 5 columns, B=5), the optical switch pin setting method of the related art is to Figure 5 In the 1×32 optical switch array shown, there are a total of 31 optical switches, each of which is controlled by a signal through an electrical pin and shares a GND pin, requiring a total of 32 pins.

[0053] When the method of this embodiment is adopted, the last two columns (the ( The optical switches from column (B=5) to column (B=5) are divided into four regions: ), each area uses the same GND, namely GND1, GND2, GND3, GND4, the third column of optical switches uses the same pin Sig1 for signal control, the optical switches in each divided area of ​​the fourth column of optical switches are set to pins Sig2 and Sig3, and the optical switches in each area of ​​the fifth column of optical switches are set to Sig4, Sig5, Sig6, Sig7. The first and second columns of optical switches use pins Sig01, Sig02 and Sig03 for signal control, and the first and second columns of optical switches use one GND pin, GND0. In this way, a total of 15 pins are used using the method of this embodiment. Compared with the original 32 pins, the number of pins for optical switching on the chip is greatly reduced.

[0054] In this embodiment, an optical switch array chip is provided. The chip includes an optical switch array and ground pins and electrical control pins arranged by the pin arrangement method of the optical switch array described in the above embodiment.

[0055] The optical switch array chip provided by the embodiment of the present invention can reduce the number of pins of the optical switch chip, facilitate chip design and pin arrangement, and as the number of optical switch ports increases, the effect of reducing the number of pins becomes more significant.

[0056] In this embodiment, a control method for an optical switch array chip is provided. Figure 6 As shown, the method comprises the following steps: Step 301, determining an optical switch that needs to be in a working state according to an input port and an output port when an optical signal is transmitted in an optical switch array; Step 302: Control the ground pin and the electrical control pin of the corresponding optical switch to be in an electrically conductive state according to the optical switch that needs to be in the working state. The ground pin and the electrical control pin are arranged using the pin arrangement method of the optical switch array described in the above embodiment.

[0057] Specifically, the optical switch array includes a plurality of input ports, a plurality of output ports, and a plurality of optical switches arranged between the plurality of input ports and the plurality of output ports. When the optical switch array is working, an optical signal can be input from any input port and output from any output port. Therefore, before the optical switch array works, it is necessary to determine the input port and output port of the optical signal. In addition, after the input port and the output port are determined, the optical switch that needs to be in the working state is determined based on the optical switch connected between the determined input port and the output port. Thereafter, when the optical switch array is working, a signal is applied to the ground pin and the electrical control pin of the optical switch that needs to be in the working state, that is, the corresponding ground pin and the electrical control pin are in the electrically conductive state, so that the corresponding optical switch is in the working state, and the optical signal is input from the corresponding input port and then output from the corresponding output port.

[0058] For example, when the structure of the optical switch array is Figure 4 As shown, the control method can be implemented according to the following process: if light is input from input port 1 and output from output port 1, the optical switches that need to be in working state are the first optical switch, the second optical switch, the third optical switch and the fourth optical switch, thereby determining that the ground pins and electrical control pins that need to be in the on state include Sig01, Sig02 and GND0 and Sig1, Sig2 and GND1. As a result, after light is input from input port 1, it enters the second optical switch from the upper waveguide through the first optical switch 1, and is output from the upper waveguide of the second optical switch to the third optical switch. After the light passes through the third optical switch, it is output from the upper waveguide of the third optical switch to the fourth optical switch, and finally output from output port 1. Since no electrical signal is applied to GND2, GND3, and GND4, although control signals are also applied to Sig1 and Sig2 in other areas, the optical switches in their areas are all in non-working state.

[0059] When the structure of the optical switch array is Figure 5 As shown, the control method can be implemented according to the following process: if light is input from input port 1 and output from output port 1, the optical switches that need to be in working state are the first optical switch, the second optical switch, the third optical switch, the fourth optical switch and the fifth optical switch, and thus the ground pins and electrical control pins that need to be in the on state include Sig01, Sig02 and GND0 and Sig1, Sig2, Sig4 and GND1. As a result, after light is input from input port 1, it enters the second optical switch from the upper waveguide through the first optical switch 1, and is output from the upper waveguide of the second optical switch to the third optical switch. After light passes through the third optical switch, it is output from the upper waveguide of the third optical switch to the fourth optical switch. The optical signal output from the upper waveguide of the fourth optical switch enters the fifth optical switch and is finally output from output port 1. Since no electrical signal is applied to GND2, GND3, and GND4, although control signals are also applied to Sig1, Sig2, and Sig4 in other areas, the optical switches in their areas are all in non-working state.

[0060] In this embodiment, a method for preparing an optical switch array chip is provided. Figure 7 As shown, the method comprises the following steps: Step S401, forming an optical switch array on a substrate; specifically, before preparing the optical switch array chip, the layout of the chip can be determined and a photolithography mask can be formed. The substrate can be made of silicon, silicon on insulator or quartz. During preparation, the substrate is first cleaned and processed, and then the waveguide pattern is transferred from the photolithography mask to the substrate using photolithography technology, and an optical switch is formed on the substrate based on the working principle of the optical switch, thereby completing the preparation of the optical switch array.

[0061] Step S402, arranging ground pins and electrical control pins on the substrate according to the pin arrangement method of the optical switch array described in the above embodiment, to obtain an optical switch array chip; specifically, after determining the ground pins and electrical control pins that need to be arranged based on the pin arrangement method of the optical switch array in the above embodiment, making pins at the edge of the substrate or at a preset position through photolithography and etching processes to obtain the optical switch array chip.

[0062] Step S403, packaging the optical switch array chip. Specifically, during packaging, the optical switch array chip can be fixed on a packaging substrate and connected to the substrate, and then packaged using a packaging shell.

[0063] Although the exemplary embodiments and their advantages have been described in detail, those skilled in the art may make various changes, substitutions and modifications to these embodiments without departing from the spirit of the present invention and the scope of protection defined by the appended claims, and such modifications and variations all fall within the scope defined by the appended claims. For other examples, those of ordinary skill in the art should readily understand that the order of the process steps may be changed while maintaining the scope of protection of the present invention.

[0064] In addition, the scope of application of the present invention is not limited to the processes, mechanisms, manufactures, material compositions, means, methods and steps of the specific embodiments described in the specification. From the disclosure of the present invention, it will be easily understood by those skilled in the art that the processes, mechanisms, manufactures, material compositions, means, methods or steps that currently exist or will be developed in the future, which perform substantially the same functions as the corresponding embodiments described in the present invention or obtain substantially the same results, can be applied according to the present invention. Therefore, the claims attached to the present invention are intended to include these processes, mechanisms, manufactures, material compositions, means, methods or steps within their scope of protection.

Claims

1. A pin arrangement method for an optical switch array, characterized in that: The method comprises: Dividing the optical switch array into regions according to the connection relationship of the optical switches to obtain a plurality of regions, wherein the optical switch array includes more than or equal to three columns of optical switches; Arrange the same ground pin for all optical switches in each area, and arrange different electrical control pins; The same electrical control pin is arranged for all optical switches at the same position in each area.

2. The method according to claim 1, characterized in that: The optical switch array is divided into regions according to the connection relationship of the optical switches to obtain multiple regions, including: Acquire the number of columns of optical switches that are not divided into regions in the optical switch array, and use the number of columns as the number of remaining columns; When the number of remaining columns is greater than or equal to three and is an even number, the region is divided according to optical switches of half the number of remaining columns obtained from the last column of the remaining columns to obtain a plurality of regions; When the remaining number of columns is greater than or equal to three and is an odd number, the area division is performed according to the optical switches of half the number of columns obtained by adding one to the remaining number of columns from the last column of the remaining number of columns, so as to obtain a plurality of areas.

3. The method according to claim 2, characterized in that When the number of remaining columns is an even number, the area division is performed according to the optical switches of half the number of remaining columns obtained from the last column of the remaining columns, and multiple areas are obtained, including: When the number of remaining columns is A and A is an even number, The optical switch levels from column A to column B are divided into areas, each of which includes An optical switch in a column and multiple optical switches connected thereto.

4. The method according to claim 2, characterized in that: When the number of remaining columns is an odd number, the area division is performed according to the optical switches of half the number of remaining columns plus one obtained from the last column of the remaining columns, and multiple areas are obtained, including: When the number of remaining columns is B and B is an odd number, The optical switch levels from row to row B are divided into areas, each of which includes An optical switch in a column and multiple optical switches connected thereto.

5. The method according to claim 2, characterized in that: When the number of remaining columns is one or two, all optical switches of the remaining columns are divided into the same area.

6. The method according to claim 1, characterized in that Arrange the same electrical control pin for all optical switches at the same position in each area, including: The same electrical control pin is arranged for all optical switches in the same column and the same position in each area.

7. An optical switch array chip, characterized in that: The chip comprises an optical switch array and ground pins and electrical control pins arranged by the pin arrangement method for an optical switch array according to any one of claims 1 to 6.

8. A control method for an optical switch array chip, characterized in that: The method comprises: Determine the optical switch that needs to be in working state according to the input port and the output port when the optical signal is transmitted in the optical switch array; According to the optical switch that needs to be in working state, the ground pin and the electrical control pin of the corresponding optical switch are controlled to be in an electrically conductive state, and the ground pin and the electrical control pin are arranged using the pin arrangement method of the optical switch array according to any one of claims 1-6.

9. A method for preparing an optical switch array chip, characterized in that: The method comprises: forming an optical switch array on a substrate; Arranging ground pins and electrical control pins on the substrate according to the pin arrangement method of an optical switch array according to any one of claims 1 to 6, to obtain an optical switch array chip; The optical switch array chip is packaged.

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