Logic synthesis method, device and equipment of logic circuit module, medium and product
By splitting the logic circuit into independent single-function modules and submodules, and performing parallel logic synthesis, the problem of incomplete comprehensive efficiency caused by excessive modules in the prior art is solved, and a more efficient logic synthesis process is achieved.
Patent Information
- Application Number
- CN202411933215.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-22
AI Technical Summary
In the process of logical synthesis, the existing technology leads to excessive modules, slow synthesis speed, large resource consumption and low comprehensive efficiency.
By splitting the target logic circuit into multiple independent single-function modules, identifying large-scale single-function modules and splitting them into multiple submodules, adding preset pre-information, reconstructing it into independent submodules, and performing parallel logical synthesis of the reconstructed single-function module and submodule.
It improves the efficiency of logical synthesis, reduces resource consumption, improves the speed of synthesis, and reduces the time and cost required for synthesis.
Smart Images
Figure CN119862823A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of integrated circuits, and in particular to a logic synthesis method, device, equipment, medium and product of a logic circuit module. Background Art
[0002] Logic synthesis is a key step in digital circuit design, which converts high-level circuit logic into low-level gate-level circuits. As the complexity of integrated circuit (IC) design continues to increase, logic synthesis can improve design efficiency and optimize circuit performance, such as reducing power consumption, reducing area, and increasing speed.
[0003] At the same time, during logic synthesis, it is necessary to divide the integrated circuit into modules, classify the components of the integrated circuit into different modules, and then perform parallel synthesis on multiple modules to improve the overall efficiency. However, the current technical solution will result in the existence of super-large modules with a large number of components after the division. At the same time, since the overall efficiency and resource consumption of a single module depend on the number of components in the module, the logic synthesis speed of the super-large module is very slow, the resource consumption is large, and the overall efficiency is very low. Summary of the invention
[0004] The technical solution of the present invention provides a logic synthesis method, device, equipment, medium and product of a logic circuit module. Through the technical solution of the present application, the efficiency of logic synthesis can be improved and the resource consumption of logic synthesis can be reduced.
[0005] In a first aspect, an embodiment of the present invention provides a logic synthesis method for a logic circuit module, comprising:
[0006] Obtaining a target logic circuit to be logically synthesized, and splitting the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule;
[0007] Identifying a large-scale single-function module in each single-function module, and splitting the large-scale single-function module into a plurality of sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module elements include operators and / or devices;
[0008] Adding preset pre-information to each submodule, correcting each submodule into an independent submodule, and reconstructing the large-scale single-function module according to each independent submodule to obtain a reconstructed function module;
[0009] Perform parallel logic synthesis operations on the reconstructed single-function modules and independent sub-modules.
[0010] In a second aspect, an embodiment of the present invention provides a logic synthesis device for a logic circuit module, comprising:
[0011] An acquisition module is used to acquire a target logic circuit to be logically synthesized, and split the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule;
[0012] A splitting module, used for identifying a large-scale single-function module in each single-function module, and splitting the large-scale single-function module into a plurality of sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module elements include operators and / or devices;
[0013] A reconstruction module is used to add preset pre-information to each submodule, correct each submodule into an independent submodule, and reconstruct the large-scale single-function module according to each independent submodule to obtain a reconstructed function module;
[0014] The synthesis module is used to perform parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module.
[0015] In a third aspect, an embodiment of the present invention provides an electronic device, the electronic device comprising:
[0016] at least one processor; and
[0017] a memory communicatively connected to the at least one processor; wherein,
[0018] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the logic synthesis method of the logic circuit module described in any one of the embodiments of the present invention.
[0019] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement a logic synthesis method for a logic circuit module described in any one of the embodiments of the present invention when executed.
[0020] In a fifth aspect, an embodiment of the present invention provides a computer program product, which includes a computer program. When the computer program is executed by a processor, it implements a logic synthesis method of a logic circuit module according to any one of the embodiments of the present invention.
[0021] The embodiment of the present invention provides a logic synthesis method, device, equipment, medium and product of a logic circuit module, the method comprising: obtaining a target logic circuit to be logically synthesized, and splitting the target logic circuit into multiple independent single-function modules according to a preset function splitting rule; identifying a large-scale single-function module in each single-function module, and splitting the large-scale single-function module into multiple sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module element includes an operator and / or a device; adding preset pre-information to each sub-module, correcting each sub-module into an independent sub-module, and reconstructing the large-scale single-function module according to each independent sub-module to obtain a reconstructed function module; performing parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module. Specifically, by splitting the large-scale single-function module into multiple sub-modules, the number of module elements in the large-scale single-function module can be reduced. In this way, the efficiency of the logic synthesis of the target logic circuit can be improved and the resource consumption of the logic synthesis can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0023] Figure 1 A flow chart of a logic synthesis method for a logic circuit module provided in the first embodiment of the present invention;
[0024] Figure 2 A flow chart of a logic synthesis method for a logic circuit module provided in Embodiment 2 of the present invention;
[0025] Figure 3 A schematic diagram of large-scale single-function module splitting provided by an embodiment of the present invention;
[0026] Figure 4 A schematic diagram of the structure of a logic synthesis device of a logic circuit module provided in Embodiment 3 of the present invention;
[0027] Figure 5 A schematic diagram of the structure of an electronic device provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION
[0028] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0029] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0030] It should be noted that the collection, storage, use, processing, transmission, provision and disclosure of user personal information involved in the technical solution of the present disclosure are in compliance with the provisions of relevant laws and regulations and do not violate public order and good morals.
[0031] Embodiment 1
[0032] Figure 1 A flowchart of a logic synthesis method for a logic circuit module provided in Embodiment 1 of the present invention. The method can be specifically applicable to the case of performing logic division or logic synthesis on a logic circuit / integrated circuit. The method can be executed by a logic synthesis device for a logic circuit module, which can be implemented by software and / or hardware and configured in a computer or server.
[0033] like Figure 1 As shown, including:
[0034] Step 110: Obtain a target logic circuit to be logically synthesized, and split the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule.
[0035] Logic synthesis refers to the process of converting the high-level language description of the design (such as Verilog code in the hardware description language HDL) into a low-level gate-level circuit description during the logic circuit design process. The target logic circuit is composed of basic gate circuits, triggers, operators, devices and circuit elements. Among them, the preset functional splitting rules can be rules established according to the user's preset requirements, such as splitting rules preset to reduce power consumption, reduce area and increase speed.
[0036] However, among the independent single-function modules split by the functional splitting rules, there may be large-scale single-function modules including a large number of circuit components. Since the resources and time required for integration increase exponentially with the number of circuit components in the module, if the large-scale single-function modules are directly integrated, it will greatly consume the integrated resources. Therefore, it is necessary to split the ultra-large-scale single-function modules into multiple sub-modules through the method of the embodiment of the present invention, thereby improving the integrated efficiency.
[0037] Exemplarily, the generation method of a single-function module is a process of parsing and translating the original high-level language design of the logic circuit through a specific syntax parser. This special syntax parser will convert the original logic circuit design into a lower-level operator-level or device-level logic circuit design under the premise of ensuring logical consistency through the parsing and translation steps, that is, generating a single-function module. The operators and devices here can be considered equivalent to the primitive-level physical devices in the FPGA device.
[0038] Step 120: Identify a large-scale single-function module in each single-function module, and split the large-scale single-function module into multiple sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module elements include operators and / or devices.
[0039] Among them, large-scale single-function modules are used to characterize single-function modules whose total number of module elements is greater than a preset threshold.
[0040] Specifically, the splitting method can be determined according to the preset module elements inside each submodule, or the total number of splits can be preset, and the large-scale single-function module can be split according to the total number. The specific splitting form can be to split the circuit tree composed of circuit elements in the single-function module into subtrees including different tree nodes and connection relationships, and generate submodules according to the subtrees.
[0041] Optionally, identifying a large-scale single-function module in each single-function module includes at least one of the following:
[0042] The total number of module elements included in each single-function module is counted. If the total number of module elements included in any single-function module exceeds a preset number threshold, the single-function module is determined to be a large-scale single-function module.
[0043] Specifically, the identification of large-scale single-function modules can be determined by the total number of module elements contained in the single-function module and the preset number threshold. If the total number of module elements exceeds the preset number threshold, the single-function module is determined to be a large-scale single-function module, otherwise, it is an ordinary single-function module.
[0044] Matching the module name of each single-function module with a pre-built large-scale single-function module name identification library, if the module name of any single-function module hits the large-scale single-function module name identification library, then determining that the single-function module is a large-scale single-function module;
[0045] Specifically, different module names can represent different implementation functions. Therefore, for a module with a specific implementation function, it can be directly determined as a large-scale single-function module.
[0046] The number of at least one designated module element contained in each single-function module is counted. If the number of all designated module elements contained in any single-function module exceeds the matching quantity threshold, the single-function module is determined to be a large-scale single-function module.
[0047] Specifically, in a single-function module, the number of specific module elements also affects the efficiency of the synthesis process. Therefore, in order to prevent the problem of too many elements in a certain module and thus reducing the synthesis speed, the number of at least one specified module element contained in each single-function module can be counted. If the number of all specified module elements contained in any single-function module exceeds the matching quantity threshold, the single-function module is determined to be a large-scale single-function module.
[0048] Step 130 : Add preset pre-information to each submodule, modify each submodule into an independent submodule, and reconstruct the large-scale single-function module according to each independent submodule to obtain a reconstructed function module.
[0049] Logic synthesis itself is a sub-step to verify the logic circuit. Therefore, it is necessary to preset the input of each sub-module and verify whether the preset output can be obtained to determine whether there is a logic problem in the sub-module. Therefore, before logic synthesis, it is necessary to add preset pre-information to each sub-module so that the sub-module has independent input and output and can be used and tested as a separate module.
[0050] Furthermore, after the large-scale single-function module is split, the internal elements of the original large-scale single-function module are empty and cannot be synthesized. Therefore, the large-scale single-function module needs to be filled so that it contains the logic of the original circuit and can perform logic synthesis.
[0051] The pre-condition information may be the size of the preset input signal and the ideal output signal of the submodule, or the connection relationship between the submodules and the composition of the internal elements. The independent submodule is a module that can be operated separately. Therefore, the independent submodule can be merged into a large-scale single-function module to generate a reconstructed function module.
[0052] Exemplarily, each submodule may be modified into an independent submodule by logic instantiation; a large-scale single-function module may be reconstructed according to each independent submodule by instantiating logic after logic instantiation. The specific logic instantiation and instantiated logic calling method are not limited here.
[0053] Step 140: Perform parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module.
[0054] Specifically, parallel logic synthesis operations can be performed on the reconstructed single-function module and each independent sub-module to obtain the results of the logic synthesis of each module, and determine whether it meets the preset goals of the logic synthesis. If the preset output is obtained, it needs to be explained that the specific logic synthesis method is not limited here.
[0055] Optionally, parallel logic synthesis operations are synchronously performed on other single-function modules except the large-scale single-function modules.
[0056] Specifically, by performing parallel logic synthesis operations on single-function modules, reconstructing single-function modules, and each independent sub-module, the comprehensiveness of logic synthesis can be ensured and the time of logic synthesis can be reduced. It should be noted that the overall time of logic synthesis depends on the module with the most module elements among all modules, and the time of logic synthesis will increase nonlinearly with the increase of module elements in the module. Therefore, through the module splitting of the embodiment of the present invention, the module elements of a large-scale single-function module can be dispersed into multiple sub-modules to reduce the overall time of logic synthesis.
[0057] The embodiment of the present invention provides a logic synthesis method for a logic circuit module. The method includes: obtaining a target logic circuit to be logically synthesized, and splitting the target logic circuit into multiple independent single-function modules according to a preset function splitting rule; identifying a large-scale single-function module in each single-function module, and splitting the large-scale single-function module into multiple sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module element includes an operator and / or a device; adding preset pre-information to each sub-module, correcting each sub-module into an independent sub-module, and reconstructing the large-scale single-function module according to each independent sub-module to obtain a reconstructed function module; performing parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module. Specifically, by splitting the large-scale single-function module into multiple sub-modules, the number of module elements in a single module can be reduced. In this way, the efficiency of the logic synthesis of the target logic circuit can be improved and the resource consumption of the logic synthesis can be reduced.
[0058] Embodiment 2
[0059] Figure 2 A flowchart of a logic synthesis method for a logic circuit module provided in Embodiment 2 of the present invention. This method is based on the above embodiments and further defines a specific method for splitting a large-scale single-function module into multiple sub-modules according to the total number of module elements contained in the large-scale single-function module.
[0060] like Figure 2 As shown, including:
[0061] Step 201: Obtain a target logic circuit to be logically synthesized, and split the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule.
[0062] Step 202: Identify large-scale single-function modules among the single-function modules.
[0063] Step 203: determine the total number of sub-module splits matching the large-scale single-function module according to the total number of module elements included in the large-scale single-function module, and determine the number of sub-module elements required to be included in each sub-module according to the total number of sub-module splits.
[0064] Specifically, since the synthesis work is part of the simulation verification, the total number of module elements and the internal structure in the single-function module of the logic circuit can be known in advance, such as recorded in a specific location of the code or in a quantity table corresponding to the single-function module. The total number of sub-module splits is the total number of sub-modules after splitting a large-scale single-function module into multiple sub-modules. The number of sub-module elements is the number of module elements of each sub-module, which can be determined by the quotient and remainder of the total number of module elements and the total number of sub-module splits.
[0065] Step 204: Obtain a circuit tree matching the large-scale single-function module, wherein each tree node on the circuit tree is a set module element.
[0066] Specifically, a single-function module is a circuit module composed of module elements, wherein the module elements may include circuit elements, logic elements, operators and devices. Furthermore, the module elements of the single-function module will form a circuit tree with a specific connection relationship to realize the specific function of the single-function module. The structure and composition of the circuit tree are known.
[0067] Step 205 , starting from the root node of the circuit tree, traverse each tree node in turn according to a preset traversal order.
[0068] Step 206, whenever the number of tree nodes of the sub-module elements is traversed in sequence, the number of tree nodes of the sub-module elements is combined into a sub-module, until the last tree node of the circuit tree is traversed, and all the tree nodes traversed for the last time are combined into a sub-module.
[0069] Specifically, the essence of splitting a large-scale single-function module is to split the circuit tree of the large-scale single-function module, such as splitting the circuit tree into different subtrees and generating submodules according to each subtree.
[0070] Furthermore, it is possible to start from the root node of the circuit tree and traverse downward in sequence, thereby forming a subtree with the module elements of a continuous number of sub-module elements, and then generate corresponding sub-sub-modules according to the subtree.
[0071] Specifically, since the circuit tree has bifurcations, it can be preset to give priority to traversing the left fork or the right fork to avoid repeated traversal. It should be noted that since the number of nodes in the circuit tree may not be an integer multiple of the number of submodule elements, the number of module elements of the last submodule may be less than the number of module elements. If this happens, all tree nodes traversed in the last time can be combined into one submodule.
[0072] Step 207: Add preset pre-information to each sub-module, and modify each sub-module into an independent sub-module.
[0073] Step 208: In each independent sub-module, obtain a current independent sub-module in turn.
[0074] Step 209: locate the current logic code that matches the current independent submodule inside the large-scale single-function module, and replace the current logic code with the instantiation code that matches the current independent submodule.
[0075] Step 210, return to execute in each independent sub-module, sequentially obtain the operation of a current independent sub-module, until all independent sub-modules are processed, and determine the large-scale single-function module when the processing is completed as the reconstructed function module.
[0076] Among them, the current logic code is the code corresponding to the current independent submodule. The current logic code can represent the composition and connection relationship of each module element in the current independent submodule through the code language, and can also represent the physical function of the current independent submodule. The instantiation code is the code after the submodule instantiation operation. The instantiation code can be called at any time according to the needs and configured inside the large-scale single-function module.
[0077] Specifically, since the large-scale single-function module has been split into multiple sub-modules, the interior of the large-scale single-function module is empty and its internal logic needs to be completed to complete the comprehensive operation. Therefore, the instantiation code of the sub-module can be called into the large-scale single-function module and combined to generate a reconstructed functional module.
[0078] For example, Figure 3 A schematic diagram of the large-scale single-function module splitting provided for an embodiment of the present invention, wherein A is a large-scale single-function module, and by multiple splittings of the circuit of A, subtrees corresponding to A1-A7 can be generated, and then corresponding submodules can be generated according to the subtrees corresponding to A1-A7.
[0079] Step 211: Perform parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module.
[0080] An embodiment of the present invention discloses a logic synthesis method for a logic circuit module. The method can reduce the number of module elements in a single module by splitting a large-scale single-function module into multiple sub-modules. In this way, the efficiency of the logic synthesis of the target logic circuit can be improved and the resource consumption of the logic synthesis can be reduced.
[0081] Embodiment 3
[0082] Figure 4 This is a schematic diagram of the structure of a logic synthesis device for a logic circuit module provided in Embodiment 3 of the present invention. The device can be used to implement a logic synthesis method for a logic circuit module in Embodiment 3 of the present invention.
[0083] like Figure 4 As shown, the device comprises:
[0084] The acquisition module 310 is used to acquire the target logic circuit to be logically synthesized, and split the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule;
[0085] A splitting module 320 is used to identify a large-scale single-function module in each single-function module, and split the large-scale single-function module into a plurality of sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module elements include operators and / or devices;
[0086] The reconstruction module 330 is used to add preset pre-information to each submodule, correct each submodule into an independent submodule, and reconstruct the large-scale single-function module according to each independent submodule to obtain a reconstructed function module;
[0087] The synthesis module 340 is used to perform parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module.
[0088] The embodiment of the present invention provides a logic synthesis device for a logic circuit module. The device obtains a target logic circuit to be logically synthesized, and splits the target logic circuit into multiple independent single-function modules according to a preset function splitting rule; identifies a large-scale single-function module in each single-function module, and splits the large-scale single-function module into multiple sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module element includes an operator and / or a device; adds preset pre-information to each sub-module, corrects each sub-module into an independent sub-module, and reconstructs the large-scale single-function module according to each independent sub-module to obtain a reconstructed function module; and performs parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module. Specifically, by splitting the large-scale single-function module into multiple sub-modules, the number of module elements in a single module can be reduced. Through this device, the efficiency of the logic synthesis of the target logic circuit can be improved and the resource consumption of the logic synthesis can be reduced.
[0089] Embodiment 4
[0090] Figure 5 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.
[0091] like Figure 5As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0092] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0093] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a logic synthesis method of a logic circuit module.
[0094] In some embodiments, the logic synthesis method of the logic circuit module can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the logic synthesis method of the logic circuit module described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to execute the logic synthesis method of the logic circuit module in any other appropriate manner (for example, by means of firmware).
[0095] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0096] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0097] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0098] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
[0099] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0100] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.
[0101] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0102] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A logic synthesis method for a logic circuit module, characterized in that: include: Obtaining a target logic circuit to be logically synthesized, and splitting the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule; Identifying a large-scale single-function module in each single-function module, and splitting the large-scale single-function module into a plurality of sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module elements include operators and / or devices; Adding preset pre-information to each submodule, correcting each submodule into an independent submodule, and reconstructing the large-scale single-function module according to each independent submodule to obtain a reconstructed function module; Perform parallel logic synthesis operations on the reconstructed single-function modules and independent sub-modules.
2. The method according to claim 1, characterized in that Identifying a large-scale single-function module among the single-function modules includes at least one of the following: Counting the total number of module elements contained in each single-function module, if the total number of module elements contained in any single-function module exceeds a preset number threshold, determining that the single-function module is a large-scale single-function module; Matching the module name of each single-function module with a pre-built large-scale single-function module name identification library, and if the module name of any single-function module hits the large-scale single-function module name identification library, determining that the single-function module is a large-scale single-function module; and The number of at least one designated module element contained in each single-function module is counted. If the number of all designated module elements contained in any single-function module exceeds the matching quantity threshold, the single-function module is determined to be a large-scale single-function module.
3. The method according to claim 1, characterized in that According to the total number of module elements contained in the large-scale single-function module, the large-scale single-function module is split into multiple sub-modules, including: Determine the total number of submodules that match the large-scale single-function module based on the total number of module elements included in the large-scale single-function module, and determine the number of submodule elements required to be included in each submodule based on the total number of submodules; Acquire a circuit tree matching the large-scale single-function module, wherein each tree node on the circuit tree is a set module element; Starting from the root node of the circuit tree, traverse each tree node in turn according to the preset traversal order; Whenever the number of tree nodes of the submodule elements is traversed in sequence, the tree nodes of the submodule elements are combined into a submodule until the last tree node of the circuit tree is traversed, and all the tree nodes traversed for the last time are combined into a submodule.
4. The method according to claim 3, characterized in that Add preset pre-information to each submodule and modify each submodule into an independent submodule, including: According to the positions of different submodules in the circuit tree and the circuit design logic matching the circuit tree, the input description information corresponding to each submodule is determined step by step; Each input description information is used as pre-information and added to the matching sub-modules respectively, and each sub-module is corrected into an independent sub-module.
5. The method according to any one of claims 1 to 4, characterized in that: The large-scale single-function module is reconstructed according to each independent sub-module to obtain a reconstructed function module, including: In each independent submodule, obtain a current independent submodule in turn; Within the large-scale single-function module, locate the current logic code that matches the current independent submodule, and replace the current logic code with the instantiation code that matches the current independent submodule; Return to execute in each independent sub-module, obtain the operation of a current independent sub-module in turn, until the processing of all independent sub-modules is completed, and determine the large-scale single-function module when the processing is completed as the reconstructed function module.
6. The method according to any one of claims 1 to 4, characterized in that: While performing parallel logic synthesis operations on the reconstructed single-function modules and each independent sub-module, it also includes: For other single-function modules except the large-scale single-function modules, parallel logic synthesis operations are synchronously performed.
7. A logic synthesis device for a logic circuit module, characterized in that: include: An acquisition module is used to acquire a target logic circuit to be logically synthesized, and split the target logic circuit into multiple independent single-function modules according to a preset functional splitting rule; A splitting module, used for identifying a large-scale single-function module in each single-function module, and splitting the large-scale single-function module into a plurality of sub-modules according to the total number of module elements contained in the large-scale single-function module; wherein the module elements include operators and / or devices; A reconstruction module is used to add preset pre-information to each submodule, correct each submodule into an independent submodule, and reconstruct the large-scale single-function module according to each independent submodule to obtain a reconstructed function module; The synthesis module is used to perform parallel logic synthesis operations on the reconstructed single-function module and each independent sub-module.
8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the logic synthesis method of the logic circuit module according to any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the logic synthesis method of the logic circuit module according to any one of claims 1 to 6 when executed.
10. A computer program product, characterized in that The computer program product comprises a computer program, which, when executed by a processor, implements the logic synthesis method of the logic circuit module according to any one of claims 1 to 6.