Frequency conversion coding and decoding system and method for radio frequency baseband signals

Abstract

The invention relates to a frequency conversion coding and decoding system and method for radio frequency baseband signals. The frequency conversion coding system of the radio frequency baseband signal comprises a radio frequency control logic device which is configured to generate a decoding module selection signal and a frequency-divided clock signal; the radio frequency demodulation module is configured to convert a radio frequency signal into a digital baseband signal; two or more digital decoding modules configured to turn on one of the two or more digital decoding modules and convert the digital baseband signal from the radio frequency demodulation module into data based on the decoding module selection signal; the demodulation signal gating module is configured to receive the data from the digital decoding module and receive a successful flag signal; and the main control logic device is configured to receive the data from the demodulation signal gating module and the decoding clock frequency of the corresponding digital decoding module, generate a frequency selection signal according to the decoding clock frequency of the corresponding digital decoding module, and send the generated frequency selection signal to the radio frequency control logic device.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency communication, and more specifically, to a frequency conversion coding and decoding system and method for radio frequency baseband signals. Background Art

[0002] In radio frequency communication, carrier frequency is a critical parameter that not only determines the propagation characteristics of the signal, but also affects the performance and efficiency of the entire system. The carrier frequency of the radio frequency signal is usually fixed (for example, 920MHz) or varies within a very narrow frequency range (for example, the frequency hopping technology of 2.4G Bluetooth).

[0003] In digital radio frequency communication applications, the data bit width PW of the baseband signal is also fixed within the system fault tolerance range. Here, the data bit width that can represent a value of 0 or 1 in the digital baseband signal is defined as PW.

[0004] For RF communications using a fixed carrier frequency, the common processing methods are: (1) maintaining the data bit width PW of the baseband signal unchanged; (2) the data bit width PW of the baseband signal is set by the master control device and sent to the RF receiver, and the data bit width PW of the baseband signal set by the master control device is used in subsequent communications.

[0005] However, the above two configuration schemes of the data bit width PW of the baseband signal have the following disadvantages during normal communication:

[0006] 1. When there are multiple matching unique identification codes (UIDs) or RF receiving devices that lack a UID identification mechanism in the RF field, these RF receiving devices will respond to the transmission command of the RF transmitter at the same time, causing a false triggering problem.

[0007] 2. When a RF receiving device exists in multiple matching RF fields, if these RF transmitting devices send RF commands at the same time, it will cause the RF receiving device to receive information disorderly.

[0008] 3. To overcome the above problems at the same time, complex digital circuit logic is usually required to judge the RF reception information, which will cause a lot of difficulties in digital circuit verification and optimization.

[0009] In summary, although the fixed or narrowly variable carrier frequency combined with the fixed baseband signal PW value simplifies system design and implementation to a certain extent, it may cause a series of problems, such as bit errors, interference and the potential risk of multiple unique identification code (UID) devices communicating at the same time. Therefore, in order to optimize the performance of the RF communication system, it is urgent to improve the existing methods.

[0010] The above description of the background technology is only for facilitating an in-depth understanding of the technical solution of the present invention (such as the technical means used, the technical problems solved and the technical effects produced), and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0011] The object of the present invention is to provide a frequency conversion coding and decoding system and method for radio frequency baseband signals, which generates a decoding module selection signal, an encoding module selection signal, and a frequency division signal based on a unique identification code of a digital baseband signal, a version of a radio frequency transceiver system, frequency information set by a user, mode information, etc., thereby controlling the clock signals input to different digital decoding modules and digital encoding modules.

[0012] According to an embodiment of the present invention, a frequency conversion coding and decoding system for a radio frequency baseband signal is provided, which includes a radio frequency demodulation device, a radio frequency modulation device, a radio frequency control logic device and a main control logic device, wherein the radio frequency control logic device is configured to generate a decoding module selection signal, an encoding module selection signal and a divided clock signal; the radio frequency demodulation device includes: a radio frequency demodulation module, which is configured to convert the radio frequency signal into a digital baseband signal; two or more digital decoding modules, wherein the two or more digital decoding modules are electrically connected to the radio frequency demodulation module, and the two or more digital decoding modules are configured to: respectively receive the digital baseband signal from the radio frequency demodulation module, the digital baseband signal from the radio frequency control logic device, and the digital baseband signal from the radio frequency control logic device; The main control logic device is electrically connected to the demodulation signal gating module and the RF control logic device, and is configured to receive the data from the digital decoding module and the reception success flag signal, and determine whether the data is received successfully. The main control logic device is electrically connected to the demodulation signal gating module and the RF control logic device, and is configured to receive the data from the demodulation signal gating module and the reception success flag signal, and determine whether the data is received successfully. module and the decoding clock frequency of the corresponding digital decoding module, generates data to be encoded according to the received data, generates a frequency selection signal according to the received decoding clock frequency of the corresponding digital decoding module, and sends the generated frequency selection signal to the radio frequency control logic device; the radio frequency modulation device includes: two or more digital encoding modules, the two or more digital encoding modules are electrically connected to the main control logic device and the radio frequency control logic device, and the two or more digital encoding modules are configured to: respectively receive the data to be encoded from the main control logic device, the encoding module selection signal from the radio frequency control logic device and the divided clock signal, based on the radio frequency control logic device The coding module selection signal enables one or more of the two or more digital coding modules to be turned on and convert the data to be encoded into a digital baseband signal using the received divided clock signal; a modulation signal gating module is electrically connected to each of the two or more digital coding modules, and the modulation signal gating module is configured to: receive the digital baseband signal encoded by the turned-on digital coding module according to the coding module selection signal generated by the radio frequency control logic device; a radio frequency modulation module is electrically connected to the modulation signal gating module, and the radio frequency modulation module is configured to receive the digital baseband signal from the modulation signal gating module, and convert the digital baseband signal into a radio frequency signal.

[0013] Preferably, the RF control logic device includes a storage module, a control logic module, a frequency divider and a system clock; the storage module is configured to store a unique identification code of a digital baseband signal, a version of a RF transceiver system, frequency information set by a user, and mode information; the control logic module is configured to generate a decoding module selection signal, an encoding module selection signal and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the RF transceiver system, frequency information set by a user, mode information and a frequency selection signal; the frequency divider is configured to generate a divided clock signal based on the frequency division signal generated by the control logic module using the system clock signal.

[0014] Preferably, the divided clock signal is input to each digital decoding module in two or more digital decoding modules; and the divided clock signal input to each digital decoding module is different.

[0015] Preferably, the data bit width representing the value 0 or 1 in the digital baseband signal of each digital decoding module is related to the division ratio of the divider; the ratio relationship between the data bit widths of the digital baseband signals of each digital decoding module is consistent with the ratio relationship between the clock signals input to each digital decoding module; the data bit width of the digital baseband signal of each digital decoding module is consistent with the ratio relationship of the clock signal input to each digital decoding module.

[0016] Preferably, the demodulation signal selection module is further configured to: when data is received from the digital decoding module and the reception success flag signal indicates success, determine that the data is received successfully.

[0017] Preferably, the divided clock signal is input to each digital encoding module in two or more digital encoding modules; and the divided clock signal input to each digital encoding module is different.

[0018] Preferably, the data bit width representing the value 0 or 1 in the digital baseband signal of each digital coding module is related to the division ratio of the divider; the ratio relationship between the data bit widths of the digital baseband signals of each digital coding module is consistent with the ratio relationship between the clock signals input to each digital coding module; the data bit width of the digital baseband signal of each digital coding module is consistent with the ratio relationship of the clock signals input to each digital coding module.

[0019] According to an embodiment of the present invention, a frequency conversion encoding and decoding method for a radio frequency baseband signal is provided, which includes: a radio frequency control logic device generates a decoding module selection signal, an encoding module selection signal and a divided clock signal; a radio frequency demodulation module converts the radio frequency signal into a digital baseband signal; two or more digital decoding modules respectively receive the digital baseband signal from the radio frequency demodulation module, the decoding module selection signal from the radio frequency control logic device and the divided clock signal, and based on the decoding module selection signal of the radio frequency control logic device, one or more of the two or more digital decoding modules are turned on and the digital baseband signal from the radio frequency demodulation module is converted into data using the received divided clock signal, and a reception success flag signal is generated; a demodulation signal selection module receives the data from the digital decoding module and the reception success flag signal, and determines whether the data is received successfully; a main control logic device receives the data from the demodulation signal selection module and the corresponding The decoding clock frequency of the digital decoding module generates data to be encoded according to the received data, generates a frequency selection signal according to the received decoding clock frequency of the corresponding digital decoding module, and sends the generated frequency selection signal to the RF control logic device; two or more digital encoding modules respectively receive the data to be encoded from the main control logic device, the encoding module selection signal from the RF control logic device and the divided clock signal, and based on the encoding module selection signal of the RF control logic device, one or more of the two or more digital encoding modules are turned on and the data to be encoded is converted into a digital baseband signal using the received divided clock signal; the modulation signal selection module receives the digital baseband signal encoded by the turned-on digital encoding module according to the encoding module selection signal generated by the RF control logic device; the RF modulation module receives the digital baseband signal from the modulation signal selection module and converts the digital baseband signal into a RF signal.

[0020] Preferably, the frequency conversion encoding and decoding method for RF baseband signals according to the implementation scheme of the present invention further includes: the storage module of the RF control logic device stores the unique identification code of the digital baseband signal, the version of the RF transceiver system, the frequency information set by the user, and the mode information; the control logic module of the RF control logic device generates a decoding module selection signal, an encoding module selection signal, and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the RF transceiver system, the frequency information set by the user, the mode information, and the frequency selection signal; the frequency divider of the RF control logic device uses the system clock signal to generate a divided clock signal based on the frequency division signal generated by the control logic module.

[0021] Preferably, the frequency conversion encoding and decoding method for radio frequency baseband signals according to the implementation scheme of the present invention further includes: the divided clock signal is input to each digital decoding module in two or more digital decoding modules; the divided clock signal is input to each digital encoding module in two or more digital encoding modules; the divided clock signal input to each digital decoding module is different; the divided clock signal input to each digital encoding module is different.

[0022] The present invention adopts the above technical solution, which has the following beneficial effects:

[0023] 1. Codec frequency hopping and RF transceiver selection

[0024] The present invention realizes the hopping of codec frequency on the same carrier frequency, which is accomplished by dynamically selecting RF transceivers corresponding to different codec frequencies. This dynamic selection mechanism effectively avoids the problem of multiple RF transceivers responding simultaneously in the same RF environment, thereby reducing signal conflicts and interference. This not only improves the efficiency of the use of RF carrier frequency bands, but also enhances the stability and reliability of the system. By allocating different frequencies for different transmission requirements, the system can manage communication resources more flexibly and ensure efficient and secure data transmission.

[0025] 2. Intervention and control of control signals

[0026] The present invention implements intervention and control of the encoding and decoding frequency based on the unique identification code (UID) of different digital baseband signals, the version of the radio frequency transceiver system, the frequency information set by the user, and the control signal generated by the main control logic device. This means that the system can adjust and optimize the encoding and decoding strategy based on the unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, the mode information and other parameters. This refined management not only improves the functional control of the version, but also implements frequency control for different UIDs of digital baseband signals and different batches of equipment, as well as adjusting the encoding and decoding frequency of the radio frequency according to the needs of the main control logic device. This high degree of customization enables the system to more accurately meet the communication needs under various operating conditions.

[0027] 3. Increase of codec frequency range

[0028] Through the implementation scheme of the present invention, the coding and decoding frequency range of the radio frequency transceiver is increased, which directly improves the applicable scope of the radio frequency transceiver. This means that the radio frequency transceiver can process signals of a wider frequency range, thereby adapting to more diverse communication environments and requirements. At the same time, radio frequency transceivers using different coding and decoding frequencies will not interfere with each other, which ensures clear and stable communication. Increasing the frequency range while avoiding mutual interference reflects the excellent performance of the present invention in radio frequency resource management and interference suppression.

[0029] In summary, the technical solution of the present invention brings higher efficiency, stronger stability and wider applicability to the wireless communication system by optimizing the frequency selection mechanism of the RF transceiver, realizing fine control signal management, and increasing the encoding and decoding frequency range of the RF transceiver. These improvements are of great significance to improving the overall performance and user experience of the wireless communication system. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The exemplary embodiments of the present invention will be described in more detail below in conjunction with the accompanying drawings. For the sake of clarity, the same components in different drawings are shown with the same reference numerals. It should be noted that the drawings are only for illustration and are not necessarily drawn to scale. In these drawings:

[0031] Figure 1 The block diagram is a diagram showing a frequency conversion coding and decoding system for a radio frequency baseband signal according to an embodiment of the present invention.

[0032] Figure 2 The circuit diagram is a diagram showing a frequency conversion coding and decoding system for a radio frequency baseband signal according to an embodiment of the present invention.

[0033] Figure 3 The flowchart is a method for frequency conversion coding and decoding of a radio frequency baseband signal according to an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The implementation scheme of the present invention is described in detail below. This implementation scheme is implemented on the premise of the technical scheme of the present invention, and a detailed implementation method and specific operation process are given, but the protection scope of the present invention is not limited to the implementation scheme described below.

[0035] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Figure 1 The block diagram is a diagram showing a frequency conversion coding and decoding system for a radio frequency baseband signal according to an embodiment of the present invention.

[0036] See also Figure 1According to an embodiment of the present invention, a frequency conversion coding and decoding system for a radio frequency baseband signal may include: a radio frequency demodulation device 100, a radio frequency modulation device 200, a radio frequency control logic device 300 and a main control logic device 400.

[0037] The RF demodulation device 100 can receive RF signals and convert the RF signals into data suitable for processing by the main control logic device 400. The RF modulation device 200 can convert the data to be sent by the main control logic device 400 into a signal on a RF carrier. The RF control logic device 300 can provide control signals such as the main clock signal and the divided clock signal required by the system. The main control logic device 400 can be electrically connected to the RF demodulation device 100, the RF modulation device 200 and the RF control logic device 300, respectively, and receive and send data according to system requirements.

[0038] Refer to the following Figure 2 The detailed configuration of each device will be described separately. Figure 2 The circuit diagram is a diagram showing a frequency conversion coding and decoding system for a radio frequency baseband signal according to an embodiment of the present invention.

[0039] According to the embodiment of the present invention, the radio frequency demodulation device 100 may include: a radio frequency demodulation (RF_demod) module, a digital decoding (DIG_demodx) module and a demodulation signal gating module.

[0040] The RF_demod module can convert the RF signal into a digital baseband signal with 0 and 1 values. The carrier frequency of the RF signal is a fixed frequency to ensure that the signal propagates within a specific frequency band to avoid interference with other communication systems. Specifically, after receiving the RF signal, the RF_demod module multiplies it with the signal generated by the local oscillator through a mixer, and then removes the high-frequency part through a filter to obtain a low-frequency baseband signal. Therefore, the RF_demod module can obtain the baseband signal by mixing and filtering, or directly by filtering. Optionally, a digital signal shaping circuit can be used to obtain a more regular digital baseband signal with 0 and 1 values. The signal shaping circuit can be an analog-to-digital converter with only 1 bit.

[0041] Here, the data bit width that can represent a value of 0 or 1 in the digital baseband signal is defined as the PW of the digital baseband signal. According to an embodiment of the present invention, the PW of the digital baseband signal is variable.

[0042] Multiple DIG_demodx modules can decode the digital baseband signal into data in parallel and generate a reception success flag signal (rcv_ok, which is the abbreviation of receive_ok). According to an embodiment of the present invention, the DIG_demodx module can make the selected DIG_demodx module work according to the demod_selx signal, thereby decoding the original data from the received signal and generating a reception success flag signal rcv_ok, which is used to indicate whether the data reception is successful. According to an embodiment of the present invention, the value of the demod_selx signal can be a pre-stored value or a value generated by the radio frequency control logic device 300.

[0043] According to an embodiment of the present invention, the DIG_demodx module may include a plurality of DIG_demodx modules: DIG_demod1, DIG_demod2, ..., DIG_demodn, where n is an integer greater than or equal to 2, i.e., x represents any one of 2, ..., n. Each DIG_demodx module can independently process a specific signal frequency band or perform a specific decoding task. The decoding clock frequency of each DIG_demodx module may be different, i.e., the clock signal clkx input to different DIG_demodx modules may be different. According to an embodiment of the present invention, the clock signal clkx (i.e., clk1, clk2, ..., clkn) input to different DIG_demodx modules comes from a frequency divider of the RF control logic device 300.

[0044] The data bit width PW of the digital baseband signal is related to the frequency division ratio of the frequency divider, that is, within the allowable range of system error (the error caused by the deviation of square wave characteristic parameters such as frequency, pulse width, and duty cycle of the digital baseband signal when the system can demodulate the RF signal normally):

[0045] a) The ratio relationship between the data bit widths PW1, PW2, ..., PWn of the DIG_demod1, DIG_demod2, ..., DIG_demodn modules is consistent with the ratio relationship between the clock signals clk1, clk2, ..., clkn;

[0046] b) The data bit widths PW1, PW2, ..., PWn of the DIG_demod1, DIG_demod2, ..., DIG_demodn modules are respectively equal to the ratios of the clock signals clk1, clk2, ..., clkn: PW1 / clk1=PW2 / clk2...=PWn / clkn;

[0047] c) The data bit widths PW1, PW2, ..., PWn of the DIG_demod1, DIG_demod2, ..., DIG_demodn modules have the following relationship: PW2>2×PW1, ..., PWn>2 n-1 ×PW1, PW is the time length (in us).

[0048] The RF demodulation device according to the embodiment of the present invention can realize the hopping of the decoding frequency on the same carrier frequency, and different decoding frequencies correspond to different RF decoders and encoders. By selecting encoders and decoders corresponding to different decoding frequencies, the problem of multiple RF transceivers responding simultaneously in the same RF field can be avoided.

[0049] In addition, according to the embodiment of the present invention, within the allowable range of system error (error caused by deviations of square wave characteristic parameters of the digital baseband signal, such as frequency, pulse width, and duty cycle, when the system can normally demodulate the RF signal), the decoding frequency of the digital baseband signal is kept consistent with one of the clock signals clkx generated by the divider of the RF control logic device 300.

[0050] Therefore, the RF demodulation device according to the implementation scheme of the present invention can not only increase the decoding frequency range of the RF transceiver, but also improve the applicable range of the decoding frequency of the RF transceiver, and avoid mutual interference between RF transceivers using different decoding frequencies, thereby improving the performance and reliability of the entire RF system.

[0051] The demodulation signal selection module can receive the data (data) and the reception success flag signal (rcv_ok) output by the DIG_demodx module. The demodulation signal selection module can determine the validity of the received data based on the following judgment conditions:

[0052] When data is received but rcv_ok is not received within a predetermined time period (e.g., clkx×m), the demodulation signal selection module determines that the received data is invalid, where m is set according to the specific communication environment and requirements and can be set to an integer greater than or equal to 2, but the present invention is not limited to this.

[0053] When data is received and an rcv_ok signal is received within a predetermined period of time (eg, clkx×m), the demodulation signal gating module determines that the received data is valid and ignores subsequent data and rcv_ok from other DIG_demodx modules.

[0054] According to an embodiment of the present invention, the demodulation signal gating module can determine that the received data is valid when data is received and rcv_ok is received within the time period of clkx×m. The demodulation signal gating module can send the received data to the main control logic device 400, and send the clkx used by the corresponding DIG_demodx module as a clock selection (clk_seld, abbreviated as clk_selected) signal to the RF control logic device 300 and the main control logic device 400.

[0055] According to the embodiment of the present invention, the radio frequency modulation device 200 may include: a digital encoding (DIG_modx) module, a modulation signal gating module and a radio frequency modulation (RF_mod) module.

[0056] The DIG_modx module can encode the data from the main control logic device 400 into a digital baseband signal for the RF_mod module to perform radio frequency transmission. According to an embodiment of the present invention, the DIG_modx module can enable the selected DIG_modx module to work according to the mod_selx signal, thereby encoding the data from the main control logic device 400 into a digital baseband signal. According to an embodiment of the present invention, the value of the mod_selx signal can be a pre-stored value or a value generated by the radio frequency control logic device 300.

[0057] According to an embodiment of the present invention, the DIG_modx module may include a plurality of DIG_modx modules: DIG_mod1, DIG_mod2, ..., DIG_modn, where n is an integer greater than or equal to 2, i.e., x represents any one of 2, ..., n. Each DIG_modx module can independently process a specific signal frequency band or perform a specific encoding task, and the encoding clock frequency of each DIG_modx module is different, i.e., the clock signal clkx input to different DIG_modx modules has different frequencies. According to an embodiment of the present invention, the clock signal clkx input to different DIG_modx modules comes from a frequency divider of the RF control logic device 300.

[0058] Similar to the DIG_demodx module, the data bit width PW value of the digital baseband signal is variable, and the PW value depends on the value of clkx from the RF control logic device 300 .

[0059] According to the implementation scheme of the present invention, within the allowable range of system error (error caused by deviation of square wave characteristic parameters such as frequency, pulse width, duty cycle, etc. of digital baseband signal when the system can modulate the radio frequency signal normally):

[0060] a) The ratio relationship between the data bit widths PW1, PW2, ..., PWn of the DIG_mod1, DIG_mod2, ..., DIG_modn modules is consistent with the ratio relationship between the clock signals clk1, clk2, ..., clkn;

[0061] b) The data bit widths PW1, PW2, ..., PWn of the DIG_mod1, DIG_mod2, ..., DIG_modn modules are respectively equal to the ratios of the clock signals clk1, clk2, ..., clkn: PW1 / clk1=PW2 / clk2...=PWn / clkn;

[0062] c) The data bit widths PW1, PW2, ..., PWn of the DIG_mod1, DIG_mod2, ..., DIG_modn modules have the following relationship: PW2>2×PW1, ..., PWn>2 n-1 ×PW1, PW is the time length (in us).

[0063] According to an embodiment of the present invention, within the allowable range of system error (error caused by deviations of square wave characteristic parameters of the digital baseband signal, such as frequency, pulse width, and duty cycle, when the system can modulate the RF signal normally), the coding frequency of the digital baseband signal is kept consistent with one of the clock signals clkx generated by the divider of the RF control logic device 300.

[0064] According to the embodiment of the present invention, the data bit width PW value of the digital baseband signal of the DIG_modx module and the corresponding DIG_demodx module can be consistent. For example, the data bit width PW value of the digital baseband signal of the DIG_mod1 module and the DIG_demod1 module is consistent, the data bit width PW value of the digital baseband signal of the DIG_mod2 module and the DIG_demod2 module is consistent, ..., the data bit width PW value of the digital baseband signal of the DIG_modn module and the DIG_demodn module is consistent, which are PW1, PW2, ..., PWn, respectively, and have the following relationship PW2>2×PW1, ..., PWn>2 n-1 ×PW1, PW is the time length (in us).

[0065] The modulation signal selection module can receive the digital baseband signal encoded by the DIG_modx module selected by the mod_selx signal according to the mod_selx signal generated by the RF control logic device 300, and send the encoded digital baseband signal to the RF_mod module.

[0066] The RF_mod module can modulate the received digital baseband signal onto a RF carrier.

[0067] According to an embodiment of the present invention, the main control logic device 400 can generate a frequency selection (sel) signal according to the clock selection (clk_seld) signal received from the demodulation signal gating module, and send the generated frequency selection (sel) signal to the RF control logic device 300. The main control logic device 400 can generate the frequency selection sel signal according to the required communication conditions, and factors affecting the communication conditions may include environmental interference, communication data volume, RF power, etc.

[0068] The main control logic device 400 can receive and send data according to system requirements. The main control logic device 400 can receive data from the radio frequency demodulation device and provide the data to be returned to the radio frequency modulation device.

[0069] The main control logic device 400 can actively select the speed of receiving and sending data (the longer the PW length, the slower the speed). The data bit width PW value of the demodulated and modulated signal can select the shortest PW value under reliable conditions according to the actual debugging situation.

[0070] As mentioned above, clkx can be sent as a clock selection (clk_seld, abbreviated as clk_selected) signal to the RF control logic device 300 and the main control logic device 400. Accordingly, the main control logic device 400 can determine the PW value according to the received clock selection (clk_seld) signal (i.e., clkx) of the demodulation signal gating module. Specifically, the following steps are included:

[0071] After a baseband signal from RF_demod is sent to DIG_demodx, DIG_demodx can decode the baseband signal according to clkx. Based on the set PW value, if the difference between the PW value of the received baseband signal and the set PW value is less than or equal to the preset threshold (which is the possible allowable deviation of the PW value), the received baseband signal can be decoded normally. For example, the set PW value is 8 clks. When the PW value of the received baseband signal and the set PW value are greater than the preset threshold (for example, 2 clks), such as less than 6 clks or greater than 10 clks, the received baseband signal will not be decoded normally.

[0072] For a baseband signal with a fixed PW value, one and only one of the several DIG_demodx modules can correctly decode the baseband signal and generate data data and rcv_ok signal.

[0073] The demodulation signal selection module can determine the clkx corresponding to the received data data according to the source of rcv_ok, and then generate a corresponding clk_seld signal and send it to the main control logic device 400. The main control logic device 400 can latch the received clk_seld signal and generate a corresponding sel signal to send to the control logic module of the RF control logic device 300.

[0074] The control logic module can generate a mod_selx signal corresponding to the sel signal based on the received sel signal. The mod_selx signal can enable a DIG_modx module, which can use the same clkx as DIG_demodx. In this way, the enabled DIG_modx module can obtain the receiving data speed and thereby control the sending data speed.

[0075] According to an embodiment of the present invention, the radio frequency control logic device 300 may include a storage module, a control logic module, a frequency divider, and a system clock.

[0076] The storage module can store information such as the unique identification code (UID) of the digital baseband signal, the version (VERSION) of the radio frequency transceiver system, the frequency (FREQUENCY) set by the user, the mode (MODE), etc. The storage module can be a one-time programmable memory (e.g., Efuse, etc.) and a multi-erasable programmable memory (e.g., flash memory), etc.

[0077] The control logic module can generate a modulation selection (mod_selx) signal, a demodulation selection (demod_selx) signal and a frequency division information (clk_sel) signal according to information such as UID, VERSION, FREQUENCY, MODE, etc. and a frequency selection (sel) signal from the main control logic device 400. Among them, the modulation selection (mod_selx) signal can be used to select a digital encoding (DIG_modx) module, the demodulation selection (demod_selx) signal can be used to select a digital decoding (DIG_demodx) module, and the frequency division information (clk_sel) signal can be a signal about frequency division information such as a frequency division ratio.

[0078] The system clock can provide the main clock signal required by the entire system, and can also provide a clock signal for the divider. The divider can divide the clock signal provided by the system clock according to the value of the clk_sel signal, and generate parallel divided clocks of different frequencies, namely clk1, clk2, ..., clkn.

[0079] According to an embodiment of the present invention, the mode (MODE) information indicates the operating mode of the frequency conversion codec system for the radio frequency baseband signal. The mode (MODE) information can be set and selected by the user, can be stored in the form of MODE<1:0>, and MODE<1:0> can be set to different values ​​(for example, 00, 01, 10, 11) to execute different operating modes. According to the value set by MODE<1:0>, the radio frequency control logic device can execute different logics, for example:

[0080] When MODE<1:0>=00, it indicates that the frequency conversion coding and decoding system for the RF baseband signal automatically determines the clock frequency for decoding reception and encoding return according to the received digital baseband signal, that is, automatically selects the DIG_demodx module of the RF demodulation device.

[0081] All digital decoding modules in the RF demodulation device are turned on at the same time to decode the received digital baseband signal at the same time. The data with correct check bits and decoded first is sent to the main control logic device through the demodulation signal selection module, while the data decoded by other digital decoding modules is abandoned.

[0082] When receiving data, the demodulation signal selection module sends the clk_seld signal to the main control logic device and the RF control logic device. The main control logic device determines the decoding clock of the digital decoding (DIG_demodx) module in the frequency conversion coding and decoding system for the RF baseband signal according to the clk_seld signal, and provides the digital encoding (DIG_modx) module with the same frequency for return data. The RF control logic device determines the decoding clock of the digital decoding (DIG_demodx) module in the frequency conversion coding and decoding system for the RF baseband signal according to the clk_seld signal, selects the corresponding digital encoding (DIG_modx) module according to the same frequency, and controls the frequency divider to provide the corresponding divided clock clkx.

[0083] When MODE<1:0>=01, it indicates that the digital decoding (DIG_demodx) module of the RF demodulation device and the digital encoding (DIG_modx) module of the RF modulation device are selected according to the UID of the digital baseband signal.

[0084] Taking 3 digital decoding (DIG_demodx) modules and 3 digital encoding (DIG_modx) modules as an example, the RF demodulation device has 3 DIG_demodx modules, corresponding to three clkx signals. When the remainder of the UID value / 3 is 0, the first DIG_demod1 module is selected; when the remainder is 1, the second DIG_demod2 module is selected; when the remainder is 2, the third DIG_demod3 module is selected.

[0085] Correspondingly, the RF modulation device has three DIG_modx modules corresponding to three clkx signals. When the remainder of the UID value / 3 is 0, the first DIG_mod1 module is selected; when the remainder is 1, the second DIG_mod2 module is selected; when the remainder is 2, the third DIG_mod3 module is selected.

[0086] When MODE<1:0>=10, it means that the frequency conversion codec system for the RF baseband signal selects the digital decoding (DIG_demodx) module of the RF demodulation device and the digital encoding (DIG_modx) module of the RF modulation device according to the value stored in the storage module. For the setting of the value stored in the storage module, the user can write or modify it according to the application scenario.

[0087] Taking 3 digital decoding (DIG_demodx) modules and 3 digital encoding (DIG_modx) modules as an example for explanation, the RF demodulation device has 3 DIG_demodx modules, corresponding to three clk frequencies. The value stored in the memory is 1, indicating that the first DIG_demod1 module is selected, the stored value is 2, indicating that the second DIG_demod2 module is selected, and the stored value is 3, indicating that the third DIG_demod3 module is selected.

[0088] Correspondingly, the RF modulation device has 3 DIG_modx modules corresponding to three clk frequencies. The value stored in the memory is 1, indicating that the first DIG_mod1 module is selected, the stored value is 2, indicating that the second DIG_mod2 module is selected, and the stored value is 3, indicating that the third DIG_mod3 module is selected.

[0089] When MODE<1:0>=11, it means that the digital decoding (DIG_demodx) module of the RF demodulation device and the digital encoding (DIG_modx) module of the RF modulation device are selected according to the version number of the frequency conversion coding and decoding system for the RF baseband signal. For example, the frequency conversion coding and decoding system for the RF baseband signal is divided into three versions, corresponding to the high-speed communication version, the medium-speed communication version, and the low-speed communication version, respectively. The corresponding digital decoding module and data encoding module are selected according to the different clkx signals corresponding to different versions.

[0090] Therefore, the radio frequency control logic device according to the implementation scheme of the present invention can generate control signals for the digital decoding module and the digital encoding module. The control signal can be generated according to the unique identification code, version information, frequency information, mode stored in the memory, and the frequency selection (sel) signal from the main control logic device. That is, the intervention and control of the codec frequency by different UIDs, different versions, different frequencies, and the control signals generated on demand by the main control logic device are completed, thereby realizing the control of the version function, the control of the codec frequency corresponding to different UIDs, the control of the codec frequency of a batch of products produced, and the control of the codec frequency of the radio frequency by the main control logic device on demand.

[0091] According to the implementation scheme of the present invention, the received and sent digital baseband signals may include a frame header, data bits, a frame tail, etc. Among them, the frame header is used by the digital decoding (DIG_demodx) module to determine whether the received digital baseband signal is valid and its starting position; the data bit is the received data; the frame tail includes a check bit, a UID code, and a frame end bit; the check bit is used by the receiving logic to determine whether the received data is valid, and the UID code is used to compare the own UID to determine whether the data is sent to itself; the frame end bit is used to determine the end of data transmission.

[0092] The following is a specific description of the working process of the frequency conversion coding and decoding method for radio frequency baseband signals according to the embodiment of the present invention by taking an example. Figure 3 The flowchart is a method for frequency conversion coding and decoding of a radio frequency baseband signal according to an embodiment of the present invention.

[0093] See also Figure 3 , taking the case where the user sets MODE<1:0>=00 as an example to describe the frequency conversion encoding and decoding method for a radio frequency baseband signal according to an embodiment of the present invention, which may include the following steps:

[0094] In step S31, the RF control logic device generates a demodulation selection (demod_selx) signal and a modulation selection (mod_selx) signal according to the default value of the storage module or the digital circuit, and these signals are used to control all DIG_demodx modules and DIG_modx modules respectively. The RF control logic device sends the generated demod_selx signal and mod_selx signal to all DIG_demodx modules and DIG_modx modules respectively, and the RF control logic device also sends the generated demod_selx signal to the demodulation signal selection module and sends the generated mod_selx signal to the modulation signal selection module.

[0095] In addition, the RF control logic device can control the frequency divider to generate the divided clock signals clk1, clk2, ..., clkn required by all DIG_demodx modules and DIG_modx modules, and send the generated clk1, clk2, ..., clkn to the DIG_demodx module and DIG_modx module respectively.

[0096] In step S32, based on the demod_selx signal and the mod_selx signal generated by the radio frequency control logic device, all DIG_demodx modules are turned on and all DIG_modx modules are turned off.

[0097] In step S33, the RF_demod module demodulates the received RF signal, and the RF carrier carrying the baseband signal is demodulated by the RF_demod module to obtain a digital baseband signal.

[0098] In step S34, the digital baseband signal simultaneously reaches the DIG_demod1 module, DIG_demod2 module, ..., DIG_demodn module in DIG_demodx, and these modules simultaneously try to decode the digital baseband signal under the drive of different clock signals clk1, clk2, ..., clkn.

[0099] The following uses three digital decoding (DIG_demodx) modules as an example to illustrate the following three situations:

[0100] a) One of the decoders in DIG_demodx (for example, DIG_demod2) completes the decoding operation first, outputs data and sets rcv_ok to 1.

[0101] b) When other decoders complete decoding, one decoder in DIG_demodx (for example, DIG_demod1) fails to complete the decoding operation due to the slow clock of clk1. At this time, data is not output and the rcv_ok value is set to 0.

[0102] c) During the decoding process, a decoder in DIG_demodx (for example, DIG_demod3) has a decoding error because the clock frequency of clk3 is inconsistent with the encoding clock frequency of the digital baseband signal. This will also cause the obtained check bit to be wrong. The check bit error will result in no data output and the rcv_ok value is set to 0.

[0103] In step S35, when the demodulation signal selection module receives data data from a certain DIG_demodx module and the value of rcv_ok is 1, the data received from the certain DIG_demodx module is sent to the main control logic device, and the signals of other DIG_demodx modules are no longer received until the current transceiver operation is completed and the next transceiver process starts, and the clk_seld signal corresponding to the clkx used by the DIG_demodx module and the rcv_ok signal set to 1 are sent to the RF control logic device and the main control logic device.

[0104] That is to say, the demodulation signal gating module can send the data data received from a certain DIG_demodx module to the main control logic device according to the gating strategy. The gating strategy may include: the DIG_demodx module that first sends the rcv_ok signal is selected; a DIG_demodx module is directly selected according to demod_selx, etc. The gating strategy can be set according to actual conditions, and the present invention is not limited to the above strategy.

[0105] In step S36, the main control logic device receives the data from the demodulation signal gating module, the clk_seld signal, and the rcv_ok signal, and generates a frequency selection (sel) signal according to the received clk_seld signal.

[0106] In step S37, the digital encoding (DIG_modx) module of the RF modulation device turns on the selected DIG_modx module according to the mod_selx signal generated by the RF control logic device, thereby encoding the return data data provided by the main control logic device. Here, the mod-selx signal can be a value stored in the storage module, which is the selection information stored in the storage module or the selection information calculated by a fixed logic according to the storage information. The mod-selx signal can also be regenerated based on the sel signal.

[0107] In step S38, the modulation signal gating module sends the digital baseband signal encoded by the enabled selected DIG_modx encoding module to the RF modulation RF_mod module according to the mod_selx signal generated by the RF control logic device.

[0108] In step S39, the radio frequency modulation RF_mod module modulates the digital baseband signal received from the modulation signal selection module into a radio frequency carrier, thereby sending the signal to the radio frequency transmitter.

[0109] The above only describes the process of the frequency conversion coding and decoding method for radio frequency baseband signals according to the implementation scheme of the present invention by taking MODE<1:0>=00 as an example. The frequency conversion coding and decoding method for radio frequency baseband signals according to the implementation scheme of the present invention can also work in other modes.

[0110] Therefore, the frequency conversion codec system and method for RF baseband signals according to the implementation scheme of the present invention can complete the jump of the codec frequency on the same carrier frequency, and different codec frequencies correspond to different RF transceivers. By selecting transceivers corresponding to different codec frequencies, the problem of multiple RF transceivers responding simultaneously in the same RF field is avoided. In addition, the intervention and control of the codec frequency by control signals generated on demand by different UIDs, different versions, different frequencies, and the main control logic device of the system is completed. Then, the control of version functions, the control of codec frequencies corresponding to different UIDs, the control of codec frequencies of a certain batch, and the control of the codec frequency of the RF by the main control logic device on demand are realized. In addition, the codec frequency range of the RF transceiver is increased, the applicable range of the codec frequency of the RF transceiver is improved, and the RF transceivers using different codec frequencies will not interfere with each other.

[0111] The various embodiments of the invention are not an exhaustive list of all possible combinations, but are intended to describe representative aspects of the invention, and what is described in various embodiments may be applied independently or in combinations of two or more.

[0112] The description presented in the above exemplary embodiments is only used to illustrate the technical solution of the present invention, and is not intended to be exhaustive, nor is it intended to limit the present invention to the precise form described. Obviously, it is possible for a person of ordinary skill in the art to make many changes and variations based on the above teachings. The exemplary embodiments are selected and described to explain the specific principles of the present invention and its practical application, so that other technicians in the field can easily understand, implement and use the various exemplary embodiments of the present invention and its various selected forms and modified forms. The scope of protection of the present invention is intended to be limited by the attached claims and their equivalent forms.

Claims

1. A frequency conversion coding and decoding system for radio frequency baseband signals, comprising a radio frequency demodulation device, a radio frequency modulation device, a radio frequency control logic device and a main control logic device, The radio frequency control logic device is configured to generate a decoding module selection signal, an encoding module selection signal and a divided clock signal; The radio frequency demodulation device comprises: A radio frequency demodulation module configured to convert the radio frequency signal into a digital baseband signal; Two or more digital decoding modules, the two or more digital decoding modules are electrically connected to the RF demodulation module respectively, and the two or more digital decoding modules are configured to: respectively receive a digital baseband signal from the RF demodulation module, a decoding module selection signal from the RF control logic device, and a divided clock signal, and based on the decoding module selection signal of the RF control logic device, enable one or more of the two or more digital decoding modules to start and use the received divided clock signal to convert the digital baseband signal from the RF demodulation module into data, and generate a reception success flag signal; A demodulation signal gating module, which is electrically connected to the digital decoding module, and the demodulation signal gating module is configured to receive data and a reception success flag signal from the digital decoding module, and determine whether the data is received successfully; The main control logic device is electrically connected to the demodulation signal gating module and the radio frequency control logic device, respectively, and is configured to: receive data from the demodulation signal gating module and a decoding clock frequency of a corresponding digital decoding module, generate data to be encoded according to the received data, generate a frequency selection signal according to the received decoding clock frequency of the corresponding digital decoding module, and send the generated frequency selection signal to the radio frequency control logic device; The radio frequency modulation device comprises: Two or more digital encoding modules, the two or more digital encoding modules are electrically connected to the main control logic device and the radio frequency control logic device, and the two or more digital encoding modules are configured to: respectively receive data to be encoded from the main control logic device, an encoding module selection signal from the radio frequency control logic device, and a divided clock signal, and based on the encoding module selection signal of the radio frequency control logic device, enable one or more of the two or more digital encoding modules to be turned on and convert the data to be encoded into a digital baseband signal using the received divided clock signal; a modulation signal gating module, which is electrically connected to each of the two or more digital encoding modules, and the modulation signal gating module is configured to: receive a digital baseband signal encoded by the turned-on digital encoding module according to an encoding module selection signal generated by the radio frequency control logic device; The radio frequency modulation module is electrically connected to the modulation signal selection module, and the radio frequency modulation module is configured to receive the digital baseband signal from the modulation signal selection module and convert the digital baseband signal into a radio frequency signal.

2. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 1, wherein: The radio frequency control logic device includes a storage module, a control logic module, a frequency divider and a system clock; The storage module is configured to store a unique identification code of the digital baseband signal, a version of the radio frequency transceiver system, frequency information set by the user, and mode information; The control logic module is configured to generate a decoding module selection signal, an encoding module selection signal and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, the mode information and the frequency selection signal; The frequency divider is configured to generate a divided clock signal based on a frequency division signal generated by a control logic module using a system clock signal.

3. The frequency conversion coding and decoding system for radio frequency baseband signals according to claim 2, wherein: The divided clock signal is input to each digital decoding module in two or more digital decoding modules; The divided clock signal input to each digital decoding module is different.

4. The frequency conversion coding and decoding system for radio frequency baseband signals according to claim 3, wherein: The data bit width representing a value of 0 or 1 in the digital baseband signal of each digital decoding module is related to the frequency division ratio of the frequency divider; The ratio relationship between the data bit widths of the digital baseband signals of the respective digital decoding modules is consistent with the ratio relationship between the clock signals input to the respective digital decoding modules; The data bit width of the digital baseband signal of each digital decoding module is consistent with the ratio relationship of the clock signal input to each digital decoding module.

5. The frequency conversion coding and decoding system for radio frequency baseband signals according to claim 1, wherein: The demodulation signal selection module is further configured to determine that the data is received successfully when data is received from the digital decoding module and the reception success flag signal indicates success.

6. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 2, wherein: The divided clock signal is input to each digital encoding module of two or more digital encoding modules; The divided clock signal input to each digital encoding module is different.

7. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 6, wherein: The data bit width representing a value of 0 or 1 in the digital baseband signal of each digital encoding module is related to the frequency division ratio of the frequency divider; The ratio relationship between the data bit widths of the digital baseband signals of the respective digital coding modules is consistent with the ratio relationship between the clock signals input to the respective digital coding modules; The data bit width of the digital baseband signal of each digital encoding module is consistent with the ratio relationship of the clock signal input to each digital encoding module.

8. A frequency conversion encoding and decoding method for a radio frequency baseband signal, comprising: The radio frequency control logic device generates a decoding module selection signal, an encoding module selection signal and a divided clock signal; The RF demodulation module converts the RF signal into a digital baseband signal; Two or more digital decoding modules respectively receive the digital baseband signal from the RF demodulation module, the decoding module selection signal from the RF control logic device, and the divided clock signal, and based on the decoding module selection signal of the RF control logic device, one or more of the two or more digital decoding modules are turned on and the digital baseband signal from the RF demodulation module is converted into data using the received divided clock signal, and a reception success flag signal is generated; The demodulation signal selection module receives the data and the reception success flag signal from the digital decoding module, and determines whether the data is received successfully; The main control logic device receives data from the demodulation signal selection module and the decoding clock frequency of the corresponding digital decoding module, generates data to be encoded according to the received data, generates a frequency selection signal according to the received decoding clock frequency of the corresponding digital decoding module, and sends the generated frequency selection signal to the radio frequency control logic device; Two or more digital encoding modules respectively receive the data to be encoded from the main control logic device, the encoding module selection signal from the radio frequency control logic device, and the divided clock signal, and based on the encoding module selection signal of the radio frequency control logic device, one or more of the two or more digital encoding modules are turned on and the data to be encoded is converted into a digital baseband signal using the received divided clock signal; The modulation signal gating module receives the digital baseband signal encoded by the turned-on digital encoding module according to the encoding module selection signal generated by the radio frequency control logic device; The radio frequency modulation module receives the digital baseband signal from the modulation signal selection module and converts the digital baseband signal into a radio frequency signal.

9. The frequency conversion encoding and decoding method for radio frequency baseband signals according to claim 8, further comprising: The storage module of the radio frequency control logic device stores the unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, and the mode information; The control logic module of the radio frequency control logic device generates a decoding module selection signal, an encoding module selection signal and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, the mode information and the frequency selection signal; The frequency divider of the radio frequency control logic device generates a divided clock signal based on the divided signal generated by the control logic module using the system clock signal.

10. The frequency conversion encoding and decoding method for radio frequency baseband signals according to claim 9, further comprising: The divided clock signal is input to each digital decoding module in two or more digital decoding modules; The divided clock signal is input to each digital encoding module of two or more digital encoding modules; The divided clock signal input to each digital decoding module is different; The divided clock signal input to each digital encoding module is different.

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