Transcoding system and method for radio frequency baseband signals

Abstract

The present application relates to a frequency conversion coding system and method for radio frequency baseband signals. The frequency conversion coding system for radio frequency baseband signals comprises: a radio frequency control logic device configured to generate a decoding module selection signal and a divided clock signal; a radio frequency demodulation module configured to convert a radio frequency signal into a digital baseband signal; two or more digital decoding modules configured to enable one of the two or more digital decoding modules based on the decoding module selection signal and convert the digital baseband signal from the radio frequency demodulation module into data; a demodulation signal gating module configured to receive the data from the digital decoding modules and receive a success flag signal; a main control logic device configured to receive the data from the demodulation signal gating module and a decoding clock frequency of a corresponding digital decoding module, generate a frequency selection signal according to the decoding clock frequency of the corresponding digital decoding module, and send the generated frequency selection signal to the radio frequency control logic device.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency communication, and more particularly, to a frequency conversion codec system and method for radio frequency baseband signals. BACKGROUND

[0002] In radio frequency communication, carrier frequency is a crucial parameter, which not only determines the propagation characteristics of the signal, but also affects the performance and efficiency of the entire system. The carrier frequency of the radio frequency signal is usually a fixed frequency (such as 920 MHz), or varies within a very narrow frequency range (such as the frequency hopping technology of 2.4G Bluetooth).

[0003] In digital radio frequency communication applications, the data bit width PW of the baseband signal is also fixed within the system fault tolerance range. Here, the data bit width in the digital baseband signal that can represent 0 or 1 values is defined as PW.

[0004] For radio frequency communication using a fixed carrier frequency, the common processing method is: (1) maintain the data bit width PW of the baseband signal unchanged; (2) set the data bit width PW of the baseband signal by the host device, and send the width to the radio frequency receiver, and use the data bit width PW of the baseband signal set by the host device in subsequent communication.

[0005] However, the above two configuration schemes of the data bit width PW of the baseband signal have the following disadvantages in the normal communication process:

[0006] 1. When there are multiple matching unique identification codes (UID) in the radio frequency field or radio frequency receiving devices lacking UID identification mechanism, it will cause these radio frequency receiving devices to respond to the transmission command of the radio frequency transmitter at the same time, thereby causing the problem of false triggering.

[0007] 2. When a radio frequency receiving device exists in multiple matching radio frequency fields, if the radio frequency transmitting devices send radio frequency commands at the same time, it will cause the radio frequency receiving device to receive information to be disordered.

[0008] 3. To overcome the above problems at the same time, complex digital circuit logic is usually needed to judge the radio frequency receiving information, which will cause a lot of difficulties in digital circuit verification and optimization.

[0009] In summary, although the fixed or narrow range varying carrier frequency combined with the fixed baseband signal PW value simplifies the system design and implementation to a certain extent, it may cause a series of problems such as error code, interference and potential risk of multiple unique identification code (UID) devices communicating at the same time. Therefore, in order to optimize the performance of the radio frequency communication system, it is urgent to improve the existing method.

[0010] The above statements of background art are only for the convenience of the in-depth understanding of the technical solutions of the present application (the technical means used, the technical problems solved, and the technical effects generated, etc.), and should not be regarded as acknowledging or in any form implying that the message constitutes the prior art known to those skilled in the art. SUMMARY

[0011] The present application aims to provide a frequency conversion codec system and method for radio frequency baseband signals, which generates a decoding module selection signal, an encoding module selection signal, a frequency division signal based on a unique identification code of a digital baseband signal, a version of a radio frequency transceiver system, frequency information set by a user, mode information, etc., thereby controlling clock signals input to different digital decoding modules and digital encoding modules.

[0012] According to the embodiment of the present application, a frequency conversion codec system for radio frequency baseband signal is provided, which comprises a radio frequency demodulation device, a radio frequency modulation device, a radio frequency control logic device and a main control logic device, the radio frequency control logic device is configured to generate a decoding module selection signal, an encoding module selection signal and a divided clock signal; the radio frequency demodulation device comprises: a radio frequency demodulation module configured to convert a radio frequency signal into a digital baseband signal; two or more digital decoding modules, which are respectively electrically connected with the radio frequency demodulation module, and the two or more digital decoding modules are configured to: respectively receive the digital baseband signal from the radio frequency demodulation module, the decoding module selection signal from the radio frequency control logic device and the divided clock signal, based on the decoding module selection signal of the radio frequency control logic device, make one or more of the two or more digital decoding modules open and convert the digital baseband signal from the radio frequency demodulation module into data using the received divided clock signal, and generate a reception success flag signal; a demodulation signal gating module electrically connected with the digital decoding module, and the demodulation signal gating module is configured to receive the data and the reception success flag signal from the digital decoding module, and determine whether the received data is successful; the main control logic device is respectively electrically connected with the demodulation signal gating module and the radio frequency control logic device, and is configured to: receive the data from the demodulation signal gating module and the decoding clock frequency of the corresponding digital decoding module, generate data requiring encoding according to the received data, generate a frequency selection signal according to the received decoding clock frequency of the corresponding digital decoding module, and send the generated frequency selection signal to the radio frequency control logic device; the radio frequency modulation device comprises: two or more digital encoding modules, which are respectively electrically connected with the main control logic device and the radio frequency control logic device, and the two or more digital encoding modules are configured to: respectively receive the data requiring encoding from the main control logic device, the encoding module selection signal from the radio frequency control logic device and the divided clock signal, based on the encoding module selection signal of the radio frequency control logic device, make one or more of the two or more digital encoding modules open and convert the data requiring encoding into a digital baseband signal using the received divided clock signal; a modulation signal gating module electrically connected with each of the two or more digital encoding modules, and the modulation signal gating module is configured to: according to the encoding module selection signal generated by the radio frequency control logic device, receive the digital baseband signal encoded by the open digital encoding module; a radio frequency modulation module electrically connected with the modulation signal gating module, and the radio frequency modulation module is configured to receive the digital baseband signal from the modulation signal gating module, and convert the digital baseband signal into a radio frequency signal.

[0013] Preferably, the radio frequency control logic device comprises a storage module, a control logic module, a frequency divider and a system clock; the storage module is configured to store a unique identification code of the digital baseband signal, a version of the radio frequency transceiver system, frequency information set by a user and mode information; the control logic module is configured to generate a decoding module selection signal, an encoding module selection signal and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, the mode information and a frequency selection signal; the frequency divider is configured to generate a frequency-divided clock signal based on the frequency division signal generated by the control logic module using the system clock signal.

[0014] Preferably, the frequency-divided clock signal is input to each of the two or more digital decoding modules; the frequency-divided clock signal input to each digital decoding module is different.

[0015] Preferably, the data bit width representing 0 value or 1 value in the digital baseband signal of each digital decoding module is related to the frequency division ratio of the frequency divider; the ratio relationship between the data bit widths of the digital baseband signals of the respective digital decoding modules is consistent with the ratio relationship between the clock signals input to the respective digital decoding modules; the ratio relationship between the data bit widths of the digital baseband signals of the respective digital decoding modules and the clock signals input to the respective digital decoding modules is consistent.

[0016] Preferably, the demodulation signal gating module is further configured to determine that the received data is successful when the data from the digital decoding module is received and the successful reception flag signal indicates success.

[0017] Preferably, the frequency-divided clock signal is input to each of the two or more digital encoding modules; the frequency-divided clock signal input to each digital encoding module is different.

[0018] Preferably, the data bit width representing 0 value or 1 value in the digital baseband signal of each digital encoding module is related to the frequency division ratio of the frequency divider; the ratio relationship between the data bit widths of the digital baseband signals of the respective digital encoding modules is consistent with the ratio relationship between the clock signals input to the respective digital encoding modules; the ratio relationship between the data bit widths of the digital baseband signals of the respective digital encoding modules and the clock signals input to the respective digital encoding modules is consistent.

[0019] According to an embodiment of the present invention, a frequency conversion encoding and decoding method for a radio frequency baseband signal is provided, which includes: a radio frequency control logic device generates a decoding module selection signal, an encoding module selection signal and a divided clock signal; a radio frequency demodulation module converts the radio frequency signal into a digital baseband signal; two or more digital decoding modules respectively receive the digital baseband signal from the radio frequency demodulation module, the decoding module selection signal from the radio frequency control logic device and the divided clock signal, and based on the decoding module selection signal of the radio frequency control logic device, one or more of the two or more digital decoding modules are turned on and the digital baseband signal from the radio frequency demodulation module is converted into data using the received divided clock signal, and a reception success flag signal is generated; a demodulation signal selection module receives the data and the reception success flag signal from the digital decoding module and determines whether the data is received successfully; a main control logic device receives the data and the corresponding signal from the demodulation signal selection module The decoding clock frequency of the digital decoding module generates data to be encoded based on the received data, generates a frequency selection signal based on the received decoding clock frequency of the corresponding digital decoding module, and sends the generated frequency selection signal to the RF control logic device; two or more digital encoding modules respectively receive the data to be encoded from the main control logic device, the encoding module selection signal from the RF control logic device, and the divided clock signal; based on the encoding module selection signal of the RF control logic device, one or more of the two or more digital encoding modules are turned on and the data to be encoded is converted into a digital baseband signal using the received divided clock signal; the modulation signal selection module receives the digital baseband signal encoded by the turned-on digital encoding module based on the encoding module selection signal generated by the RF control logic device; the RF modulation module receives the digital baseband signal from the modulation signal selection module and converts the digital baseband signal into a RF signal.

[0020] Preferably, the frequency conversion encoding and decoding method for radio frequency baseband signals according to the embodiment of the present invention further includes: the storage module of the radio frequency control logic device stores the unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, and the mode information; the control logic module of the radio frequency control logic device generates a decoding module selection signal, an encoding module selection signal, and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, the mode information, and the frequency selection signal; and the frequency divider of the radio frequency control logic device uses the system clock signal to generate a divided clock signal based on the frequency division signal generated by the control logic module.

[0021] Preferably, the frequency conversion coding method for radio frequency baseband signals according to the embodiment of the present application further comprises: the divided clock signal is input to each of the two or more digital decoding modules; the divided clock signal is input to each of the two or more digital encoding modules; the divided clock signal input to each digital decoding module is different; and the divided clock signal input to each digital encoding module is different.

[0022] The present application adopts the above technical solution, which has the following beneficial effects:

[0023] 1. Coding frequency hopping and selection of radio frequency transceiver

[0024] The present application realizes coding frequency hopping on the same carrier frequency, which is achieved by dynamically selecting radio frequency transceivers corresponding to different coding frequencies. This dynamic selection mechanism effectively avoids the problem of multiple radio frequency transceivers responding at the same time in the same radio frequency environment, thereby reducing signal conflicts and interference. This not only improves the efficiency of the radio frequency carrier frequency band, but also enhances the stability and reliability of the system. By allocating different frequencies for different transmission needs, the system can more flexibly manage communication resources, ensuring efficient and secure data transmission.

[0025] 2. Intervention and control of control signals

[0026] The present application realizes the intervention and control of coding frequency based on the unique identification code (UID) of different digital baseband signals, the version of the radio frequency transceiver system, the frequency information set by the user, and the control signal generated by the main control logic device. This means that the system can adjust and optimize the coding strategy based on the unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, mode information, and other parameters. This fine management not only improves the functional control of the version, but also realizes frequency control for different UID of digital baseband signals and different batches of equipment, and adjusts the coding frequency of the radio frequency according to the needs of the main control logic device. This high degree of customization capability enables the system to more accurately meet the communication needs under various operating conditions.

[0027] 3. Increase of coding frequency range

[0028] By implementing the embodiments of the present application, the codec frequency range of the radio frequency transceiver is increased, which directly improves the application range of the radio frequency transceiver. This means that the radio frequency transceiver can process signals of a wider frequency range, thereby adapting to more diverse communication environments and needs. At the same time, radio frequency transceivers using different codec frequencies do not interfere with each other, which ensures clear and stable communication. Increasing the frequency range while avoiding mutual interference embodies the excellent performance of the present application in radio frequency resource management and interference suppression.

[0029] In summary, the technical solutions of the present application optimize the frequency selection mechanism of the radio frequency transceiver, implement fine control signal management, and increase the codec frequency range of the radio frequency transceiver, thereby bringing higher efficiency, stronger stability and wider applicability to the wireless communication system. These improvements are of great significance for improving the overall performance and user experience of the wireless communication system. BRIEF DESCRIPTION OF DRAWINGS

[0030] The exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. For the sake of clarity, the same components in different drawings are denoted by the same reference numerals. It should be noted that the drawings merely serve illustrative purposes and are not necessarily drawn to scale. In these drawings:

[0031] Figure 1 A block diagram of a frequency conversion and coding system for radio frequency baseband signals according to an embodiment of the present application is shown.

[0032] Figure 2 A circuit diagram of a frequency conversion and coding system for radio frequency baseband signals according to an embodiment of the present application is shown.

[0033] Figure 3 A flowchart of a frequency conversion and coding method for radio frequency baseband signals according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0034] The embodiments of the present application will be described in detail below, which are implemented on the premise of the technical solutions of the present application, and detailed implementation methods and specific operation processes are given, but the protection scope of the present application is not limited to the following embodiments.

[0035] In the following, the embodiments of the present application will be described in detail with reference to the accompanying drawings. Figure 1 A block diagram of a frequency conversion and coding system for radio frequency baseband signals according to an embodiment of the present application is shown.

[0036] Reference is made to Figure 1The transcoder system for radio frequency baseband signals according to the embodiment of the present application can include a radio frequency demodulation device 100, a radio frequency modulation device 200, a radio frequency control logic device 300, and a main control logic device 400.

[0037] The radio frequency demodulation device 100 can receive a radio frequency signal and convert the radio frequency signal into data suitable for processing by the main control logic device 400. The radio frequency modulation device 200 can convert data to be transmitted by the main control logic device 400 into a signal on a radio frequency carrier. The radio frequency control logic device 300 can provide control signals such as a main clock signal and a divided clock signal required by the system. The main control logic device 400 can be electrically connected to the radio frequency demodulation device 100, the radio frequency modulation device 200, and the radio frequency control logic device 300, respectively, and receive and transmit data according to the needs of the system.

[0038] The detailed configuration of each device will be described below with reference to Figure 2 Figure 2 A circuit diagram of the transcoder system for radio frequency baseband signals according to the embodiment of the present application is shown.

[0039] According to the embodiment of the present application, the radio frequency demodulation device 100 can include a radio frequency demodulation (RF_demod) module, a digital decoding (DIG_demodx) module, and a demodulation signal gating module.

[0040] The RF_demod module can convert a radio frequency signal into a digital baseband signal of 0 and 1 values. The carrier frequency of the radio frequency signal is a fixed frequency to ensure that the signal is propagated within a specific frequency band, thereby avoiding interference with other communication systems. Specifically, the RF_demod module, upon receiving a radio frequency signal, multiplies it by a signal generated by a local oscillator through a mixer, and then removes a high frequency portion through a filter, thereby obtaining a low frequency baseband signal. Accordingly, the RF_demod module can obtain a baseband signal through mixing and filtering, or can obtain a baseband signal directly through filtering. Alternatively, a digital signal shaping circuit can be used to obtain a more regular digital baseband signal of 0 and 1 values. The signal shaping circuit can be an analog-to-digital converter of only 1 bit.

[0041] Here, the data bit width that can represent 0 or 1 values in a digital baseband signal is defined as the PW of the digital baseband signal. According to the embodiment of the present application, the PW of the digital baseband signal is variable.

[0042] ​The plurality of DIG_demodx modules can decode the digital baseband signal into data in parallel and generate a receive success flag signal (rcv_ok, which is a short form of receive_ok). According to an embodiment of the present application, the DIG_demodx modules can be operated according to the demod_selx signal, thereby decoding the original data from the received signal and generating the receive success flag signal rcv_ok, which indicates whether the present data reception is successful. According to an embodiment of the present application, the value of the demod_selx signal can be a pre-stored value or a value generated by the radio control logic device 300.

[0043] According to an embodiment of the present application, the DIG_demodx module can include a plurality of DIG_demodx modules: DIG_demod1, DIG_demod2,..., DIG_demodn, n being an integer equal to or greater than 2, i.e., x represents any one of 2,..., n. Each of the DIG_demodx modules can independently process a specific signal band or perform a specific decoding task. The decoding clock frequency of each of the DIG_demodx modules can be different, i.e., the clock signals clkx input to the different DIG_demodx modules can be different. According to an embodiment of the present application, the clock signals clkx (i.e., clk1, clk2,..., clkn) input to the different DIG_demodx modules come from the frequency divider of the radio control logic device 300.

[0044] The data bit width PW of the digital baseband signal is related to the frequency division ratio of the frequency divider, i.e., within the range of system error (error caused by the deviation of the frequency, pulse width, duty cycle, etc. of the digital baseband signal from the characteristics of the square wave when the system normally demodulates the radio frequency signal):

[0045] a) the ratio relationship between the data bit widths PW1, PW2,..., PWn of the DIG_demod1, DIG_demod2,..., DIG_demodn modules is consistent with the ratio relationship between the clock signals clk1, clk2,..., clkn;

[0046] b) the ratio relationship between the data bit widths PW1, PW2,..., PWn of the DIG_demod1, DIG_demod2,..., DIG_demodn modules and the clock signals clk1, clk2,..., clkn, respectively, is equal: PW1 / clk1 = PW2 / clk2 =... = PWn / clkn;

[0047] c) the data bit widths PW1, PW2,..., PWn of the DIG_demod1, DIG_demod2,..., DIG_demodn modules have the following relationship: PW2>2xPW1,..., PWn>2xPW1 n-1 PW is the time length (in us).

[0048] The radio frequency demodulation device according to the embodiment of the present application can decode the frequency hopping on the same carrier frequency, and different decoding frequencies correspond to different radio frequency decoders and encoders. By selecting the encoders and decoders corresponding to different decoding frequencies, the problem of multiple radio frequency transceivers responding at the same time in the same radio frequency field can be avoided.

[0049] In addition, according to the embodiment of the present application, within the range allowed by the system error (the error caused by the deviation of the square wave characteristic parameters such as the frequency, pulse width, and duty cycle of the digital baseband signal when the system normally demodulates the radio frequency signal), the decoding frequency of the digital baseband signal is consistent with one of the clock signals clkx generated by the frequency divider of the radio frequency control logic device 300.

[0050] Therefore, the radio frequency demodulation device according to the embodiment of the present application not only can increase the decoding frequency range of the radio frequency transceiver, but also can improve the decoding frequency application range of the radio frequency transceiver, and avoids the mutual interference between radio frequency transceivers using different decoding frequencies, thereby improving the performance and reliability of the entire radio frequency system.

[0051] The demodulation signal gating module can receive the data (data) output by the DIG_demodx module and the reception success flag signal (rcv_ok). The demodulation signal gating module can determine the validity of the received data according to the following judgment conditions:

[0052] When the data is received but the rcv_ok is not received within a predetermined time period (for example, clkxxm), the demodulation signal gating module determines that the received data is invalid, where m is an integer greater than or equal to 2 set according to the specific communication environment and requirements, and the present application is not limited thereto.

[0053] When the data is received and the rcv_ok signal is received within a predetermined time period (for example, clkxxm), the demodulation signal gating module determines that the received data is valid, and ignores the subsequent data and rcv_ok from other DIG_demodx modules.

[0054] According to the embodiment of the present application, the demodulation signal gating module can determine that the received data is valid when the data is received and the rcv_ok is received within the time period of clkx x m. The demodulation signal gating module can send the received data to the main control logic device 400 and send the clkx used by the corresponding DIG_demodx module as a clock selection (clk_sel, short for clk_selected) signal to the radio frequency control logic device 300 and the main control logic device 400.

[0055] According to the embodiment of the present application, the radio frequency modulation device 200 can include a digital encoding (DIG_modx) module, a modulation signal gating module, and a radio frequency modulation (RF_mod) module.

[0056] The DIG_modx module can encode the data from the main control logic device 400 into a digital baseband signal for radio frequency transmission by the RF_mod module. According to the embodiment of the present application, the DIG_modx module can operate the selected DIG_modx module according to the mod_selx signal to encode the data from the main control logic device 400 into a digital baseband signal. According to the embodiment of the present application, the value of the mod_selx signal can be a pre-stored value or a value generated by the radio frequency control logic device 300.

[0057] According to the embodiment of the present application, the DIG_modx module can include a plurality of DIG_modx modules: DIG_mod1, DIG_mod2, …, DIG_modn, n is an integer greater than or equal to 2, i.e. x represents any one of 2, …, n. Each DIG_modx module can independently process a specific signal frequency band or perform a specific encoding task, and the encoding clock frequency of each DIG_modx module is different, i.e. the clock signal clkx input to different DIG_modx modules has different frequencies. According to the embodiment of the present application, the clock signal clkx input to different DIG_modx modules comes from the frequency divider of the radio frequency control logic device 300.

[0058] Similarly to the DIG_demodx module, the data bit width PW value of the digital baseband signal is variable, and the PW value depends on the value of the clkx from the radio frequency control logic device 300.

[0059] According to the embodiment of the present application, within the range allowed by the system error (the error caused by the deviation of the square wave characteristic parameters such as frequency, pulse width, duty cycle of the digital baseband signal when the system can normally modulate the radio frequency signal):

[0060] a) the ratio of the data bit width PW1, PW2, …, PWn of the DIG_mod1, DIG_mod2, …, DIG_modn modules is consistent with the ratio of the clock signals clk1, clk2, …, clkn;

[0061] b) the ratio of the data bit width PW1, PW2, …, PWn of the DIG_mod1, DIG_mod2, …, DIG_modn modules to the clock signals clk1, clk2, …, clkn is equal, i.e. PW1 / clk1 = PW2 / clk2 = … = PWn / clkn;

[0062] c) the data bit width PW1, PW2, …, PWn of the DIG_mod1, DIG_mod2, …, DIG_modn modules has the following relationship: PW2>2×PW1, …, PWn>2 n-1 ×PW1, where PW is the time length (in us).

[0063] According to the embodiment of the present application, the encoding frequency of the digital baseband signal is consistent with one of the clock signals clkx generated by the frequency divider of the radio frequency control logic device 300 within the range of the system error (the error caused by the deviation of the frequency, pulse width, duty cycle and other square wave characteristic parameters of the digital baseband signal when the system can normally modulate the radio frequency signal).

[0064] According to the embodiment of the present application, the data bit width PW of the digital baseband signal of the DIG_modx module and the corresponding DIG_demodx module can be consistent, for example, the data bit width PW of the digital baseband signal of the DIG_mod1 module and the DIG_demod1 module is consistent, the data bit width PW of the digital baseband signal of the DIG_mod2 module and the DIG_demod2 module is consistent, …, the data bit width PW of the digital baseband signal of the DIG_modn module and the DIG_demodn module is consistent, which are PW1, PW2, …, PWn respectively, and have the following relationship: PW2>2×PW1, …, PWn>2 n-1 ×PW1, where PW is the time length (in us).

[0065] The modulated signal selection module can receive the digital baseband signal encoded by the DIG_modx module selected by the mod_selx signal generated by the radio frequency control logic device 300 according to the mod_selx signal, and send the encoded digital baseband signal to the RF_mod module.

[0066] The RF_mod module can modulate the received digital baseband signal to a radio frequency carrier.

[0067] According to an embodiment of the present application, the main control logic device 400 can generate a frequency selection (sel) signal according to the clock selection (clk_seld) signal received from the demodulation signal gate module, and send the generated frequency selection (sel) signal to the radio frequency control logic device 300. The main control logic device 400 can generate the frequency selection (sel) signal according to the required communication condition, and the factors affecting the communication condition can include environmental interference, communication data volume, radio frequency power, etc.

[0068] The main control logic device 400 can receive and send data according to the system requirement. The main control logic device 400 can receive data from the radio frequency demodulation device, and provide the data to be returned to the radio frequency modulation device.

[0069] The main control logic device 400 can actively select the speed of receiving and sending data (the longer the length of the PW, the slower the speed). The data bit width PW value of the demodulation and modulation signal can be selected as the shortest PW value under the reliable condition according to the actual debugging situation.

[0070] As mentioned above, clkx can be sent to the radio frequency control logic device 300 and the main control logic device 400 as the clock selection (clk_seld, the abbreviation of clk_selected) signal, and accordingly, the main control logic device 400 can determine the PW value according to the clock selection (clk_seld) signal (i.e. clkx) received from the demodulation signal gate module. Specifically, the following steps are included:

[0071] After a baseband signal from RF_demod is sent to DIG_demodx, DIG_demodx can decode the baseband signal according to clkx. Based on the set PW value, if the difference between the PW value of the received baseband signal and the set PW value is less than or equal to the preset threshold value (which is the possible allowable deviation of the PW value), the received baseband signal can be normally decoded. For example, the set PW value is 8 clk, when the PW value of the received baseband signal is greater than the preset threshold value (for example, 2 clk) from the set PW value, such as less than 6 clk width or greater than 10 clk width, the received baseband signal cannot be normally decoded.

[0072] For a baseband signal with a fixed PW value, only one of the several DIG_demodx modules can correctly decode the baseband signal and generate data data and rcv_ok signal.

[0073] The demodulation signal gating module can determine the clkx corresponding to the received data data according to the source of rcv_ok, and then generate a corresponding clk_seld signal and send it to the main control logic device 400. The main control logic device 400 can latch the received clk_seld signal and generate a corresponding sel signal to send to the control logic module of the radio frequency control logic device 300.

[0074] The control logic module can generate a mod_selx signal corresponding to the sel signal based on the received sel signal. The mod_selx signal can enable a DIG_modx module, which can use the same clkx as the DIG_demodx module. Thus, the enabled DIG_modx module can obtain the data reception speed and thereby control the data transmission speed.

[0075] According to an embodiment of the present application, the radio frequency control logic device 300 can include a storage module, a control logic module, a frequency divider, and a system clock.

[0076] The storage module can store the unique identification code (UID) of the digital baseband signal, the version (VERSION) of the radio frequency transceiver system, the user-set frequency (FREQUENCY), the mode (MODE), and the like. The storage module can be a one-time programmable memory (e.g., Efuse, etc.) and a multi-time erasable programmable memory (e.g., flash memory), etc.

[0077] The control logic module can generate a modulation selection (mod_selx) signal, a demodulation selection (demod_selx) signal, and frequency division information (clk_sel) signal according to the UID, VERSION, FREQUENCY, MODE, and the like, and the frequency selection (sel) signal from the main control logic device 400. Among them, the modulation selection (mod_selx) signal can be used to select the digital encoding (DIG_modx) module, the demodulation selection (demod_selx) signal can be used to select the digital decoding (DIG_demodx) module, and the frequency division information (clk_sel) signal can be a signal about the frequency division information such as the frequency division ratio.

[0078] The system clock can provide the main clock signal required by the entire system, and can also provide the clock signal for the frequency divider. The frequency divider can frequency- divide the clock signal provided by the system clock according to the value of the clk_sel signal, and generate parallel different frequency divided clocks, i.e., clk1, clk2, …, clkn.

[0079] According to an embodiment of the present application, the mode (MODE) information represents the operation mode of the frequency conversion codec system for the radio frequency baseband signal. The mode (MODE) information can be set and selected by the user, can be stored in the form of MODE<1:0>, and different operation modes can be performed by setting MODE<1:0> to different values (for example, 00, 01, 10, 11). According to the value set by MODE<1:0>, the radio frequency control logic device can perform different logic, for example:

[0080] When MODE<1:0> = 00, it means that the frequency conversion codec system for the radio frequency baseband signal automatically determines the clock frequency for decoding reception and encoding return according to the received digital baseband signal, that is, automatically selects the DIG_demodx module of the radio frequency demodulation device.

[0081] All digital decoding modules in the radio frequency demodulation device are turned on at the same time, and the received digital baseband signal is decoded at the same time. The data whose bits are correct and which is decoded first is sent to the main control logic device through the demodulation signal gating module, and the data decoded by other digital decoding modules is discarded.

[0082] When the demodulation signal gating module receives data, it sends the clk_seld signal to the main control logic device and the radio frequency control logic device. The main control logic device determines the decoding clock of the digital decoding (DIG_demodx) module in the frequency conversion codec system for the radio frequency baseband signal according to the clk_seld signal, and provides the digital encoding (DIG_modx) module with the same frequency for returning data. The radio frequency control logic device determines the decoding clock of the digital decoding (DIG_demodx) module in the frequency conversion codec system for the radio frequency baseband signal according to the clk_seld signal, and selects the corresponding digital encoding (DIG_modx) module at the same frequency, and controls the frequency divider to provide the corresponding divided clock clkx.

[0083] When MODE<1:0> = 01, it means that the digital decoding (DIG_demodx) module of the radio frequency demodulation device and the digital encoding (DIG_modx) module of the radio frequency modulation device are selected according to the UID of the digital baseband signal.

[0084] Taking 3 digital decoding (DIG_demodx) modules and 3 digital encoding (DIG_modx) modules as an example, the radio frequency demodulation device has 3 DIG_demodx modules corresponding to three clkx signals. When the remainder of the value of UID divided by 3 is 0, the first DIG_demod1 module is selected; when the remainder is 1, the second DIG_demod2 module is selected; and when the remainder is 2, the third DIG_demod3 module is selected.

[0085] Correspondingly, the radio frequency modulation device has three DIG_modx modules corresponding to three clkx signals. When the remainder of the value of UID divided by 3 is 0, the first DIG_mod1 module is selected; when the remainder is 1, the second DIG_mod2 module is selected; and when the remainder is 2, the third DIG_mod3 module is selected.

[0086] When MODE<1:0>=10, it indicates that the digital decoding (DIG_demodx) module of the radio frequency demodulation device and the digital encoding (DIG_modx) module of the radio frequency modulation device are selected according to the value stored in the storage module for the frequency conversion codec system of the radio frequency baseband signal. For the setting of the value stored in the storage module, the user can write or modify according to the application scenario.

[0087] Taking three digital decoding (DIG_demodx) modules and three digital encoding (DIG_modx) modules as an example, the radio frequency demodulation device has three DIG_demodx modules corresponding to three clk frequencies. The value stored in the storage is 1, indicating that the first DIG_demod1 module is selected, the value stored is 2, indicating that the second DIG_demod2 module is selected, and the value stored is 3, indicating that the third DIG_demod3 module is selected.

[0088] Correspondingly, the radio frequency modulation device has three DIG_modx modules corresponding to three clk frequencies. The value stored in the storage is 1, indicating that the first DIG_mod1 module is selected, the value stored is 2, indicating that the second DIG_mod2 module is selected, and the value stored is 3, indicating that the third DIG_mod3 module is selected.

[0089] When MODE<1:0>=11, it indicates that the digital decoding (DIG_demodx) module of the radio frequency demodulation device and the digital encoding (DIG_modx) module of the radio frequency modulation device are selected according to the version number of the frequency conversion codec system for the radio frequency baseband signal. For example, the frequency conversion codec system for the radio frequency baseband signal is divided into three versions, corresponding to high-speed communication version, medium-speed communication version, and low-speed communication version. According to different versions corresponding to different clkx signals, the corresponding digital decoding module and data encoding module are selected.

[0090] Therefore, the radio frequency control logic device according to the embodiment of the present application can generate the control signals of the digital decoding module and the digital encoding module. The control signals can be generated according to the unique identification code, the version information, the frequency information, the mode stored in the memory and the frequency selection (sel) signal from the main control logic device. That is, the control and intervention of the encoding and decoding frequencies by different UIDs, different versions, different frequencies and the control logic device on demand are completed, thereby realizing the control of the version function, the control of the encoding and decoding frequencies corresponding to different UIDs, the control of the encoding and decoding frequencies of a certain batch of products produced and the control of the encoding and decoding frequencies of the radio frequency by the main control logic device on demand.

[0091] According to the embodiment of the present application, the received and transmitted digital baseband signals can include a frame header, data bits, a frame tail and the like. The frame header is used for the digital decoding (DIG_demodx) module to judge whether the received digital baseband signal is valid and the starting position thereof; the data bits are the received data; the frame tail includes a check bit, a UID code and a frame end bit; the check bit is used for the receiving logic to judge whether the received data is valid, the UID code is used for comparing the UID itself to judge whether the data is sent to itself; and the frame end bit is used for judging the end of data transmission.

[0092] The working process of the frequency conversion encoding and decoding method for the radio frequency baseband signal according to the embodiment of the present application will be described in detail below with an example, Figure 3 The flow chart of the frequency conversion encoding and decoding method for the radio frequency baseband signal according to the embodiment of the present application is shown.

[0093] Referring to Figure 3 The frequency conversion encoding and decoding method for the radio frequency baseband signal according to the embodiment of the present application will be described with an example that the user sets MODE<1:0> = 00, which can include the following steps:

[0094] In step S31, the radio frequency control logic device generates demodulation selection (demod_selx) signals and modulation selection (mod_selx) signals according to the default values of the storage module or the digital circuit, which are respectively used for controlling all the DIG_demodx modules and the DIG_modx modules. The radio frequency control logic device sends the generated demod_selx signals and mod_selx signals to all the DIG_demodx modules and the DIG_modx modules respectively, and also sends the generated demod_selx signals to the demodulation signal gating module and the generated mod_selx signals to the modulation signal gating module.

[0095] In addition, the radio frequency control logic device can control the frequency divider to generate clock signals clk1, clk2,..., clkn required for frequency division of all DIG_demodx modules and DIG_modx modules, and send the generated clk1, clk2,..., clkn to the DIG_demodx modules and the DIG_modx modules respectively.

[0096] In step S32, based on the demod_selx signal and the mod_selx signal generated by the radio frequency control logic device, all DIG_demodx modules are enabled, and all DIG_modx modules are disabled.

[0097] In step S33, the RF_demod module demodulates the received radio frequency signal, and after the radio frequency carrier loaded with the baseband signal is demodulated by the RF_demod module, a digital baseband signal is obtained.

[0098] In step S34, the digital baseband signal reaches the DIG_demod1 module, the DIG_demod2 module,..., the DIG_demodn module in the DIG_demodx module at the same time, and these modules simultaneously attempt to decode the digital baseband signal under the drive of different clock signals clk1, clk2,..., clkn.

[0099] The following takes three digital decoding (DIG_demodx) modules as an example for illustration, which can have the following three cases:

[0100] a) One decoder (for example, DIG_demod2) in the DIG_demodx module first completes the decoding operation, outputs data, and sets rcv_ok to 1.

[0101] b) One decoder (for example, DIG_demod1) in the DIG_demodx module does not complete the decoding operation when other decoders complete the decoding, at this time, data has no output, and rcv_ok is set to 0, because the clock of clk1 is slower.

[0102] c) One decoder (for example, DIG_demod3) in the DIG_demodx module causes decoding error in the decoding process, at this time, the obtained check bit is also wrong, which causes data to have no output, and rcv_ok is set to 0, because the clock frequency of clk3 is inconsistent with the encoding clock frequency of the digital baseband signal.

[0103] When the demodulation signal gating module receives the data data from a certain DIG_demodx module and the value of rcv_ok is 1, the data data from the certain DIG_demodx module is sent to the main control logic device, and no signal from other DIG_demodx module is received until the current transceiving operation is completed, the next transceiving process is started, and the clk_seld signal corresponding to the clkx used by the DIG_demodx module and the rcv_ok signal set to 1 are sent to the radio frequency control logic device and the main control logic device.

[0104] That is, the demodulation signal gating module can send the data data from a certain DIG_demodx module received to the main control logic device according to a gating strategy. The gating strategy can include: the DIG_demodx module that sends the rcv_ok signal first is selected; a DIG_demodx module directly selected according to the demod_selx strategy, etc. The gating strategy can be set according to actual conditions, and the application is not limited to the above strategies.

[0105] In step S36, the main control logic device receives the data, the clk_seld signal and the rcv_ok signal from the demodulation signal gating module, and generates a frequency selection (sel) signal according to the received clk_seld signal.

[0106] In step S37, the digital encoding (DIG_modx) module of the radio frequency modulation device enables the selected DIG_modx module according to the mod_selx signal generated by the radio frequency control logic device, so as to encode the return data data provided by the main control logic device. Here, the mod-selx signal can be a value stored in the storage module, which is selection information stored in the storage module or selection information calculated according to the stored information through fixed logic. The mod-selx signal can also be regenerated based on the sel signal.

[0107] In step S38, the modulation signal gating module sends the digital baseband signal encoded by the selected DIG_modx encoding module enabled according to the mod_selx signal generated by the radio frequency control logic device to the radio frequency modulation RF_mod module.

[0108] In step S39, the radio frequency modulation RF_mod module modulates the digital baseband signal received from the modulation signal gating module to a radio frequency carrier, and then sends it to the radio frequency transmitter.

[0109] The above only takes the mode <1:0> = 00 as an example to describe the flow of the frequency conversion coding and decoding method for the radio frequency baseband signal according to the embodiment of the application, and the frequency conversion coding and decoding method for the radio frequency baseband signal according to the embodiment of the application can also work in other modes.

[0110] Therefore, the frequency conversion coding and decoding system and method for the radio frequency baseband signal according to the embodiment of the application can complete the coding and decoding frequency hopping in the same carrier frequency, and different coding and decoding frequencies correspond to different radio frequency transceivers. By selecting the transceivers corresponding to different coding and decoding frequencies, the problem of simultaneous response of multiple radio frequency transceivers in the same radio frequency field is avoided. In addition, the intervention and control of the coding and decoding frequency by the control signal generated by the main control logic device of different UIDs, different versions, different frequencies and systems are completed. Further, the control of the version function, the control of the coding and decoding frequency corresponding to different UIDs, the control of the coding and decoding frequency of a batch, and the control of the coding and decoding frequency of the radio frequency by the main control logic device on demand are realized. In addition, the coding and decoding frequency range of the radio frequency transceiver is also increased, the coding and decoding frequency application range of the radio frequency transceiver is improved, and the radio frequency transceivers using different coding and decoding frequencies will not interfere with each other.

[0111] The various embodiments of the application are not an exhaustive list of all possible combinations, but are intended to describe representative aspects of the application, and the content described in various embodiments can be applied independently or in combination of two or more.

[0112] The description presented by the above exemplary embodiments is only to illustrate the technical solutions of the application, and is not intended to be exhaustive, nor is the application limited to the exact form described. Obviously, many changes and variations are possible for those skilled in the art based on the above teachings. The exemplary embodiments are selected and described in order to explain the specific principles of the application and its practical application, so that other skilled in the art can easily understand, implement and utilize various exemplary embodiments of the application and various selected forms and modified forms thereof. The scope of protection of the application is intended to be defined by the appended claims and their equivalents.

Claims

1. A frequency conversion coding and decoding system for radio frequency baseband signals, comprising a radio frequency demodulation device, a radio frequency modulation device, a radio frequency control logic device, and a main control logic device, The radio frequency control logic device is configured to generate a demodulation selection signal, a modulation selection signal and a divided clock signal; The radio frequency demodulation device comprises: a radio frequency demodulation module configured to convert the radio frequency signal into a digital baseband signal; Two or more digital decoding modules, each electrically connected to the RF demodulation module, and configured to: respectively receive a digital baseband signal from the RF demodulation module, a demodulation selection signal from the RF control logic device, and a divided clock signal; based on the demodulation selection signal from the RF control logic device, enable one or more of the two or more digital decoding modules to convert the digital baseband signal from the RF demodulation module into data using the received divided clock signal; and generate a reception success flag signal; a demodulation signal gating module electrically connected to the digital decoding module, and configured to receive data and a reception success flag signal from the digital decoding module, and determine whether the data is received successfully; The main control logic device is electrically connected to the demodulation signal gating module and the radio frequency control logic device, and is configured to: receive data from the demodulation signal gating module and a decoding clock frequency of a corresponding digital decoding module, generate data to be encoded based on the received data, generate a frequency selection signal based on the received decoding clock frequency of the corresponding digital decoding module, and send the generated frequency selection signal to the radio frequency control logic device, so that the radio frequency control logic device generates a modulation selection signal corresponding to the frequency selection signal, wherein the modulation selection signal can enable the digital encoding module, and the enabled digital encoding module uses the same clock signal as the digital decoding module; The radio frequency modulation device comprises: Two or more digital encoding modules, each electrically connected to the main control logic device and the radio frequency control logic device, and configured to: respectively receive data to be encoded from the main control logic device, a modulation selection signal from the radio frequency control logic device, and a divided clock signal; based on the modulation selection signal from the radio frequency control logic device, enable one or more of the two or more digital encoding modules to convert the data to be encoded into a digital baseband signal using the received divided clock signal; a modulation signal gating module electrically connected to each of the two or more digital encoding modules, and configured to receive a digital baseband signal encoded by the enabled digital encoding module according to a modulation selection signal generated by the radio frequency control logic device; The radio frequency modulation module is electrically connected to the modulation signal gating module and is configured to receive the digital baseband signal from the modulation signal gating module and convert the digital baseband signal into a radio frequency signal.

2. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 1, wherein: The radio frequency control logic device includes a storage module, a control logic module, a frequency divider and a system clock; The storage module is configured to store a unique identification code of the digital baseband signal, a version of the radio frequency transceiver system, frequency information set by the user, and mode information; The control logic module is configured to generate a demodulation selection signal, a modulation selection signal, and a frequency division signal based on a stored unique identification code of the digital baseband signal, a version of the radio frequency transceiver system, frequency information set by a user, mode information, and a frequency selection signal; The frequency divider is configured to generate a divided clock signal based on the frequency divided signal generated by the control logic module using the system clock signal, The mode information indicates an operating mode of the frequency conversion coding and decoding system for the radio frequency baseband signal, and the mode information is set and selected by the user; When the mode information is set to 00, it indicates that the frequency conversion codec system for the RF baseband signal automatically determines the clock frequency for decoding reception and encoding return according to the received digital baseband signal; When the mode information is set to 01, it indicates that the digital decoding module of the radio frequency demodulation device and the digital encoding module of the radio frequency modulation device are selected according to the unique identification code of the digital baseband signal; When the mode information is set to 10, it indicates that the frequency conversion coding and decoding system for the radio frequency baseband signal selects the digital decoding module of the radio frequency demodulation device and the digital encoding module of the radio frequency modulation device according to the value stored in the storage module; When the mode information is set to 11, it indicates that the digital decoding module of the radio frequency demodulation device and the digital encoding module of the radio frequency modulation device are selected according to the version number of the frequency conversion coding and decoding system for the radio frequency baseband signal.

3. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 2, wherein: The divided clock signal is input to each digital decoding module in two or more digital decoding modules; The divided clock signal input to each digital decoding module is different.

4. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 3, wherein: The data bit width representing a value of 0 or 1 in the digital baseband signal of each digital decoding module is related to the frequency division ratio of the frequency divider; The ratio relationship between the data bit widths of the digital baseband signals of the respective digital decoding modules is consistent with the ratio relationship between the clock signals input to the respective digital decoding modules; The data bit width of the digital baseband signal of each digital decoding module is consistent with the ratio relationship of the clock signal input to each digital decoding module.

5. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 1, wherein: The demodulation signal selection module is further configured to: when data is received from the digital decoding module and the reception success flag signal indicates success, determine that the data is received successfully.

6. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 2, wherein: The divided clock signal is input to each digital encoding module in two or more digital encoding modules; The divided clock signal input to each digital encoding module is different.

7. The frequency conversion encoding and decoding system for radio frequency baseband signals according to claim 6, wherein: The data bit width representing a value of 0 or 1 in the digital baseband signal of each digital encoding module is related to the frequency division ratio of the frequency divider; The ratio relationship between the data bit widths of the digital baseband signals of the respective digital coding modules is consistent with the ratio relationship between the clock signals input to the respective digital coding modules; The data bit width of the digital baseband signal of each digital coding module is consistent with the ratio relationship of the clock signal input to each digital coding module.

8. A frequency conversion encoding and decoding method for a radio frequency baseband signal, comprising: The radio frequency control logic device generates a demodulation selection signal, a modulation selection signal and a frequency-divided clock signal; The RF demodulation module converts the RF signal into a digital baseband signal; Two or more digital decoding modules respectively receive a digital baseband signal from the RF demodulation module, a demodulation selection signal from the RF control logic device, and a divided clock signal. Based on the demodulation selection signal from the RF control logic device, one or more of the two or more digital decoding modules are turned on and the digital baseband signal from the RF demodulation module is converted into data using the received divided clock signal, and a reception success flag signal is generated. The demodulation signal selection module receives the data and the reception success flag signal from the digital decoding module and determines whether the data is received successfully; The main control logic device receives data from the demodulation signal gating module and the decoding clock frequency of the corresponding digital decoding module, generates data to be encoded based on the received data, generates a frequency selection signal based on the received decoding clock frequency of the corresponding digital decoding module, and sends the generated frequency selection signal to the radio frequency control logic device, so that the radio frequency control logic device generates a modulation selection signal corresponding to the frequency selection signal. The modulation selection signal can enable the digital encoding module, and the enabled digital encoding module uses the same clock signal as the digital decoding module; Two or more digital encoding modules respectively receive data to be encoded from the main control logic device, a modulation selection signal from the radio frequency control logic device, and a divided clock signal. Based on the modulation selection signal from the radio frequency control logic device, one or more of the two or more digital encoding modules are turned on and the data to be encoded is converted into a digital baseband signal using the received divided clock signal. The modulation signal gating module receives the digital baseband signal encoded by the turned-on digital encoding module according to the modulation selection signal generated by the radio frequency control logic device; The radio frequency modulation module receives the digital baseband signal from the modulation signal selection module and converts the digital baseband signal into a radio frequency signal.

9. The frequency conversion encoding and decoding method for radio frequency baseband signals according to claim 8, further comprising: The storage module of the radio frequency control logic device stores the unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, and the mode information; The control logic module of the radio frequency control logic device generates a demodulation selection signal, a modulation selection signal and a frequency division signal based on the stored unique identification code of the digital baseband signal, the version of the radio frequency transceiver system, the frequency information set by the user, the mode information and the frequency selection signal; The frequency divider of the radio frequency control logic device generates a divided clock signal based on the frequency divided signal generated by the control logic module using the system clock signal. The mode information indicates an operating mode of the frequency conversion coding and decoding system for the radio frequency baseband signal, and the mode information is set and selected by the user; When the mode information is set to 00, it indicates that the frequency conversion codec system for the RF baseband signal automatically determines the clock frequency for decoding reception and encoding return according to the received digital baseband signal; When the mode information is set to 01, it indicates that the digital decoding module of the radio frequency demodulation device and the digital encoding module of the radio frequency modulation device are selected according to the unique identification code of the digital baseband signal; When the mode information is set to 10, it indicates that the frequency conversion coding and decoding system for the radio frequency baseband signal selects the digital decoding module of the radio frequency demodulation device and the digital encoding module of the radio frequency modulation device according to the value stored in the storage module; When the mode information is set to 11, it indicates that the digital decoding module of the radio frequency demodulation device and the digital encoding module of the radio frequency modulation device are selected according to the version number of the frequency conversion coding and decoding system for the radio frequency baseband signal.

10. The frequency conversion encoding and decoding method for radio frequency baseband signals according to claim 9, further comprising: The divided clock signal is input to each digital decoding module in two or more digital decoding modules; The divided clock signal is input to each digital encoding module in two or more digital encoding modules; The divided clock signal input to each digital decoding module is different; The divided clock signal input to each digital encoding module is different.

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