Semiconductor device with termination region and passivation layer and preparation method

Abstract

The invention relates to a semiconductor device with an edge termination region and a passivation layer and a preparation method. Comprising a substrate, the upper end surface of which is provided with a drift region; a first insulating film is arranged on the upper end surface of the substrate; a plurality of protection rings are further arranged on the upper end face of the substrate, each protection ring extends into the drift region, and every two adjacent protection rings are separated through a first insulating film; a second insulating film is arranged on the first insulating film and the protection ring, second insulating film through holes are formed in the second insulating film, and the included angle between the inner wall of each second insulating film through hole and the upper end face of the substrate is an acute angle; a metal layer is arranged in each second insulating film through hole; a first passivation layer is arranged on the second insulating film and the metal layer; a second passivation layer is arranged on the first passivation layer; by providing a semiconductor device structure with an edge termination region and a passivation layer, the technical problems that a passivation layer above a metal layer of an existing structure is easy to crack, the metal layer can permeate and corrode due to humidity and other pollution, and meanwhile, a high electric field exists to catalyze the damage of a terminal are solved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor device with an edge termination region and a passivation layer and a preparation method thereof. Background Art

[0002] Vertical power semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs) or fast recovery diodes (FRDs), consist of an active region and a termination region surrounding the active region, which can electrically isolate and protect the device from high voltages. There may also be some transition regions between the active region and the termination region. The presence of high fields accelerates chemical breakdown and may cause premature failure of the device. As a result, Figure 1 A vertical power semiconductor device is shown, including a chip 93, on which there are a transition area 91 and a termination area 92. A passivation layer is usually used to cover the termination area so that moisture or other corrosive substances in the environment cannot reach the termination area. The combination of the termination area and the passivation must also operate within the required temperature range, usually -40°C to 150°C. Therefore, it is necessary to select suitable materials, structures, deposition and etching processes.

[0003] Traditional structures include multiple guard rings arranged around the active area (p-ring termination), some of which are achieved through an implantation step followed by diffusion, some are trench structures (trench termination), and some are multiple overlapping impurity steps leading to a continuous reduction in steps (LVD termination). Currently, the technical solution is trending towards a more planar solution, and the LVD termination requires more silicon area to achieve blocking rate and higher patterning to achieve a more compact design.

[0004] like Figure 2 As shown, Figure 1The cross-sectional view includes a substrate, a drift region 94 is provided on the substrate, a plurality of guard rings (p ring) 95 are arranged at intervals on the substrate, a field oxide (Field Oxide) 96 is provided on the substrate, borophosphosilicate glass (BPSG) 97 is covered on the field oxide, a metal plug (AlCu) 98 is in contact with the field oxide, and the metal plug is passivated by silicon rich nitride (silicon rich nitride) 99 and polyimide film (polymide) 100. The existing multiple guard rings 95 are arranged around the active area with increasing spacing, and the spacing between each guard ring is determined by the field oxide structure. The field oxide can be constructed by etching or selective growth, such as local oxidation of silicon (LOCOS). The guard ring is in contact with the metal field plate, which is usually made of the same metallization layer as the top metal, which can be AlCu, AlSi, AlSiCu or similar materials. The metal ring is patterned by a photolithography process and then etched at a selected location. To keep feature sizes relatively small, the etch angles must be sharp. The thickness of the metal is typically several microns because the same layer is used to contact devices in the active area, for example by wire bonding. The passivation layers conform to the contours of the underlying layers so they have the same sharp angles as the metal. Figure 3 As shown, in Figure 2 On the basis of the present invention, a semi-insulating layer 101 of amorphous silicon or similar material is added between the borophosphosilicate glass, the metal plug and the silicon-rich nitride to alleviate the mechanical stress, but this requires additional processing steps and seriously increases the leakage current of the device. Figure 4 In Figure 2 A partial diagram of the passivation layer, Figure a shows the existing critical angle, and Figure b shows the passivation cracking of the passivation layer. Passivation cracking is one of the most common failure mechanisms in power semiconductor devices, as humidity and other contamination can penetrate and reach the highly corroded aluminum metal structure, while high electric fields exist to catalyze the destruction of the terminals.

[0005] Therefore, in view of the above problems, the present invention urgently needs to provide a semiconductor device having an edge termination region and a passivation layer and a preparation method thereof. Summary of the invention

[0006] The object of the present invention is to provide a semiconductor device with an edge termination area and a passivation layer and a preparation method. The semiconductor device structure with an edge termination area and a passivation layer is proposed to solve the technical problems that the passivation layer above the metal layer of the existing structure is prone to cracks, humidity and other pollution can penetrate and corrode the metal layer, and there is a high electric field to catalyze the destruction of the terminal.

[0007] The present invention provides a semiconductor device having a termination region and a passivation layer, comprising: A substrate, the substrate comprising an upper end surface and a lower end surface, and a drift region of a first conductivity type is provided on the upper end surface of the substrate; A first insulating film is provided on the upper end surface of the substrate; a plurality of second conductive type guard rings are also provided on the upper end surface of the substrate, each guard ring extends deep into the drift region, two adjacent guard rings are separated by the first insulating film, and the upper end surface of each guard ring is lower than the upper end surface of the first insulating film; A second insulating film is disposed on the first insulating film and the guard rings, and second insulating film through holes are disposed on the second insulating film that are connected to the guard rings one by one, and an angle between the inner wall of each second insulating film through hole and the upper end surface of the substrate is an acute angle; A metal layer is provided in each second insulating film through hole, and an upper end surface of the metal layer located in the second insulating film through hole is lower than an upper end surface of the second insulating film; A first passivation layer is provided on the second insulating film and the metal layer; A second passivation layer is disposed on the first passivation layer.

[0008] Preferably, the acute angle is 30° or 70-80°; the thickness of the metal layer is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0009] Preferably, the second insulating film is made of phosphosilicate glass.

[0010] Preferably, the first insulating film is made of silicon dioxide; The first passivation layer is made of silicon-rich nitride (SiNx); The second passivation layer is made of polymer; The metal layer is made of Al, AlCu or AlSiC; The substrate is a silicon wafer.

[0011] Preferably, the polymer is a polyimide.

[0012] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps: Performing oxidation treatment on the substrate, performing thermal growth to form a first insulating film, etching the first insulating film to form a first etching groove connected to the substrate, implanting boron ions into the first etching groove, forming a guard ring on the substrate, wherein the upper end surface of each guard ring is lower than the upper end surface of the first insulating film; A second insulating film is deposited on the first insulating film and the guard ring, and the second insulating film is patterned and etched to form second insulating film through holes that are connected to the guard rings one by one on the second insulating film, wherein the inner wall of each second insulating film through hole is an acute angle with the upper end surface of the substrate; Depositing metal on the second insulating film and the through hole of the second insulating film to form a metal layer, etching the metal layer to expose the second insulating film, wherein the upper end surface of the metal layer in the through hole of the second insulating film is lower than the upper end surface of the second insulating film; A first passivation layer is deposited on the second insulating film and the metal layer; A second passivation layer is deposited on the first passivation layer to obtain a semiconductor device having a termination region and a passivation layer.

[0013] Preferably, the second insulating film, the first passivation layer, and the second passivation layer are all prepared by a PECVD deposition process.

[0014] The present invention also provides a semiconductor device having a termination region and a passivation layer, comprising A substrate, the substrate comprising an upper end surface and a lower end surface, and a drift region of a first conductivity type is provided on the upper end surface of the substrate; A first insulating film is provided on the upper end surface of the substrate; a plurality of second conductive type guard rings are also provided on the upper end surface of the substrate, each guard ring extends deep into the drift region, two adjacent guard rings are separated by the first insulating film, and the upper end surface of each guard ring is lower than the upper end surface of the first insulating film; An additional insulating film is provided on the first insulating film and the guard ring; A silicon nitride layer is provided on the additional insulating film; A second insulating film is provided on the silicon nitride layer; Each protective ring is provided with a groove; The second insulating film located above the guard ring is provided with a second insulating film through hole which is connected to the silicon nitride layer in a one-to-one correspondence, and the included angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate is an acute angle; The silicon nitride layer located above the protection ring is provided with a silicon nitride layer through hole connected to the additional insulating film, and the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate is 30° or 70-80°; An additional insulating film through hole connected to the groove is provided on the additional insulating film located above the guard ring, and the second insulating film through hole, the silicon nitride layer through hole, the additional insulating film through hole and the groove are coaxially arranged; Metal tungsten is inserted in the additional insulating film through-holes and trenches; A metal layer is provided in the silicon nitride layer through hole and the second insulating film through hole, and the upper end surface of the metal layer is lower than the upper end surface of the second insulating film; A first passivation layer is provided on the second insulating film, A second passivation layer is disposed on the first passivation layer.

[0015] Preferably, the acute angle is 30° or 70-80°; the thickness of the metal layer is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0016] Preferably, the second insulating film is made of phosphosilicate glass.

[0017] Preferably, the additional insulating film is made of borophosphosilicate glass.

[0018] Preferably, each protective ring has one or more grooves on its upper end surface.

[0019] Preferably, the first insulating film is made of silicon dioxide; The first passivation layer is made of silicon-rich nitride (SiNx); The second passivation layer is made of polymer; The metal layer is made of Al, AlCu or AlSiCu; The polymer is polyimide.

[0020] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps: The substrate is subjected to oxidation treatment and thermal growth to form a first insulating film, the first insulating film is etched to form a first etching groove connected to the substrate, boron ions are implanted into the first etching groove, and guard rings are formed on the substrate, wherein the upper end surface of each guard ring is lower than the upper end surface of the first insulating film, and a groove is provided on each guard ring; depositing an additional insulating film on the first insulating film and the guard ring; depositing a silicon nitride layer on the additional insulating film; A second insulating film is deposited on the silicon nitride layer; The second insulating film is patterned and etched to form second insulating film through holes on the second insulating film above the guard ring that are connected to the silicon nitride layer in a one-to-one correspondence, and the inner wall of each second insulating film through hole is an acute angle with the upper end surface of the substrate; Etching the silicon nitride layer below the second insulating film through hole to form a silicon nitride layer through hole connected to the additional insulating film, wherein the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate is the same as the angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate; Etching the additional insulating film from within the through hole of the silicon nitride layer to form an additional insulating film through hole communicating with the trench; inserting metal tungsten in the additional insulating film through-holes and trenches; Depositing metal on the second insulating film and the through hole of the second insulating film to form a metal layer, etching the metal layer to expose the second insulating film, wherein the upper end surface of the metal layer in the through hole of the second insulating film is lower than the upper end surface of the second insulating film; A first passivation layer is deposited on the second insulating film and the metal layer; A second passivation layer is deposited on the first passivation layer to obtain a semiconductor device having a termination region and a passivation layer.

[0021] Preferably, the second insulating film, the first passivation layer, and the second passivation layer are all prepared by a PECVD deposition process.

[0022] The present invention also provides a semiconductor device having a termination region and a passivation layer, comprising A substrate, the substrate comprising an upper end surface and a lower end surface, and a drift region of a first conductivity type is provided on the upper end surface of the substrate; A first insulating film is provided on the upper end surface of the substrate; a plurality of second conductive type guard rings are also provided on the upper end surface of the substrate, each guard ring extends deep into the drift region, two adjacent guard rings are separated by the first insulating film, and the upper end surface of each guard ring is lower than the upper end surface of the first insulating film; An additional insulating film is provided on the first insulating film and the guard ring; Each protective ring is provided with a groove; An additional insulating film through hole communicating with the groove is provided on the additional insulating film located above the guard ring; Metal tungsten is inserted in the additional insulating film through-holes and trenches; A silicon nitride layer is provided on the additional insulating film and the additional insulating film through hole; A second insulating film is provided on the silicon nitride layer; The second insulating film located above the guard ring is provided with a second insulating film through hole which is connected to the silicon nitride layer in a one-to-one correspondence, and the included angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate is an acute angle; A first passivation layer is provided on the second insulating film and the through hole of the second insulating film, and a lower end surface of the first passivation layer is lower than a lower end surface of the second insulating film; A second passivation layer is disposed on the first passivation layer.

[0023] Preferably, a conductive polysilicon layer is further provided between the additional insulating film and the guard ring.

[0024] Preferably, the acute angle is 30° or 70-80°; the thickness of the metal layer is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0025] Preferably, the second insulating film is made of phosphosilicate glass.

[0026] Preferably, the additional insulating film is made of borophosphosilicate glass.

[0027] Preferably, each protective ring has one or more grooves on its upper end surface.

[0028] Preferably, the first insulating film is made of silicon dioxide; The first passivation layer is made of silicon-rich nitride (SiNx); The second passivation layer is made of polyimide; The metal is Al, AlCu or AlSiCu.

[0029] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps: The substrate is subjected to oxidation treatment and thermal growth to form a first insulating film, the first insulating film is etched to form a first etching groove connected to the substrate, boron ions are implanted into the first etching groove, and guard rings are formed on the substrate, wherein the upper end surface of each guard ring is lower than the upper end surface of the first insulating film, and a groove is provided on each guard ring; depositing an additional insulating film on the first insulating film and the guard ring; Etching the additional insulating film so that an additional insulating film through hole communicating with the trench is formed on the additional insulating film above the guard ring; inserting metal tungsten in the additional insulating film through-holes and trenches; depositing a silicon nitride layer on the additional insulating film; A second insulating film is deposited on the silicon nitride layer; Etching a second insulating film through hole that is in one-to-one correspondence with the silicon nitride layer on the second insulating film above the guard ring, wherein the angle between the inner wall of the second insulating film through hole and the upper end surface of the substrate is an acute angle; depositing a first passivation layer on the second insulating film, A second passivation layer is arranged on the first passivation layer, and the upper end surface of the second passivation layer is planarized to obtain a semiconductor device having a termination area and a passivation layer.

[0030] Preferably, the second insulating film, the first passivation layer, and the second passivation layer are all prepared by a PECVD deposition process.

[0031] Preferably, before depositing the additional insulating film, a conductive polysilicon layer is deposited on the first insulating film and the guard ring, and then etched to expose a portion of the guard ring, and then the additional insulating film is deposited; The additional insulating film is etched so that an additional insulating film through hole communicating with the trench or an additional insulating film through hole penetrating the deposited additional insulating film is formed on the additional insulating film located above the guard ring.

[0032] The semiconductor device with an edge termination region and a passivation layer and the preparation method provided by the present invention have the following improvements compared with the prior art: 1. The present invention proposes a semiconductor device with a termination area and a passivation layer. Each guard ring is separated by a first insulating film. A thicker second insulating film is prepared on the first insulating film, and the thicker second insulating film is deposited on the first insulating film. A second insulating film through hole connected to the guard ring is opened on the second insulating film, and metal is completely deposited in the through hole to form a metal layer. The metal layer forms a plug-in structure, and the metal layer contacts the guard ring. The cross-section of the second insulating film through hole is inverted trapezoidal, and the upper end surface of the metal layer is lower than the upper end surface of the second insulating film. The metal layer is no longer convex like the original structure. The first passivation layer is deposited on the second insulating film and the metal layer is thicker. The first passivation layer is flatter, has no sharp angles, will not crack, and has very stable moisture resistance and chemical corrosion resistance. The design of the above structure has a very small mechanical stress on the first passivation layer, and a weak electrical coupling is generated between the first passivation layer and the metal layer. The second passivation layer is set to further prevent mechanical damage and solid particle pollution.

[0033] 2. In the semiconductor device with a termination area and a passivation layer provided by the present invention, the size and etching angle of the through hole of the second insulating film determine how much metal is retained above the P ring, which is helpful for the electrical performance of the terminal. The metal layer is formed into a plug-in structure, which does not bring the disadvantage of additional topological structure in the termination of the first passivation layer being broken.

[0034] 3. The semiconductor device with a termination area and a passivation layer provided by the present invention has a metal layer made of Al, AlCu or AlSiC. The metal layer usually needs to be made of a bondable material, such as Al, AlCu, AlSiCu or similar materials. The metal cannot be too hard. During operation, the chip with metal will heat and cool. The thermal expansion coefficients of silicon and metal are different. If hard metal is selected, the semiconductor may be damaged.

[0035] 4. In some structures of the semiconductor device with a termination area and a passivation layer provided by the present invention, in order to save photolithography steps and mask steps, an additional insulating film and a thinner silicon nitride layer are retained. In the structure with an additional insulating film and a thinner silicon nitride layer, it is necessary to select a harder metal tungsten to be inserted into the additional insulating film and contact with the guard ring. The metal tungsten forms a very strong contact with silicon, and the metal tungsten has strong chemical inertness.

[0036] 5. The semiconductor device with a termination area and a passivation layer provided by the present invention has, in some structures, a metal layer that is easily corroded, which is usually the weak point of the terminal in terms of humidity robustness; metal tungsten is used to connect the guard ring, the first passivation layer is connected to the metal tungsten, and the lower end surface of the first passivation layer is lower than the lower end surface of the second insulating film, so that high electric fields can be better shielded. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0038] Figure 1 is a schematic diagram (top view) of an existing power semiconductor chip; Figure 2 for Figure 1 sectional view, a cross section of an existing termination area with multiple p+ diffused guard rings separated by local silicon oxide and contacted by floating metal plugs, the metal being passivated by silicon-rich nitride and polyimide films; Figure 3 A schematic diagram of the structure of the termination area of ​​the prior art, wherein multiple p+ diffusion protection rings are separated by local silicon oxidation and contacted by plugged metals, the metal plugs are weakly coupled to each other through a semi-insulating layer, and then passivated by a silicon nitride layer and a polyimide film; Figure 4 for Figure 2 A partial enlarged view of the Figure 4 Figure a is a cross-section of the metal plug structure. If the angle α or β is too small, cracks may occur in the silicon nitride film. Figure 4 Figure (b) shows a typical example of crack generation); Figure 5 FIG1 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer in Example 1; Figure 6 FIG2 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer in Example 1; Figure 7 FIG3 is a process diagram of manufacturing a semiconductor device having a termination region and a passivation layer according to Embodiment 1; Figure 8 FIG4 is a process diagram of manufacturing a semiconductor device having a termination region and a passivation layer according to Embodiment 1; Fig. 9 FIG. 1 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Embodiment 2; Fig.10 FIG. 2 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Embodiment 2; Fig.11 FIG3 is a process diagram of preparing a semiconductor device having a termination region and a passivation layer according to Embodiment 2; Fig.12 FIG4 is a process diagram of preparing a semiconductor device having a termination region and a passivation layer according to Embodiment 2; Fig.13 FIG5 is a process diagram of manufacturing a semiconductor device having a termination region and a passivation layer according to Embodiment 2; Fig.14 FIG6 is a diagram of the preparation process of a semiconductor device having a termination region and a passivation layer according to Embodiment 2; Fig.15 A schematic diagram of the structure of a semiconductor device having a termination region and a passivation layer obtained in Example 3; Fig.16 This is a schematic diagram of the structure of a semiconductor device with a termination region and a passivation layer obtained in Example 4.

[0039] Description of reference numerals: 1. Substrate; 2. Drift region; 3. Guard ring; 4. First insulating film; 5. Second insulating film; 51. Second insulating film through hole; 6. Metal layer; 7. First passivation layer; 8. Second passivation layer; 9. Additional insulating film; 10. Silicon nitride layer; 11. Metal tungsten; 12. Conductive polysilicon layer. DETAILED DESCRIPTION

[0040] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0042] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0043] Embodiment 1 like Figure 5 , Figure 6, Figure 7 , Figure 8 As shown, a semiconductor device with a termination region and a passivation layer provided in this embodiment includes a substrate 1, the substrate 1 includes an upper end face and a lower end face, a drift region 2 of a first conductivity type is provided on the upper end face of the substrate 1; a first insulating film 4 is provided on the upper end face of the substrate 1; a plurality of guard rings 3 of a second conductivity type are also provided on the upper end face of the substrate 1, each guard ring 3 extends deep into the drift region 2, two adjacent guard rings 3 are separated by the first insulating film 4, and the upper end face of each guard ring 3 is lower than the upper end face of the first insulating film 4; a second insulating film 5 is provided on the first insulating film 4 and the guard ring 3, and a second insulating film through hole 51 is provided on the second insulating film 5, which is connected to each guard ring 3 in a one-to-one correspondence, and the inner wall of each second insulating film through hole 51 is an acute angle with the upper end face of the substrate 1; a metal layer 6 is provided in each second insulating film through hole 51, and the upper end face of the metal layer 6 located in the second insulating film through hole 51 is lower than the upper end face of the second insulating film 5; a first passivation layer 7 is provided on the second insulating film 5 and the metal layer 6; a second passivation layer 8 is provided on the first passivation layer 7.

[0044] The present invention proposes a semiconductor device with a termination area and a passivation layer. Each guard ring is separated by a first insulating film 4. A thicker second insulating film 5 is prepared on the first insulating film 4, and the thicker second insulating film is deposited on the first insulating film 4; a second insulating film through hole 51 connected to the guard ring 3 is opened on the second insulating film 5, and the metal is completely deposited in the through hole to form a metal layer 6. The metal layer 6 forms a plug-in structure, and the metal layer 6 contacts the guard ring 3. The cross-section of the second insulating film through hole 51 is inverted trapezoidal, and at the same time, the upper end surface of the metal layer 6 is lower than the upper end surface of the second insulating film 5. The metal layer 6 is no longer convex like the original structure. The first passivation layer 7 is deposited on the second insulating film 5 and the metal layer is thick. The first passivation layer is flatter, has no sharp angles, will not crack, and has very stable moisture resistance and chemical corrosion resistance. In the design of the above structure, the first passivation layer 7 has very small mechanical stress, and weak electrical coupling is generated between the first passivation layer 7 and the metal layer 6; the second passivation layer is set to further prevent mechanical damage and solid particle pollution.

[0045] The size and etching angle of the second insulating film through hole 51 in this embodiment determine how much metal is retained above the P ring. The metal layer contributes to the electrical performance of the terminal. The metal layer is formed into a plug-in structure, which does not bring the disadvantage of additional topological structure in the termination of the first passivation layer rupture.

[0046] The function of the metal layer 6 of this embodiment is to redirect the electric field under reverse bias to the field oxide. The critical electric field of the field oxide is several orders of magnitude higher than that of the semiconductor, which means that a well-designed metal layer can help achieve a more compact termination structure with excellent moisture resistance.

[0047] The acute angle of the present embodiment is 30° or 70-80°; the thickness of the metal layer 6 is 1-8 μm, and the thickness of the second insulating film 5 is greater than the thickness of the metal layer 6 .

[0048] In this embodiment, wet etching and dry etching can be selected for etching the through hole of the second insulating film. The angle produced by wet etching is 30°, and that produced by dry etching is 70-80°. The etching method can be selected according to the needs.

[0049] The thickness of the second insulating film 5 of the present invention must be ensured to be within a set range, so that the amount of metal deposition can be guaranteed. The thickness of the second insulating film 5 is greater than the thickness of the metal layer 6, but it cannot be too thick. The lateral size of the group cannot be very fine and should be kept within a certain range, which is determined by the thickness of the metal layer 6.

[0050] The second insulating film 5 of the present invention is made of phosphosilicate glass, which has strong insulation and chemical inertness and will not be subjected to stress in the terminal structure. At the same time, it can be deposited quickly and can help remove impurities on the silicon surface through air absorption.

[0051] The first insulating film 4 of the present invention is a field oxide (FOX), which is a strong insulating dielectric material, usually thermally grown silicon dioxide.

[0052] The material of the first passivation layer of the present invention is silicon-rich nitride (SiNx); The material of the second passivation layer of the present invention is a polymer, and preferably, the polymer is polyimide.

[0053] The metal layer 6 of the present invention is made of Al, AlCu or AlSiC. The metal layer 6 usually needs to be made of a bondable material, such as Al, AlCu, AlSiCu or similar materials. The metal cannot be too hard. During operation, the chip with metal will heat and cool. The thermal expansion coefficients of silicon and metal are different. If hard metal is selected, the semiconductor may be damaged.

[0054] The substrate 1 of the present invention is a silicon wafer.

[0055] The thickness of the first passivation layer of the present invention is greater than 100 nm, preferably 0.5-3 μm.

[0056] like Figure 5 , Figure 6 , Figure 7 , Figure 8 As shown, this embodiment also provides a method for preparing a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps: 101) performing oxidation treatment on the substrate 1, performing thermal growth to form a first insulating film 4, etching the first insulating film 4 to form a first etching groove connected to the substrate 1, implanting boron ions into the first etching groove, forming a guard ring 3 on the substrate 1, and the upper end surface of each guard ring 3 is lower than the upper end surface of the first insulating film 4; 102) a second insulating film 5 is deposited on the first insulating film 4 and the guard ring 3, the second insulating film 5 is patterned and etched, and second insulating film through holes 51 corresponding to and connected to each guard ring 3 are formed on the second insulating film 5, and an angle between the inner wall of each second insulating film through hole 51 and the upper end surface of the substrate 1 is an acute angle; 103) depositing metal on the second insulating film 5 and the second insulating film through hole 51 to form a metal layer 6, etching the metal layer 6 to expose the second insulating film 5, wherein the upper end surface of the metal layer 6 in the second insulating film through hole 51 is lower than the upper end surface of the second insulating film 5; 104) a first passivation layer 7 is deposited on the second insulating film 5 and the metal layer 6; 105) A second passivation layer 8 is deposited on the first passivation layer 7 to obtain a semiconductor device having a termination region and a passivation layer.

[0057] The patterning and etching steps of the second insulating film 5 of the present invention are the most critical steps to achieve the desired structure. The size and etching angle of the second insulating film through hole 51 determine how much metal is retained above the P ring. Metal deposition and etching are completed without any pattern, simplifying the steps.

[0058] In order to retain the amount of metal in the through hole, the thickness of the metal deposition needs to be greater than the height of the second insulating film through hole 51 to ensure that the second insulating film through hole 51 is completely filled. The metal deposition method requires a suitable material with strong surface adhesion to provide sufficient protective coating on the contour. Chemical vapor deposition (CVD) can be used, or cycling between less conformal deposition (sputtering) and etching can be performed to make the coating uniform.

[0059] The second insulating film 5, the first passivation layer 7, and the second passivation layer 8 of the present invention are all prepared by a PECVD deposition process.

[0060] Embodiment 2 like Fig. 9 , Fig.10 , Fig.11 , Fig.12 , Fig.13 and 14As shown, a semiconductor device with a termination region and a passivation layer provided in this embodiment includes a substrate 1, the substrate 1 includes an upper end face and a lower end face, the upper end face of the substrate 1 is provided with a drift region 2 of a first conductivity type; a first insulating film 4 is provided on the upper end face of the substrate 1; a plurality of guard rings 3 of a second conductivity type are also provided on the upper end face of the substrate 1, each guard ring 3 extends deep into the drift region 2, two adjacent guard rings 3 are separated by the first insulating film 4, and the upper end face of each guard ring 3 is lower than the upper end face of the first insulating film 4; an additional insulating film 9 is provided on the first insulating film 4 and the guard rings 3; a silicon nitride layer 10 is provided on the additional insulating film 9; a second insulating film 5 is provided on the silicon nitride layer 10; a groove is provided on each guard ring 3; a second insulating film 5 located above the guard ring is provided with a second insulating film 5 connected to the silicon nitride layer 10 in a one-to-one correspondence The protective ring 3 is provided with a silicon nitride layer through hole connected to the additional insulating film 9, and the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate 1 is 30° or 70-80°; the additional insulating film 9 located above the protective ring 3 is provided with an additional insulating film through hole connected to the groove, and the second insulating film through hole 51, the silicon nitride layer through hole, the additional insulating film through hole and the groove are coaxially arranged; metal tungsten 11 is inserted in the additional insulating film through hole and the groove; a metal layer 6 is provided in the silicon nitride layer through hole and the second insulating film through hole 51, and the upper end surface of the metal layer 6 is lower than the upper end surface of the second insulating film 5; a first passivation layer 7 is provided on the second insulating film 5, and a second passivation layer 8 is provided on the first passivation layer 7.

[0061] The present invention proposes a semiconductor device with a termination area and a passivation layer, wherein each guard ring 3 is separated by a first insulating film 4, an additional insulating film 9 and a thinner silicon nitride layer 10 are deposited on the first insulating film 4, and a thicker second insulating film is deposited on the silicon nitride layer 10; the second insulating film through hole 51, the silicon nitride layer through hole, the additional insulating film through hole and the groove are coaxially arranged; metal tungsten 11 is inserted in the additional insulating film through hole and the groove; a metal layer 6 is arranged in the silicon nitride layer through hole and the second insulating film through hole 51, and the cross-section of the second insulating film through hole 51 is inverted trapezoidal, and at the same time, the upper end surface of the metal layer 6 is lower than the upper end surface of the second insulating film 5, and the metal layer no longer protrudes. After the first passivation layer is deposited, the first passivation layer 7 is flatter, has no sharp angles, and does not crack, providing very stable moisture-proof and chemical corrosion resistance. The first passivation layer 7 has very small mechanical stress, and generates weak electrical coupling with the metal layer 6. The second passivation layer 8 can prevent mechanical damage and solid particle pollution.

[0062] The additional insulating film 9 and the thinner silicon nitride layer 10 are not strictly required at the terminal, but are strictly required for the active electrode, gate and emitter of the IGBT. The additional insulating film 9 and the thinner silicon nitride layer 10 can be retained at the terminal to save photolithography steps and masks. The silicon nitride layer 10 can be deposited at the lower end of the second insulating film 5 as an etching stop layer.

[0063] Since the present invention has an additional insulating film 9, it is necessary to select a harder metal tungsten 11 to be inserted into the additional insulating film 9 and in contact with the guard ring 3. The metal tungsten 11 forms a very strong contact with silicon, and the metal tungsten has strong chemical inertness.

[0064] The acute angle of the present invention is 30° or 70-80°; the thickness of the metal layer 6 is 1-8 μm, and the thickness of the second insulating film is greater than the thickness of the metal layer.

[0065] The second insulating film 5 of the present invention is made of phosphosilicate glass.

[0066] The material of the additional insulating film 9 of the present invention is borophosphosilicate glass.

[0067] Each protective ring 3 of the present invention has one or more grooves on its upper end surface.

[0068] The first insulating film 4 of the present invention is made of silicon dioxide; The first passivation layer is made of silicon-rich nitride (SiNx); The second passivation layer is made of polymer; The metal layer is made of Al, AlCu or AlSiCu; The polymer is polyimide.

[0069] The present invention also provides a method for preparing a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps: 201) performing oxidation treatment on the substrate 1, performing thermal growth to form a first insulating film 4, etching the first insulating film 4 to form a first etching groove connected to the substrate 1, implanting boron ions into the first etching groove, forming a guard ring 3 on the substrate 1, wherein the upper end surface of each guard ring 3 is lower than the upper end surface of the first insulating film 4, and a groove is provided on each guard ring 3; 202) depositing an additional insulating film 9 on the first insulating film 4 and the guard ring 3; 203) depositing a silicon nitride layer 10 on the additional insulating film 9; 204) A second insulating film 5 is deposited on the silicon nitride layer 10; 205) The second insulating film 5 is patterned and etched to form second insulating film through holes 51 which are connected to the silicon nitride layer 10 in a one-to-one correspondence on the second insulating film 5 above the guard ring 3, and the inner wall of each second insulating film through hole 51 is an acute angle with the upper end surface of the substrate 1; 206) etching the silicon nitride layer 10 below the second insulating film through hole 51 to form a silicon nitride layer through hole connected to the additional insulating film 9, wherein the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate 1 is the same as the angle between the inner wall of the second insulating film through hole 51 and the upper end surface of the substrate 1; 207) etching the additional insulating film 9 from the through hole of the silicon nitride layer to form an additional insulating film through hole connected to the trench; 208) inserting metal tungsten 11 into the additional insulating film through-holes and trenches; 209) depositing metal on the second insulating film 5 and the second insulating film through hole 51 to form a metal layer 6, etching the metal layer 6 to expose the second insulating film 5, wherein the upper end surface of the metal layer 6 in the second insulating film through hole 51 is lower than the upper end surface of the second insulating film 5; 210) A first passivation layer 7 is deposited on the second insulating film 5 and the metal layer 6; 211) A second passivation layer 8 is deposited on the first passivation layer 7 to obtain a semiconductor device having a termination region and a passivation layer.

[0070] In this embodiment, the second insulating film 5 , the first passivation layer 7 , and the second passivation layer 8 are all prepared by a PECVD deposition process.

[0071] Embodiment 3 The present invention also provides a semiconductor device with a termination region and a passivation layer, comprising a substrate 1, the substrate 1 comprising an upper end face and a lower end face, the upper end face of the substrate 1 being provided with a drift region 2 of a first conductivity type; a first insulating film 4 being provided on the upper end face of the substrate 1; a plurality of guard rings 3 of a second conductivity type being further provided on the upper end face of the substrate 1, each guard ring 3 being extended deep into the drift region 2, two adjacent guard rings 3 being separated by the first insulating film 4, the upper end face of each guard ring 3 being lower than the upper end face of the first insulating film 4; an additional insulating film 9 being provided on the first insulating film 4 and the guard ring 3; a groove being provided on each guard ring 3; and a An additional insulating film through hole connected to the groove; metal tungsten 11 is inserted in the additional insulating film through hole and the groove; a silicon nitride layer 10 is provided on the additional insulating film 9 and the additional insulating film through hole; a second insulating film 5 is provided on the silicon nitride layer 10; a second insulating film through hole 51 connected to the silicon nitride layer 10 in a one-to-one correspondence is provided on the second insulating film 5 located above the guard ring 3, and the angle between the inner wall of the second insulating film through hole 51 and the upper end face of the substrate 1 is an acute angle; a first passivation layer 7 is provided on the second insulating film 5 and the second insulating film through hole 51, and the lower end face of the first passivation layer 7 is lower than the lower end face of the second insulating film 5; a second passivation layer 8 is provided on the first passivation layer 7.

[0072] Compared with the first and second embodiments, this embodiment removes the easily corroded metal layer, which is usually the weak point of the terminal in terms of humidity robustness. Metal tungsten 11 is connected to the guard ring 3, and the first passivation layer 7 is connected to the metal tungsten 11. The lower end surface of the first passivation layer 7 is lower than the lower end surface of the second insulating film 5, and the high electric field is better shielded. In addition, compared with the use of Al, AlCu or AlSiCu, such as forming a plug, metal tungsten has higher hardness and better inertness, and can form a very good ohmic contact with silicon.

[0073] Aluminum-based metal is used as the top metal because it needs to be soft enough to withstand mechanical stress without damaging the chip, but the metal itself is not ideal due to many reasons such as chemical reactivity and limited thermal stability. Compared with aluminum-based metal, tungsten is a better choice for contact with silicon.

[0074] The acute angle of the present embodiment is 30° or 70-80°; the thickness of the metal layer 6 is 1-8 μm, and the thickness of the second insulating film 5 is greater than the thickness of the metal layer 6 .

[0075] The second insulating film 5 of this embodiment is made of phosphosilicate glass.

[0076] The material of the additional insulating film 9 in this embodiment is borophosphosilicate glass.

[0077] In this embodiment, each protective ring 3 has one or more grooves on its upper end surface.

[0078] The first insulating film 4 of this embodiment is made of silicon dioxide; The first passivation layer is made of silicon-rich nitride (SiNx); The second passivation layer is made of polyimide; The metal is Al, AlCu or AlSiCu.

[0079] This embodiment further provides a semiconductor device having a termination region and a passivation layer based on any one of the above, comprising the following steps: 301) performing oxidation treatment on the substrate 1, performing thermal growth to form a first insulating film 4, etching the first insulating film 4 to form a first etching groove connected to the substrate 1, implanting boron ions into the first etching groove, forming a guard ring 3 on the substrate 1, wherein the upper end surface of each guard ring 3 is lower than the upper end surface of the first insulating film 4, and a groove is provided on each guard ring 3; 302) depositing an additional insulating film 9 on the first insulating film 4 and the guard ring 3; 303) etching the additional insulating film 9 so that an additional insulating film through hole communicating with the trench is formed on the additional insulating film 9 above the guard ring 3; 304) inserting metal tungsten 11 into the additional insulating film through-holes and trenches; 305) depositing a silicon nitride layer 10 on the additional insulating film 9; 306) A second insulating film 5 is deposited on the silicon nitride layer 10; 307) etching a second insulating film through hole 51 which is in one-to-one correspondence with the silicon nitride layer 10 on the second insulating film 5 located above the guard ring 3, wherein the included angle between the inner wall of the second insulating film through hole 51 and the upper end surface of the substrate 1 is an acute angle; 308) depositing a first passivation layer 7 on the second insulating film 5, 309) A second passivation layer 8 is provided on the first passivation layer 7, and the upper end surface of the second passivation layer 8 is planarized to obtain a semiconductor device having a termination region and a passivation layer.

[0080] The second insulating film 5, the first passivation layer 7 and the second passivation layer 8 of the present invention are all prepared by a PECVD deposition process.

[0081] Embodiment 4 This embodiment is a further improvement on the basis of the third embodiment.

[0082] The only difference from the third embodiment is that a conductive polysilicon layer 12 is further provided between the additional insulating film 9 and the guard ring 3 .

[0083] like Fig.16 As shown, before depositing the additional insulating film 9, a conductive polysilicon layer 12 is deposited on the first insulating film 4 and the guard ring 3, and then etched to expose part of the guard ring 3, and then the additional insulating film 9 is deposited; The additional insulating film 9 is etched so that an additional insulating film through hole communicating with the trench or an additional insulating film through hole penetrating the deposited additional insulating film 9 is formed on the additional insulating film 9 above the guard ring 3 .

[0084] In this embodiment, the metal is replaced by the conductive polysilicon layer 12. The conductive polysilicon layer 12 is very stable chemically and is not as thick as the metal layer. It can keep the field smooth and remove corrosive elements from the terminal.

[0085] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor device having a termination region and a passivation layer, characterized in that: include A substrate (1), the substrate (1) comprising an upper end surface and a lower end surface, the upper end surface of the substrate (1) being provided with a drift region (2) of a first conductivity type; A first insulating film (4) is provided on the upper end surface of the substrate (1); a plurality of second conductive type guard rings (3) are also provided on the upper end surface of the substrate (1), each guard ring (3) extends deep into the drift region (2), two adjacent guard rings (3) are separated by the first insulating film (4), and the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4); A second insulating film (5) is provided on the first insulating film (4) and the protective ring (3); the second insulating film (5) is provided with second insulating film through holes (51) which are connected to the protective rings (3) in a one-to-one correspondence; the inner wall of each second insulating film through hole (51) forms an acute angle with the upper end surface of the substrate (1); A metal layer (6) is provided in each second insulating film through hole (51), and an upper end surface of the metal layer (6) located in the second insulating film through hole (51) is lower than an upper end surface of the second insulating film (5); A first passivation layer (7) is provided on the second insulating film (5) and the metal layer (6); A second passivation layer (8) is provided on the first passivation layer (7).

2. The semiconductor device having a termination region and a passivation layer according to claim 1, characterized in that: The acute angle is 30° or 70-80°; the thickness of the metal layer (6) is 1-8 μm, and the thickness of the second insulating film (5) is greater than the thickness of the metal layer (6).

3. The semiconductor device having a termination region and a passivation layer according to claim 1, characterized in that: The second insulating film (5) is made of phosphosilicate glass.

4. The semiconductor device having a termination region and a passivation layer according to claim 1, characterized in that: The first insulating film (4) is made of silicon dioxide; The first passivation layer (7) is made of silicon-rich nitride (SiNx); The second passivation layer (8) is made of polymer; The metal layer (6) is made of Al, AlCu or AlSiC; The substrate (1) is a silicon wafer.

5. The semiconductor device having a termination region and a passivation layer according to claim 4, characterized in that: The polymer is polyimide.

6. A method for preparing a semiconductor device having a termination region and a passivation layer according to any one of claims 1 to 5, characterized in that: The steps include: The substrate (1) is subjected to oxidation treatment and thermal growth to form a first insulating film (4), the first insulating film (4) is etched to form a first etching groove connected to the substrate (1), boron ions are implanted into the first etching groove, and protective rings (3) are formed on the substrate (1), wherein the upper end surface of each protective ring (3) is lower than the upper end surface of the first insulating film (4); A second insulating film (5) is deposited on the first insulating film (4) and the protective ring (3), and the second insulating film (5) is patterned and etched to form second insulating film through holes (51) in one-to-one correspondence with each protective ring (3) on the second insulating film (5), wherein the inner wall of each second insulating film through hole (51) forms an acute angle with the upper end surface of the substrate (1); Depositing metal on the second insulating film (5) and the second insulating film through hole (51) to form a metal layer (6), etching the metal layer (6) to expose the second insulating film (5), wherein the upper end surface of the metal layer (6) located in the second insulating film through hole (51) is lower than the upper end surface of the second insulating film (5); A first passivation layer (7) is deposited on the second insulating film (5) and the metal layer (6); A second passivation layer (8) is deposited on the first passivation layer (7) to obtain a semiconductor device having a termination region and a passivation layer.

7. The method for preparing a semiconductor device having a termination region and a passivation layer according to claim 6, characterized in that: The second insulating film (5), the first passivation layer (7), and the second passivation layer (8) are all prepared by adopting a PECVD deposition process.

8. A semiconductor device having a termination region and a passivation layer, characterized in that: include A substrate (1), the substrate (1) comprising an upper end surface and a lower end surface, the upper end surface of the substrate (1) being provided with a drift region (2) of a first conductivity type; A first insulating film (4) is provided on the upper end surface of the substrate (1); a plurality of second conductive type guard rings (3) are also provided on the upper end surface of the substrate (1), each guard ring (3) extends deep into the drift region (2), two adjacent guard rings (3) are separated by the first insulating film (4), and the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4); An additional insulating film (9) is provided on the first insulating film (4) and the protective ring (3); A silicon nitride layer (10) is provided on the additional insulating film (9); A second insulating film (5) is provided on the silicon nitride layer (10); Each protective ring (3) is provided with a groove; The second insulating film (5) located above the protection ring is provided with second insulating film through holes (51) which are connected to the silicon nitride layer (10) in a one-to-one correspondence, and the included angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle; The silicon nitride layer (10) located above the protective ring is provided with a silicon nitride layer through hole connected to the additional insulating film (9), and the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate (1) is 30° or 70-80°; An additional insulating film through hole connected to the groove is provided on the additional insulating film (9) located above the protection ring (3), and the second insulating film through hole (51), the silicon nitride layer through hole, the additional insulating film through hole and the groove are coaxially arranged; Metal tungsten (11) is inserted into the additional insulating film through-holes and the grooves; A metal layer (6) is provided in the silicon nitride layer through hole and the second insulating film through hole (51), and the upper end surface of the metal layer (6) is lower than the upper end surface of the second insulating film (5); A first passivation layer (7) is provided on the second insulating film (5). A second passivation layer (8) is provided on the first passivation layer (7).

9. The semiconductor device having a termination region and a passivation layer according to claim 8, characterized in that: The acute angle is 30° or 70-80°; the thickness of the metal layer (6) is 1-8 μm, and the thickness of the second insulating film (5) is greater than the thickness of the metal layer (6).

10. The semiconductor device having a termination region and a passivation layer according to claim 8, characterized in that: The second insulating film (5) is made of phosphosilicate glass.

11. The semiconductor device having a termination region and a passivation layer according to claim 8, characterized in that: The material of the additional insulating film (9) is borophosphosilicate glass.

12. The semiconductor device having a termination region and a passivation layer according to claim 8, characterized in that: Each protective ring (3) has one or more grooves on its upper end surface.

13. The semiconductor device having a termination region and a passivation layer according to claim 8, characterized in that: The first insulating film (4) is made of silicon dioxide; The first passivation layer (7) is made of silicon-rich nitride (SiNx); The second passivation layer (8) is made of polymer; The metal layer is made of Al, AlCu or AlSiCu; The polymer is polyimide.

14. A method for preparing a semiconductor device having a termination region and a passivation layer according to any one of claims 8 to 13, characterized in that: The steps include: The substrate (1) is subjected to oxidation treatment and thermal growth to form a first insulating film (4); the first insulating film (4) is etched to form a first etching groove connected to the substrate (1); boron ions are implanted into the first etching groove to form a protection ring (3) on the substrate (1); the upper end surface of each protection ring (3) is lower than the upper end surface of the first insulating film (4); and a groove is provided on each protection ring (3); Depositing an additional insulating film (9) on the first insulating film (4) and the guard ring (3); Depositing a silicon nitride layer (10) on the additional insulating film (9); A second insulating film (5) is deposited on the silicon nitride layer (10); The second insulating film (5) is patterned and etched to form second insulating film through holes (51) on the second insulating film (5) above the protection ring (3) that are connected to the silicon nitride layer (10) in a one-to-one correspondence, wherein the inner wall of each second insulating film through hole (51) forms an acute angle with the upper end surface of the substrate (1); The silicon nitride layer (10) below the second insulating film through hole (51) is etched to form a silicon nitride layer through hole connected to the additional insulating film (9), wherein the angle between the inner wall of the silicon nitride layer through hole and the upper end surface of the substrate (1) is the same as the angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1); Etching the additional insulating film (9) from within the silicon nitride layer through hole to form an additional insulating film through hole connected to the trench; Inserting metal tungsten (11) into the additional insulating film through-hole and the groove; Depositing metal on the second insulating film (5) and the second insulating film through hole (51) to form a metal layer (6), etching the metal layer (6) to expose the second insulating film (5), wherein the upper end surface of the metal layer (6) located in the second insulating film through hole (51) is lower than the upper end surface of the second insulating film (5); A first passivation layer (7) is deposited on the second insulating film (5) and the metal layer (6); A second passivation layer (8) is deposited on the first passivation layer (7) to obtain a semiconductor device having a termination region and a passivation layer.

15. The preparation method according to claim 14, characterized in that: The second insulating film (5), the first passivation layer (7), and the second passivation layer (8) are all prepared by adopting a PECVD deposition process.

16. A semiconductor device having a termination region and a passivation layer, characterized in that: include A substrate (1), the substrate (1) comprising an upper end surface and a lower end surface, the upper end surface of the substrate (1) being provided with a drift region (2) of a first conductivity type; A first insulating film (4) is provided on the upper end surface of the substrate (1); a plurality of second conductive type guard rings (3) are also provided on the upper end surface of the substrate (1), each guard ring (3) extends deep into the drift region (2), two adjacent guard rings (3) are separated by the first insulating film (4), and the upper end surface of each guard ring (3) is lower than the upper end surface of the first insulating film (4); An additional insulating film (9) is provided on the first insulating film (4) and the protective ring (3); Each protective ring (3) is provided with a groove; An additional insulating film through hole communicating with the groove is provided on the additional insulating film (9) located above the protection ring (3); Metal tungsten (11) is inserted into the additional insulating film through-holes and the grooves; A silicon nitride layer (10) is provided on the additional insulating film (9) and the additional insulating film through hole; A second insulating film (5) is provided on the silicon nitride layer (10); A second insulating film through hole (51) which is connected to the silicon nitride layer (10) in a one-to-one correspondence is provided on the second insulating film (5) located above the protection ring (3); the included angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle; A first passivation layer (7) is provided on the second insulating film (5) and the second insulating film through hole (51), and a lower end surface of the first passivation layer (7) is lower than a lower end surface of the second insulating film (5); A second passivation layer (8) is provided on the first passivation layer (7).

17. The semiconductor device having a termination region and a passivation layer according to claim 16, characterized in that: A conductive polysilicon layer (12) is also provided between the additional insulating film (9) and the protection ring (3).

18. The semiconductor device having a termination region and a passivation layer according to claim 16, characterized in that: The acute angle is 30° or 70-80°; the thickness of the metal layer (6) is 1-8 μm, and the thickness of the second insulating film (5) is greater than the thickness of the metal layer (6).

19. The semiconductor device having a termination region and a passivation layer according to claim 16, characterized in that: The second insulating film (5) is made of phosphosilicate glass.

20. The semiconductor device having a termination region and a passivation layer according to claim 16, characterized in that: The material of the additional insulating film (9) is borophosphosilicate glass.

21. The semiconductor device having a termination region and a passivation layer according to claim 16, characterized in that: Each protective ring (3) has one or more grooves on its upper end surface.

22. The semiconductor device having a termination region and a passivation layer according to claim 16, characterized in that: The first insulating film (4) is made of silicon dioxide; The first passivation layer (7) is made of silicon-rich nitride (SiNx); The second passivation layer (8) is made of polyimide; The metal is Al, AlCu or AlSiCu.

23. A method for preparing a semiconductor device having a termination region and a passivation layer according to any one of claims 16 to 21, characterized in that: The steps include: The substrate (1) is subjected to oxidation treatment and thermal growth to form a first insulating film (4); the first insulating film (4) is etched to form a first etching groove connected to the substrate (1); boron ions are implanted into the first etching groove to form a protection ring (3) on the substrate (1); the upper end surface of each protection ring (3) is lower than the upper end surface of the first insulating film (4); and a groove is provided on each protection ring (3); Depositing an additional insulating film (9) on the first insulating film (4) and the guard ring (3); Etching the additional insulating film (9) so that an additional insulating film through hole communicating with the trench is formed on the additional insulating film (9) located above the protection ring (3); Inserting metal tungsten (11) into the additional insulating film through-hole and the groove; Depositing a silicon nitride layer (10) on the additional insulating film (9); A second insulating film (5) is deposited on the silicon nitride layer (10); Etching second insulating film through holes (51) which are in one-to-one correspondence with the silicon nitride layer (10) on the second insulating film (5) located above the protection ring (3), wherein the included angle between the inner wall of the second insulating film through hole (51) and the upper end surface of the substrate (1) is an acute angle; depositing a first passivation layer (7) on the second insulating film (5), A second passivation layer (8) is provided on the first passivation layer (7), and the upper end surface of the second passivation layer (8) is planarized to obtain a semiconductor device having a terminal region and a passivation layer.

24. The preparation method according to claim 23, characterized in that: The second insulating film (5), the first passivation layer (7), and the second passivation layer (8) are all prepared by adopting a PECVD deposition process.

25. The preparation method according to claim 23, characterized in that: Before depositing the additional insulating film (9), a conductive polysilicon layer (12) is deposited on the first insulating film (4) and the guard ring (3), and etching is performed to expose a portion of the guard ring (3), and then the additional insulating film (9) is deposited; The additional insulating film (9) is etched so that an additional insulating film through hole connected to the groove or an additional insulating film through hole penetrating the deposited additional insulating film (9) is formed on the additional insulating film (9) located above the protection ring (3).

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