Resistance-type temperature sensor, testing method, measuring method and power switch system

By adopting relevant dual sampling technology in resistive temperature sensors, the impact of offset voltage and noise voltage of ADC is removed, and the problem of inaccurate measurement results in the prior art is solved, and higher measurement accuracy is achieved.

CN119880182AActive Publication Date: 2025-04-25WUHAN INVERNESS ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411955175.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-27
Publication Date
2025-04-25
Estimated Expiration
2044-12-27

AI Technical Summary

Technical Problem

When measuring the existing resistive temperature sensor, the offset voltage and noise voltage of the ADC have a great impact, resulting in inaccurate measurement results.

Method used

Using relevant dual sampling technology, during the measurement stage, the output voltage of the Wheatstone resistor bridge is sampled together with the offset voltage and noise voltage of the ADC. By subtracting the two quantization results, the impact of the offset voltage and noise voltage of the ADC is removed.

Benefits of technology

It effectively suppresses the impact of the offset voltage and noise voltage of the ADC, and improves the accuracy of the measurement results.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a resistance-type temperature sensor, a test method, a measurement method and a power switch system. The resistance-type temperature sensor comprises a Wheatstone resistance bridge; the driving stage circuit comprises a first driving circuit and a second driving circuit; the two excitation terminals are respectively connected with the Wheatstone resistance bridge; a first input end and a second input end of the analog-to-digital converter are respectively connected with two output voltage ends of the Wheatstone resistance bridge, and an output end of the analog-to-digital converter is used as an output end of the temperature sensor; the output end of the driving controller is respectively connected with the first driving circuit and the second driving circuit, and is also connected with the analog-to-digital converter; one sampling period sequentially comprises two measurement stages, the first driving circuit is enabled in the first measurement stage, and the second driving circuit is enabled in the second measurement stage; and the analog-to-digital converter is used for sequentially executing the working time sequence of the analog-to-digital converter in a sampling period, respectively quantizing the two measurement results, and subtracting the two quantized results to obtain an output result. According to the technical scheme, correlated double sampling is adopted, and the precision of a measurement result is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of temperature sensors, and in particular to a resistive temperature sensor and a testing method, a measuring method, and a power switch system. Background Art

[0002] In recent years, with the gradual miniaturization and intelligence of electronic devices and the localization of chips, intelligent power switch chips with high stability, small size, low manufacturing cost and easy driving are widely used in automotive electronics, aerospace, consumer electronics and military electronics. In the above fields, chips often work under conditions such as wide operating temperature range and high current, so temperature detection of chips is indispensable. For temperature sensors used for temperature detection, accuracy, power consumption, area and resolution are important indicators in design.

[0003] There are three main types of temperature sensors: 1. BJT-based temperature sensors use a Δ VBE To reflect the temperature change; Second, the temperature sensor based on MOS tube uses V which is negatively correlated with temperature in the subthreshold working state. GS To reflect the change of temperature; 3. The temperature sensor based on thermistor uses the resistance value that is positively / negatively correlated with the temperature to reflect the change of temperature. The existing BJT-based temperature sensor has high temperature detection accuracy, but in order to make the BJT work in the forward amplification area, the BJT-based temperature sensor usually requires a power supply voltage greater than 1V, which is not applicable in low-power scenarios; in addition, the temperature sensitivity of the BJT-based temperature sensor is low and it is sensitive to noise and bias voltage. The existing MOS tube-based temperature sensor has good temperature characteristics, but the leakage current of the MOS tube is large in the high temperature area, which will seriously affect the temperature measurement accuracy and is not applicable in high temperature scenarios. The temperature coefficient of the existing thermistor-based temperature sensor is basically a constant and has high efficiency; considering the low power consumption requirements of the high-side power switch chip and the operating temperature range of -40℃ to 150℃, a resistive temperature sensor can be selected.

[0004] Although resistive temperature sensors have many advantages in terms of resolution and power consumption, in the temperature sensing module of traditional resistive temperature sensors, the offset voltage and noise voltage of the ADC will be sampled by the ADC together with the output signal of the resistor module, and the output result will be greatly affected by noise and is not accurate enough. Summary of the invention

[0005] The present invention provides a resistive temperature sensor and a power switch system to solve the problem that the output result in the prior art has a large noise influence and is not accurate enough.

[0006] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0007] According to a first aspect of the present invention, there is provided a resistive temperature sensor, comprising:

[0008] Wheatstone resistor bridge;

[0009] The driving stage circuit comprises: a first driving circuit and a second driving circuit; the output end of the first driving circuit is connected to an excitation voltage end of the Wheatstone resistance bridge, and the output end of the second driving circuit is connected to another excitation voltage end of the Wheatstone resistance bridge;

[0010] An analog-to-digital converter, wherein a first input terminal of the analog-to-digital converter is connected to an output voltage terminal of the Wheatstone resistance bridge, a second input terminal of the analog-to-digital converter is connected to another output voltage terminal of the Wheatstone resistance bridge, and an output terminal of the analog-to-digital converter serves as an output terminal of the resistive temperature sensor;

[0011] A drive controller, one input end of which is connected to a drive control signal, and an output end of which is respectively connected to an input end of the first drive circuit and an input end of the second drive circuit; and the controller is also connected to the analog-to-digital converter;

[0012] Among them, one sampling cycle includes two measurement phases in sequence: a first measurement phase and a second measurement phase. The drive controller is used to control the enabling of the first drive circuit and the second drive circuit according to the drive control signal, and is specifically used to control the first drive circuit to be enabled once in the first measurement phase and to control the second drive circuit to be enabled once in the second measurement phase within one sampling cycle; the analog-to-digital converter is used to receive the drive control signal and control its working timing according to the drive control signal, and is specifically used to execute its working timing in sequence within one sampling cycle, and quantize the output voltage of the Wheatstone resistance bridge when the first drive circuit is enabled and the output voltage of the Wheatstone resistance bridge when the second drive circuit is enabled, and subtract the two quantization results to obtain the output result.

[0013] Optionally, the enabling duration of the first driving circuit is shorter than the duration of the first measurement phase, and the enabling duration of the second driving circuit is shorter than the duration of the second measurement phase.

[0014] Optionally, the nominal values ​​of the four bridge arm resistors are equal;

[0015] The temperature coefficients of the resistors of two adjacent bridge arms in the Wheatstone resistance bridge have opposite polarities and equal absolute values.

[0016] Optionally, the enabling duration of the first driving circuit and the second driving circuit is proportional to the nominal value of the bridge arm resistance.

[0017] Optionally, the analog-to-digital converter is a successive approximation analog-to-digital converter, which includes: a comparator, a successive approximation controller, and a digital-to-analog quantization capacitor module;

[0018] An input terminal of the comparator is used as a first input terminal of the analog-to-digital converter and is connected to an output voltage terminal of the Wheatstone resistor bridge through a time-controlled switch;

[0019] The other input end of the comparator is used as the second input end of the analog-to-digital converter, connected to the other output voltage end of the Wheatstone resistor bridge through a time-controlled switch, and the output end of the comparator is connected to an input end of the successive approximation controller;

[0020] The drive controller is further used to control the on and off of the time-controlled switch according to the drive control signal, specifically to control the time-controlled switch to be turned on during the sampling phase of the working sequence, and to control the time-controlled switch to be turned off during the reset phase and the conversion phase of the working sequence;

[0021] The digital-analog quantization capacitor module includes: a first quantization capacitor unit and a second quantization capacitor unit; the upper plate of the first quantization capacitor unit is connected to an input end of the comparator, and the lower plate of the first quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch; the upper plate of the second quantization capacitor unit is connected to the other input end of the comparator, and the lower plate of the second quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch;

[0022] An output end of the successive approximation controller serves as an output end of the resistive temperature sensor; the successive approximation controller is also connected to the drive controller.

[0023] Optionally, the working sequence of the analog-to-digital converter is: sampling phase-reset phase-conversion phase;

[0024] During the working sequence of the analog-to-digital converter, the successive approximation controller is used to:

[0025] In the sampling phase, when the offset error is positive, the quantization capacitor unit connected to the high-level input end of the comparator is set to the offset error calibration code; when the offset error is negative, the quantization capacitor unit connected to the low-level input end of the comparator is set to the offset error calibration code;

[0026] In the reset phase, the first quantization capacitor unit and the second quantization capacitor unit are set to zero code;

[0027] In the conversion phase, the quantization capacitor unit connected to the high-level input terminal of the comparator is set to zero code, and the quantization capacitor unit connected to the low-level input terminal of the comparator is set to a successive approximation code;

[0028] Among them, the low-level input end of the comparator refers to the input end of the comparator connected to the low-level output voltage end of the Wheatstone resistor bridge; the high-level input end of the comparator refers to the input end of the comparator connected to the high-level output voltage end of the Wheatstone resistor bridge.

[0029] Optionally, the analog-to-digital converter further includes: a gain error calibration module, which includes: a first gain error calibration capacitor unit and a second gain error calibration capacitor unit;

[0030] One end of the first gain error calibration capacitor unit is connected to an input end of the comparator, and the other end is grounded;

[0031] One end of the second gain error calibration capacitor unit is connected to the other input end of the comparator, and the other end is grounded.

[0032] Optionally, the first gain error calibration capacitor unit and the second error gain calibration capacitor unit respectively include multi-bit programmable gain error calibration capacitors, which are used to fine-tune the capacitance values ​​of the first gain error calibration capacitor unit and the second gain error calibration capacitor unit based on the test results when testing the resistive temperature sensor.

[0033] Optionally, the analog-to-digital converter further includes: a nonlinear error calibration module, which includes: a first nonlinear error capacitance calibration unit and a second nonlinear error capacitance calibration unit;

[0034] One end of the first nonlinear error capacitance calibration unit is connected to an input end of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch;

[0035] One end of the second nonlinear error capacitance calibration unit is connected to the other input end of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch;

[0036] During the working sequence of the analog-to-digital converter:

[0037] For a nonlinear error capacitance calibration unit connected to the low level input terminal of the comparator, the approximation converter is used to control it to be set to zero code;

[0038] For the nonlinear error capacitor calibration unit connected to the high-level input terminal of the comparator, the successive approximation controller is used to control it according to the working timing: in the sampling phase, the nonlinear error capacitor calibration unit is set to the nonlinear error calibration code; in the reset phase and the conversion phase, the nonlinear error capacitor calibration unit is set to the zero code.

[0039] Optionally, the nonlinear error calibration code is obtained by the following method:

[0040] The relationship curve between the nonlinear error and the temperature is a parabola, and the curves on both sides of the vertex of the parabola are divided into two sections respectively;

[0041] Starting from the lowest temperature, the four curves are respectively calculated using f(x)=ax, f(x)=ax-b, To fit, we get the values ​​of a and b; where x represents temperature and f(x) represents nonlinear error;

[0042] The a and b values ​​are converted into nonlinear error calibration codes.

[0043] Optionally, it also includes: a power gate switch, which is connected between the drive controller and its power supply terminal and is used to cut off the connection between the drive controller and its power supply terminal after the sampling period ends.

[0044] According to a second aspect of the present invention, there is provided a method for testing a resistive temperature sensor, which is a method for testing the resistive temperature sensor described above;

[0045] The method includes:

[0046] The test is performed with the lowest temperature in the fitting as the test temperature, specifically including: the offset error code is not added, the test is performed using the resistive temperature sensor, the obtained measured temperature is compared with the test temperature, if the measured temperature is greater than the test temperature, it is judged that the offset error is positive, if the measured temperature is less than the test temperature, it is judged that the offset error is negative; based on the positive or negative of the offset error, the offset error code is added to the corresponding quantization capacitor unit, and according to the deviation between the measured temperature and the test temperature, the offset error code is adjusted so that the measured temperature is closest to the test temperature;

[0047] After testing with the lowest temperature in the fitting as the test temperature, testing with the highest temperature in the fitting as the test temperature, testing the resistive temperature sensor, and determining whether there is a deviation between the measured temperature and the test temperature, if not, proceeding to the next step, and if yes, adjusting the value of the gain error calibration module so that the measured temperature is closest to the test temperature;

[0048] After testing with the highest temperature in the fitting as the test temperature, any value between the lowest temperature and the highest temperature in the fitting is used as the test temperature, and it is determined in which segment of the four-segment fitting the test temperature is, so as to determine whether -b should be added to the nonlinear error calibration code, and then the resistive temperature sensor is tested based on this to determine whether there is a deviation between the measured temperature and the test temperature. If not, the test ends. If yes, the code corresponding to a in the nonlinear error calibration code is adjusted so that the measured temperature is closest to the test temperature.

[0049] According to a third aspect of the present invention, there is provided a temperature measurement method, which is a method for measuring using the above-mentioned resistance temperature sensor;

[0050] The method includes:

[0051] The nonlinear error calibration module is controlled not to work, and the resistive temperature sensor is used to measure the temperature to obtain an estimated temperature;

[0052] Determine which of the four simulation segments the estimated temperature is in, so as to determine whether -b should be added to the nonlinear error calibration code;

[0053] Based on the determined nonlinear error calibration code, the resistance temperature sensor is used to perform temperature measurement to obtain a measured temperature.

[0054] According to a fourth aspect of the present invention, there is provided a power switch system, comprising: a power switch chip and a resistive temperature sensor as described in any one of the above items;

[0055] The resistive temperature sensor is used to detect the operating temperature of the power switch chip.

[0056] The resistive temperature sensor and power switch system provided by the present invention adopt the correlated double sampling technology. In the measurement stage, the output voltage of the Wheatstone resistance bridge is sampled by the ADC together with the offset voltage and noise voltage of the analog-to-digital converter ADC. Since the interval between two measurements is short, it can be considered that the offset voltage and noise voltage of the ADC have not changed. Therefore, the offset voltage and noise voltage of the ADC are removed by subtracting the two quantization results, that is, the influence of the offset voltage and noise voltage of the ADC is suppressed, and the accuracy of the measurement result is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0058] Figure 1 is a schematic diagram of a resistance temperature sensor according to an embodiment of the present invention;

[0059] Figure 2 A schematic diagram of the working timing of a resistance temperature sensor according to an embodiment of the present invention;

[0060] Figure 3 is a schematic diagram of a bidirectional power switch according to an embodiment of the present invention;

[0061] Figure 4-Figure 5 For the present invention Figure 2 The working principle diagram of the digital-to-analog converter under the working timing;

[0062] Figure 6 A schematic diagram of the working timing of a resistance temperature sensor according to another embodiment of the present invention;

[0063] Figure 7 is a schematic diagram of a resistance temperature sensor according to another embodiment of the present invention;

[0064] Figure 8 A schematic diagram of a resistance temperature sensor according to another embodiment of the present invention;

[0065] Fig. 9 A schematic diagram showing the relationship between nonlinear error and temperature according to another embodiment of the present invention;

[0066] Figure 10-11 A working principle diagram of a nonlinear error calibration module according to another embodiment of the present invention;

[0067] Fig.12 FIG. 4 is a schematic diagram of a resistance temperature sensor according to another embodiment of the present invention. DETAILED DESCRIPTION

[0068] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0069] In the description of the specification of the present invention, it is necessary to understand that the orientation or position relationship indicated by the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc. is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0070] In the description of the present specification, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0071] In the description of the present invention, "plurality" means a plurality, such as two, three, four, etc., unless otherwise clearly and specifically defined.

[0072] In the description of the present invention, unless otherwise clearly specified and limited, the term "connection" and other terms should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0073] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0074] In one embodiment, a resistive temperature sensor is provided. Figure 1 , which includes: a Wheatstone resistor bridge, a power gate switch, an analog-to-digital converter and a drive controller.

[0075] The driving stage circuit includes: a first driving circuit and a second driving circuit. The output end of the first driving circuit is connected to an excitation voltage end of a Wheatstone resistor bridge. + The output terminal of the second driving circuit is connected to the other excitation voltage terminal of the Wheatstone resistance bridge, V — .

[0076] The first driving circuit and the second driving circuit are respectively composed of an inverter and a CMOS inverter connected in sequence. The CMOS inverter is composed of a PMOS tube and an NMOS tube. When the input of the driving circuit is at a high level, the upper half of the corresponding CMOS inverter is turned on and the output end is connected to VDD. When the input is at a low level, the lower half is turned on and the output end is grounded.

[0077] The first input terminal of the analog-to-digital converter is connected to an output voltage terminal of the Wheatstone resistor bridge. OP The second input terminal is connected to the other output voltage terminal of the Wheatstone resistor bridge. ON; One of the output ends is used as the output end of the temperature sensor, D[8,0] in the figure.

[0078] The input end of the drive controller is connected to the drive control signal, and the output end thereof is respectively connected to the input end of the first drive circuit and the input end of the second drive circuit; the drive controller is also connected to the analog-to-digital converter to realize the mutual transmission of the drive signal between the two.

[0079] Among them, one sampling period includes two measurement phases: the first measurement phase and the second measurement phase. Please refer to Figure 2 The drive controller is used to control the enabling of the first drive circuit and the second drive circuit according to the drive control signal, specifically to: within a sampling period, control the first drive circuit to be enabled once in the first measurement phase, and control the second drive circuit to be enabled once in the second measurement phase, that is, to achieve correlated double sampling.

[0080] As an implementation method, the drive control signal may include: a direction signal DIR and a clock signal CLK. In one sampling period, the direction signal switches between positive and negative once, and one direction of the direction signal includes one clock pulse. Please continue to refer to Figure 2 In different directions of the direction signal, the clock signal CLK1 of the first driving circuit and the clock signal CLK2 of the second driving circuit are generated based on the clock signal. The first driving circuit is controlled to be enabled once when DIR is at a high level as shown in the figure. At this time, V + =VDD, V _ = GND, generating a signal V out1 Based on the clock signal CLK2, the second driving circuit is controlled to be enabled once when DIR is at a low level as shown in the figure. At this time, V _ =VDD, V + = GND, generating a signal -V out1 .

[0081] In different embodiments, the driving circuit may also be composed of multiple stages of inverters.

[0082] The analog-to-digital converter is used to receive the CLK1 signal and the CLK2 signal of the driving controller, and to control the working timing of the controller according to the driving control signal. Specifically, it is used to: execute its working timing in sequence within a sampling period, and quantize the output voltage enabled by the first driving circuit and the output voltage enabled by the second driving circuit, that is, quantize the double sampling data respectively, and obtain two quantization results D out1 , D out2 , subtract the two quantization results to get the output result.

[0083] The working sequence of the analog-to-digital converter is as follows: in the first measurement phase, when the CLK1 signal changes from high to low, the analog-to-digital converter changes from the sampling phase to the subsequent phase. Figure 2 In the figure, it first turns to the reset stage (implemented by the Reset signal in the figure), and then turns to the conversion stage (implemented by the Conv signal in the figure).

[0084] The drive controller also receives the drive signal of the digital-to-analog converter, and its CLK1 and CLK2 signals are also constrained by the drive signal of the analog-to-digital converter (such as conv). For example, the start of CLK2 in the second measurement phase is also controlled by the conv signal, that is, the sampling of the second measurement phase starts after the analog-to-digital converter has completed the conversion of the data sampled in the first measurement phase.

[0085] The resistive temperature sensor provided in the above embodiment adopts the correlated double sampling technology. In the measurement stage, the output voltage of the Wheatstone resistor bridge is sampled by the ADC together with the offset voltage and noise voltage of the analog-to-digital converter ADC. Since the interval between the two measurements is short, it can be considered that the offset voltage and noise voltage of the ADC have not changed. Therefore, the offset voltage and noise voltage of the ADC are removed by subtracting the two quantization results, that is, the influence of the offset voltage and noise voltage of the ADC is suppressed, and the output result obtained is more accurate.

[0086] In one embodiment, please continue to refer to Figure 2 , in one direction of the direction signal DIR, the pulse width of the clock signal CLK is smaller than the width of the direction signal, and the ADC is reset and converted during the remaining time of the direction signal, that is, the input of the first drive circuit and the second drive circuit is at a high level except when enabled, and the rest of the time is at a low level, at this time V+=V-=0V. Therefore, the Wheatstone resistor bridge only works when the first drive circuit and the second drive circuit are enabled, and does not work at other times, which significantly reduces the power consumption of the system. In the prior art, V+ is generally directly connected to VDD, and V- is directly connected to the ground, and the resistor is always working, resulting in relatively large static losses.

[0087] The following is a brief introduction to the principle of the Wheatstone resistance bridge. N1 / 2 , R P1 / 2 The nominal values ​​of the four bridge arm resistors are R1 to R4, and the first-order temperature coefficients are α1 and α2, respectively. Then the output voltage expression of the resistance bridge is shown in formula (1):

[0088]

[0089] In order to facilitate the quantization of the analog-to-digital converter, in one embodiment, the nominal values ​​of the four bridge arm resistors are set to be the same, that is, R1=R2=R3=R4=R, and the temperature coefficients of adjacent bridge arm resistors are opposite and have the same absolute value, that is, α1=-α2; then formula (1) can be simplified to:

[0090] 2 out =V OP -V ON =α2·ΔT·(V + -V - ) (2)

[0091] It can be seen that the output voltage has a linear relationship with the temperature change, which is convenient for the analog-to-digital converter to quantify.

[0092] In practical applications, in order to make the nominal values ​​of the four bridge arm resistors as equal as possible, the four bridge arm resistors can be set as adjustable resistors, and the nominal values ​​can be made equal through fine-tuning.

[0093] In one embodiment, the enabling duration of the first driving circuit and the second driving circuit is proportional to R, that is, t on =k·R, then the energy loss expression of the resistance bridge in a single measurement phase can be simplified as shown in formula (3):

[0094]

[0095] The first term is the energy consumed by the resistors in the resistance bridge, and the second term is the energy supplied to C p Energy consumed by charging, C p Refers to parasitic capacitance, please refer to Figure 1 , which does not actually exist. From formula (3), it can be seen that when the enabling duration of the driving circuit is proportional to R, the energy consumed by the resistance bridge is independent of R. Therefore, when selecting the resistor, a small resistance can be selected, which not only reduces the occupied area, but also reduces parasitics, further reducing the system power consumption. In the existing resistive sensors, the system power consumption is related to the resistance value of the temperature-sensing resistor. In order to reduce the system power consumption, a temperature-sensing resistor with a larger resistance value is usually required, but it also means that a larger area is required, and the power consumption and area need to be compromised.

[0096] In one embodiment, the analog-to-digital converter adopts a successive approximation analog-to-digital converter, which specifically includes: a comparator, a successive approximation controller (SAR controller), a digital-to-analog quantization capacitor module C DAC One input terminal of the comparator is used as the first input terminal of the analog-to-digital converter and is connected to an output voltage terminal V of the Wheatstone resistor bridge through a time-controlled switch M5. OP The other input terminal of the comparator is used as the second input terminal of the analog-to-digital converter, and is connected to the other output voltage terminal V of the Wheatstone resistor bridge through the time-controlled switch M6. ON The output end of the comparator is connected to an input end of the SAR controller.

[0097] The drive controller is also used to control the on and off of the timing switch according to the clock signal. Specifically, it is used to control the timing switch to be turned on and receive the output voltage of the Wheatstone resistor bridge during the sampling stage of the working timing, and to control the timing switch to be turned off and cut off the connection with the Wheatstone resistor bridge during the reset and conversion stage of the working timing.

[0098] The connection between the analog-to-digital converter and the drive controller is achieved by connecting the SAR controller to the drive controller.

[0099] Due to the use of correlated double sampling technology, the digital-to-analog (DAC) quantized capacitance module C DAC It consists of two parts: the first quantized capacitor unit C DAC1 , the second quantized capacitance unit C DAC2 The first quantized capacitance unit C DAC1 The upper plate is connected to an input terminal of the comparator, and the first quantization capacitor unit C DAC1 The lower plate of is connected to the SAR controller via a bidirectional power switch BPS. The second quantized capacitor unit C DAC2 The upper plate is connected to the other input terminal of the comparator, and the second quantization capacitor unit C DAC2 The lower plate is connected to the SAR controller through a bidirectional power switch BPS. Figure 3 , one end of the bidirectional power switch is the power supply VDD, and the other end is the ground GND. SAR control realizes the logarithmic analog quantization capacitor module C by controlling the bidirectional power switch. DAC When the setting code given by SAR is 1, the corresponding bidirectional power switch is connected to the power supply. When the setting code given by SAR is 0, the corresponding bidirectional power switch is grounded.

[0100] In this embodiment, at each analog-to-digital conversion stage, the analog-to-digital quantization capacitor module C connected to the end with the low output voltage of the Wheatstone resistor bridge is used. DAC Perform operations such as Figure 1 When the first drive circuit is enabled, V OP >V ON , then for V ON The second quantized capacitor unit C DAC2 Performing a digital-to-analog conversion operation, the first quantized capacitor unit C DAC1 No digital-to-analog conversion operation is performed, that is, it is set to zero code D zero , please refer to Figure 2 When the second drive circuit is enabled, V ON >V OP , then for V OP The first quantized capacitor unit C connected DAC1 Performing digital-to-analog conversion, the second quantized capacitor unit C DAC2 No digital-to-analog conversion operation is performed, that is, the bit is set to zero code D zero .

[0101] The first quantized capacitance unit C DAC1 , the second quantized capacitance unit C DAC2 They respectively include multiple-bit quantization capacitors connected in parallel, such as 9 bits. The higher the bit number, the more accurate the quantization. The multiple-bit quantization capacitors are connected to the SAR controller through the BPS.

[0102] In practical applications, resistors are sensitive to mismatch and process angle deviation, and the actual output voltage of the resistor bridge is not as ideal as in the expression. Considering the relative error of the bridge arm resistors R1 to R4 is e1 to e4, ignoring the high-order terms, the expression of the output voltage is as shown in equation (4):

[0103]

[0104] Among them, off whb is the offset error, which is a constant term, and its expression is shown in formula (5); Gainerr whb is the gain error, which is a first-order function of temperature and its expression is shown in equation (6):

[0105]

[0106] In addition, for the above assumption that the nominal values ​​of the four bridge arm resistors are equal, and the temperature coefficients of adjacent bridge arm resistors are opposite and the absolute values ​​are the same, in practical applications, by fine-tuning the bridge arm resistors of the Wheatstone resistor bridge, it is easy to make the nominal values ​​of the four resistors equal, but the relationship α1=-α2 is difficult to satisfy. Simplifying equation (1) can obtain equation (8):

[0107]

[0108] If (α2+α1)ΔT<<2, equation (8) can be further simplified to equation (9):

[0109]

[0110] It can be concluded from the above formula that the second-order distortion caused by the temperature coefficient is the main source of nonlinear error.

[0111] In summary, the main errors of the resistor bridge are: offset error, gain error, and nonlinear error. The above errors can be compensated by adjusting the ADC. The compensation of these three errors is described below in conjunction with specific embodiments.

[0112] In one embodiment, the offset error is calibrated by changing the working timing of the ADC. Figure 4-Figure 5 , Figure 4 This is the working principle diagram of the sampling stage. Figure 5This is a working principle diagram of the reset phase.

[0113] The traditional ADC working sequence is sample-convert-reset, except for the DAC control code DAC in the conversion stage. ctrl The corresponding code D SAR , the remaining stages are reset to zero code D zero In this embodiment, the ADC operation sequence is modified to sample-reset-convert. Here, when there is a negative offset (i.e., the offset error is negative), CLK1 rises to a high level, and V OP >V ON For example, please refer to Figure 4 , the upper part of the sampling phase C DAC DAC ctrl1 Set to zero code D zero , at this time, the upper plate voltage is V OP , the lower plate is GND (ground voltage); the lower part C DAC DAC ctrl2 Set to offset calibration code D off , at this time, the upper plate voltage is V ON , the lower plate is V off (The voltage corresponding to the offset calibration code). Please refer to Figure 5 , the DAC of the upper and lower capacitors during the reset phase ctrl All are set to zero code D zero However, since the ADC input terminal is floating at this time, the lower part C DAC The lower plate voltage becomes V ON -V off The lower half of the capacitors in the conversion phase undergo analog-to-digital conversion to generate D[8:0]. At this time, the analog voltage corresponding to the digital output is V OP -V ON +V off The operation of CLK2 rising to a high level is similar to the operation of CLK1 rising to a high level, except that the upper and lower half operations are reversed.

[0114] If there is a positive offset (i.e. the offset error is positive), please refer to Figure 6 , CLK1 rises to high level, and V OP >V ON When the sampling phase is in the upper half, C DAC DAC ctrl1 Set to offset calibration code D off , lower half C DAC DAC ctrl2 Set to zero code D zero , reset and conversion phases for upper and lower DACs ctrl The setting is the same as that of negative offset. At this time, the analog voltage corresponding to the digital output is V OP-V ON -V off The operation of CLK2 rising to a high level is similar to the operation of CLK1 rising to a high level, except that the upper and lower half operations are reversed.

[0115] The offset error calibration scheme of the above embodiment can be within ±2 N-1 Correction is achieved within the LSB range.

[0116] For the finished temperature sensor, whether its offset error is positive or negative has been determined, and it can be known whether its offset error is positive or negative through testing during the test phase. Specifically, the lowest temperature T0 of the temperature measurement range of the temperature sensor is used as the test temperature. It is generally believed that the gain error and nonlinear error at this time are zero. Then the deviation between the measured temperature and the test temperature T0 obtained at this time is caused by the offset error. If the measured temperature is lower than the test temperature T0, it can be known that its offset error is negative. If the measured temperature is higher than the test temperature T0, it can be known that its offset error is positive. The deviation between the measured temperature and the test temperature is achieved by adding the offset calibration code Doff.

[0117] In another embodiment, please refer to Figure 7 , by adding a gain error calibration module C to the ADC g To achieve the gain error calibration, one end is connected to the comparator and the other end is grounded. g Under the effect of , the gain expression of ADC is shown in formula (7):

[0118]

[0119] Based on the estimation of the gain change of the front end (resistance bridge), the corresponding size of C can be selected. g .

[0120] Due to the use of double sampling technology, the gain error calibration module consists of two parts: the first gain error calibration capacitor unit C g1 , the second gain error calibration capacitor unit C g2 The first gain error calibration capacitor unit C g1 One end of the second gain error calibration capacitor unit C is connected to an input end of the comparator, and the other end is grounded; g2 One end is connected to the other input of the comparator and the other end is grounded.

[0121] In another embodiment, please refer to Figure 8 , the nonlinear error calibration module CAUX is added to the ADC to achieve the calibration of the nonlinear error. One end of CAUX is connected to the comparator, and the other end is connected to the SAR controller through a bidirectional power switch (BPS). Its working principle is: please refer to Figure 2SAR controller controls it according to the working sequence, such as Figure 2 The NLctrl shown is its control signal: in the sampling phase, NLctrl is set to the nonlinear error calibration code DNL; in the reset phase and the conversion phase, NLctrl is set to the zero code Dzero. Since the ADC input terminal is floating at this time, the input voltage of the comparator becomes Vin-V NL , where V NL It is the analog voltage corresponding to the digital nonlinear calibration code DNL, ​​thereby realizing the calibration of the nonlinear error.

[0122] Due to the use of dual correlation technology, the nonlinear error calibration module in this embodiment includes two parts: a first nonlinear error capacitance calibration unit C AUX1 , the second nonlinear error capacitance calibration unit C AUX2 The first nonlinear error capacitance calibration unit C AUX1 One end of the second nonlinear error capacitance calibration unit C is connected to an input end of the comparator, and the other end is connected to the SAR controller through a bidirectional power switch; AUX2 One end is connected to the other input end of the comparator, and the other end is connected to the SAR controller through a bidirectional power switch.

[0123] Referring to the description in the above embodiment, in each digital-to-analog conversion stage, the ADC modules connected to the low-level input terminal of the comparator work, while the nonlinear error capacitor calibration unit is opposite to the ADC, and acts on the side connected to the high-level input terminal of the comparator, that is, the nonlinear error capacitor calibration unit on the side that does not perform digital-to-analog conversion is controlled in the above manner, and the nonlinear error capacitor calibration unit on the side that performs digital-to-analog conversion is set to zero code D. zero .

[0124] In the above embodiment, the nonlinear error calibration code D NL It can be obtained in the following ways:

[0125] From formula (9), it can be concluded that the relationship curve between nonlinear error and temperature is a second-order function, that is, a parabola. The relationship between nonlinear error and temperature can be fitted by a piecewise linear function. Specifically, the curves on both sides of the vertex of the parabola are divided into two segments. Please refer to Fig. 9 , that is, it is divided into four sections, namely (T0, T1], (T1, T2], (T2, T′1], (T′1, T′0].

[0126] Starting from the lowest temperature T0, the four curves are respectively calculated using f(x)=ax, f(x)=ax-b, To fit, as shown in formula (8), get the values ​​of a and b; where x represents temperature and f(x) represents nonlinear error;

[0127]

[0128] After obtaining the a and b values, they are converted into nonlinear error calibration codes using the capacitor array. For details, please refer to Fig.10 , four capacitor arrays can be used to represent ax, and one capacitor can be used to represent -b. In different embodiments, ax can also be represented by one capacitor, but the more capacitor digits there are, the higher the accuracy.

[0129] It can be set that the ADC output code D[8:0] is at the intermediate level at the intermediate temperature T2, and the change temperature of the most significant bit D[8] is also T2. In this way, the ADC output code needs to be judged in the following way: first determine whether D[8] is equal to zero. If so, D[X] = D[X]; if not,

[0130] In actual measurement, it is necessary to determine whether the nonlinear error calibration code needs to be introduced into -b. The nonlinear error calibration can be not introduced first, that is, the nonlinear error calibration module is controlled not to work. At this time, an estimated temperature can be obtained, and then the estimated temperature can be determined in which of the above four sections to determine whether -b needs to be introduced. After the nonlinear error calibration code is determined, the final temperature is measured using the calibrated temperature sensor.

[0131] Here, CLK1 rises to a high level, V OP >V ON Take for example the introduction of nonlinear error. Fig.10 , the upper part of the sampling phase C AUX NL ctrl1 is set to the nonlinear error calibration code D NL , at this time, the upper plate voltage is V OP , the lower plate is V off (voltage corresponding to the nonlinear error calibration code); the lower part C AUX NL ctrl12 Set to zero code D zero , at this time, the upper plate voltage is V ON , the lower plate is GND (ground voltage). Please refer to Fig.11 , NL of the upper and lower capacitors during the reset phase ctrl All are set to zero code D zero However, since the ADC input terminal is floating at this time, the upper part C DAC The lower plate voltage becomes V OP -V NL The lower half of the capacitors in the conversion phase undergo analog-to-digital conversion to generate D[8:0]. At this time, the analog voltage corresponding to the digital output is V OP -VON -V NL .

[0132] It should be understood that the calibration of three errors is described separately in the above embodiment. In one implementation, it may include only the calibration of one error, or the calibration of any two errors, or the calibration of all three errors.

[0133] The error calibration capacitor values ​​and error calibration codes given above are all in the design stage. However, during the manufacturing process, due to the influence of manufacturing tolerances, the parameters of each component may change slightly, and the resulting errors may also change slightly. Therefore, after the manufacturing is completed, the temperature sensor can also be tested to fine-tune its error calibration capacitor value and error calibration code.

[0134] In one embodiment, for a circuit including all three error calibrations, the following method may be used for testing:

[0135] In the test range, three test temperature points T0, T2, and T0' are selected from small to large. Among them, T0 is the lowest temperature point and T0' is the highest temperature point. The nonlinear error at these two points is zero. Please refer to Figure 8 .

[0136] Specifically, at the test temperature T0, the gain error and the nonlinear error are zero. If the measured temperature obtained by the test at this time deviates from the test temperature T0, it is caused by the offset error. The sign of the offset error can be determined first, and based on this, the offset error code can be determined to which part to add, and then the value of the offset error code can be adjusted. Specifically, it includes: first, without adding the offset error code, the resistive temperature sensor is used for testing, and the measured temperature obtained is compared with the test temperature. If the measured temperature is greater than the test temperature, it is judged that the offset error is positive, and if the measured temperature is less than the test temperature, it is judged that the offset error is negative; then, based on the positive or negative of the offset error, the offset error code is added to the upper half / lower half of the capacitor array, and the offset error code D is adjusted according to the deviation between the measured temperature and the test temperature. off Adjust the offset error code to make the measured temperature closest to the test temperature. DAC Including multi-bit capacitors, the number of corresponding capacitor bottom plates connected to VDD can be changed by adjusting the offset error code, that is, the multi-bit capacitor array is reintegrated to further compensate for the offset error so that the measured temperature is closest to the test temperature.

[0137] After the T0 test is completed, the T0′ test is performed. At this time, since the nonlinear error is zero and the offset error calibration code has been determined at T0, if the actual test temperature measured at this time deviates from the test temperature T0′, it is caused by the gain error. At this time, the value of the gain error calibration module can be fine-tuned. The gain error calibration module includes a multi-bit programmable capacitor, which can adjust the capacitor connection and non-connection, and then fine-tune C g The value of is used to further compensate the gain error so that the measured temperature is closest to the test temperature.

[0138] After the T0′ test is completed, the third test temperature test is performed, and any value T between T0 and T0′ can be selected. n At this time, since the offset error calibration and gain error calibration have been determined at T0 and T0′, if the actual test temperature measured at this time is different from the test temperature T n The deviation is caused by nonlinear error. First, we need to determine T n Which of the above four sections it belongs to determines whether to introduce -b, and then fine-tune the nonlinear error calibration code based on this, C AUX The capacitors corresponding to ax include multiple ones, and the number of lower plates of the capacitors corresponding to ax connected to VDD can be changed by adjusting the nonlinear error calibration code, thereby further compensating for the nonlinear error, so that the measured temperature is closest to the test temperature.

[0139] In one embodiment, a power gate switch is further provided between the driving controller and its power supply. The power gate switch is a controllable switch and can be implemented by using MOS, such as Fig.12 M PG When the temperature sensor is not working, M PG When the device is shut down, VDD drops to ground level and the system enters standby mode, which can further save system power consumption.

[0140] In one embodiment, a method for measuring using the temperature sensors calibrated with the three errors is also provided. Specifically, the temperature sensors tested above can be used. The method includes:

[0141] The control nonlinear error calibration module does not work, and the temperature is measured by using a resistance temperature sensor to obtain an estimated temperature;

[0142] After the estimated temperature is obtained, it is determined which of the four simulation segments the estimated temperature is in, so as to determine whether -b should be added to the nonlinear error calibration code, thereby obtaining a determined nonlinear error calibration code;

[0143] Based on the determined nonlinear error calibration code, a resistance temperature sensor is used to measure the temperature to obtain a measured temperature.

[0144] In the description of this specification, the description with reference to the terms "an implementation", "an example", "a specific implementation process", "an example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0145] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A resistance temperature sensor, characterized in that: include: Wheatstone resistor bridge; The driving stage circuit comprises: a first driving circuit and a second driving circuit; the output end of the first driving circuit is connected to an excitation voltage end of the Wheatstone resistance bridge, and the output end of the second driving circuit is connected to another excitation voltage end of the Wheatstone resistance bridge; An analog-to-digital converter, wherein a first input terminal of the analog-to-digital converter is connected to an output voltage terminal of the Wheatstone resistance bridge, a second input terminal of the analog-to-digital converter is connected to another output voltage terminal of the Wheatstone resistance bridge, and an output terminal of the analog-to-digital converter serves as an output terminal of the resistive temperature sensor; A drive controller, one input end of which is connected to a drive control signal, and an output end of which is respectively connected to an input end of the first drive circuit and an input end of the second drive circuit; and the controller is also connected to the analog-to-digital converter; Among them, one sampling cycle includes two measurement phases in sequence: a first measurement phase and a second measurement phase. The drive controller is used to control the enabling of the first drive circuit and the second drive circuit according to the drive control signal, and is specifically used to control the first drive circuit to be enabled once in the first measurement phase and to control the second drive circuit to be enabled once in the second measurement phase within one sampling cycle; the analog-to-digital converter is used to receive the drive control signal and control its working timing according to the drive control signal, and is specifically used to execute its working timing in sequence within one sampling cycle, and quantize the output voltage of the Wheatstone resistance bridge when the first drive circuit is enabled and the output voltage of the Wheatstone resistance bridge when the second drive circuit is enabled, and subtract the two quantization results to obtain the output result.

2. The resistance temperature sensor according to claim 1, characterized in that: The first driving circuit is enabled for a duration shorter than a duration of the first measurement phase, and the second driving circuit is enabled for a duration shorter than a duration of the second measurement phase.

3. The resistance temperature sensor according to claim 1, characterized in that: The nominal values ​​of the four bridge arm resistors are equal; The temperature coefficients of the resistors of two adjacent bridge arms in the Wheatstone resistance bridge have opposite polarities and equal absolute values.

4. The resistance temperature sensor according to claim 3, characterized in that: The enabling duration of the first driving circuit and the second driving circuit is proportional to the nominal value of the bridge arm resistance.

5. The resistance temperature sensor according to any one of claims 1 to 4, characterized in that: The analog-to-digital converter is a successive approximation analog-to-digital converter, which includes: a comparator, a successive approximation controller, and a digital-to-analog quantization capacitor module; An input terminal of the comparator is used as a first input terminal of the analog-to-digital converter and is connected to an output voltage terminal of the Wheatstone resistor bridge through a time-controlled switch; The other input end of the comparator is used as the second input end of the analog-to-digital converter, connected to the other output voltage end of the Wheatstone resistor bridge through a time-controlled switch, and the output end of the comparator is connected to an input end of the successive approximation controller; The drive controller is further used to control the on and off of the time-controlled switch according to the drive control signal, specifically to control the time-controlled switch to be turned on during the sampling phase of the working sequence, and to control the time-controlled switch to be turned off during the reset phase and the conversion phase of the working sequence; The digital-analog quantization capacitor module includes: a first quantization capacitor unit and a second quantization capacitor unit; the upper plate of the first quantization capacitor unit is connected to an input end of the comparator, and the lower plate of the first quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch; the upper plate of the second quantization capacitor unit is connected to the other input end of the comparator, and the lower plate of the second quantization capacitor unit is connected to the successive approximation controller through a bidirectional power switch; An output end of the successive approximation controller serves as an output end of the resistive temperature sensor; the successive approximation controller is also connected to the drive controller.

6. The resistance temperature sensor according to claim 5, characterized in that: The working sequence of the analog-to-digital converter is: sampling phase - resetting phase - conversion phase; During the working sequence of the analog-to-digital converter, the successive approximation controller is used to: In the sampling phase, when the offset error is positive, the quantization capacitor unit connected to the high-level input end of the comparator is set to the offset error calibration code; when the offset error is negative, the quantization capacitor unit connected to the low-level input end of the comparator is set to the offset error calibration code; In the reset phase, the first quantization capacitor unit and the second quantization capacitor unit are set to zero code; In the conversion phase, the quantization capacitor unit connected to the high-level input terminal of the comparator is set to zero code, and the quantization capacitor unit connected to the low-level input terminal of the comparator is set to a successive approximation code; Among them, the low-level input end of the comparator refers to the input end of the comparator connected to the low-level output voltage end of the Wheatstone resistor bridge; the high-level input end of the comparator refers to the input end of the comparator connected to the high-level output voltage end of the Wheatstone resistor bridge.

7. The resistance temperature sensor according to claim 6, characterized in that: The analog-to-digital converter further comprises: a gain error calibration module, which comprises: a first gain error calibration capacitor unit and a second gain error calibration capacitor unit; One end of the first gain error calibration capacitor unit is connected to an input end of the comparator, and the other end is grounded; One end of the second gain error calibration capacitor unit is connected to the other input end of the comparator, and the other end is grounded.

8. The resistance temperature sensor according to claim 7, characterized in that: The first gain error calibration capacitor unit and the second error gain calibration capacitor unit respectively include multi-bit programmable gain error calibration capacitors, which are used to fine-tune the capacitance values ​​of the first gain error calibration capacitor unit and the second gain error calibration capacitor unit based on the test results when testing the resistive temperature sensor.

9. The resistance temperature sensor according to claim 7, characterized in that: The analog-to-digital converter further comprises: a nonlinear error calibration module, which comprises: a first nonlinear error capacitance calibration unit and a second nonlinear error capacitance calibration unit; One end of the first nonlinear error capacitance calibration unit is connected to an input end of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch; One end of the second nonlinear error capacitance calibration unit is connected to the other input end of the comparator, and the other end is connected to the successive approximation controller through a bidirectional power switch; During the working sequence of the analog-to-digital converter: For a nonlinear error capacitance calibration unit connected to the low level input terminal of the comparator, the approximation converter is used to control it to be set to zero code; For the nonlinear error capacitor calibration unit connected to the high-level input terminal of the comparator, the successive approximation controller is used to control it according to the working timing: in the sampling phase, the nonlinear error capacitor calibration unit is set to the nonlinear error calibration code; in the reset phase and the conversion phase, the nonlinear error capacitor calibration unit is set to the zero code.

10. The resistance temperature sensor according to claim 9, characterized in that: The nonlinear error calibration code is obtained by the following method: The relationship curve between the nonlinear error and the temperature is a parabola, and the curves on both sides of the vertex of the parabola are divided into two sections respectively; Starting from the lowest temperature, the four curves are respectively calculated using f(x)=ax, f(x)=ax-b, To fit, we get the values ​​of a and b; where x represents temperature and f(x) represents nonlinear error; The a and b values ​​are converted into nonlinear error calibration codes.

11. The resistance temperature sensor according to any one of claims 4 to 10, characterized in that: Also includes: A power gate switch is connected between the drive controller and its power supply terminal, and is used to cut off the connection between the drive controller and its power supply terminal after the sampling period ends.

12. A method for testing a resistance temperature sensor, characterized in that: It is a test performed on the resistive temperature sensor as claimed in claim 10; The method includes: The test is performed with the lowest temperature in the fitting as the test temperature, specifically including: the offset error code is not added, the test is performed using the resistive temperature sensor, the obtained measured temperature is compared with the test temperature, if the measured temperature is greater than the test temperature, it is judged that the offset error is positive, if the measured temperature is less than the test temperature, it is judged that the offset error is negative; based on the positive or negative of the offset error, the offset error code is added to the corresponding quantization capacitor unit, and according to the deviation between the measured temperature and the test temperature, the offset error code is adjusted so that the measured temperature is closest to the test temperature; After testing with the lowest temperature in the fitting as the test temperature, testing with the highest temperature in the fitting as the test temperature, testing the resistive temperature sensor, and determining whether there is a deviation between the measured temperature and the test temperature, if not, proceeding to the next step, and if yes, adjusting the value of the gain error calibration module so that the measured temperature is closest to the test temperature; After testing with the highest temperature in the fitting as the test temperature, any value between the lowest temperature and the highest temperature in the fitting is used as the test temperature, and it is determined in which segment of the four-segment fitting the test temperature is, so as to determine whether -b should be added to the nonlinear error calibration code, and then the resistive temperature sensor is tested based on this to determine whether there is a deviation between the measured temperature and the test temperature. If not, the test ends. If yes, the code corresponding to a in the nonlinear error calibration code is adjusted so that the measured temperature is closest to the test temperature.

13. A temperature measurement method, characterized in that: It is a method for measuring using the resistive temperature sensor according to claim 10; The method includes: The nonlinear error calibration module is controlled not to work, and the resistive temperature sensor is used to measure the temperature to obtain an estimated temperature; Determine which of the four simulation segments the estimated temperature is in, so as to determine whether -b should be added to the nonlinear error calibration code; Based on the determined nonlinear error calibration code, the resistance temperature sensor is used to perform temperature measurement to obtain a measured temperature.

14. A power switch system, characterized in that: include: A power switch chip and a resistive temperature sensor as claimed in any one of claims 1 to 11; The resistive temperature sensor is used to detect the operating temperature of the power switch chip.

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