A satellite navigation and timing method and system

Abstract

The present invention discloses a satellite navigation time service method and system. The method includes performing PVT solution by using observation quantities and ephemeris information to obtain an output result; detecting the filtering state of the clock rate in the case of PVT solution failure; obtaining the filtered clock rate and using the filtered clock rate for predictive clock adjustment in the case where the detected filtering state of the clock rate is a stable state; detecting the filtering state of the clock rate in the case of successful PVT solution; if the detected filtering state of the clock rate is a stable state, then further determining whether the receiver clock error and clock rate of the PVT solution are abnormal; if the receiver clock error and clock rate of the PVT solution are abnormal, then obtaining the filtered clock rate and using the filtered clock rate for predictive clock adjustment; wherein, the predictive clock adjustment is to make the receiver time run less by the filtered clock rate multiplied by 1 second and then generate the PPS second pulse and PVT solution of the next second. This solution can greatly improve the reliability and accuracy of the receiver for time service in complex environments such as interference or occlusion.

Description

Technical Field

[0001] The present invention relates to the technical field of satellite navigation, and in particular, to a satellite navigation time service method and system. Background Art

[0002] The Global Navigation Satellite System provides services such as navigation, positioning, and time service. Nowadays, in the field of high-precision time service applications, timing navigation receivers are increasingly widely used due to their excellent cost-effective advantages. As a result, more and more application fields have put forward higher requirements for the reliability and accuracy of receiver time service:

[0003] (1) Different navigation receivers use different crystal oscillators, and there are also significant differences in their nominal frequency accuracy and frequency stability, which makes it impossible for the receivers to adopt a unified calibration method for time service;

[0004] (2) For navigation receivers operating in complex environments such as interference or occlusion, the reception of satellite signals will be severely affected, which will lead to abnormal or even failed PVT solutions of the receivers, thereby affecting the reliability and accuracy of their time service.

[0005] In reality, a large number of navigation receiver time service devices work in harsh environments such as being blocked by mountains or trees in the wild and electromagnetic interference. How to ensure and improve the reliability and accuracy of navigation receiver time service in these complex environments is a key technical point that must be solved. Summary of the Invention

[0006] To solve the technical problem of inaccurate time service caused by abnormal positioning failures or positioning jump values of navigation receivers in complex environments such as interference or occlusion, embodiments of the present invention provide a satellite navigation time service method and system, which can effectively improve the reliability of PPS second pulse output and achieve the effect of high-precision time service.

[0007] The technical solution of the embodiments of the present invention is implemented as follows:

[0008] An embodiment of the present invention provides a satellite navigation time service method, which includes: obtaining observation data and ephemeris information; performing PVT calculation using the observation data and the ephemeris information to obtain the output result of the PVT calculation; the output result includes whether the PVT calculation is successful, and the receiver clock error and clock rate when the PVT calculation is successful; in the case of PVT calculation failure, detecting the filtering state of the clock rate; in the case where the filtering state of the clock rate is detected to be a stable state, obtaining the filtered clock rate and using the filtered clock rate for predictive clock adjustment; in the case of PVT calculation success, detecting the filtering state of the clock rate; if the filtering state of the clock rate is detected to be a stable state, then further determining whether the receiver clock error and clock rate of the PVT calculation are abnormal; if the receiver clock error and clock rate of the PVT calculation are abnormal, obtaining the filtered clock rate and using the filtered clock rate for predictive clock adjustment; wherein, the predictive clock adjustment is to make the receiver time run less by the filtered clock rate multiplied by 1 second and then generate the PPS second pulse and PVT calculation for the next second.

[0009] In one embodiment, after detecting the filtering state of the clock rate in the case of PVT calculation failure, the method further includes: if the filtering state of the clock rate is detected to be an initialization state, no clock adjustment is performed and no PPS second pulse is output.

[0010] In one embodiment, after detecting the filtering state of the clock rate in the case of PVT calculation success, the method further includes: if the filtering state of the clock rate is detected to be an initialization state, real-time clock adjustment is performed using the receiver clock error and clock rate when the PVT calculation is successful, and the receiver clock rate when the PVT calculation is successful is filtered.

[0011] In one embodiment, after determining whether the receiver clock error and clock rate of the PVT calculation are abnormal, the method further includes: if the receiver clock error and clock rate of the PVT calculation are normal, real-time clock adjustment is performed using the receiver clock error and clock rate when the PVT calculation is successful, and the receiver clock rate when the PVT calculation is successful is filtered.

[0012] In one embodiment, detecting the filtering state of the clock rate includes: putting the clock rate at each successful PVT calculation into a filter for filtering; and taking the filtered clock rate as the latest filtered clock rate; when the filtering state of the clock rate is in the initialization state, when the cumulative number of filtering times exceeds a preset first threshold, it is determined that the filtering state of the clock rate is in a stable state.

[0013] In one embodiment, after using the filtered clock rate for predictive clock adjustment, the method further includes: determining whether the number of consecutive predictive clock adjustments reaches a preset second threshold; in the case where it is determined that the number of consecutive predictive clock adjustments reaches the preset second threshold, switching the filtering state of the clock rate from the stable state back to the initialization state.

[0014] In one embodiment, filtering the receiver clock rate when the PVT solution is successful includes: using mean filtering or - a filtering method to perform filtering on the receiver clock rate when the PVT solution is successful.

[0015] In one embodiment, determining whether the receiver clock error and clock rate of the PVT solution are abnormal includes: when the difference between the receiver clock rate of the PVT solution and the filtered clock rate is greater than a preset third threshold, determining that the receiver clock rate of the PVT solution is abnormal; or, when the receiver clock error of the PVT solution is greater than a preset fourth threshold, determining that the receiver clock error of the PVT solution is abnormal.

[0016] An embodiment of the present invention provides a satellite navigation timing system, including: a processor and a memory for storing a computer program that can run on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the above-mentioned method.

[0017] The embodiments of the present invention have the following beneficial effects:

[0018] (1) The embodiments of the present invention can effectively improve the availability of timing.

[0019] In traditional methods, in order to ensure the timing accuracy, the PPS second pulse is generally not output after the PVT solution fails. The embodiments of the present invention can still predict and adjust the clock to output an accurate PPS second pulse within a period of time when the PVT solution fails or the clock error and clock rate are abnormal, greatly improving the availability of timing.

[0020] (2) The embodiments of the present invention can reduce the cost of the timing receiver.

[0021] The embodiments of the present invention have relatively low requirements for the high stability of the crystal oscillator, do not require expensive ultra-high stability crystal oscillators, and can effectively reduce the cost of the timing receiver.

[0022] (3) The embodiments of the present invention can expand the application fields of the timing receiver.

[0023] The embodiments of the present invention can still exhibit good timing reliability and accuracy in complex environments such as interference or occlusion, which helps to promote the application of the timing receiver in more complex environments. Description of the Drawings

[0024] Figure 1 It is a schematic diagram of the timing scheme of a traditional navigation receiver;

[0025] Figure 2 It is a schematic flowchart of the satellite navigation timing method according to the embodiment of the present invention;

[0026] Figure 3 It is a schematic diagram of the timing scheme of the navigation receiver according to the embodiment of the present invention;

[0027] Figure 4 Schematic diagram of the clock adjustment process for the embodiments of the present invention;

[0028] Figure 5 Internal structure diagram of the computer device for the embodiments of the present invention. Specific embodiments

[0029] Before introducing the solutions of this embodiment, the following introduction is made to the relevant content in this field:

[0030] To meet the application scenarios of high-reliability and high-precision time service, the navigation receiver needs to output a high-stability and high-precision PPS second pulse. In the prior art, the following are the main satellite navigation high-precision time service methods:

[0031] (1) Improve the stability of the crystal oscillator frequency of the navigation receiver. The smaller the influence of the crystal oscillator frequency by environmental temperature and power supply voltage, the higher its stability. However, the higher the stability of the crystal oscillator, the higher its price will be, which is not conducive to cost reduction. At the same time, there are also differences between the actual frequency values and the nominal frequency values of different crystal oscillators, resulting in the need for individual calibration of each time service device, which is not conducive to large-scale application.

[0032] (2) Improve the success rate and reliability of PVT solution of the navigation receiver. The higher the reliability of PVT solution indicates that the clock error and clock rate calculated by it are closer to the true values. After adjusting the clock based on the clock error and clock rate, the PPS moment of the next second output will be more accurate. However, this solution places higher requirements on the software and hardware of the entire navigation receiver. The receiver needs to support the reception and PVT solution of satellite signals of more systems and frequency points. The more satellite signals and signal components involved in the solution, the higher the success rate and reliability of PVT solution can be improved. However, at the same time, it will also increase the hardware cost and system power consumption of the receiver, increase the time-consuming of PVT solution and the system burden, resulting in limited functional performance in other aspects of the receiver, and it is difficult for the receiver to achieve essential improvement and breakthrough. The block diagram of the traditional navigation receiver time service solution is as Figure 1 shown.

[0033] From Figure 1 it can be seen that when the PVT solution fails, there is no clock adjustment operation and the PPS is not output, resulting in reduced time service availability. If the PPS is output, there will be deviations, leading to a decrease in time service accuracy. When the PVT solution is successful but the reliability is poor, the calculated clock error or clock rate often has anomalies, and abnormal clock adjustment will occur, and the PPS output will also have deviations, resulting in a decrease in time service accuracy. It can be seen that in the traditional navigation receiver time service solution, the stable and reliable output of PPS completely depends on the success rate and reliability of PVT solution. Its time service reliability and accuracy face many challenges in complex environments such as interference or occlusion, and cannot be effectively guaranteed.

[0034] Based on this, this embodiment proposes a satellite navigation timing method, which predicts and adjusts the clock for situations such as PVT solution failure and abnormal solution, and can greatly improve the reliability and accuracy of the receiver's timing in complex environments such as interference or occlusion.

[0035] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0036] An embodiment of the present invention provides a satellite navigation timing method, as Figure 2 shown, the method includes:

[0037] Step 201: Obtain observation quantities and ephemeris information;

[0038] Step 202: Use the observation quantities and the ephemeris information to perform PVT solution to obtain the output result of the PVT solution; the output result includes whether the PVT solution is successful, and the receiver clock error and clock rate when the PVT solution is successful;

[0039] Step 203: In the case of PVT solution failure, detect the filtering state of the clock rate; in the case where the filtering state of the clock rate is detected to be a stable state, obtain the filtered clock rate, and use the filtered clock rate for predictive clock adjustment;

[0040] Step 204: In the case of successful PVT solution, detect the filtering state of the clock rate; if the filtering state of the clock rate is detected to be a stable state, then determine whether the receiver clock error and clock rate of the PVT solution are abnormal; if the receiver clock error and clock rate of the PVT solution are abnormal, obtain the filtered clock rate, and use the filtered clock rate for predictive clock adjustment; wherein, the predictive clock adjustment is to let the receiver time run less by the filtered clock rate multiplied by 1 second and then generate the PPS second pulse and PVT solution for the next second.

[0041] This embodiment provides a satellite navigation timing method with high reliability and high precision. Based on the short-term invariance characteristic of the receiver clock rate, the filtered clock rate obtained by filtering the clock rate of the PVT solution is used to determine the abnormality of the clock error and clock rate of the PVT solution. When the PVT solution fails or is determined to be abnormal, the filtered clock rate can still be used for predictive clock adjustment within a certain period of time, so as to achieve the effect of high-reliability and high-precision timing. The specific characteristics are as follows:

[0042] 1. The short-term invariance characteristic of the clock rate. The oscillator of the navigation receiver has a relatively high frequency stability (generally better than 1 ppm). In an environment where the ambient temperature and device power supply are relatively stable, it can be considered that the frequency output by the oscillator is a stable value within a certain period of time, that is, the receiver clock rate is short-term invariant.

[0043] 2. Clock speed filtering: The clock speed remains unchanged in a short period of time, but it will still change slowly with environmental temperature, power supply voltage, etc. It is necessary to filter the clock speed obtained by PVT calculation to obtain the filtered clock speed, which can better represent the true value of the clock speed in the current state.

[0044] 3. Abnormality determination: In complex environments such as interference or occlusion, when satellite signals are missing or of poor quality, the receiver is prone to PVT calculation jump values, resulting in the calculated clock offset or clock speed not meeting expectations. This situation is determined as an abnormality.

[0045] 4. Clock adjustment operation: The receiver's PVT calculation obtains the clock offset and clock speed at the current calculation time (the moment of PPS second pulse output). Based on this, the clock offset adjustment amount within the next second is calculated and the clock adjustment operation is completed. Then, the clock offset at the next second's calculation time will be near 0, and the clock speed will be basically the same as the filtered clock speed.

[0046] 5. Predictive clock adjustment: In the case of PVT calculation failure or abnormal PVT calculation determination, the filtered clock speed is used to predict the clock offset adjustment amount within the next second and complete the clock adjustment operation.

[0047] 6. Limiting the duration of predictive clock adjustment: The cumulative predictive clock adjustment error over a long time will also reduce the timing accuracy. Therefore, predictive clock adjustment cannot continue for a long time. When the number of consecutive predictive clock adjustment times reaches the set threshold, the clock speed filtering state needs to be reset.

[0048] To improve the timing reliability and accuracy of the navigation receiver, this embodiment proposes an idea of clock speed filtering + anomaly detection + predictive clock adjustment based on the short-term invariance characteristic of the clock speed: when the PVT calculation is successful and the calculated clock offset and clock speed are detected to be normal, the clock speed is filtered to obtain the filtered clock speed; when the PVT calculation fails or the calculated clock offset and clock speed are detected to be abnormal, the filtered clock speed that has been filtered is used for predictive clock adjustment, and the number of predictive clock adjustment times is limited to prevent the accumulation of prediction errors. The block diagram of the timing scheme of the navigation receiver in this embodiment is as Figure 3 shown.

[0049] 1. Data input: The input data of the method of the present invention is the output result of PVT calculation, mainly including: the status of whether the PVT calculation is successful, and the receiver clock offset and clock speed .

[0050] 2. Clock speed filtering: (1) At the beginning, the clock speed filtering is in the initialization state. At this time, as long as the PVT calculation is successful, the currently calculated clock speed is put into the filter for filtering and the filtered clock speed is updated , after the cumulative filtering times exceed the preset first threshold (such as 20 times), it is considered that the clock speed filtering enters a stable state; (2) after the clock speed filtering enters a stable state, only when the PVT solution is successful and no abnormality is determined, the currently calculated clock speed is put into the filter for continuous filtering; (3) when the clock speed filtering is in a stable state and the PVT solution fails or an abnormality is determined, predictive clock adjustment will be performed. When the continuous predictive clock adjustment times exceed the preset second threshold (such as 10 times), the clock speed filtering state will be reset to the initialization state; (4) The filter can be implemented by different methods such as mean filtering or - other filtering methods.

[0051] The crystal oscillator of the navigation receiver has a high frequency stability (generally better than 1 ppm). In a relatively stable environment such as ambient temperature and device power supply, it can be considered that the frequency output by the crystal oscillator is a stable value within a period of time , and the difference between this value and the nominal value of the crystal oscillator is the frequency difference, and the ratio of it to the nominal value is the receiver clock speed (also called clock drift), which represents the time deviation of 1 s relative to the nominal time system. It can be seen that it can be considered unchanged in a short period of time, but in the long run it is still slowly changing. Therefore, it is necessary to filter the clock speed. On the one hand, it reduces the system random error, and on the other hand, it updates following the long-term change trend. Therefore, the filtered clock speed can better represent the true value of the clock speed in the current state.

[0052] 3. Abnormality determination: When the clock speed filtering enters a stable state and the PVT solution is successful, there are two situations where the PVT solution is considered abnormal. (1) The calculated clock speed differs from the filtered clock speed by more than the preset third threshold (such as 10 ns / s); (2) The calculated clock error is greater than the preset fourth threshold (such as 30 ns).

[0053] The above point (1) is the result based on the short-term invariant characteristic of the clock speed. The following focuses on point (2).

[0054] Figure 4 is a schematic diagram of the clock adjustment process. After the clock adjustment is stable, the receiver calculates that the clock error is normally around 0. At the receiver moment, the clock error and clock speed calculated by the PVT solution are respectively and , represents the deviation value of the receiver moment (PPS second pulse output moment) relative to the large system time, represents the receiver The deviation rate of the time with respect to the large system time. Due to the clock rate existing, the time of the receiver with respect to the large system will gradually deviate. Without adjusting the clock, the clock error of the receiver at a certain moment is , then there is:

[0055]

[0056] After sorting out, we get

[0057]

[0058] Due to the clock rate being very small, generally on the order of 10e-7, so it can be written as

[0059]

[0060] The "1" in the above formula represents the time of 1 s of the large system (the large system is composed of ultra-high-stability atomic clocks, and it can be considered that the time of 1 s of the large system is the standard 1 s clock). It can be seen from the above formula that the clock error of the next second when the receiver does not adjust the clock is the sum of the current clock error and the clock error accumulated by the clock rate after 1 s. If the clock is adjusted during this period, making the receiver time go less by and then generating the PPS second pulse and PVT solution for the next second, then the calculated clock error at a certain moment will be near 0. After the receiver clock adjustment is stable, the calculated clock error will normally be near 0, thus achieving high-precision time service.

[0061] 4. Predictive clock adjustment: (1) After the clock rate filtering enters the stable state, when the PVT solution is successful and the detection and determination are normal, directly use the clock error calculated by the PVT solution and the clock rate for real-time clock adjustment; when the PVT solution fails or the detection and determination are abnormal, use the filtered clock rate for predictive clock adjustment. The predictive clock adjustment process is similar to the real-time clock adjustment process, except that there is no clock error and clock rate obtained from real-time calculation or the clock error and clock rate obtained from real-time calculation are abnormal. However, we know that the clock error at this moment is normally near 0 and the clock rate is basically the same as the filtered clock rate. Therefore the clock error at a certain moment is predicted as:

[0062]

[0063] Before the next second of the receiver arrives, adjust the clock, making the receiver time go less by and then generating the PPS second pulse and PVT solution for the next second. Within a certain period (such as 10 s), the clock error can still be guaranteed to be near 0, completing high-precision time service.

[0064] (2)Filtered clock rate There will inevitably be errors, resulting in errors in predicted clock adjustment. After long-term accumulation, the timing accuracy will be reduced. Therefore, predicted clock adjustment cannot be performed for a long time. When the number of consecutive predicted clock adjustment times exceeds the threshold (such as 10 times), the clock rate filtering state is reset to the initial state to exit the filtered clock adjustment and ensure high-precision timing effect.

[0065] 5. PPS second pulse output: When the original count value of PPS inside the receiver reaches the threshold (the clock count value corresponding to 1 second), a waveform with configured polarity and pulse width will be generated instantaneously, which is called the PPS second pulse. The essence of the clock adjustment process is to dynamically adjust this threshold in real time to make the receiver generate the PPS second pulse earlier or later, so as to achieve the purpose of high-precision timing.

[0066] The high-reliability and high-precision satellite navigation timing method proposed in this embodiment performs predicted clock adjustment for situations such as PVT solution failure and abnormal solution, greatly improving the reliability and accuracy of the receiver's timing in complex environments such as interference or occlusion.

[0067] In addition, this embodiment also conducts an experimental comparison between the method of this embodiment and the traditional method.

[0068] It is set that the navigation receiver uses Samsung six-frequency (B1I / B2I / L1CA / L2C / E1 / E5b) for PVT solution positioning and outputs a 1Hz PPS second pulse. Under different environments, it is tested for 24 hours, and indicators such as the effective rate, variance, and peak value of the PPS second pulse are statistically analyzed. The experimental result data comparing the traditional method and the method described in the present invention are shown in Table 1 below:

[0069]

[0070] PPS effective rate: The ratio of the actual number of effective second pulses output to the theoretical value. For example, if the theoretical value in 1 hour is 3600 pulses and the actual output is 3500, then the effective rate is 3500 / 3600 = 97.222%. The higher the PPS effective rate, the higher the PPS availability.

[0071] PPS variance: Statistically analyze the variance of the actual output effective second pulse data. The smaller the PPS variance, the higher the stability and reliability of PPS timing.

[0072] PPS peak value: The maximum value of the difference between the actual output effective second pulse and the statistical mean. The smaller the PPS peak value, the smaller the PPS timing jump value and the higher the accuracy.

[0073] As can be seen from Table 1 above, in the method of this embodiment, compared with the traditional method in environments such as adjacent frequency periodic burst electromagnetic interference, tree occlusion, and half-wall occlusion, the effective rate, variance, peak value and other indicators of the PPS second pulse have been significantly improved. The peak value of PPS timing is even 100% within 20 ns, and the improvement effect is very obvious.

[0074] Based on the short-term invariance characteristic of the receiver clock speed, this embodiment adopts the idea of clock speed filtering + anomaly detection + predictive clock adjustment, which can effectively improve the reliability and accuracy of the receiver's timing in complex environments such as interference or occlusion, and has high popularization value.

[0075] Its value is mainly reflected in the following aspects: (1) Effectively improve the availability of timing. In the traditional method, in order to ensure the timing accuracy, the PPS second pulse is generally not output after the PVT solution fails. The method of the present invention can still predict and adjust the clock to output an accurate PPS second pulse for a period of time when the PVT solution fails or the clock error and clock speed are abnormal, greatly improving the availability of timing. (2) Reduce the cost of the timing receiver. The method of the present invention has relatively low requirements for the high stability of the crystal oscillator and does not require expensive ultra-high stability crystal oscillators, which can effectively reduce the cost of the timing receiver. (3) Expand the application field of the timing receiver. The method of the present invention can still show good timing reliability and accuracy in complex environments such as interference or occlusion, which helps to promote the application of the timing receiver in more complex environments.

[0076] In order to implement the method of this embodiment of the present invention, this embodiment of the present invention also provides a satellite navigation timing system, including: a processor and a memory for storing a computer program that can run on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the above-mentioned method.

[0077] The above system provided by this embodiment and the above method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0078] In order to implement the method of this embodiment of the present invention, this embodiment of the present invention also provides a computer program product. The computer program product includes computer instructions, and the computer instructions are stored in a computer-readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the steps of the above-mentioned method.

[0079] Based on the hardware implementation of the above program module, and in order to implement the method of this embodiment of the present invention, this embodiment of the present invention also provides an electronic device (computer device). Specifically, in one embodiment, the computer device may be a terminal, and its internal structure diagram may be as Figure 5As shown. The computer device includes a processor A01, a network interface A02, a display screen A04, an input device A05, and a memory (not shown in the figure) connected via a system bus. Among them, the processor A01 of the computer device is used to provide computing and control capabilities. The memory of the computer device includes an internal memory A03 and a non-volatile storage medium A06. The non-volatile storage medium A06 stores an operating system B01 and a computer program B02. The internal memory A03 provides an environment for the operation of the operating system B01 and the computer program B02 in the non-volatile storage medium A06. The network interface A02 of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor A01, it implements the method of any one of the above embodiments. The display screen A04 of the computer device can be a liquid crystal display screen or an electronic ink display screen. The input device A05 of the computer device can be a touch layer covering the display screen, or a button, a trackball, or a touchpad provided on the housing of the computer device, or an external keyboard, touchpad, or mouse, etc.

[0080] Those skilled in the art can understand that Figure 5 the structure shown in is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0081] The device provided by the embodiment of the present invention includes a processor, a memory, and a program stored on the memory and executable on the processor. When the processor executes the program, it implements the method of any one of the above embodiments.

[0082] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0083] This application is described with reference to the flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processors of general-purpose computers, special-purpose computers, embedded processors, or other programmable data processing devices to generate a machine, such that the instructions executed by the processors of the computer or other programmable data processing devices produce means for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0084] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory produce a manufactured article including instruction means that implement the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0085] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operational steps are performed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0086] In a typical configuration, a computing device includes one or more processors (CPUs), an input / output interface, a network interface, and memory.

[0087] The memory may include non-permanent memory in the form of computer-readable media, random access memory (RAM), and / or non-volatile memory such as read-only memory (ROM) or flash memory (flash RAM). The memory is an example of computer-readable media.

[0088] Computer-readable media includes both permanent and non-permanent, removable and non-removable media implemented by any method or technology for information storage. The information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile discs (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transitory medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media such as modulated data signals and carrier waves.

[0089] It can be understood that the memory in the embodiments of the present invention can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM, Read-Only Memory), a programmable read-only memory (PROM, Programmable Read-Only Memory), an erasable programmable read-only memory (EPROM, Erasable Programmable Read-Only Memory), an electrically erasable programmable read-only memory (EEPROM, Electrically Erasable Programmable Read-Only Memory), a ferromagnetic random access memory (FRAM, ferromagnetic random access memory), a flash memory (Flash Memory), a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM, Compact Disc Read-Only Memory); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM, Random Access Memory), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as a static random access memory (SRAM, Static Random Access Memory), a synchronous static random access memory (SSRAM, Synchronous Static Random Access Memory), a dynamic random access memory (DRAM, Dynamic Random Access Memory), a synchronous dynamic random access memory (SDRAM, Synchronous Dynamic Random Access Memory), a double data rate synchronous dynamic random access memory (DDR SDRAM, Double Data Rate Synchronous Dynamic Random Access Memory), an enhanced synchronous dynamic random access memory (ESDRAM, Enhanced Synchronous Dynamic Random Access Memory), a sync link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and a direct rambus random access memory (DRRAM, Direct Rambus Random Access Memory).The memories described in the embodiments of the present invention are intended to include, but are not limited to, these and any other suitable types of memories.

[0090] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or apparatus comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or apparatus. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising the element.

[0091] The above are only the embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims

1. A satellite navigation and timing method, characterized in that, The method includes: Obtaining observation quantities and message information; Performing PVT solution using the observation quantities and the message information to obtain an output result of the PVT solution; the output result includes whether the PVT solution is successful, and the receiver clock offset and clock rate when the PVT solution is successful; In the case of PVT solution failure, detecting the filtering state of the clock rate; in the case where the filtering state of the clock rate is detected to be a stable state, obtaining the filtered clock rate and using the filtered clock rate for predictive clock adjustment; In the case of PVT solution success, detecting the filtering state of the clock rate; if the filtering state of the clock rate is detected to be a stable state, then further determining whether the receiver clock offset and clock rate of the PVT solution are abnormal; if the receiver clock offset and clock rate of the PVT solution are abnormal, obtaining the filtered clock rate and using the filtered clock rate for predictive clock adjustment; wherein, the predictive clock adjustment is to make the receiver time go less by the filtered clock rate multiplied by 1 second and then generate the PPS second pulse and PVT solution for the next second.

2. The satellite navigation and timing method according to claim 1, wherein In the case of PVT solution failure, after detecting the filtering state of the clock rate, the method further includes: If the filtering state of the clock rate is detected to be an initialization state, no clock adjustment is performed and no PPS second pulse is output.

3. The satellite navigation and timing method according to claim 1, wherein In the case of PVT solution success, after detecting the filtering state of the clock rate, the method further includes: If the filtering state of the clock rate is detected to be an initialization state, performing real-time clock adjustment using the receiver clock offset and clock rate when the PVT solution is successful, and filtering the receiver clock rate when the PVT solution is successful.

4. The satellite navigation and timing method according to claim 1, wherein After determining whether the receiver clock offset and clock rate of the PVT solution are abnormal, the method further includes: If the receiver clock offset and clock rate of the PVT solution are normal, performing real-time clock adjustment using the receiver clock offset and clock rate when the PVT solution is successful, and filtering the receiver clock rate when the PVT solution is successful.

5. The satellite navigation and timing method according to claim 1, characterized in that, Detecting the filtering state of the clock rate includes: Putting the clock rate at each successful PVT solution into a filter for filtering; and taking the filtered clock rate as the latest filtered clock rate; When the filtering state of the clock rate is in the initialization state, when the cumulative number of filtering times exceeds a preset first threshold, it is determined that the filtering state of the clock rate is in a stable state.

6. The satellite navigation and timing method according to claim 1, wherein After using the filtered clock rate for predictive clock adjustment, the method further includes: Determining whether the number of consecutive predictive clock adjustments reaches a preset second threshold; In the case where it is determined that the number of consecutive predictive clock adjustments reaches the preset second threshold, switching the filtering state of the clock rate from the stable state back to the initialization state.

7. The satellite navigation and timing method according to claim 1, characterized in that, Filtering the receiver clock rate when the PVT solution is successful includes: When the PVT solution is successful, the receiver clock rate is filtered using mean filtering or - filtered by filtering method.

8. The satellite navigation and timing method according to claim 1, wherein Determining whether the receiver clock offset and clock rate of the PVT solution are abnormal includes: When the difference between the receiver clock rate of the PVT solution and the filtered clock rate is greater than a preset third threshold, determining that the receiver clock rate of the PVT solution is abnormal; or, When the receiver clock offset of the PVT solution is greater than a preset fourth threshold, determining that the receiver clock offset of the PVT solution is abnormal.

9. A satellite navigation and timing system, characterized in that, Includes: A processor and a memory for storing a computer program that can run on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the method according to any one of claims 1 to 8.

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