Reference voltage generation module, power supply system, image sensor, equipment and vehicle

Abstract

The invention discloses a reference voltage generation module, a power supply system, an image sensor, equipment and a vehicle, the reference voltage generation module comprises a self-bias current source, a micro-current source, a first current mirror and a first reference circuit, the self-bias current source comprises the micro-current source used for generating bias current with a positive temperature coefficient, and the micro-current source is used for generating bias current with a negative temperature coefficient; the first current mirror is connected with the micro current source, and the first current mirror is of a low-voltage cascode structure and is used for performing mirror image output on the bias current; the first reference circuit is connected with the first current mirror, and the first reference circuit is used for generating a current with a negative temperature coefficient and generating a first reference voltage based on the bias current and the current with the negative temperature coefficient. The reference voltage generation module does not need to be compensated by a capacitor, so that the starting time and the response speed of the system are ensured.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a reference voltage generation module, a power supply system, an image sensor, an electronic device and a vehicle. Background Art

[0002] Traditional mixed-signal circuit on-chip power supply systems usually use bandgap reference circuits as reference voltage generation modules to generate stable reference voltages. In order to ensure the stability of the bandgap reference circuit, capacitors need to be used for compensation. However, since capacitors have charging and discharging properties, using capacitors for compensation will affect the system startup time and response speed. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a reference voltage generation module, which does not require capacitor compensation and ensures system startup time and response speed.

[0004] The second objective of the present invention is to provide a power supply system.

[0005] The third objective of the present invention is to provide an image sensor.

[0006] A fourth objective of the present invention is to provide an electronic device.

[0007] A fifth object of the present invention is to provide a vehicle.

[0008] In order to achieve the above-mentioned purpose, a reference voltage generating module of an embodiment of the first aspect of the present invention comprises: a self-biased current source, wherein the self-biased current source comprises: a micro-current source for generating a bias current with a positive temperature coefficient, a first current mirror, wherein the first current mirror is connected to the micro-current source, and the first current mirror is a low-voltage common-source common-gate structure for mirroring the bias current; and a first reference circuit, wherein the first reference circuit is connected to the first current mirror, and the first reference circuit is used to generate a current with a negative temperature coefficient, and generate a first reference voltage based on the bias current and the current with a negative temperature coefficient.

[0009] According to the reference voltage generating module of the embodiment of the present invention, a reference voltage is generated by adopting the architecture of a self-biased current source and a first reference circuit, wherein the self-biased current source realizes the output of the bias current by adopting a current mirror with a low-voltage common-source and common-gate structure, thereby improving the output impedance of the micro-current source, making the current mirror more accurate, and not consuming too much voltage margin. Therefore, there is no need to use capacitors for compensation, thereby improving the anti-interference ability and stability, and does not affect the system startup and response speed.

[0010] In some embodiments, the micro-current source comprises a widlar current source.

[0011] In some embodiments, the widlar current source includes: a first transistor, a first end of the first transistor is connected to the first current mirror; a second transistor, a first end of the second transistor is connected to the first current mirror, a control end of the second transistor is connected to the control end of the first transistor, a first node is provided between the control end of the second transistor and the control end of the first transistor, and a second end of the second transistor is grounded; a first resistor, a first end of the first resistor is connected to the second end of the first transistor, and a second end of the first resistor is grounded.

[0012] In some embodiments, a current gain of the first current mirror is 1.

[0013] In some embodiments, the first current mirror includes: a current mirror unit, which is respectively connected to the first end of the first transistor and the first end of the second transistor, and is used to mirror the bias current generated by the micro-current source; and a current output unit, which is respectively connected to the current mirror unit and the first reference circuit, and is used to output the bias current.

[0014] In some embodiments, the current output unit includes: a third transistor and a fourth transistor, the first end of the third transistor is connected to the first end of the fourth transistor, the control end of the fourth transistor is connected to the control end of the third transistor, and there is a second node between the control end of the third transistor and the control end of the fourth transistor.

[0015] In some embodiments, the current mirror unit includes: a fifth transistor, a first end of the fifth transistor is connected to the second end of the third transistor, and the second end of the fifth transistor is connected to the first end of the first transistor and the second node; a sixth transistor, a first end of the sixth transistor is connected to the second end of the fourth transistor, the second end of the sixth transistor is connected to the first end of the second transistor, and the control end of the sixth transistor is connected to the control end of the fifth transistor.

[0016] In some embodiments, the self-bias current source further includes: a first bias circuit, wherein the first bias circuit is connected to the widlar current source and the first current mirror respectively, and is used to provide a bias voltage for the widlar current source.

[0017] In some embodiments, the first bias circuit includes: a seventh transistor, a first end of the seventh transistor is connected to the first end of the third transistor and the first end of the fourth transistor, a control end of the seventh transistor is connected to the second end of the seventh transistor, the control end of the fifth transistor and the control end of the sixth transistor; an eighth transistor, a first end of the eighth transistor is connected to the second end of the seventh transistor, a second end of the eighth transistor is grounded, and a control end of the eighth transistor is connected to the first node.

[0018] In some embodiments, the self-bias current source also includes: a ninth transistor, a control terminal of the ninth transistor is connected to the first node, a second terminal of the ninth transistor is grounded, and a first terminal of the ninth transistor is suitable for connecting to an external module to provide a bias current for the external module.

[0019] In some embodiments, the first reference circuit includes: a tenth transistor, a first end of the tenth transistor is connected to the first end of the third transistor and the first end of the fourth transistor, and the control end of the tenth transistor is connected to the second node; a second resistor, a first end of the second resistor is connected to the second end of the tenth transistor, and a third node is provided between the first end of the second resistor and the second end of the tenth transistor to output the first reference voltage; an eleventh transistor, a first end of the eleventh transistor is connected to the second end of the second resistor, and the second end of the eleventh transistor and the control end of the eleventh transistor are both grounded.

[0020] In order to achieve the above-mentioned purpose, the power supply system of the second aspect embodiment of the present invention includes: the reference voltage generating module described in the above embodiment; a power supply driving module, which is connected to the reference voltage generating module and is used to output a supply voltage according to the first reference voltage output by the reference voltage generating module.

[0021] In the power supply system according to the embodiment of the present invention, the reference voltage generating module generates a stable bias current through a self-biased current source, and outputs the current through the first current mirror of the common source and common gate structure, thereby increasing the output impedance of the micro current source, thereby improving the current mirror accuracy without consuming too much voltage margin. Therefore, there is no need to use capacitors for compensation, and the anti-interference ability and stability of the power supply can be improved without affecting the system startup and response speed.

[0022] In some embodiments, the power driving module includes: a super source follower, the super source follower is connected to the output end of the reference voltage generating module, and the super source follower is also connected to a distributed source follower to drive different loads.

[0023] In some embodiments, the power supply system further includes: a pre-voltage stabilization module, which is connected to the reference voltage generation module and is used to provide an operating voltage for a self-bias current source of the reference voltage generation module and a first reference circuit.

[0024] In some embodiments, the pre-voltage regulation module includes: a second current mirror, connected to the self-bias current source and the super source follower, for obtaining the bias current of the self-bias current source; a second reference circuit, the second reference circuit is connected to the second current mirror, for generating a second reference voltage based on the bias current; a voltage regulated output circuit, the voltage regulated output circuit is connected to the second reference circuit and the reference voltage generating module, for outputting the operating voltage.

[0025] In some embodiments, the super source follower includes: a twelfth transistor, a first end of the twelfth transistor is connected to a preset power supply, and a control end of the twelfth transistor is connected to the second current mirror; a thirteenth transistor, a first end of the thirteenth transistor is connected to the second end of the twelfth transistor, a fourth node is provided between the first end of the thirteenth transistor and the second end of the twelfth transistor to output the power supply voltage, and a control end of the thirteenth transistor is connected to a third node of the first reference circuit to input a first reference voltage; a fourteenth transistor, a first end of the fourteenth transistor is connected to the second end of the thirteenth transistor, a second end of the fourteenth transistor is grounded, a control end of the fourteenth transistor is connected to a first node in the self-bias current source, and a fifth node is provided between the first end of the fourteenth transistor and the second end of the thirteenth transistor; a fifteenth transistor, a first end of the fifteenth transistor is connected to the fourth node, a second end of the fifteenth transistor is grounded, and a control end of the fifteenth transistor is connected to the fifth node.

[0026] In some embodiments, the second current mirror includes: a sixteenth transistor, a first end of the sixteenth transistor is connected to the preset power supply, a second end of the sixteenth transistor is connected to the control end of the sixteenth transistor, and the control end of the sixteenth transistor is also connected to the control end of the twelfth transistor; a seventeenth transistor, a first end of the seventeenth transistor is connected to the second end of the sixteenth transistor, the second end of the seventeenth transistor is grounded, a sixth node is provided between the first end of the seventeenth transistor and the second end of the sixteenth transistor, and the control end of the seventeenth transistor is connected to the first node in the self-bias current source to obtain the bias current.

[0027] In some embodiments, the second reference circuit includes: an eighteenth transistor, a first end of the eighteenth transistor is connected to the preset power supply, and a control end of the eighteenth transistor is connected to the control end of the sixteenth transistor; a nineteenth transistor, a first end of the nineteenth transistor is connected to the second end of the eighteenth transistor, a seventh node is provided between the first end of the nineteenth transistor and the second end of the eighteenth transistor, and the control end of the nineteenth transistor is connected to the first end of the nineteenth transistor; a twentieth transistor, a first end of the twentieth transistor is connected to the second end of the nineteenth transistor, and the second end of the twentieth transistor and the control end of the twentieth transistor are both grounded.

[0028] In some embodiments, the voltage regulated output circuit includes: a first filter, a first end of the first filter is connected to the seventh node; a second filter, a first end of the second filter is connected to the preset power supply; a twenty-first transistor, a first end of the twenty-first transistor is connected to the second end of the second filter, a control end of the twenty-first transistor is connected to the second end of the first filter, and a second end of the twenty-first transistor is connected to the self-bias current source and the first reference circuit respectively to provide the operating voltage for the self-bias current source and the first reference circuit.

[0029] In some embodiments, the pre-regulation module also includes: a second bias circuit, the second bias circuit is connected to the first node of the self-bias current source to obtain the bias current, and the second bias circuit is also respectively connected to the second current mirror, the second reference circuit and the super source follower to provide a bias voltage.

[0030] In some embodiments, the second bias circuit includes: a twenty-second transistor, a first terminal of the twenty-second transistor is connected to the preset power supply; a twenty-third transistor, a first terminal of the twenty-third transistor is connected to the second terminal of the twenty-second transistor, a control terminal of the twenty-third transistor is connected to the control terminal of the twenty-second transistor, and a second terminal of the twenty-third transistor is connected to the control terminal of the twenty-third transistor; and a twenty-fourth transistor, a first terminal of the twenty-fourth transistor is connected to the second terminal of the twenty-third transistor, a second terminal of the twenty-fourth transistor is grounded, and a control terminal of the twenty-fourth transistor is connected to the first node of the self-bias current source.

[0031] In some embodiments, the second current mirror also includes: a twenty-fifth transistor, the first end of the twenty-fifth transistor is connected to the second end of the sixteenth transistor, the second end of the twenty-fifth transistor is connected to the first end of the seventeenth transistor through the sixth node, and the control end of the twenty-fifth transistor is connected to the second end of the twenty-third transistor and the control end of the twenty-third transistor.

[0032] In some embodiments, the second reference circuit also includes: a twenty-sixth transistor, the first end of the twenty-sixth transistor is connected to the second end of the eighteenth transistor, the second end of the twenty-sixth transistor is connected to the first end of the nineteenth transistor, and the control end of the twenty-sixth transistor is connected to the control end of the twenty-fifth transistor, the control end of the twenty-third transistor, and the second end of the twenty-third transistor.

[0033] In some embodiments, the super source follower also includes: a twenty-seventh transistor, the first end of the twenty-seventh transistor is connected to the second end of the twelfth transistor, the second end of the twenty-seventh transistor is connected to the first end of the thirteenth transistor, and the control end of the twenty-seventh transistor is connected to the control end of the twenty-third transistor and the second end of the twenty-third transistor.

[0034] In some embodiments, the power supply system further includes: a startup circuit, which is connected to the self-bias current source and the pre-voltage regulator module and is used to output a startup instruction according to a power trigger signal.

[0035] In some embodiments, the startup circuit includes: a twenty-eighth transistor, the second end of the twenty-eighth transistor is grounded, and the control end of the twenty-eighth transistor is connected to the first node in the self-bias current source; a twenty-ninth transistor, the second end of the twenty-ninth transistor is connected to the first end of the twenty-eighth transistor, and the control end of the twenty-ninth transistor is connected to the seventh node; a thirtieth transistor, the second end of the thirtieth transistor is connected to the first end of the twenty-ninth transistor, and the control end of the thirtieth transistor is connected to the second end of the thirtieth transistor; a thirty-first transistor, the first end of the thirty-first transistor is connected to the preset power supply, the second end of the thirty-first transistor is connected to the first end of the thirtieth transistor, and the control end of the thirty-first transistor is grounded; a thirty-second transistor, the thirty-second The second end of the transistor is connected to the first node of the self-bias current source, and the control end of the thirty-second transistor is suitable for inputting a power supply triggered same phase signal; a thirty-third transistor, the second end of the thirty-third transistor is connected to the second end of the thirty-second transistor and the first node of the self-bias current source, the first end of the thirty-third transistor is connected to the first end of the thirty-second transistor, and the control end of the thirty-third transistor is suitable for inputting a power supply triggered reverse phase signal; a thirty-fourth transistor, the second end of the thirty-fourth transistor is connected to the first end of the thirty-third transistor and the first end of the thirty-second transistor, the second end of the thirty-fourth transistor is connected to the control end of the sixteenth transistor through the sixth node, and the control end of the thirty-fourth transistor and the control end of the thirtieth transistor are connected to the eighth node.

[0036] In some embodiments, the startup circuit also includes: a thirty-fifth transistor, a first end of the thirty-fifth transistor is connected to the preset power supply, a second end of the thirty-fifth transistor is connected to the eighth node, and a control end of the thirty-fifth transistor is connected to the control end of the thirty-third transistor; a thirty-sixth transistor, a first end of the thirty-sixth transistor is connected to the preset power supply, a second end of the thirty-sixth transistor is connected to the sixth node, and a control end of the thirty-sixth transistor is connected to the control end of the thirty-third transistor; a thirty-seventh transistor, a first end of the thirty-seventh transistor is connected to the preset power supply, a second end of the thirty-seventh transistor is connected to the second end of the twenty-first transistor, and a control end of the thirty-seventh transistor is connected to the control end of the thirty-third transistor.

[0037] In order to achieve the above object, the image sensor according to the third aspect of the embodiment of the present invention includes the power supply system described in the above embodiment.

[0038] According to the image sensor of the embodiment of the present invention, a stable reference voltage can be generated in the chip by adopting the power supply system described in the above embodiment, and the power supply system improves the anti-interference ability and stability while ensuring the startup and response speed.

[0039] In order to achieve the above-mentioned objective, a fourth aspect of the present invention further provides an electronic device, which includes the image sensor of the above embodiment.

[0040] According to the electronic device of the embodiment of the present invention, by adopting the image sensor of the above embodiment, the power supply of the image sensor is more stable, so that more stable image information can be obtained, thereby improving the performance of the electronic device.

[0041] In order to achieve the above-mentioned objective, a fifth aspect of the present invention further provides a vehicle, which includes the image sensor of the above embodiment.

[0042] The vehicle according to the embodiment of the present invention can obtain more stable image information by adopting the image sensor of the above embodiment, so that the control strategy based on the image information is more stable and accurate, thereby improving safety.

[0043] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0045] Figure 1 is a schematic diagram of a reference voltage generating module according to an embodiment of the present invention;

[0046] Figure 2 is a schematic diagram of a power supply system according to an embodiment of the present invention;

[0047] Figure 3 is a circuit diagram of a power supply system according to an embodiment of the present invention;

[0048] Figure 4 is a circuit diagram of an RC low-pass filter according to an embodiment of the present invention;

[0049] Figure 5 is a circuit diagram of a power supply system according to another embodiment of the present invention;

[0050] Figure 6 is a logic signal diagram of a power supply system PowerDown according to an embodiment of the present invention;

[0051] Figure 7is a block diagram of an image sensor according to an embodiment of the present invention;

[0052] Figure 8 is a block diagram of an electronic device according to an embodiment of the present invention;

[0053] Fig. 9 is a block diagram of a vehicle according to one embodiment of the present invention.

[0054] Reference numerals:

[0055] Electronic device 1000, vehicle 2000;

[0056] Image sensor 100;

[0057] Power supply system 101;

[0058] Reference voltage generating module 1; power driving module 3; distributed source follower 4; pre-regulator module 5; start-up circuit 6;

[0059] Self-biased current source 10; first reference circuit 20; super source follower 30;

[0060] Micro-current source 11; first current mirror 12; first bias circuit 13; ninth transistor 14; tenth transistor 21; second resistor 22; eleventh transistor 23; third node 24; twelfth transistor 31; thirteenth transistor 32; fourteenth transistor 33; fifteenth transistor 34; fourth node 35; fifth node 36; twenty-seventh transistor 37; second current mirror 51; second reference circuit 52; voltage-stabilizing output circuit 53; second bias circuit 54; twenty-eighth transistor 60; twenty-ninth transistor 61; thirtieth transistor 62; thirty-first transistor 63; thirty-second transistor 64; thirty-third transistor 65; thirty-fourth transistor 66; thirty-fifth transistor 67; thirty-sixth transistor 68; thirty-seventh transistor 69; eighth node 70;

[0061] The first transistor 110; the second transistor 120; the first node 130; the first resistor 140; the third transistor 121; the fourth transistor 122; the second node 123; the fifth transistor 124; the sixth transistor 125; the seventh transistor 131; the eighth transistor 132; the sixteenth transistor 511; the seventeenth transistor 512; the sixth node 513; the twenty-fifth transistor 514; the eighteenth transistor 521; the nineteenth transistor 522; the twentieth transistor 523; the seventh node 524; the twenty-sixth transistor 525; the first filter 531; the second filter 532; the twenty-first transistor 533; the twenty-second transistor 541; the twenty-third transistor 542; the twenty-fourth transistor 543. DETAILED DESCRIPTION

[0062] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0063] Reference below Figure 1 A reference voltage generating module according to an embodiment of the present invention is described.

[0064] Figure 1 is a schematic diagram of a reference voltage generating module according to an embodiment of the present invention. Figure 1 As shown, the reference voltage generating module 1 may include a self-bias current source 10 and a first reference circuit 20 .

[0065] The self-bias current source 10 is one of the core components of the reference voltage generation module 1, and is used to generate a stable current without external control or intervention. In an embodiment, the self-bias current source 10 may include different types of designs, such as a self-bias current source 10 based on a diode, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or other devices.

[0066] In an embodiment, the self-bias current source 10 includes a micro current source 11 and a first current mirror 12. The micro current source 11 and the first current mirror 12 are connected to generate a bias current with a positive temperature coefficient.

[0067] The micro-current source 11 and the first current mirror 12 form a feedback system to generate a bias current that is independent of the power supply voltage.

[0068] The micro-current source 11 is used to generate a bias current with a positive temperature coefficient, and the first current mirror 12 performs mirror output on the bias current.

[0069] In addition, the first current mirror 12 adopts a low-voltage common-source common-gate structure, which can greatly increase the output impedance of the micro-current source 11, thereby making the current mirror more accurate, improving the power supply suppression capability, and not consuming too much voltage margin, thereby ensuring the stability of the system.

[0070] As described above, in the present application, the stability of the self-biased current source 10 is provided by the first current mirror 12 of the low-voltage common-source common-gate structure, without using a capacitor structure, thereby ensuring the startup and response efficiency of the circuit.

[0071] The first reference circuit 20 is connected to the first current mirror 12 , and is used to generate a current with a negative temperature coefficient and to generate a first reference voltage based on the bias current and the current with the negative temperature coefficient.

[0072] The bias current is a current with a positive temperature coefficient, and the first reference circuit 20 performs weighted addition based on the bias current with a positive temperature coefficient and the current with a negative temperature coefficient to obtain a first reference voltage that does not vary with temperature or power supply voltage.

[0073] According to the reference voltage generating module 1 of the embodiment of the present invention, a reference voltage is generated by adopting the architecture of a self-bias current source 10 and a first reference circuit 20, wherein the self-bias current source 10 realizes the output of the bias current by adopting a current mirror with a low-voltage common-source and common-gate structure, which can improve the output impedance of the micro-current source 11, making the current mirror more accurate without consuming too much voltage margin, thereby improving the anti-interference ability and stability without using capacitors for compensation, and does not affect the system startup and response speed.

[0074] Furthermore, in some embodiments, the micro-current source 11 may include a widlar current source. The widlar current source uses a small-resistance resistor to generate micro-current. In integrated circuit chip design, a small-resistance resistor occupies a much smaller area than a large-resistance resistor such as a megohm-level resistor.

[0075] In some embodiments, the widlar current source is a current source with a positive temperature coefficient characteristic. The widlar current source can utilize the temperature characteristics of the transistor and the voltage division effect of the resistor to generate a stable output current with a positive temperature coefficient characteristic for use in a subsequent reference circuit. Its stability is crucial to the performance of the reference circuit. Therefore, the design and function of the widlar current source play a key role in the power supply system 101 of the entire mixed signal circuit.

[0076] In the embodiment of the present invention, the first current mirror 12 is used to generate an output current equal to the input current, so as to realize the mirror output of the input current. The widlar current source is connected to the first current mirror 12. The function of the first current mirror 12 is to copy the current of the widlar current source and provide it to the first reference circuit 20 and other circuits that may be required to act as a current bias and ensure that the generated bias current matches the required current.

[0077] In some embodiments, the widlar current source includes a first transistor 110 , a second transistor 120 , and a first resistor 140 .

[0078] Wherein, the first end of the first transistor 110 is connected to the first current mirror 12, and the first end of the second transistor 120 is connected to the first current mirror 12. The first transistor 110 and the second transistor 120 realize a stable output current with a positive temperature coefficient through their temperature characteristics. This characteristic means that as the temperature rises, the output current will also increase accordingly, thereby compensating for the influence of temperature changes. The control end of the second transistor 120 is connected to the control end of the first transistor 110, and there is a first node 130 between the control end of the second transistor 120 and the control end of the first transistor 110. The first node 130 is a connection point between the control ends of the two transistors, which is used to realize the distribution and control of current. This connection method forms a negative feedback loop, so that the current between the first transistor 110 and the second transistor 120 is balanced. The second end of the second transistor 120 is grounded, which helps to stabilize the operation of the entire circuit.

[0079] The first end of the first resistor 140 is connected to the second end of the first transistor 110, and the second end of the first resistor 140 is grounded. The first resistor 140 plays a key role in the widlar current source and can affect the distribution and stability of the current through its resistance value. The specific resistance value of the first resistor 140 may vary due to different designs and applications, and is not specifically limited here.

[0080] like Figure 1 As shown, the first transistor 110 and the second transistor 120 may be transistors of NMOS structure, and of course transistors of other suitable structures may also be used. Figure 1 Just as an example.

[0081] It should be noted that in the specification of the present application, the control end of the transistor may correspond to a gate, a base or a gate, and the control end may be called differently for different types of transistors.

[0082] In some embodiments, the current gain of the first current mirror 12 is 1, so that the voltage at the output end of the micro-current source 11 can be clamped, that is, the voltage levels of the two output ends of the micro-current source 11 can be made equal.

[0083] Therefore, in the embodiment of the present invention, the self-biased current source 10 generates a current with a positive temperature coefficient, namely, IPTAT, through the micro-current source 11. Compared with the traditional bandgap reference circuit, the design of the present invention realizes voltage clamping through a current mirror with a current gain of 1, does not require an operational amplifier, reduces the occupied chip area, simplifies the structure, and reduces the manufacturing cost.

[0084] In an embodiment, the first current mirror 12 includes a current mirror unit and a current output unit. Specifically, the current mirror unit and the current output unit can both be implemented by transistors.

[0085] Among them, the current mirror unit is respectively connected to the first end of the first transistor 110 and the first end of the second transistor 120, and is used to mirror the set current generated by the micro-current source 11; the current output unit is respectively connected to the current mirror unit and the first reference circuit 20, and is used to output the bias current.

[0086] As an example, Figure 1 As shown, the current output unit includes a third transistor 121 and a fourth transistor 122 .

[0087] The first end of the third transistor 121 is connected to the first end of the fourth transistor 122, the control end of the fourth transistor 122 is connected to the control end of the third transistor 121, and a second node 123 is provided between the control end of the third transistor 121 and the control end of the fourth transistor 122. The second node 123 is a connection point between the control ends of the two transistors, and is used to realize current distribution and control.

[0088] like Figure 1 As shown, the current mirror unit includes a fifth transistor 124 and a sixth transistor 125 .

[0089] Among them, the first end of the fifth transistor 124 is connected to the second end of the third transistor 121, and the second end of the fifth transistor 124 is connected to the first end of the first transistor 110 and the second node 123. This connection method ensures that the fifth transistor 124 is in a proper working state for current replication and transmission. The first end of the sixth transistor 125 is connected to the second end of the fourth transistor 122, the second end of the sixth transistor 125 is connected to the first end of the second transistor 120, and the control end of the sixth transistor 125 is connected to the control end of the fifth transistor 124, for adjusting the distribution of current to ensure the stability and accuracy of the current mirror circuit.

[0090] Specifically, if Figure 1 As shown, the third transistor 121, the fourth transistor 122, the fifth transistor 124, and the sixth transistor 125 can form a PMOS low-voltage cascode current mirror with a current gain of 1. The widlar current source and the first current mirror 12 form a feedback system, which can generate a bias current that is independent of the power supply voltage. The first current mirror 12 of the low-voltage cascode structure does not consume too much voltage margin while improving the output impedance and making the current mirror more accurate. The first current mirror 12 and the widlar current source can also provide bias current for other circuits.

[0091] like Figure 1 As shown, the third transistor 121, the fourth transistor 122, the fifth transistor 124, and the sixth transistor 125 may be transistors of a PMOS structure, and of course transistors of other suitable structures may also be used. Figure 1 Just as an example.

[0092] In some embodiments, the self-biased current source 10 further includes a first bias circuit 13. The first bias circuit 13 is connected to the widlar current source and the first current mirror 12, respectively, and is used to provide a bias voltage for the widlar current source. The bias voltage can be a voltage used to control the widlar current source or the first current mirror 12, so that the widlar current source and the first current mirror 12 can stably generate the required current.

[0093] For example, if Figure 1 As shown, the first bias circuit 13 can realize current distribution and generate bias voltage through the gate-drain connection between transistors. Specifically, the connection between the gate and the source of the transistor can generate a certain voltage drop, which can be used as a bias voltage to provide the required voltage reference for the widlar current source to ensure its positive temperature coefficient characteristics and stability.

[0094] In some embodiments, the first bias circuit 13 includes: a seventh transistor 131 and an eighth transistor 132. The seventh transistor 131 and the eighth transistor 132 together form a bias circuit of a low-voltage cascode current mirror.

[0095] Among them, the first end of the seventh transistor 131 is connected to the first end of the third transistor 121 and the first end of the fourth transistor 122, and the control end of the seventh transistor 131 is connected to the second end of the seventh transistor 131 to achieve the connection between the gate and the drain of the transistor. The control end of the seventh transistor 131 is connected to the control end of the fifth transistor 124 and the control end of the sixth transistor 125, which can provide a bias voltage for the fifth transistor 124 and the sixth transistor 125. This connection method forms a complex circuit, in which the control of the seventh transistor 131 is controlled by multiple components to ensure that the required bias voltage can be stably generated.

[0096] The first end of the eighth transistor 132 is connected to the second end of the seventh transistor 131, the second end of the eighth transistor 132 is grounded, and the control end of the eighth transistor 132 is connected to the first node 130. The first node 130 is located between the control ends of the third transistor 121 and the fourth transistor 122. Through this connection, the eighth transistor 132 can copy the current from the bias current source 10, thereby ensuring the accuracy and stability of the current.

[0097] In some embodiments, the self-bias current source 10 further includes a ninth transistor 14. The control terminal of the ninth transistor 14 is connected to the first node 130, the second terminal of the ninth transistor 14 is grounded, and the first terminal of the ninth transistor 14 is suitable for connecting to an external module to provide a bias current for the external module. Therefore, the self-bias current source 10 can not only meet the bias requirements of the internal circuit, but also provide a bias current for the external module, which increases the flexibility and usability of the circuit. This flexibility allows the reference voltage generation module 1 to work in conjunction with other modules to meet the requirements of different functional modules in the mixed signal circuit.

[0098] like Figure 1 As shown, the seventh transistor 131 may be a transistor of NMOS structure, the eighth transistor 132 and the ninth transistor 14 may be transistors of PMOS structure, and of course transistors of other suitable structures may also be used. Figure 1 Just as an example.

[0099] In some embodiments, the first reference circuit 20 includes: a tenth transistor 21 , a second resistor 22 , and an eleventh transistor 23 .

[0100] Among them, the first end of the tenth transistor 21 is connected to the first end of the third transistor 121 and the first end of the fourth transistor 122, and the control end of the tenth transistor 21 is connected to the second node 123, which is used to replicate the current of the self-bias current source 10. This current replication ensures that the current of the tenth transistor 21 is proportional to the current of the self-bias current source 10. The first end of the second resistor 22 is connected to the second end of the tenth transistor 21, and there is a third node 24 between the first end of the second resistor 22 and the second end of the tenth transistor 21 for controlling the current and generating a first reference voltage. The first end of the eleventh transistor 23 is connected to the second end of the second resistor 22, and the second end of the eleventh transistor 23 and the control end of the eleventh transistor 23 are both grounded. The function of the eleventh transistor 23 can be to assist in generating and stabilizing the first reference voltage.

[0101] By such a connection mode, the tenth transistor 21 can copy the current of the bias current source 10, and generate a voltage with a positive temperature coefficient characteristic on the second resistor 22, and its size is proportional to the temperature. The positive temperature coefficient characteristic means that as the temperature rises, the voltage drop of the second resistor 22 will increase. This configuration allows the reference voltage generation module 1 to generate and output a reliable first reference voltage without relying on an external voltage source, so as to supply each functional module of the mixed signal circuit. Such a design is of great significance for reducing manufacturing costs, improving integration and reducing chip area. In an embodiment, the specific resistance value of the second resistor 22 may vary due to different designs and applications, and is not specifically limited here.

[0102] like Figure 1 As shown, the tenth transistor 21 may be a transistor with a PMOS structure, and the eleventh transistor 23 may be a transistor with a PNP structure. Of course, transistors with other suitable structures may also be used. Figure 1 Just as an example.

[0103] Reference below Figure 2 A power supply system according to an embodiment of the present invention is described.

[0104] Figure 2 is a schematic diagram of a power supply system according to an embodiment of the present invention. Figure 2 As shown, the power supply system 101 includes: a reference voltage generating module 1 and a power driving module 3 .

[0105] Among them, the main function of the reference voltage generating module 1 is to generate a stable first reference voltage, which is usually used for various circuits and components in the mixed signal circuit to ensure that they have an accurate voltage reference during operation. The power driver module 3 is connected to the reference voltage generating module 1, and is used to output a power supply voltage according to the first reference voltage output by the reference voltage generating module 1. This means that the power driver module 3 can convert the first reference voltage generated by the reference voltage generating module 1 into a voltage suitable for supplying each functional module in the mixed signal circuit. In this way, the power supply system 101 can provide a stable power supply voltage for the entire mixed signal circuit to ensure the normal operation of each functional module.

[0106] According to the power supply system 101 of the embodiment of the present invention, the reference voltage generating module 1 generates a stable bias current through the self-bias current source 10, and outputs the current through the first current mirror 12 of the common source and common gate structure, thereby increasing the output impedance of the micro current source 11, thereby improving the current mirror accuracy without consuming too much voltage margin, thereby, without using capacitors for compensation, the anti-interference ability and stability of the power supply can be improved, and the system startup and response speed are not affected.

[0107] In some embodiments, the power driving module 3 includes a super source follower 30. The super source follower 30 is connected to the output end of the reference voltage generating module 1, and its function is to follow and amplify the first reference voltage generated by the reference voltage generating module 1. In this way, the super source follower 30 can ensure the stability of the first reference voltage and provide a stable voltage for subsequent loads. The super source follower 30 is also connected to the distributed source follower 4 to drive different loads. This can illustrate that the super source follower 30 has the ability to drive multiple different loads at the same time. The distributed source follower 4 can adjust the voltage according to the change of the load to meet the power supply requirements of different functional modules. This design increases the flexibility and applicability of the power supply system 101, so that it can be used in a variety of application scenarios.

[0108] In general, the function of the super source follower 30 can be to follow and output a power supply voltage, which can adapt to the needs of different loads. The advantage of this design is that it can provide flexibility and stability to meet the power supply requirements of various functional modules in the mixed signal circuit. The super source follower 30 can effectively manage power distribution by connecting to the distributed source follower 4 to ensure that each module obtains the required power supply voltage. This architecture helps to improve the performance and reliability of the mixed signal circuit.

[0109] In some embodiments, the power supply system 101 further includes a pre-voltage regulator module 5, which is connected to the reference voltage generating module 1 and is used to provide an operating voltage for the self-bias current source 10 and the first reference circuit 20 of the reference voltage generating module 1. By providing a stable operating voltage, the pre-voltage regulator module 5 plays a key role in the power supply system 101, ensuring that the various components of the reference voltage generating module 1 can operate normally and generate a stable output. This design can effectively isolate the voltage fluctuation between the reference voltage generating module 1 and the external power supply, so that the reference voltage generating module 1 can operate normally under unstable external power supply conditions, thereby improving the performance and reliability of the power supply system 101.

[0110] In some embodiments, Figure 3 As shown, the pre-voltage stabilization module 5 includes: a second current mirror 51 , a second reference circuit 52 and a voltage stabilization output circuit 53 .

[0111] The second current mirror 51 is connected to the self-bias current source 10 and the super source follower 30 to obtain the bias current generated by the self-bias current source 10. This bias current can be obtained by copying the current of the self-bias current source 10, and therefore has the same current characteristics as the self-bias current source 10, including the positive temperature coefficient characteristics. That is, as the temperature increases, the output current will also increase accordingly. This helps to maintain the stability of the current under different temperature conditions.

[0112] The second reference circuit 52 is connected to the second current mirror 51 for generating a second reference voltage based on the bias current. In an embodiment, the second reference voltage may have a negative temperature characteristic. In this case, the voltage value of the second reference voltage will decrease as the temperature rises, which is opposite to the positive temperature coefficient characteristic of the first reference voltage. This design may be to provide a temperature compensation mechanism in a mixed signal circuit to ensure that a stable voltage reference can be maintained under different temperature conditions.

[0113] The voltage stabilizing output circuit 53 is connected to the second reference circuit 52 and the reference voltage generating module 1, and is used to output the working voltage. In an embodiment, the voltage stabilizing output circuit 53 can be used to output a stable working voltage, reduce noise caused by input voltage fluctuations, temperature changes, or load changes, and ensure that each component of the power supply system 101 can operate normally under a stable working voltage.

[0114] By designing the pre-stabilization module 5, it can be ensured that under unstable external power conditions, the various components of the reference voltage generation module 1 can operate normally and generate stable outputs. This helps to improve the performance and reliability of the power supply system 101 and ensure that it can operate normally in various application scenarios. This modular design also increases the flexibility of the power supply system 101 because it can easily adapt to different working conditions and power requirements.

[0115] In some embodiments, the super source follower 30 can ensure that the power supply system 101 can provide a stable power supply voltage, i.e., a power supply voltage. This is essential for the normal operation of various components of the mixed signal circuit. The super source follower 30 includes: a twelfth transistor 31, a thirteenth transistor 32, a fourteenth transistor 33, and a fifteenth transistor 34.

[0116] The first end of the twelfth transistor 31 is connected to a preset power supply, and the control end of the twelfth transistor 31 is connected to the second current mirror 51. The twelfth transistor 31 can replicate the bias current of the second current mirror 51 and act as a current source of the power driving module 3. The first end of the thirteenth transistor 32 is connected to the second end of the twelfth transistor 31, and a fourth node 35 is provided between the first end of the thirteenth transistor 32 and the second end of the twelfth transistor 31 to output a power supply voltage, and the control end of the thirteenth transistor 32 is connected to the third node 24 of the first reference circuit 20 to input a first reference voltage.

[0117] The first end of the fourteenth transistor 33 is connected to the second end of the thirteenth transistor 32, the second end of the fourteenth transistor 33 is grounded, and the control end of the fourteenth transistor 33 is connected to the first node 130 in the self-bias current source 10. The fourteenth transistor 33 can copy the bias current of the self-bias current source 10 and serve as another current source of the power driving module 3. There is a fifth node 36 between the first end of the fourteenth transistor 33 and the second end of the thirteenth transistor 32. The first end of the fifteenth transistor 34 is connected to the fourth node 35, the second end of the fifteenth transistor 34 is grounded, and the control end of the fifteenth transistor 34 is connected to the fifth node 36.

[0118] In some embodiments, the super source follower 30 constitutes an open-loop power drive module 3. It includes a twelfth transistor 31 that copies the bias current of the second current mirror 51 to act as a current source, and a fourteenth transistor 33 that copies the current from the bias current source 10 to act as another current source. The function of these two current sources is to provide the current required by the power drive module 3. The thirteenth transistor 32 can be a source follower, and the current flowing through the thirteenth transistor 32 is equal to the current output by the fourteenth transistor 33. The gate terminal of the fourteenth transistor 33 is connected to the first reference voltage, which means that the output voltage of the fourteenth transistor 33 will follow the first reference voltage. The source terminal output of the fourteenth transistor 33 is connected to the gate terminal of the distributed source follower 4. It will provide a power supply voltage for these source followers.

[0119] The drain terminal of the fifteenth transistor 34 is connected to the source terminal of the fourteenth transistor 33, and the gate terminal is connected to the drain terminal of the fourteenth transistor 33. The current flowing through the fifteenth transistor 34 is equal to the current of the twelfth transistor 31 minus the current of the fourteenth transistor 33. The fifteenth transistor 34 acts as a negative feedback element, and its function is to feed back the output voltage of the fourteenth transistor 33 to itself to reduce the output resistance of the source follower. This negative feedback mechanism can significantly improve the output driving capability of the fourteenth transistor 33 because it reduces the output resistance of the source follower, making it easier to drive the downstream load circuit.

[0120] In some embodiments, the gate terminals of the source followers (LOAD1, LOAD2, ..., LOADn) distributed in various places can be connected to the source terminal of the fourteenth transistor 33, which means that they can all be driven by the power supply voltage provided by the fourteenth transistor 33. Even if the load circuits under these source followers have power ripples and couple back to the gate terminals of each local source follower, the strong driving capability and negative feedback mechanism of the fourteenth transistor 33 can quickly recover, ensuring that the power ripples between different loads will not affect each other.

[0121] Therefore, the advantage of this power driver module 3 lies in its scalability and driving capability. The fourteenth transistor 33 can easily drive multiple source followers, each of which can be connected to a different load, and the power ripples between them will not affect each other. If a stronger load capacity is required, a super source follower 30 can also be used to further improve the driving performance so that the system can cope with a larger load current requirement.

[0122] like Figure 3 As shown, the twelfth transistor 31, the thirteenth transistor 32 and the fifteenth transistor 34 may be transistors of a PMOS structure, and the fourteenth transistor 33 may be a transistor of an MPOS structure. Of course, transistors of other suitable structures may also be used. Figure 3Just as an example.

[0123] In some embodiments, the second current mirror 51 includes a sixteenth transistor 511 and a seventeenth transistor 512 .

[0124] The first end of the sixteenth transistor 511 is connected to a preset power supply, the second end of the sixteenth transistor 511 is connected to the control end of the sixteenth transistor 511, and the control end of the sixteenth transistor 511 is also connected to the control end of the twelfth transistor 31. This connection mode allows the sixteenth transistor 511 to obtain a control signal from the twelfth transistor 31 to control the flow of current. The first end of the seventeenth transistor 512 is connected to the second end of the sixteenth transistor 511, the second end of the seventeenth transistor 512 is grounded, and there is a sixth node 513 between the first end of the seventeenth transistor 512 and the second end of the sixteenth transistor 511. The control end of the seventeenth transistor 512 is connected to the first node 130 in the self-bias current source 10 to obtain a bias current. This bias current can be obtained by copying the self-bias current source 10.

[0125] Through this design, the second current mirror 51 can effectively obtain the bias current generated by the bias current source 10 and transfer it to other parts of the power supply system 101 to ensure that each component can work normally under a stable current. This design helps to improve the performance and reliability of the power supply system 101.

[0126] like Figure 3 As shown, the sixteenth transistor 511 may be a transistor of a PMOS structure, and the seventeenth transistor 512 may be a transistor of an NMOS structure. Of course, transistors of other suitable structures may also be used. Figure 3 Just as an example.

[0127] In some embodiments, the second reference circuit 52 includes an eighteenth transistor 521 , a nineteenth transistor 522 , and a twentieth transistor 523 .

[0128] The first terminal of the eighteenth transistor 521 is connected to a preset power supply, and the control terminal of the eighteenth transistor 521 is connected to the control terminal of the sixteenth transistor 511. In the embodiment, the eighteenth transistor 521 can be a PMOS transistor, and its current can copy the current output from the sixteenth transistor 511 and the seventeenth transistor 512 in the second current mirror 51. The current is also the bias current copied by the seventeenth transistor 512 from the bias current source 10, and then obtained by mirroring the sixteenth transistor 511 with a diode connection. Therefore, the current copied by the eighteenth transistor 521 also has a positive temperature coefficient characteristic. This means that its current increases with the increase of temperature.

[0129] The first end of the nineteenth transistor 522 is connected to the second end of the eighteenth transistor 521, a seventh node 524 is provided between the first end of the nineteenth transistor 522 and the second end of the eighteenth transistor 521, and the control end of the nineteenth transistor 522 is connected to the first end of the nineteenth transistor 522. In the embodiment, the nineteenth transistor 522 may be an NMOS transistor, and since the gate and the drain of the transistor are short-circuited, it may be regarded as a resistor, and its resistance value is affected by its aspect ratio.

[0130] The first end of the twentieth transistor 523 is connected to the second end of the nineteenth transistor 522, and the second end of the twentieth transistor 523 and the control end of the twentieth transistor 523 are both grounded. In an embodiment, the twentieth transistor 523 can be a diode-connected PNP transistor having a negative temperature coefficient voltage, which means that its turn-on voltage decreases as the temperature increases. This can be achieved through appropriate design and configuration with the positive temperature coefficient current of the eighteenth transistor 521, so that the output of the second reference circuit 52 is more stable at different temperatures. By reasonably setting the length and width of the eighteenth transistor 521, the nineteenth transistor 522 and the number of the twentieth transistor 523, a relatively stable second reference voltage can be obtained.

[0131] In some embodiments, the current copied by the tenth transistor 21 generates a voltage with a positive temperature coefficient through the first resistor 140. The diode connection of the twentieth transistor 523 generates a voltage with a negative temperature coefficient. The two voltages are added to obtain a stable first reference voltage. The magnitude of the first reference voltage can be achieved by adjusting the magnitude of the copied current of the tenth transistor 21, the resistance value of the first resistor 140 and the number of the twentieth transistors 523, making the circuit more flexible and adaptable to different applications and design requirements.

[0132] like Figure 3 As shown, the eighteenth transistor 521 may be a transistor of a PMOS structure, the nineteenth transistor 522 may be a transistor of an NMOS structure, and the twentieth transistor 523 may be a transistor of a PNP structure. Of course, transistors of other suitable structures may also be used. Figure 3 Just as an example.

[0133] In some embodiments, the voltage regulated output circuit 53 includes: a first filter 531 , a second filter 532 , and a twenty-first transistor 533 .

[0134] The first end of the first filter 531 is connected to the seventh node 524. The first filter 531 can be used to filter the second reference voltage output from the second reference circuit 52 to reduce possible high-frequency noise and fluctuations and ensure the stability of the output voltage. The first end of the second filter 532 is connected to the preset power supply and can be used to filter the voltage provided by the preset power supply to filter out high-frequency noise and interference in the power supply and ensure the quality of the subsequent working voltage.

[0135] The first end of the twenty-first transistor 533 is connected to the second end of the second filter 532, the control end of the twenty-first transistor 533 is connected to the second end of the first filter 531, and the second end of the twenty-first transistor 533 is connected to the self-bias current source 10 and the first reference circuit 20, respectively, to provide operating voltages for the self-bias current source 10 and the first reference circuit 20. In an embodiment, the twenty-first transistor 533 can be connected in a source follower manner, where the voltage at the source end follows the second reference voltage, ensuring that the voltage at the source end ( Figure 3 VDDL4BIAS in the source is the same as the second reference voltage of the gate. Therefore, the 21st transistor 533 is actually a voltage follower, whose output voltage follows the input voltage, but has a lower output impedance. This means that no matter how the input voltage changes, the source follower will try to keep the output voltage stable.

[0136] Therefore, the function of the twenty-first transistor 533 can be to adjust the voltage at its source end to maintain a stable output power supply voltage VDDL4BIAS when the power supply voltage changes or the second reference voltage changes, and the circuit mounted below it is more resistant to changes in the power supply voltage. At the same time, the second filter 532 further filters out high-frequency noise in the power supply, making the power supply voltage more stable and clean. This combined effect ensures that VDDL4BIAS and the circuits below it can operate in a more stable power supply environment, reducing power supply-related problems and improving system performance and reliability.

[0137] like Figure 3 As shown, the twenty-first transistor 533 may be a transistor of NMOS structure, and of course, transistors of other suitable structures may also be used. Figure 3 Just as an example.

[0138] In some embodiments, the first filter 531 and the second filter 532 may be RC low-pass filters, such as Figure 4 As shown, an RC filter can be composed of a resistor (R) and a capacitor (C) to filter out high-frequency components from the input signal, allowing only low-frequency signals to pass. High-frequency noise can come from power supply fluctuations or other external interference. The RC filter ensures that the power supply voltage connected to the filter output is more stable and clean by shorting these high-frequency components to ground.

[0139] In some embodiments, in order to reduce the sensitivity of the reference voltage and the load output voltage to the power supply voltage change and enhance the system's ability to resist power supply interference, another design scheme of the power supply system 101 may be proposed.

[0140] Figure 5 is a circuit diagram of a power supply system according to another embodiment of the present invention. Figure 5 As shown, the pre-regulator module 5 may further include a second bias circuit 54 .

[0141] The function of the second bias circuit 54 may be to provide the necessary bias current and bias voltage for the power supply system 101. This is essential for maintaining the stability and performance of the power supply system 101. The second bias circuit 54 is connected to the first node 130 of the self-bias current source 10, which means that the second bias circuit 54 obtains the bias current generated by the self-bias current source 10. This bias current is usually used to control the current in other circuits to maintain their stability and operating point.

[0142] In some embodiments, the second bias circuit 54 is also connected to the second current mirror 51, the second reference circuit 52 and the super source follower 30, respectively. Specifically, the second bias circuit 54 is connected to the second current mirror 51 to provide a bias voltage for the second current mirror 51 to ensure the normal operation of the second current mirror 51. The second current mirror 51 is generally used to copy the current and provide the required current in the circuit. The second bias circuit 54 is connected to the second reference circuit 52 to ensure that the second reference circuit 52 can generate an accurate second reference voltage for use in other parts of the mixed signal circuit. The second bias circuit 54 is connected to the super source follower 30 to provide a bias voltage for the super source follower 30. This helps to ensure that the super source follower 30 can follow the first reference voltage generated by the reference voltage generation module 1 and provide a stable voltage for subsequent loads.

[0143] Through this connection mode, the second bias circuit 54 plays a key role in the power supply system 101, providing necessary current and voltage references for various components, which helps to maintain the stability and performance of the power supply system 101 and ensures that it can work normally under different working conditions.

[0144] In some embodiments, the second bias circuit 54 may include a twenty-second transistor 541 , a twenty-third transistor 542 , and a twenty-fourth transistor 543 .

[0145] The first end of the twenty-second transistor 541 is connected to a preset power source. The first end of the twenty-third transistor 542 is connected to the second end of the twenty-second transistor 541, the control end of the twenty-third transistor 542 is connected to the control end of the twenty-second transistor 541, and the second end of the twenty-third transistor 542 is connected to the control end of the twenty-third transistor 542. The first end of the twenty-fourth transistor 543 is connected to the second end of the twenty-third transistor 542, the second end of the twenty-fourth transistor 543 is grounded, and the control end of the twenty-fourth transistor 543 is connected to the first node 130 of the self-bias current source 10. Therefore, the twenty-fourth transistor 543 can copy the current of the self-bias current source 10 to provide bias current to the twenty-second transistor 541 and the twenty-third transistor 542.

[0146] like Figure 5 As shown, the twenty-second transistor 541 and the twenty-third transistor 542 may be transistors of a PMOS structure, and the twenty-fourth transistor 543 may be a transistor of an NMOS structure. Of course, transistors of other suitable structures may also be used. Figure 5 Just as an example.

[0147] In some embodiments, the second current mirror 51 may further include a twenty-fifth transistor 514. The first end of the twenty-fifth transistor 514 is connected to the second end of the sixteenth transistor 511, and is used to receive the output current of the sixteenth transistor 511. At the same time, the second end of the twenty-fifth transistor 514 is connected to the first end of the seventeenth transistor 512 through the sixth node 513 to achieve current transmission. The control end of the twenty-fifth transistor 514 is connected to the second end of the twenty-third transistor 542 and the control end of the twenty-third transistor 542. This connection method indicates that the conduction and cutoff of the twenty-fifth transistor 514 can be controlled by the twenty-third transistor 542 to ensure the accuracy and stability of current replication.

[0148] like Figure 5 As shown, the twenty-fifth transistor 514 may be a transistor of a PMOS structure, and of course, transistors of other suitable structures may also be used. Figure 5 Just as an example.

[0149] In some embodiments, the second reference circuit 52 may further include a twenty-sixth transistor 525. The first end of the twenty-sixth transistor 525 is connected to the second end of the eighteenth transistor 521, and the second end of the twenty-sixth transistor 525 is connected to the first end of the nineteenth transistor 522. This connection mode allows current to flow between the eighteenth transistor 521 and the nineteenth transistor 522, thereby achieving current transfer. The control end of the twenty-sixth transistor 525 is connected to the control end of the twenty-fifth transistor 514, the control end of the twenty-third transistor 542, and the second end of the twenty-third transistor 542. This shows that the conduction and cutoff of the twenty-sixth transistor 525 can be controlled by multiple transistors to ensure accurate transfer and stability of current.

[0150] like Figure 5 As shown, the twenty-sixth transistor 525 may be a transistor of a PMOS structure, and of course, transistors of other suitable structures may also be used. Figure 5 Just as an example.

[0151] In some embodiments, the super source follower 30 may further include a twenty-seventh transistor 37. The first end of the twenty-seventh transistor 37 is connected to the second end of the twelfth transistor 31, and the second end of the twenty-seventh transistor 37 is connected to the first end of the thirteenth transistor 32. This connection method allows current to flow between the twelfth transistor 31 and the thirteenth transistor 32, thereby achieving current transfer. The control end of the twenty-seventh transistor 37 is connected to the control end of the twenty-third transistor 542 and the second end of the twenty-third transistor 542. This means that the conduction and cutoff of the twenty-seventh transistor 37 can be controlled by the twenty-third transistor 542 to ensure accurate current transfer and stability.

[0152] With this connection design, the super source follower 30 can control the current between the twelfth and thirteenth transistors 32 according to the current of the twenty-third transistor 542. This helps maintain the stability of the super source follower 30 and ensures that its output voltage remains accurate under different load conditions.

[0153] In some embodiments, the sixteenth transistor 511 and the twenty-fifth transistor 514, the eighteenth transistor 521 and the twenty-sixth transistor 525, the twelfth transistor 31 and the twenty-seventh transistor 37 can be combined in pairs to form three low-voltage common-source and common-gate current mirrors. Among them, the twenty-fifth transistor 514, the twenty-sixth transistor 525 and the twenty-seventh transistor 37 can be common-source and common-gate transistors. Since the current mirror can adopt a common-source and common-gate structure, the output impedance of the current source is significantly increased, the influence of the channel length modulation effect is reduced, and the sensitivity of the output second reference voltage and the load output voltage of the super source follower 30 to the power supply voltage is reduced, the system's ability to resist power supply interference is enhanced, and the entire power supply system 101 is more stable and reliable.

[0154] like Figure 5 As shown, the twenty-seventh transistor 37 may be a transistor of a PMOS structure, and of course, transistors of other suitable structures may also be used. Figure 5 Just as an example.

[0155] like Figure 3 and Figure 5 As shown, the power supply system 101 also includes a startup circuit 6. The startup circuit 6 is connected to the self-bias current source 10, which means that it can access or monitor the state or output of the self-bias current source 10. The self-bias current source 10 can be used to provide a stable bias current for the system to ensure that each component operates at the correct operating point. The startup circuit 6 is also connected to the pre-regulator module 5. This connection may be used to control the startup or operating mode of the pre-regulator module 5. The pre-regulator module 5 plays a key role in the power supply system 101, which can ensure that the various components of the reference voltage generation module 1 can work normally and produce a stable output.

[0156] In some embodiments, the start-up circuit 6 outputs a start-up instruction according to a power trigger signal. This signal may be an external trigger signal, for example, from a user, other circuits or sensors, etc., used to start or control the operation of the power supply system 101. This may include starting various modules, activating circuits or generating operating voltages to ensure the normal operation of the power supply system 101.

[0157] Therefore, the role of the startup circuit 6 can be to ensure that the power supply system 101 can be started when needed and maintain stable operation after startup. Through the connection with the self-bias current source 10 and the pre-regulator module 5, it can monitor and control key components to meet the requirements of the power trigger signal. This helps to ensure that the power supply system 101 is always in a proper working state to meet the power supply requirements of different applications.

[0158] In some embodiments, the startup circuit 6 includes a twenty-eighth transistor 60 , a twenty-ninth transistor 61 , a thirtieth transistor 62 , a thirty-first transistor 63 , a thirty-second transistor 64 , a thirty-third transistor 65 and a thirty-fourth transistor 66 .

[0159] Among them, the second terminal of the twenty-eighth transistor 60 is grounded, and the control terminal of the twenty-eighth transistor 60 is connected to the first node 130 in the self-bias current source 10, which indicates that it is related to the self-bias current source 10 and can be used to monitor or control the state of the self-bias current source 10. The second terminal of the twenty-ninth transistor 61 is connected to the first terminal of the twenty-eighth transistor 60, and the control terminal of the twenty-ninth transistor 61 is connected to the seventh node 524. This can indicate that it is used to detect or respond to the signal of the seventh node 524. The second terminal of the thirtieth transistor 62 is connected to the first terminal of the twenty-ninth transistor 61, and the control terminal of the thirtieth transistor 62 is connected to the second terminal of the thirtieth transistor 62. The first terminal of the thirty-first transistor 63 is connected to the preset power supply, the second terminal of the thirty-first transistor 63 is connected to the first terminal of the thirtieth transistor 62, and the control terminal of the thirty-first transistor 63 is grounded.

[0160] The second end of the thirty-second transistor 64 is connected to the first node 130 of the self-biased current source 10, and the control end of the thirty-second transistor 64 is suitable for inputting a power supply triggering the same phase signal. This can be used to control the working mode of the circuit or the startup operation. The second end of the thirty-third transistor 65 is connected to the second end of the thirty-second transistor 64 and the first node 130 of the self-biased current source 10, the first end of the thirty-third transistor 65 is connected to the first end of the thirty-second transistor 64, and the control end of the thirty-third transistor 65 is suitable for inputting a power supply triggering a reverse phase signal. This can be used for reverse operation or a more complex startup sequence. The second end of the thirty-fourth transistor 66 is connected to the first end of the thirty-third transistor 65 and the first end of the thirty-second transistor 64, the second end of the thirty-fourth transistor 66 is connected to the control end of the sixteenth transistor 511 through the sixth node 513, and the control end of the thirty-fourth transistor 66 and the control end of the thirtieth transistor 62 are connected to the eighth node 70.

[0161] Therefore, the connection and interaction between these transistors will help determine the state of the power trigger signal and generate corresponding startup instructions to ensure that the power supply system 101 can be started and run stably when needed.

[0162] like Figure 5 As shown, the twenty-eighth transistor 60, the twenty-ninth transistor 61, the thirty-third transistor 65 and the thirty-fourth transistor 66 may be transistors of NMOS structure, the thirtieth transistor 62 and the thirty-first transistor 63 may be transistors of PMOS structure, and of course transistors of other suitable structures may also be used. Figure 5 Just as an example.

[0163] In some embodiments, the startup circuit 6 further includes a thirty-fifth transistor 67 , a thirty-sixth transistor 68 , and a thirty-seventh transistor 69 .

[0164] The first end of the thirty-fifth transistor 67 is connected to the preset power supply, the second end of the thirty-fifth transistor 67 is connected to the eighth node 70, and the control end of the thirty-fifth transistor 67 is connected to the control end of the thirty-third transistor 65. The first end of the thirty-sixth transistor 68 is connected to the preset power supply, the second end of the thirty-sixth transistor 68 is connected to the sixth node 513, and the control end of the thirty-sixth transistor 68 is connected to the control end of the thirty-third transistor 65. The first end of the thirty-seventh transistor 69 is connected to the preset power supply, the second end of the thirty-seventh transistor 69 is connected to the second end of the twenty-first transistor 533, and the control end of the thirty-seventh transistor 69 is connected to the control end of the thirty-third transistor 65.

[0165] like Figure 5 and Figure 6 As shown, PDM<3:1> is a multi-bit signal used to control the operation of the startup circuit 6. PDA and PDB can represent signals with the same phase and opposite phase as the PowerDown signal. In normal startup operation, the states of these signals will assist the operation of the startup circuit 6.

[0166] In the embodiment of the present invention, PDM<3:1> may represent three MOS transistors (i.e., the 35th transistor 67, the 36th transistor 68, and the 37th transistor 69). The drain terminal of PDM<3:1> is connected to the three voltage lines VPNST, VDDL4BIAS, and Vref1 respectively. The three voltage signals VPNST, VDDL4BIAS, and Vref1 are set to a high potential to ensure that metastable states or unstable power supply voltages do not occur during the startup process. This helps to accelerate the startup speed and ensure the stability of the startup process.

[0167] In some embodiments, the gate terminal of the 21st transistor 533 is pulled to a high potential to accelerate startup. A large RC filter may cause the voltage to rise and fall for a longer time. Pulling up the gate terminal voltage of the 21st transistor 533 can help speed up the rise of the power supply voltage, thereby accelerating startup.

[0168] In some embodiments, the gate-drain terminal of the nineteenth transistor 522 is pulled low to prevent the power supply current from leaking through the path of the second reference circuit 52. At startup, it is necessary to ensure that the current does not flow through this path.

[0169] In some embodiments, the specific working process of the startup circuit 6 may include: before startup, the gate terminal voltage of the twenty-eighth transistor 60 is low, the gate terminal voltage of the sixteenth transistor 511 is high, and these two MOS transistors are in the cut-off state.

[0170] Furthermore, at startup, under the control of the PDM signals (PDA and PDB), the thirty-second transistor 64 and the thirty-third transistor 65 begin to conduct, and the thirty-fourth transistor 66 also conducts. The sixteenth transistor 511 begins to charge, the gate terminal voltage of the twenty-eighth transistor 60 gradually increases, and the gate terminal voltage of the sixteenth transistor 511 gradually decreases until both the sixteenth transistor 511 and the twenty-eighth transistor 60 are turned on. This process ensures that there is current in each branch current mirror, and the circuit starts to start.

[0171] Further, once the circuit is started, the twenty-eighth transistor 60 and the twenty-ninth transistor 61 are turned on, at which time the gate terminal voltage of the thirtieth transistor 62 connected through the diode is pulled down, the thirtieth transistor 62 is turned on, the thirty-first transistor 63 is turned off, and the start-up circuit 6 stops working.

[0172] In general, the design of this startup circuit 6 takes into account the stability of the power supply voltage and the need for accelerated startup. By controlling the conduction state of each transistor and using the PDM signal to control the entire startup process, it can be ensured that the system reaches a stable state at startup and can work in normal operation mode. This startup circuit 6 design is crucial to the reliability and performance of mixed signal circuits.

[0173] Reference below Figure 7 An image sensor according to an embodiment of the present invention is described.

[0174] Figure 7 is a block diagram of an image sensor 100 according to an embodiment of the present invention. Figure 7 As shown, the image sensor 100 includes the power supply system 101 described in the above embodiment.

[0175] In some embodiments, the image sensor 100 may be a device for capturing images or videos, and is typically used in applications such as cameras, camcorders, and security systems. The stability and performance of the power supply system 101 are critical to the image sensor 100 because they directly affect the quality of the image and the reliability of the sensor. By adopting the power supply system 101 described in the above embodiment, it can be ensured that the image sensor 100 can obtain a stable bias voltage and an appropriate bias current under different working conditions to ensure image stability and imaging quality.

[0176] For the image sensor chip, the power supply system 101 is an on-chip power supply system.

[0177] The image sensor 100 according to the embodiment of the present invention can generate a stable first reference voltage by adopting the power supply system 101 described in the above embodiment, thereby ensuring that the entire system can operate stably and provide the required power supply voltage to meet the various functional requirements of the mixed signal circuit. The power supply system does not require capacitor compensation and will not affect the power supply startup and response speed.

[0178] Furthermore, the system does not require the introduction of operational amplifiers, nor does it require the use of capacitors for compensation, thereby reducing the occupied chip area, simplifying the structure, improving the chip integration, and reducing the manufacturing cost.

[0179] Based on the image sensor of the above embodiment, the present invention further provides an electronic device.

[0180] Figure 8 is a block diagram of an electronic device according to an embodiment of the present invention, such as Figure 8 As shown, the electronic device 1000 includes the image sensor 100 of the above embodiment.

[0181] In the embodiment, the electronic device 1000 may include but is not limited to a mobile phone, a computer, a tablet or a vehicle-mounted device.

[0182] According to the electronic device 1000 of the embodiment of the present invention, the image sensor 100 is powered more stably through the image sensor 100, so that more stable image information can be obtained, thereby improving the performance of the electronic device.

[0183] Based on the image sensor of the above embodiment, the present invention also provides a vehicle.

[0184] Fig. 9 is a block diagram of a vehicle according to an embodiment of the present invention, such as Fig. 9 As shown, the vehicle 2000 includes the image sensor 100 of the above embodiment.

[0185] The vehicle 2000 according to the embodiment of the present invention can obtain more stable image information by adopting the image sensor 100 of the above embodiment, so that the control strategy based on the image information is more stable and accurate, thereby improving safety.

[0186] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0187] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A reference voltage generating module, characterized in that: The reference voltage generating module comprises: A self-bias current source, the self-bias current source comprising: A micro current source is used to generate a bias current with a positive temperature coefficient. A first current mirror, wherein the first current mirror is connected to the micro-current source, and the first current mirror is a low-voltage common-source common-gate structure, and is used for mirroring the bias current; A first reference circuit is connected to the first current mirror, and is used to generate a current with a negative temperature coefficient and generate a first reference voltage based on the bias current and the current with the negative temperature coefficient.

2. The reference voltage generating module according to claim 1, characterized in that: The micro-current source comprises a widlar current source.

3. The reference voltage generating module according to claim 2, characterized in that: The widlar current source comprises: a first transistor, wherein a first terminal of the first transistor is connected to the first current mirror; a second transistor, wherein a first terminal of the second transistor is connected to the first current mirror, a control terminal of the second transistor is connected to the control terminal of the first transistor, a first node is provided between the control terminal of the second transistor and the control terminal of the first transistor, and a second terminal of the second transistor is grounded; A first resistor, wherein a first end of the first resistor is connected to the second end of the first transistor, and a second end of the first resistor is grounded.

4. The reference voltage generating module according to any one of claims 1 to 3, characterized in that: The current gain of the first current mirror is 1.

5. The reference voltage generating module according to claim 4, characterized in that: The first current mirror comprises: a current mirror unit, the current mirror unit being connected to the first end of the first transistor and the first end of the second transistor respectively, and being used for mirroring the bias current generated by the micro-current source; A current output unit, wherein the current output unit is connected to the current mirror unit and the first reference circuit respectively, and is used to output the bias current.

6. The reference voltage generating module according to claim 5, characterized in that: The current output unit comprises: A third transistor and a fourth transistor, wherein the first end of the third transistor is connected to the first end of the fourth transistor, the control end of the fourth transistor is connected to the control end of the third transistor, and a second node is provided between the control end of the third transistor and the control end of the fourth transistor.

7. The reference voltage generating module according to claim 6, characterized in that: The current mirror unit comprises: a fifth transistor, wherein a first end of the fifth transistor is connected to the second end of the third transistor, and a second end of the fifth transistor is connected to both the first end of the first transistor and the second node; A sixth transistor, wherein a first end of the sixth transistor is connected to the second end of the fourth transistor, a second end of the sixth transistor is connected to the first end of the second transistor, and a control end of the sixth transistor is connected to the control end of the fifth transistor.

8. The reference voltage generating module according to claim 7, characterized in that: The self-bias current source further comprises: A first bias circuit is connected to the widlar current source and the first current mirror respectively, and is used to provide a bias voltage for the widlar current source.

9. The reference voltage generating module according to claim 8, characterized in that: The first bias circuit comprises: a seventh transistor, wherein a first end of the seventh transistor is connected to the first end of the third transistor and the first end of the fourth transistor, and a control end of the seventh transistor is connected to the second end of the seventh transistor, the control end of the fifth transistor and the control end of the sixth transistor; an eighth transistor, wherein a first terminal of the eighth transistor is connected to the second terminal of the seventh transistor, a second terminal of the eighth transistor is grounded, and a control terminal of the eighth transistor is connected to the first node.

10. The reference voltage generating module according to claim 9, characterized in that: The self-bias current source further comprises: A ninth transistor, wherein the control terminal of the ninth transistor is connected to the first node, the second terminal of the ninth transistor is grounded, and the first terminal of the ninth transistor is suitable for being connected to an external module to provide a bias current for the external module.

11. The reference voltage generating module according to claim 9, characterized in that: The first reference circuit comprises: a tenth transistor, a first end of the tenth transistor being connected to the first end of the third transistor and the first end of the fourth transistor, and a control end of the tenth transistor being connected to the second node; a second resistor, wherein a first end of the second resistor is connected to the second end of the tenth transistor, and a third node is provided between the first end of the second resistor and the second end of the tenth transistor to output the first reference voltage; An eleventh transistor, wherein a first end of the eleventh transistor is connected to a second end of the second resistor, and a second end of the eleventh transistor and a control end of the eleventh transistor are both grounded.

12. A power supply system, characterized in that: include: The reference voltage generating module according to any one of claims 1 to 11; A power driving module is connected to the reference voltage generating module and is used to output a power supply voltage according to a first reference voltage output by the reference voltage generating module.

13. The power supply system according to claim 12, characterized in that: The power drive module comprises: A super source follower is connected to the output end of the reference voltage generating module, and the super source follower is also connected to the distributed source followers to drive different loads.

14. The power supply system according to claim 13, characterized in that: The power supply system further comprises: A pre-voltage stabilization module is connected to the reference voltage generation module and is used to provide an operating voltage for a self-bias current source of the reference voltage generation module and a first reference circuit.

15. The power supply system according to claim 14, characterized in that: The pre-voltage stabilization module comprises: a second current mirror, connected to the self-bias current source and the super source follower, for obtaining a bias current of the self-bias current source; a second reference circuit, the second reference circuit being connected to the second current mirror and configured to generate a second reference voltage based on the bias current; A voltage-stabilizing output circuit is connected to the second reference circuit and the reference voltage generating module, and is used to output the operating voltage.

16. The power supply system according to claim 15, characterized in that: The super source follower comprises: a twelfth transistor, wherein a first terminal of the twelfth transistor is connected to a preset power supply, and a control terminal of the twelfth transistor is connected to the second current mirror; a thirteenth transistor, wherein a first end of the thirteenth transistor is connected to a second end of the twelfth transistor, a fourth node is provided between the first end of the thirteenth transistor and the second end of the twelfth transistor to output the supply voltage, and a control end of the thirteenth transistor is connected to a third node of the first reference circuit to input a first reference voltage; a fourteenth transistor, wherein a first terminal of the fourteenth transistor is connected to a second terminal of the thirteenth transistor, a second terminal of the fourteenth transistor is grounded, a control terminal of the fourteenth transistor is connected to a first node in the self-bias current source, and a fifth node is provided between the first terminal of the fourteenth transistor and the second terminal of the thirteenth transistor; A fifteenth transistor, wherein a first terminal of the fifteenth transistor is connected to the fourth node, a second terminal of the fifteenth transistor is grounded, and a control terminal of the fifteenth transistor is connected to the fifth node.

17. The power supply system according to claim 16, characterized in that: The second current mirror comprises: a sixteenth transistor, wherein a first end of the sixteenth transistor is connected to the preset power supply, a second end of the sixteenth transistor is connected to a control end of the sixteenth transistor, and the control end of the sixteenth transistor is also connected to the control end of the twelfth transistor; A seventeenth transistor, wherein the first end of the seventeenth transistor is connected to the second end of the sixteenth transistor, the second end of the seventeenth transistor is grounded, a sixth node is provided between the first end of the seventeenth transistor and the second end of the sixteenth transistor, and the control end of the seventeenth transistor is connected to the first node in the self-bias current source to obtain the bias current.

18. The power supply system according to claim 17, characterized in that: The second reference circuit comprises: an eighteenth transistor, a first terminal of the eighteenth transistor being connected to the preset power source, and a control terminal of the eighteenth transistor being connected to the control terminal of the sixteenth transistor; a nineteenth transistor, wherein a first end of the nineteenth transistor is connected to a second end of the eighteenth transistor, a seventh node is provided between the first end of the nineteenth transistor and the second end of the eighteenth transistor, and a control end of the nineteenth transistor is connected to the first end of the nineteenth transistor; A twentieth transistor, wherein a first terminal of the twentieth transistor is connected to the second terminal of the nineteenth transistor, and a second terminal of the twentieth transistor and a control terminal of the twentieth transistor are both grounded.

19. The power supply system according to claim 18, characterized in that: The voltage stabilizing output circuit comprises: a first filter, wherein a first end of the first filter is connected to the seventh node; a second filter, wherein a first end of the second filter is connected to the preset power supply; A twenty-first transistor, wherein the first end of the twenty-first transistor is connected to the second end of the second filter, the control end of the twenty-first transistor is connected to the second end of the first filter, and the second end of the twenty-first transistor is respectively connected to the self-bias current source and the first reference circuit to provide the operating voltage for the self-bias current source and the first reference circuit.

20. The power supply system according to claim 18, characterized in that: The pre-voltage stabilization module also includes: A second bias circuit is connected to the first node of the self-bias current source to obtain the bias current, and the second bias circuit is also connected to the second current mirror, the second reference circuit and the super source follower respectively to provide a bias voltage.

21. The power supply system according to claim 19, characterized in that: The second bias circuit comprises: a twenty-second transistor, wherein a first end of the twenty-second transistor is connected to the preset power supply; a twenty-third transistor, a first end of the twenty-third transistor being connected to the second end of the twenty-second transistor, a control end of the twenty-third transistor being connected to the control end of the twenty-second transistor, and a second end of the twenty-third transistor being connected to the control end of the twenty-third transistor; A twenty-fourth transistor, wherein the first terminal of the twenty-fourth transistor is connected to the second terminal of the twenty-third transistor, the second terminal of the twenty-fourth transistor is grounded, and the control terminal of the twenty-fourth transistor is connected to the first node of the self-bias current source.

22. The power supply system according to claim 21, characterized in that: The second current mirror further includes: A twenty-fifth transistor, the first end of the twenty-fifth transistor is connected to the second end of the sixteenth transistor, the second end of the twenty-fifth transistor is connected to the first end of the seventeenth transistor through the sixth node, and the control end of the twenty-fifth transistor is connected to the second end of the twenty-third transistor and the control end of the twenty-third transistor.

23. The power supply system according to claim 22, characterized in that: The second reference circuit further includes: A twenty-sixth transistor, the first end of the twenty-sixth transistor is connected to the second end of the eighteenth transistor, the second end of the twenty-sixth transistor is connected to the first end of the nineteenth transistor, and the control end of the twenty-sixth transistor is connected to the control end of the twenty-fifth transistor, the control end of the twenty-third transistor, and the second end of the twenty-third transistor.

24. The power supply system according to claim 23, characterized in that: The super source follower also includes: A twenty-seventh transistor, the first end of the twenty-seventh transistor is connected to the second end of the twelfth transistor, the second end of the twenty-seventh transistor is connected to the first end of the thirteenth transistor, and the control end of the twenty-seventh transistor is connected to the control end of the twenty-third transistor and the second end of the twenty-third transistor.

25. The power supply system according to claim 19, characterized in that: The power supply system further comprises: A startup circuit is connected to the self-bias current source and the pre-voltage stabilization module, and is used to output a startup instruction according to a power trigger signal.

26. The power supply system according to claim 25, characterized in that: The startup circuit comprises: a twenty-eighth transistor, a second terminal of the twenty-eighth transistor being grounded, and a control terminal of the twenty-eighth transistor being connected to a first node in the self-bias current source; a twenty-ninth transistor, a second terminal of the twenty-ninth transistor being connected to the first terminal of the twenty-eighth transistor, and a control terminal of the twenty-ninth transistor being connected to the seventh node; a thirtieth transistor, a second terminal of the thirtieth transistor being connected to the first terminal of the twenty-ninth transistor, and a control terminal of the thirtieth transistor being connected to the second terminal of the thirtieth transistor; a thirty-first transistor, a first terminal of the thirty-first transistor being connected to the preset power supply, a second terminal of the thirty-first transistor being connected to the first terminal of the thirtieth transistor, and a control terminal of the thirty-first transistor being grounded; a thirty-second transistor, a second terminal of the thirty-second transistor being connected to the first node of the self-bias current source, and a control terminal of the thirty-second transistor being adapted to input a power supply triggering same phase signal; a thirty-third transistor, a second end of the thirty-third transistor being connected to the second end of the thirty-second transistor and the first node of the self-bias current source, a first end of the thirty-third transistor being connected to the first end of the thirty-second transistor, and a control end of the thirty-third transistor being adapted to input a power supply trigger reverse phase signal; A thirty-fourth transistor, the second end of the thirty-fourth transistor is connected to the first end of the thirty-third transistor and the first end of the thirty-second transistor, the second end of the thirty-fourth transistor is connected to the control end of the sixteenth transistor through the sixth node, and the control end of the thirty-fourth transistor and the control end of the thirtieth transistor are connected to the eighth node.

27. The power supply system according to claim 26, characterized in that: The startup circuit also includes: a thirty-fifth transistor, a first terminal of the thirty-fifth transistor being connected to the preset power source, a second terminal of the thirty-fifth transistor being connected to the eighth node, and a control terminal of the thirty-fifth transistor being connected to the control terminal of the thirty-third transistor; a thirty-sixth transistor, a first terminal of the thirty-sixth transistor being connected to the preset power supply, a second terminal of the thirty-sixth transistor being connected to the sixth node, and a control terminal of the thirty-sixth transistor being connected to the control terminal of the thirty-third transistor; A thirty-seventh transistor, wherein the first end of the thirty-seventh transistor is connected to the preset power supply, the second end of the thirty-seventh transistor is connected to the second end of the twenty-first transistor, and the control end of the thirty-seventh transistor is connected to the control end of the thirty-third transistor.

28. An image sensor, characterized in that: A power supply system comprising any one of claims 12-27.

29. An electronic device, characterized in that: Comprising the image sensor of claim 28.

30. A vehicle, characterized in that: Comprising the image sensor of claim 28.

Images