An automated selection system and method for SPI FLASH
The automated SPI FLASH selection system and method solves the performance evaluation problem of SPI Flash devices in XIP mode, implements an efficient and accurate testing process, and ensures reliable operation of the device under different voltage and voltage fluctuation conditions.
Patent Information
- Application Number
- CN202411974173.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-10-10
- Estimated Expiration
- 2044-12-30
AI Technical Summary
The prior art lacks qualified SPI Flash devices that can meet the XIP operation requirements, and existing SPI Flash memories cannot provide sufficient signal transmission rates to implement the XIP mode.
Provided is an automated SPI FLASH selection system and method, including an MCU controller module, a voltage output control module, and a SOC+SPI-FLASH test module. Through multi-voltage testing and erase power-off testing, the system dynamically adjusts voltage and monitors the startup and stability of the SPI FLASH, ensuring reliable operation of the device under different voltage environments.
It improves the test efficiency and accuracy of SPI FLASH, ensures the durability and reliability of the equipment under extreme conditions, and provides a more scientific and comprehensive performance evaluation.
Smart Images

Figure CN119883764B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of embedded storage technology, and in particular relates to an automatic selection system and method for SPI FLASH. Background Art
[0002] Barcode technology, short for barcode auto-identification technology, is an automatic symbol recognition technology developed and developed based on contemporary information technology. It integrates symbol encoding, data collection, automatic identification, data entry, and information storage, effectively solving the problem of collecting and automatically entering large amounts of data in real-world work and life.
[0003] Barcode reading is a technology that converts barcode images into data information. It primarily consists of two parts: barcode image acquisition and decoding. Barcode image acquisition uses an optical image sensor to scan the barcode image and convert the optical signal into an electrical signal. Decoding translates the acquired electrical signal into the corresponding data information according to specific rules. Barcode reading equipment can be categorized by different reading principles: laser reading equipment, linear CCD reading equipment, and area array CMOS / CCD reading equipment.
[0004] To achieve the best cost-effectiveness for barcode decoding solutions, a combination of hardware and software is often required, such as a SOC architecture MCU + hard decoding. However, in order for the MCU to run software programs, a FLASH storage device is essential. Currently, single-chip MCUs typically use two storage methods: one is EFLASH, which has a high process cost and the capacity cannot be adjusted after packaging. The other is to integrate SPI Flash through the SIP method, which is more cost-effective and can flexibly adjust the FLASH capacity according to specific application requirements. However, there is still a lack of qualified SPI Flash devices that can meet the requirements of XIP operation.
[0005] Chinese patent publication number CN114035853A discloses an MCU boot system and chip with an SPI interface. The MCU boot system includes a state machine circuit and two alternating buffers. The state machine circuit is connected to a flash memory with an SPI interface via an SPI bus and is used to read boot instruction segments from the flash memory. When two boot instruction segments read successively by the state machine circuit are consecutive, the two boot instruction segments are sent to one of the alternating buffers, and then the two boot instruction segments received successively in the same alternating buffer are sent to the MCU in sequence. Otherwise, the boot instruction segment read earlier is sent to one of the alternating buffers, and the boot instruction segment read later is sent to the other alternating buffer. In this operating state, one of the alternating buffers sends the received boot instruction segment to the MCU, and then the other alternating buffer sends the received boot instruction segment to the MCU. Although the MCU boot system proposed in this invention uses a flash memory with an SPI interface to read instructions, the flash memory cannot provide a sufficient signal transmission rate to implement XIP and improve execution speed. Summary of the Invention
[0006] The present invention provides an automatic selection system and method for SPI FLASH, aiming to solve the problem of evaluating multiple performance indicators during the selection process of SPI FLASH supporting XIP mode.
[0007] The technical solutions of the present invention are as follows:
[0008] In one aspect, the present invention provides an automatic selection system for SPI FLASH, comprising: an MCU controller module, a voltage output control module, and a SOC+SPI-FLASH test module.
[0009] The MCU controller module is used to control other modules to work according to the test program, communicate with the voltage output control module through the I2C interface module, and communicate with the SOC+SPI-FLASH test module through the UART serial port module.
[0010] The voltage output control module is used to output a variable voltage to the SOC+SPI-FLASH test module according to the instructions of the MCU controller module, providing working power for the SOC+SPI-FLASH test module; the SOC+SPI-FLASH test module serves as the tested module and reports its current status to the MCU controller module through the UART serial port module during the test.
[0011] Preferably, the system performs voltage testing specifically as follows:
[0012] S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0013] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size.
[0014] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.
[0015] S13: After completing each voltage test, the MCU controller module waits for the confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.
[0016] S14: If the MCU controller module receives a confirmation signal, it will output the next round of test voltage instructions and repeat steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
[0017] Preferably, the system performs the erase power-off test specifically as follows:
[0018] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0019] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.
[0020] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to normal, so as to re-power on the SOC+SPI-FLASH test module.
[0021] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.
[0022] S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
[0023] Preferably, the erase power-off procedure specifically includes: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.
[0024] In another aspect, the present invention provides an automated SPI FLASH selection method, comprising the following steps:
[0025] S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0026] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size.
[0027] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.
[0028] S13: After completing each voltage test, the MCU controller module waits for the confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.
[0029] S14: If the MCU controller module receives a confirmation signal, it will output the next round of test voltage instructions and repeat steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
[0030] Preferably, the method further comprises the following steps:
[0031] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0032] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.
[0033] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to normal, so as to re-power on the SOC+SPI-FLASH test module.
[0034] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.
[0035] S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
[0036] Preferably, the erase power-off procedure specifically includes: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.
[0037] On the other hand, the present invention also provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the automatic selection method for SPI FLASH as described in any embodiment of the present invention is implemented.
[0038] In another aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the method for automatically selecting an SPI FLASH as described in any embodiment of the present invention is implemented.
[0039] Compared with the prior art, the present invention has the following technical effects:
[0040] This invention dynamically adjusts voltage and monitors SPI FLASH startup and stability within multiple voltage test intervals, ensuring that SPI FLASH devices can reliably read, write, and execute data in varying voltage environments. Furthermore, by performing an erase and power-off test on the SPI FLASH, the impact of voltage fluctuations on the storage device is simulated, further verifying its durability and reliability under extreme conditions. The high-precision testing process and real-time feedback mechanism proposed in this invention not only improves testing efficiency but also ensures the accuracy and consistency of test data, providing a more scientific and comprehensive performance evaluation for SPI FLASH selection. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] Figure 1 This is the overall architecture diagram of the SPI FLASH automatic selection system described in the present invention. DETAILED DESCRIPTION
[0042] In order to make the objectives, technical solutions and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in combination with specific embodiments of the present application and with reference to the accompanying drawings.
[0043] Example 1
[0044] This embodiment provides an automatic selection system for SPI FLASH. Figure 1 As shown, it includes an MCU controller module, a voltage output control module, and a SOC+SPI-FLASH test module. The MCU controller module is used to control other modules to work according to the test program, communicate with the voltage output control module through the I2C interface module, and communicate with the SOC+SPI-FLASH test module through the UART serial port module.
[0045] The voltage output control module is used to output a variable voltage to the SOC+SPI-FLASH test module according to the instructions of the MCU controller module, providing working power for the SOC+SPI-FLASH test module; the SOC+SPI-FLASH test module serves as the tested module and reports its current status to the MCU controller module through the UART serial port module during the test.
[0046] Furthermore, the SPI-FLASH in the SOC+SPI-FLASH test module is connected in the form of a socket, so as to perform replacement verification of FLASH of different models and types.
[0047] As a preferred implementation of this embodiment, the system performs voltage testing specifically as follows:
[0048] S10: After the SOC+SPI-FLASH test module writes the voltage test program and powers on, the core function of the voltage test program is to report the current real-time status of the SOC+SPI-FLASH test module to the MCU controller module. After the SOC+SPI-FLASH test module is powered on, the SOC module will read the voltage test program from the SPI-FLASH module. After initializing the various interfaces of the test module, the voltage test program sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0049] S11: The MCU controller module outputs a voltage command to the voltage output control module based on the preset voltage, starting from the initial test voltage value and gradually increasing according to the preset step size. Specifically, to achieve the purpose of traversing various voltages, the MCU controller module can output in the form of KV->nV->KV. Here, K is the normal operating voltage of the FLASH, and n can increase upward from 0V in a preset step size (for example, 0.01V). The MCU controller module flexibly changes the voltage at both ends of the range from KV->nV->KV to suit different FLASH models.
[0050] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.
[0051] S13: After completing each voltage test, the MCU controller module waits for the confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.
[0052] S14: If the MCU controller module receives the confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed. If the MCU controller module does not receive the confirmation signal, it outputs a test error message and terminates the test. The test error message may specifically include the test voltage change that causes the dead zone.
[0053] As a preferred implementation of this embodiment, the system performs the erase power-off test specifically as follows:
[0054] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0055] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.
[0056] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to normal, so as to re-power on the SOC+SPI-FLASH test module.
[0057] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.
[0058] S24: If the MCU controller module receives the confirmation signal, it outputs the next round of voltage commands and repeats steps S21, S22, and S23 until the preset number of voltage changes is reached, completing the cyclic erase power-down test. If the MCU controller module does not receive the confirmation signal, it outputs a test error message and terminates the test. The test error message indicates that the SPI-FLASH has an erase power-down problem.
[0059] As a preferred embodiment of the present embodiment, the erasing power-off procedure is specifically: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erasing operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH will be damaged after the SPI-FLASH module is powered off randomly during the cyclic erasing operation on the unused storage block.
[0060] The FLASH working in the XIP mode is usually used as the program memory of the MCU. In the XIP mode, the MCU needs to read the instruction data from the FLASH every time an instruction is executed, and therefore the correctness of the data extracted from the FLASH must be ensured. The stability of the data in the FLASH can be effectively ensured by performing strict voltage tests and power-off erasing tests, so as to avoid data error output and ensure the normal operation of the program.
[0061] To verify the effectiveness and superiority of the method provided in the present embodiment, some specific cases are provided as follows:
[0062] The MCU controller module adopts the STM32103CBT6 chip of ST company, which has USB, I2C, UART and other peripheral interfaces, and can meet the demand of testing the master control chip. The voltage output control module is composed of the ADC chip MCP4716A0T with I2C interface and the voltage driving amplification chip AD8531ARTZ. The internal register of the ADC chip MCP4716A0T controls its variable analog voltage output, and the internal register can be accessed through the I2C interface. The output analog voltage has a current driving capacity of 300 mA under the action of the voltage driving chip AD8531ARTZ, and can provide strong load capacity for the output voltage. The SOC module in the SOC+SPI-FLASH test module adopts the IOTC0610 barcode decoding chip, and the internal MCU of the chip reads the SPI-FLASH in the XIP mode to run the program. The SPI-FLASH module to be tested is the GD25Q40C of Megachips, which supports the XIP mode and can run in the four-wire mode at a rate of 108 MHZ.
[0063] The system described in the present application example is run under the condition of room temperature of 25 degrees Celsius to perform two types of experimental tests.
[0064] Voltage test: The voltage drop test was conducted from 3.3V to nV to 3.3V. The value of n ranged from 0 to 2.8V, with a test performed every 0.01V. A total of 290 voltage values were taken, with each n voltage value corresponding to 100 voltage drop tests. These voltage tests confirmed that the IOTC0610 barcode decoder chip operated normally by reading the SPI-FLASH memory in XIP mode to run the program. The STM32103CBT6 MCU controller module received correct information from the SOC+SPI-FLASH test module via the UART serial port module, demonstrating that the GD25Q40C does not have a voltage drop dead zone.
[0065] Erase power-off test: A 16k BYTE sector was selected in the GD25Q40C for a cyclic erase operation. The FLASH power-off timing was randomly set between 0 and 10 seconds after power-on, with a total of 1000 power-off tests. The above power-off test confirmed that the IOTC0610 barcode decoder chip, which reads the SPI-FLASH in XIP mode to run the program, functioned normally. The STM32103CBT6 MCU controller module was able to receive correct information from the SOC+SPI-FLASH test module via the UART serial port module. This demonstrates that the GD25Q40C has strong anti-interference capabilities against power-off conditions during the erase process, ensuring data integrity and reliability.
[0066] Example 2
[0067] Accordingly, this embodiment provides an automatic SPI FLASH selection method. The method is implemented based on the automatic SPI FLASH selection system described in Example 1 and includes the following steps:
[0068] S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0069] S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size.
[0070] S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests on each voltage value.
[0071] S13: After completing each voltage test, the MCU controller module waits for the confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes.
[0072] S14: If the MCU controller module receives a confirmation signal, it will output the next round of test voltage instructions and repeat steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
[0073] As a preferred implementation of this embodiment, the method further includes the following steps:
[0074] S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally.
[0075] S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage instruction to the voltage output control module to adjust the voltage output to a low level.
[0076] S22: After a random delay period, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to normal, so as to re-power on the SOC+SPI-FLASH test module.
[0077] S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change.
[0078] S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
[0079] As a preferred implementation of this embodiment, the erase power-off procedure specifically includes: controlling the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reporting to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on the unused storage block.
[0080] Example 3
[0081] This embodiment provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the automatic SPI FLASH selection method according to any embodiment of the present invention is implemented.
[0082] Example 4
[0083] This embodiment provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the automatic SPI FLASH selection method according to any embodiment of the present invention is implemented.
[0084] In the embodiments of the present application, "at least one" refers to one or more, and "more" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can represent: a, b, c, a and b, a and c, b and c or a and b and c, where a, b, c can be single or multiple.
[0085] Those skilled in the art will appreciate that the various units and algorithm steps described in the embodiments disclosed herein can be implemented using a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0086] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0087] In the several embodiments provided in this application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of this application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory; hereinafter referred to as: ROM), random access memory (Random Access Memory; hereinafter referred to as: RAM), magnetic disk or optical disk, and other media that can store program code.
[0088] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention's description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. An automatic selection system for SPI FLASH, characterized in that: The system includes: an MCU controller module, a voltage output control module and an SOC+SPI-FLASH test module; The MCU controller module is used to control other modules to work according to the test program, communicate with the voltage output control module through the I2C interface module, and communicate with the SOC+SPI-FLASH test module through the UART serial port module; The voltage output control module is used to output a variable voltage to the SOC+SPI-FLASH test module according to the instruction requirements of the MCU controller module, providing working power for the SOC+SPI-FLASH test module; the SOC+SPI-FLASH test module serves as the tested module and reports its current status to the MCU controller module through the UART serial port module during the test process; The voltage test of the system is specifically as follows: S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally; S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size; S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests for each voltage value; S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes; S14: If the MCU controller module receives the confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive the confirmation signal, it outputs a test error message and terminates the test; The system performs the erase power-off test specifically as follows: S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally; S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage command to the voltage output control module to adjust the voltage output to a low level; S22: After a random delay, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to normal, so as to re-power on the SOC+SPI-FLASH test module; S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change; S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
2. The automatic selection system for SPI FLASH according to claim 1, characterized in that: The erase power-off test procedure specifically controls the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reports to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on unused storage blocks.
3. An automated SPI FLASH selection method, characterized in that: The method is implemented based on the automatic selection system for SPI FLASH according to any one of claims 1 to 2, and includes the following steps: S10: After the voltage test program is written and powered on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally; S11: The MCU controller module outputs a voltage instruction to the voltage output control module according to the preset voltage, starting from the initial test voltage value and gradually increasing according to the set step size; S12: The SOC+SPI-FLASH test module uses the test voltage output by the voltage output control module as a working power supply and performs a preset number of tests for each voltage value; S13: After completing each voltage test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the test voltage changes; S14: If the MCU controller module receives the confirmation signal, it outputs the next round of test voltage instructions and repeats steps S11, S12, and S13 until the voltage test within the preset voltage range is completed; if the MCU controller module does not receive the confirmation signal, it outputs a test error message and terminates the test; S20: After writing the erase power-off test program and powering on, the SOC+SPI-FLASH test module sends a confirmation signal to the MCU controller module through the UART serial port module to indicate that the SOC+SPI-FLASH test module has been successfully started and is operating normally; S21: After sending the confirmation signal, the SOC+SPI-FLASH test module starts to perform a cyclic erase operation on the unused storage blocks in the SPI-FLASH module; the MCU controller module will randomly delay for a period of time after receiving the confirmation signal, and after the delay, send a voltage command to the voltage output control module to adjust the voltage output to a low level; S22: After a random delay, the MCU controller module sends a voltage instruction to the voltage output control module to restore the voltage to normal, so as to re-power on the SOC+SPI-FLASH test module; S23: After completing each erase test, the MCU controller module waits for a confirmation signal fed back by the SOC module in the SOC+SPI-FLASH test module through the UART serial port module to determine whether the SOC+SPI-FLASH test module can still support startup after the voltage change; S24: If the MCU controller module receives a confirmation signal, it will output the next round of voltage instructions and repeat steps S21, S22, and S23 until the preset number of voltage changes is reached and the cyclic erase power-off test is completed; if the MCU controller module does not receive a confirmation signal, it will output a test error message and terminate the test.
4. The automatic selection method of SPI FLASH according to claim 3, characterized in that: The erase power-off test procedure specifically controls the SPI-FLASH test module in the SOC+SPI-FLASH test module to perform a cyclic erase operation, and reports to the MCU controller module whether the normal program in the SPI-FLASH is damaged after the SPI-FLASH module is randomly powered off during the cyclic erase operation on unused storage blocks.
5. An electronic device, comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the automatic selection method for SPI FLASH according to any one of claims 3 to 4 when executing the computer program.
6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the automatic selection method for SPI FLASH according to any one of claims 3 to 4 is implemented.
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