Semiconductor structure, preparation method thereof and storage system

Abstract

The invention provides a semiconductor structure and a preparation method thereof, and a storage system, the semiconductor structure comprises a first device layer, a first interconnection layer, a first bonding layer, a second bonding layer, a second interconnection layer and a second device layer which are sequentially stacked along a first direction, in the first direction, the first bonding layer and the second bonding layer are bonded and fixed, and in the second direction, the first interconnection layer and the second interconnection layer are bonded and fixed. The material of the first bonding layer comprises elements different from the material of the first interconnection layer; the first bonding layer and the second bonding layer are bonded and fixed in the first direction, and the material of the first bonding layer comprises elements different from the material of the first interconnection layer, so that the bonding strength between the first bonding layer and the second bonding layer is enhanced, diffusion of a metal material in the first bonding layer is at least reduced, and the bonding strength between the first bonding layer and the second bonding layer is improved. And the product performance of the semiconductor structure is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a semiconductor structure and a preparation method thereof, and a storage system. Background Art

[0002] As chip products are used more and more widely in electronic products, the requirements for the product performance of semiconductor structures in chip products are becoming higher and higher, and the performance of semiconductor structures also needs to be improved.

[0003] Therefore, there is an urgent need for a semiconductor structure and a preparation method thereof, and a storage system to solve the above technical problems. Summary of the invention

[0004] In view of this, the present application provides a semiconductor structure and a preparation method and a storage system thereof, which can enhance the bonding strength between a first bonding layer and a second bonding layer and at least reduce the diffusion of metal materials in the first bonding layer.

[0005] To solve the above problems, the technical solutions provided by this application are as follows:

[0006] The present application provides a semiconductor structure, comprising:

[0007] a first device layer;

[0008] a first interconnect layer located at one side of the first device layer in a first direction;

[0009] a first bonding layer, located on a side of the first interconnect layer away from the first device layer in the first direction;

[0010] a second bonding layer, located on a side of the first bonding layer away from the first interconnection layer in the first direction;

[0011] a second interconnection layer, located on a side of the second bonding layer away from the first bonding layer in the first direction;

[0012] a second device layer, located on a side of the second interconnect layer away from the second bonding layer in the first direction;

[0013] Wherein, in the first direction, the first bonding layer is bonded and fixed to the second bonding layer, and the material of the first bonding layer contains an element different from the material of the first interconnection layer.

[0014] In some embodiments of the present application, the material of the first bonding layer has at least Si atoms, O atoms and first atoms, there is a Si-O bond between the Si atoms and the O atoms, there is a first covalent bond between the Si atoms and the first atom, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer.

[0015] In some embodiments of the present application, the material of the first bonding layer further has a second atom, a second covalent bond exists between the Si atom and the second atom, and the bond length of the second covalent bond is smaller than the bond length of the Si—O bond in the material of the first bonding layer.

[0016] In some embodiments of the present application, the bond energy of the first covalent bond is lower than the bond energy of the Si—O bond in the material of the first bonding layer; and / or,

[0017] The bond energy of the second covalent bond is lower than the bond energy of the Si—O bond in the material of the first bonding layer.

[0018] In some embodiments of the present application, a material of the second bonding layer includes an element different from a material of the second interconnect layer.

[0019] In some embodiments of the present application, the material of the second bonding layer has at least Si atoms, O atoms and first atoms, there is a Si-O bond between the Si atoms and the O atoms, there is a first covalent bond between the Si atoms and the first atom, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer.

[0020] In some embodiments of the present application, the material of the second bonding layer further has a second atom, a second covalent bond exists between the Si atom and the second atom, and the bond length of the second covalent bond is smaller than the bond length of the Si—O bond in the material of the second bonding layer.

[0021] In some embodiments of the present application, the bond energy of the first covalent bond is lower than the bond energy of the Si—O bond in the material of the second bonding layer; and / or,

[0022] The bond energy of the second covalent bond is lower than the bond energy of the Si—O bond in the material of the second bonding layer.

[0023] In some embodiments of the present application, the first atom is selected from one of a carbon atom and a nitrogen atom, and the second atom is selected from the other of a carbon atom and a nitrogen atom.

[0024] In some embodiments of the present application, the first covalent bond is selected from one of a Si-C bond and a Si-N bond, and the second covalent bond is selected from the other of a Si-C bond and a Si-N bond.

[0025] In some embodiments of the present application, in the first bonding layer, the atomic percentage of carbon atoms is greater than or equal to 10% and less than or equal to 40%, and the atomic percentage of nitrogen atoms is greater than or equal to 10% and less than or equal to 40%;

[0026] In the second bonding layer, the atomic percentage of carbon atoms is greater than or equal to 10% and less than or equal to 40%, and the atomic percentage of nitrogen atoms is greater than or equal to 10% and less than or equal to 40%.

[0027] In some embodiments of the present application, the bonding strength between the first bonding layer and the second bonding layer is greater than or equal to 2.2 J / m 2 .

[0028] In some embodiments of the present application, the thickness of the first bonding layer is greater than or equal to 20 nanometers and less than or equal to 200 nanometers;

[0029] The thickness of the second bonding layer is greater than or equal to 20 nanometers and less than or equal to 200 nanometers.

[0030] In some embodiments of the present application, the material of the first interconnect layer includes Si—O bonds, and the material of the second interconnect layer includes Si—O bonds.

[0031] In some embodiments of the present application, the semiconductor structure further includes a first bonding pad located in the first bonding layer, and a second bonding pad located in the second bonding layer, and the first bonding pad is connected to the second bonding pad in the first direction;

[0032] The first device layer includes memory cells, and the second device layer includes peripheral circuits;

[0033] The semiconductor structure further includes a first interconnect structure located within the first interconnect layer, and a second interconnect structure located within the second interconnect layer;

[0034] The first interconnect structure is connected between the first bonding pad and the memory unit, and the second interconnect structure is connected between the second bonding pad and the peripheral circuit.

[0035] The present application also provides a method for preparing a semiconductor structure, comprising:

[0036] Forming a first interconnect layer and a first bonding layer stacked in sequence on one side of the first device layer in a first direction;

[0037] Forming a second interconnect layer and a second bonding layer stacked in sequence on one side of the second device layer in the first direction;

[0038] Bonding and fixing a side of the first bonding layer away from the first device layer and a side of the second bonding layer away from the second device layer in the first direction;

[0039] The step of forming the first bonding layer includes using a material containing an element different from a material of the first interconnect layer.

[0040] In some embodiments of the present application, the step of forming the first interconnect layer and the first bonding layer includes:

[0041] forming a first insulating material layer on one side of the first device layer in the first direction, wherein the material of the first insulating material layer has Si—O bonds;

[0042] A first bonding layer is formed on a side of the first insulating material layer away from the first device layer in the first direction, and the other part of the first insulating material layer forms a first interconnection layer.

[0043] In some embodiments of the present application, the step of forming the first bonding layer includes:

[0044] Injecting a first element into the first insulating material layer at a side of the first insulating material layer away from the first device layer in the first direction to form the first bonding layer;

[0045] The atoms of the first element and Si atoms form a first covalent bond in the first bonding layer, and the bond length of the first covalent bond is shorter than the Si—O bond in the material of the first bonding layer.

[0046] In some embodiments of the present application, the step of forming the first bonding layer includes:

[0047] Injecting a first element and a second element into the first insulating material layer at a side of the first insulating material layer away from the first device layer in the first direction to form the first bonding layer;

[0048] Among them, the atoms of the first element and the Si atoms form a first covalent bond in the first bonding layer, and the bond length of the first covalent bond is smaller than the Si-O bond in the material of the first bonding layer; the atoms of the second element and the Si atoms form a second covalent bond in the first bonding layer, and the bond length of the second covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer.

[0049] In some embodiments of the present application, the step of forming the second interconnect layer and the second bonding layer includes:

[0050] forming a second insulating material layer on one side of the second device layer in the first direction, wherein the material of the second insulating material layer includes Si—O bonds;

[0051] A second bonding layer is formed on a side of the second insulating material layer away from the second device layer in the first direction, and the other part of the second insulating material layer forms a second interconnection layer.

[0052] In some embodiments of the present application, the step of forming the second bonding layer includes:

[0053] Injecting a first element into the second insulating material layer at a side of the second insulating material layer away from the second device layer in the first direction to form the second bonding layer;

[0054] The atoms of the first element and Si atoms form a first covalent bond in the second bonding layer, and the bond length of the first covalent bond is smaller than the bond length of the Si—O bond in the material of the second bonding layer.

[0055] In some embodiments of the present application, the step of forming the second bonding layer includes:

[0056] Injecting a first element and a second element into the second insulating material layer at a side of the second insulating material layer away from the second device layer in the first direction to form the second bonding layer;

[0057] Among them, the atoms of the first element and the Si atoms form a first covalent bond in the second bonding layer, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer; the atoms of the second element and the Si atoms form a second covalent bond in the second bonding layer, and the bond length of the second covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer.

[0058] In some embodiments of the present application, the first element is selected from one of carbon and nitrogen, and the second element is selected from the other of carbon and nitrogen.

[0059] In some embodiments of the present application, the step of bonding and fixing the side of the first bonding layer away from the first device layer and the side of the second bonding layer away from the second device layer in the first direction includes:

[0060] Activating a side of the first bonding layer in the first direction away from the first device layer, and / or activating a side of the second bonding layer in the first direction away from the second device layer;

[0061] The bonding process is performed between a side of the second bonding layer away from the second device layer in the first direction and a side of the first bonding layer away from the first device layer in the first direction.

[0062] The present application also provides a storage system, the storage system comprising a memory and a controller, the controller being coupled to the memory and configured to control the memory to store data;

[0063] Wherein, the memory includes any of the above-mentioned semiconductor structures.

[0064] The semiconductor structure and its preparation method and storage system provided in the present application bond and fix the first bonding layer to the second bonding layer in a first direction. The material of the first bonding layer contains elements different from the material of the first interconnection layer. While enhancing the bonding strength between the first bonding layer and the second bonding layer, it at least reduces the diffusion of the metal material in the first bonding layer, thereby improving the product performance of the semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] In order to more clearly illustrate the technical solutions in some embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

[0066] Figure 1 This is a schematic diagram of the first structure of the semiconductor structure provided in the embodiment of the present application;

[0067] Figure 2 is a schematic diagram of a second structure of a semiconductor structure provided in an embodiment of the present application;

[0068] Figure 3 is a schematic diagram of a third structure of a semiconductor structure provided in an embodiment of the present application;

[0069] Figure 4 This is a schematic diagram of the fourth structure of the semiconductor structure provided in the embodiment of the present application;

[0070] Figure 5 This is a fifth structural schematic diagram of a semiconductor structure provided in an embodiment of the present application;

[0071] Figure 6 is a schematic diagram of the valence bond structure of the material of the first bonding layer and / or the material of the second bonding layer of the semiconductor structure provided by an embodiment of the present application;

[0072] Figure 7 is a flowchart of the steps of the method for preparing a semiconductor structure provided in an embodiment of the present application;

[0073] FIG. 8A to FIG. 8K It is a structural schematic diagram corresponding to each process in the method for preparing a semiconductor structure provided in an embodiment of the present application;

[0074] Fig. 9 It is a system block diagram of the storage system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0075] The following will be combined with the drawings in some embodiments of the present application to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of this application.

[0076] In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0077] The present application may repeat reference numerals and / or reference letters in different implementations. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various implementations and / or settings discussed.

[0078] See also Figure 1 In some embodiments, the bonding layer and the interconnect layer (eg,

[0079] Figure 1 The first interconnect layer 120' shown in the figure uses the same material, for example, silicon oxide material. The bonding strength of the first bonding layer 130' and the second bonding layer 140' is low and the metal material is easy to diffuse in the bonding layer, resulting in problems such as slicing, bubbles and gaps in the semiconductor structure 100' and electrical failure caused by electromigration, making it difficult to improve the product performance of the semiconductor structure.

[0080] See also Figure 2 In some embodiments, the materials of the first bonding layer 130' and the second bonding layer 140' have covalent bonds that are completely different from the materials of the first interconnection layer 120' and the second interconnection layer 150' (for example, the materials of the first bonding layer 130' and the second bonding layer 140' are SiCN compounds, and the material of the first interconnection layer is silicon oxide compounds), and metal is more easily diffused, causing the semiconductor structure 100' to be more prone to electrical failure and other problems.

[0081] See also Figures 3 to 5 , an embodiment of the present application provides a semiconductor structure 100, including:

[0082] A first device layer 101;

[0083] A first interconnection layer 102, located on one side of the first device layer 101 in a first direction X1;

[0084] A first bonding layer 103, located on a side of the first interconnect layer 102 away from the first device layer 101 in the first direction X1;

[0085] a second bonding layer 104, located on a side of the first bonding layer 103 away from the first interconnection layer 102 in the first direction X1;

[0086] A second interconnection layer 105, located on a side of the second bonding layer 104 away from the first bonding layer 103 in the first direction X1;

[0087] A second device layer 106, located on a side of the second interconnect layer 105 away from the second bonding layer 104 in the first direction X1;

[0088] In the first direction X1 , the first bonding layer 103 is bonded and fixed to the second bonding layer 104 , and the material of the first bonding layer 103 contains an element different from the material of the first interconnection layer 102 .

[0089] In some embodiments of the present application, the semiconductor structure 100 further includes a first bonding pad 107 located in the first bonding layer 103 and a second bonding pad 108 located in the second bonding layer 104 . In the first direction X1 , the first bonding pad 107 is connected to the second bonding pad 108 .

[0090] The material of the first bonding pad 107 and the material of the second bonding pad 108 include metal materials. For example, the material of the first bonding pad 107 and the second bonding pad 108 is selected from metal materials such as copper and tungsten.

[0091] In some embodiments of the present application, the material of the first bonding layer 103 further comprises the same covalent bonds as those of the first interconnect layer 102 .

[0092] In some embodiments of the present application, the material of the first bonding layer 103 at least has Si atoms, O atoms and first atoms, there is a Si-O bond between the Si atoms and the O atoms, there is a first covalent bond between the Si atoms and the first atoms, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer 103. By making the bond length of the first covalent bond in the material of the first bonding layer 103 smaller than the bond length of the Si-O bond in the material of the first bonding layer 103, it is easier to block the diffusion of metal materials in the first bonding layer 103. At the same time, the first covalent bond in the material of the first bonding layer 103 reduces the stress migration of the first bonding layer 103, which is beneficial to controlling the warping of the first bonding layer 103, thereby improving the reliability of the first bonding layer 103.

[0093] In some embodiments of the present application, the bond energy of the first covalent bond is lower than the bond energy of the Si-O bond in the material of the first bonding layer 103. When the first bonding layer 103 is bonded and fixed to the second bonding layer 104, under the same bonding conditions, the first covalent bond in the material of the first bonding layer 103 is more easily broken than the Si-O bond in the material of the first bonding layer 103 to form an active bonding site, thereby increasing the active bonding sites and enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0094] In some embodiments of the present application, the material of the first bonding layer 103 further has a second atom, and a second covalent bond exists between the Si atom and the second atom, and the bond length of the second covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer 103. The first atom is different from the second atom, and similar to the first covalent bond, the bond length of the second covalent bond in the material of the first bonding layer 103 is smaller than the bond length of the Si-O bond in the material of the first bonding layer 103, and it is easier to block the diffusion of metal materials in the first bonding layer 103. At the same time, the second covalent bond in the material of the first bonding layer 103 reduces the stress migration of the first bonding layer 103, which is conducive to controlling the warping of the first bonding layer 103, thereby improving the reliability of the first bonding layer 103.

[0095] In some embodiments of the present application, the bond energy of the second covalent bond is lower than the bond energy of the Si-O bond in the material of the first bonding layer 103. When the first bonding layer 103 and the second bonding layer 104 are bonded and fixed, under the same bonding conditions, the second covalent bond in the material of the first bonding layer 103 is more easily broken than the Si-O bond in the material of the first bonding layer 103 to form an active bonding site, thereby increasing the active bonding sites and enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0096] In some embodiments of the present application, the material of the second bonding layer 104 contains elements different from the material of the second interconnect layer 105 , which helps to reduce the diffusion of metal materials in the second bonding layer 104 while enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104 , thereby improving the product performance of the semiconductor structure 100 .

[0097] In some embodiments of the present application, the material of the second bonding layer 104 also contains the same covalent bonds as the second interconnect layer 105 , which helps to reduce the diffusion of metal materials in the second bonding layer 104 and improve the product performance of the semiconductor structure 100 .

[0098] In some embodiments of the present application, the material of the second bonding layer 104 at least has Si atoms, O atoms and first atoms, there is a Si-O bond between the Si atoms and the O atoms, there is a first covalent bond between the Si atoms and the first atoms, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer 104. Similar to the first bonding layer 103, by making the bond length of the first covalent bond in the material of the second bonding layer 104 smaller than the bond length of the Si-O bond in the material of the first bonding layer 103, it is easier to block the diffusion of metal materials in the second bonding layer 104. At the same time, the material of the second bonding layer 104 has the first covalent bond, which reduces the stress migration of the second bonding layer 104, is conducive to controlling the warping of the second bonding layer 104, and thus improves the reliability of the second bonding layer 104.

[0099] In some embodiments of the present application, the bond energy of the first covalent bond in the material of the second bonding layer 104 is lower than the bond energy of the Si-O bond in the material of the second bonding layer 104. When the first bonding layer 103 and the second bonding layer 104 are bonded and fixed, under the same bonding conditions, the first covalent bond in the material of the second bonding layer 104 is more easily broken than the Si-O bond in the material of the second bonding layer 104 to form an active bonding site, thereby increasing the active bonding sites and enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0100] In some embodiments of the present application, the material of the second bonding layer 104 further has a second atom, and there is a second covalent bond between the Si atom and the second atom, and the bond length of the second covalent bond in the material of the second bonding layer 104 is shorter than the bond length of the Si-O bond in the material of the second bonding layer 104. The first atom is different from the second atom, and similar to the first covalent bond, the bond length of the second covalent bond in the material of the second bonding layer 104 is shorter than the bond length of the Si-O bond in the material of the second bonding layer 104, which is easier to block the diffusion of metal materials in the second bonding layer 104. At the same time, the second covalent bond in the material of the second bonding layer 104 reduces the stress migration of the second bonding layer 104, which is conducive to controlling the warping of the second bonding layer 104, thereby improving the reliability of the second bonding layer 104.

[0101] In some embodiments of the present application, the bond energy of the second covalent bond in the material of the second bonding layer 104 is lower than the bond energy of the Si-O bond in the material of the second bonding layer 104. When the first bonding layer 103 and the second bonding layer 104 are bonded and fixed, under the same bonding conditions, the second covalent bond in the material of the second bonding layer 104 is more easily broken than the Si-O bond in the material of the second bonding layer 104 to form an active bonding site, thereby increasing the active bonding sites and enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0102] See also Figure 6 In some embodiments of the present application, the first atom is selected from one of a carbon atom and a nitrogen atom, and the second atom is selected from the other of a carbon atom and a nitrogen atom. When the first atom is selected from one of a carbon atom and a nitrogen atom, and the second atom is selected from the other of a carbon atom and a nitrogen atom, the first covalent bond can be selected from one of a Si-C bond and a Si-N bond, and the second covalent bond is selected from the other of a Si-C bond and a Si-N bond. When the material of the first bonding layer 103 has both the first covalent bond and the second covalent bond, the material of the first bonding layer 103 has Si-O bonds, Si-C bonds, and Si-N bonds. Referring to SiC materials, Si 3 N 4 Materials and SiO 2 The melting points of the materials are 2700℃, 1900℃ and 1700℃ respectively. 3 N 4 Materials and SiO 2 The density of the materials is approximately 3.2 g / cm 3 、3.4g / cm 3、 2.2g / cm3 ℃, the melting point and density of Si-C bond and Si-N bond are higher than those of Si-O bond, and the bond lengths of Si-C bond and Si-N bond are smaller than those of Si-O bond, which is more conducive to blocking the diffusion of metal materials.

[0103] In some embodiments of the present application, the element types in the material of the first bonding layer 103 and the material of the second bonding layer 104, such as Si, O, C, N and other elements, can be obtained by XPS (X-ray Photoecectron Spectroscopy), SIMS (Secondary Ion Mass Spectroscopy) and other means. The valence bonds existing in the material of the first bonding layer 103 and the material of the second bonding layer 104, such as Si-C bonds, Si-N bonds, Si-O bonds, etc., can be obtained by XPS, infrared spectroscopy and other means. The data such as the bond length and bond energy of the valence bonds existing in the material of the first bonding layer 103 and the material of the second bonding layer 104 can be obtained by DFT (Density functional theory) calculation.

[0104] In some embodiments of the present application, the atomic percentage of carbon atoms in the first bonding layer 103 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of carbon atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of carbon atoms in the first bonding layer 103 is greater than or equal to 25% and less than or equal to 40%.

[0105] In some embodiments of the present application, the atomic percentage of nitrogen atoms in the first bonding layer 103 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of nitrogen atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of nitrogen atoms in the first bonding layer 103 is greater than or equal to 25% and less than or equal to 40%.

[0106] In some embodiments of the present application, the atomic percentage of carbon atoms in the second bonding layer 104 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of carbon atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of carbon atoms in the second bonding layer 104 is greater than or equal to 25% and less than or equal to 40%.

[0107] In some embodiments of the present application, the atomic percentage of nitrogen atoms in the second bonding layer 104 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of nitrogen atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of nitrogen atoms in the second bonding layer 104 is greater than or equal to 25% and less than or equal to 40%.

[0108] In some embodiments of the present application, the material of the first bonding layer 103 consists of Si element, O element, C element and N element, and the material of the second bonding layer 104 consists of Si element, O element, C element and N element.

[0109] In some embodiments of the present application, the content of each element in the first bonding layer 103 and the second bonding layer 104 (for example, the atomic percentage of carbon atoms, the atomic percentage of nitrogen atoms, etc.) can be obtained by detection such as XPS or SIMS.

[0110] In some embodiments of the present application, in the first bonding layer 103, in the direction from the second bonding layer 104 to the first interconnection layer 102, the atomic concentration of the first atoms increases first and then decreases, and the atomic concentration of the second atoms increases first and then decreases. For example: in the first bonding layer 103, in the direction from the second bonding layer 104 to the first interconnection layer 102, the atomic concentration of carbon atoms increases first and then decreases, and the atomic concentration of nitrogen atoms increases first and then decreases. In the second bonding layer 104, in the direction from the first bonding layer 103 to the second interconnection layer 105, the atomic concentration of the first atoms increases first and then decreases, and the atomic concentration of the second atoms increases first and then decreases. For example, in the direction from the first bonding layer 103 to the second interconnection layer 105, the atomic concentration of carbon atoms increases first and then decreases, and the atomic concentration of nitrogen atoms increases first and then decreases. The concentration changes of the first atoms and the second atoms in the first bonding layer 103 in the direction from the second bonding layer 104 to the first interconnection layer 102 are respectively the same or similar to the concentration changes of the first atoms and the second atoms in the second bonding layer 104 in the direction from the first bonding layer 103 to the second interconnection layer 105, so that the atomic concentrations of multiple atoms on the side of the first bonding layer 103 close to the second bonding layer 104 in the first direction X1 are the same or similar to the atomic concentrations of multiple atoms on the side of the second bonding layer 104 close to the first bonding layer 103 in the first direction X1, which is beneficial for the active sites generated on the side of the first bonding layer 103 close to the second bonding layer 104 in the first direction X1 and the active sites generated on the side of the second bonding layer 104 close to the first bonding layer 103 in the first direction X1 to be the same or similar in number, type and distribution when the first bonding layer 103 and the second bonding layer 104 are bonded, so as to improve the bonding strength between the first bonding layer 103 and the second bonding layer 104. In the first bonding layer 103 and the second bonding layer 104 , changes in the atomic concentration of nitrogen atoms in the first direction X1 and changes in the atomic concentration of carbon atoms in the first direction X1 can be analyzed by XPS, SIMS, and the like.

[0111] In some embodiments of the present application, the bonding strength between the first bonding layer 103 and the second bonding layer 104 is greater than or equal to 2.2 J / m 2 In some embodiments of the present application, when the first bonding layer 103 has Si-C bonds and Si-N bonds, and the second bonding layer 104 has Si-C bonds and Si-N bonds, when the first bonding layer 103 and the second bonding layer 104 are bonded, it is easier to obtain more active sites, and the bonding strength between the first bonding layer 103 and the second bonding layer 104 is easier to be greater than or equal to 2.2 J / m2 The bonding strength between the first bonding layer 103 and the second bonding layer 104 can be obtained by testing the bonding force between the first bonding layer 103 and the second bonding layer 104, for example, by a double cantilever beam method, a blade insert method, or the like.

[0112] In some embodiments of the present application, the thickness of the first bonding layer 103 is greater than or equal to 20 nanometers and less than or equal to 200 nanometers. For example, the thickness of the first bonding layer 103 may be 25 nanometers, 30 nanometers, 35 nanometers, 40 nanometers, 45 nanometers, 50 nanometers, 60 nanometers, 75 nanometers, 90 nanometers, 100 nanometers, 110 nanometers, 120 nanometers, 130 nanometers, 150 nanometers, 175 nanometers, 190 nanometers, etc. In some embodiments of the present application, the thickness of the first bonding layer 103 is greater than or equal to 20 nanometers and less than or equal to 100 nanometers.

[0113] In some embodiments of the present application, the thickness of the second bonding layer 104 is greater than or equal to 20 nanometers and less than or equal to 200 nanometers. For example, the thickness of the second bonding layer 104 can be 25 nanometers, 30 nanometers, 35 nanometers, 40 nanometers, 45 nanometers, 50 nanometers, 60 nanometers, 75 nanometers, 90 nanometers, 100 nanometers, 110 nanometers, 120 nanometers, 130 nanometers, 150 nanometers, 175 nanometers, 190 nanometers, etc. In some embodiments of the present application, the thickness of the second bonding layer 104 is greater than or equal to 20 nanometers and less than or equal to 100 nanometers.

[0114] In some embodiments of the present application, the material of the first interconnect layer 102 includes Si-O bonds, and the material of the second interconnect layer 105 includes Si-O bonds. The material of the first interconnect layer 102 includes silicon oxide (e.g., SiO 2 ), the material of the second interconnection layer 105 includes silicon oxide (eg, SiO 2 The material of the first interconnect layer 102 and the material of the second interconnect layer 105 can be selected from SiO 2 .

[0115] In some embodiments of the present application, the boundary between the first interconnection layer 102 and the first bonding layer 103 in the first direction X1, and the boundary between the second interconnection layer 105 and the second bonding layer 104 in the first direction X1 can be distinguished by detection methods such as XPS, SIMS, and TEM (Transmission Electron Microscope).

[0116] In some embodiments of the present application, the first device layer 101 includes a memory cell. For example, the first device layer 101 may include a 3D NAND structure.

[0117] See also Figure 4 In some embodiments of the present application, the first device layer 101 includes a first semiconductor device sub-layer 111 , and the memory unit is located in the first semiconductor device sub-layer 111 .

[0118] See also Figure 5 In some embodiments of the present application, the first device layer 101 may further include a first substrate sublayer 113 , and the first substrate sublayer 113 is located on a side of the first semiconductor device sublayer 111 away from the first interconnection layer 102 in the first direction X1.

[0119] See also Figure 4 In some embodiments of the present application, the second device layer 106 includes a peripheral circuit. The second device layer 106 may include a second semiconductor device sub-layer 112 , and the peripheral circuit is located in the second semiconductor device sub-layer 112 .

[0120] See also Figure 5 In some embodiments of the present application, the second device layer 106 may further include a second substrate sublayer 114 , and the second substrate sublayer 114 is located on a side of the second semiconductor device sublayer 112 away from the second interconnect layer 105 in the first direction X1.

[0121] The material of the first substrate sublayer 113 and the material of the second substrate sublayer 114 may include silicon (such as single crystal silicon, polycrystalline silicon), silicon germanium (SiGe), germanium (Ge), silicon on insulator (SOI), germanium on insulator (GOI), gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC) or any combination thereof.

[0122] See also Figure 4 and Figure 5 In some embodiments of the present application, the semiconductor structure 100 also includes a first interconnect structure 109 located in the first interconnect layer 102, and a second interconnect structure 110 located in the second interconnect layer 105, the first interconnect structure 109 is connected between the first bonding pad 107 and the memory unit, and the second interconnect structure 110 is connected between the second bonding pad 108 and the peripheral circuit.

[0123] In some embodiments of the present application, the material of the first interconnect structure 109 is the same as or different from the material of the first bonding pad 107, and the material of the second interconnect structure 110 is the same as or different from the material of the second bonding pad 108. The material of the first interconnect structure 109 and the material of the second interconnect structure 110 include metal materials, for example, the materials of the first interconnect structure 109 and the second interconnect structure 110 are selected from metal materials such as copper and tungsten.

[0124] The semiconductor structure 100 provided in the present application is achieved by bonding and fixing the first bonding layer 103 and the second bonding layer 104 in the first direction X1. The material of the first bonding layer 103 contains elements different from the material of the first interconnection layer 102. While enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104, the diffusion of the metal material in the first bonding layer 103 is at least reduced, thereby improving the product performance of the semiconductor structure 100.

[0125] See also Figure 7 The present application also provides a method for preparing a semiconductor structure, comprising:

[0126] Step S100 : forming a first interconnection layer 102 and a first bonding layer 103 stacked in sequence on one side of the first device layer 101 in the first direction X1 .

[0127] Step S200 : forming a second interconnect layer 105 and a second bonding layer 104 stacked in sequence on one side of the second device layer 106 in the first direction X1 .

[0128] Step S300 : bonding and fixing a side of the first bonding layer 103 away from the first device layer 101 and a side of the second bonding layer 104 away from the second device layer 106 in the first direction X1.

[0129] The step of forming the first bonding layer 103 includes using a material containing an element different from the material of the first interconnect layer 102 .

[0130] In some embodiments of the present application, please refer to FIG. 8A to FIG. 8B , step S100 includes:

[0131] Step S110 : forming a first insulating material layer 115 on one side of the first device layer 101 in the first direction X1 , wherein the material of the first insulating material layer 115 has Si—O bonds.

[0132] Step S120 : forming a first bonding layer 103 on a side of the first insulating material layer 115 away from the first device layer 101 in the first direction X1 , and forming a first interconnection layer 102 on the other part of the first insulating material layer 115 .

[0133] In some embodiments of the present application, step S120 includes:

[0134] Step S121 : injecting a first element into the first insulating material layer 115 at a side of the first insulating material layer 115 away from the first device layer 101 in the first direction X1 to form the first bonding layer 103 .

[0135] In some embodiments of the present application, step S120 includes:

[0136] Step S122 : injecting a first element and a second element into the first insulating material layer 115 at a side of the first insulating material layer 115 away from the first device layer 101 in the first direction X1 to form the first bonding layer 103 .

[0137] In some embodiments of the present application, the first interconnect layer 102 and the first bonding layer 103 are formed from the first insulating material layer 115. Therefore, the thickness of the first insulating material layer 115 is the sum of the thicknesses of the first interconnect layer 102 and the first bonding layer 103. The first insulating material layer 115 forms the first interconnect layer 102 and the first bonding layer 103, which simplifies the process and reduces the high-temperature process compared to forming the first interconnect layer 102 and the first bonding layer 103 in batches, which is beneficial to protecting the formed structure and improving the product reliability of the formed semiconductor structure.

[0138] In some embodiments of the present application, please refer to FIG. 8C to FIG. 8E , step S100 includes:

[0139] Step S130: forming a first interconnection layer 102 on one side of the first device layer 101 in the first direction X1, wherein the material of the first interconnection layer 102 has Si—O bonds.

[0140] Step S140 : forming a first bonding layer 103 on a side of the first interconnect layer 102 away from the first device layer 101 in the first direction X1.

[0141] In some embodiments of this application, please refer to FIG. 8C to FIG. 8E , step S140 includes:

[0142] Step S141: forming a third insulating material layer 117 on a side of the first interconnect layer 102 away from the first device layer 101 in the first direction X1, wherein the material of the third insulating material layer 117 has Si—O bonds.

[0143] Step S142 : Injecting a first element into the third insulating material layer 117 at a side of the third insulating material layer 117 away from the first interconnect layer 102 in the first direction X1 to form the first bonding layer 103 .

[0144] In some embodiments of this application, please refer to FIG. 8C to FIG. 8E , step S140 includes:

[0145] Step S143: forming a third insulating material layer 117 on a side of the first interconnect layer 102 away from the first device layer 101 in the first direction X1, wherein the material of the third insulating material layer 117 has Si—O bonds.

[0146] Step S144 : implanting the first element and the second element into the third insulating material layer 117 at a side of the third insulating material layer 117 away from the first interconnection layer 102 in the first direction X1 to form the first bonding layer 103 .

[0147] In some embodiments of the present application, the material of the first insulating material layer 115, the first interconnection layer 102 or the third insulating material layer 117 may be a silicon oxide compound, and the first insulating material layer 115, the first interconnection layer 102 or the third insulating material layer 117 may be formed by low temperature growth. For example, the first insulating material layer 115 may be formed by a plasma enhanced chemical vapor deposition process using a silane-based reaction gas (such as tetramethylsilane, etc.) on one side of the first device layer 101 in the first direction X1. When the first insulating material layer 115, the first interconnection layer 102 or the third insulating material layer 117 is formed by a low-temperature growth method, the formation temperature of the first insulating material layer 115, the first interconnection layer 102 or the third insulating material layer 117 can be between 300°C and 450°C, preferably greater than or equal to 300°C and less than 400°C, which is beneficial to protecting the structure formed before the first insulating material layer 115, the first interconnection layer 102 or the third insulating material layer 117 is formed (such as: the structure in the first device layer 101), and avoiding the problem of damage to the structure formed before the first insulating material layer 115, the first interconnection layer 102 or the third insulating material layer 117 is formed due to excessively high temperature.

[0148] In some embodiments of the present application, atoms of the first element and Si atoms form a first covalent bond in the first bonding layer 103, and the bond length of the first covalent bond is smaller than the Si-O bond in the material of the first bonding layer 103; atoms of the second element and Si atoms form a second covalent bond in the first bonding layer 103, and the bond length of the second covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer 103.

[0149] In some embodiments of the present application, the first element is selected from one of carbon and nitrogen, and the second element is selected from the other of carbon and nitrogen. When the first element is selected from one of carbon and nitrogen, and the second element is selected from the other of carbon and nitrogen, the first covalent bond may be selected from one of Si-C bond and Si-N bond, and the second covalent bond is selected from the other of Si-C bond and Si-N bond.

[0150] In some embodiments of the present application, when the first bonding layer 103 is formed by injecting the first element into the first insulating material layer 115 or the third insulating material layer 117, the first element may be injected into the first insulating material layer 115 or the third insulating material layer 117 by plasma injection. For example, when the first element is carbon, carbon-containing plasma is injected into the first insulating material layer 115 or the third insulating material layer 117 to form the first covalent bond in the first insulating material layer 115 or the third insulating material layer 117, thereby forming the first bonding layer 103; when the first element is nitrogen, nitrogen-containing plasma is injected into the first insulating material layer 115 or the third insulating material layer 117 to form the first covalent bond in the first insulating material layer 115 or the third insulating material layer 117, thereby forming the first bonding layer 103.

[0151] In some embodiments of the present application, when the first bonding layer 103 is formed by injecting the first element and the second element into the first insulating material layer 115 or the third insulating material layer 117, the first element and the second element may be injected into the first insulating material layer 115 or the third insulating material layer 117 by plasma injection. For example, when the first element is carbon and the second element is nitrogen, by injecting carbon- and nitrogen-containing plasma into the first insulating material layer 115 or the third insulating material layer 117, the first covalent bond and the second covalent bond are formed in the first insulating material layer 115 or the third insulating material layer 117, thereby forming the first bonding layer 103.

[0152] In some embodiments of the present application, the atomic percentage of carbon atoms in the first bonding layer 103 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of carbon atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of carbon atoms in the first bonding layer 103 is greater than or equal to 25% and less than or equal to 40%.

[0153] In some embodiments of the present application, the atomic percentage of nitrogen atoms in the first bonding layer 103 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of nitrogen atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of nitrogen atoms in the first bonding layer 103 is greater than or equal to 25% and less than or equal to 40%.

[0154] When the first bonding layer 103 is formed by ion implantation, the atomic concentration of the first element first increases and then decreases, and the atomic concentration of the second element first increases and then decreases in the direction from the first bonding layer 103 to the first interconnection layer 102. For example, in the first bonding layer 103, in the direction from the first bonding layer 103 to the first interconnection layer 102, the atomic concentration of carbon atoms first increases and then decreases, and the atomic concentration of nitrogen atoms first increases and then decreases.

[0155] By forming the first bonding layer 103 by ion implantation, the formation temperature of the first bonding layer 103 can be made lower than 400°C, which is beneficial for protecting the structure formed before the first bonding layer 103 is formed (such as the structure within the first device layer 101) and avoiding problems such as damage to the structure formed before the first bonding layer 103 is formed due to excessively high temperature during the formation of the first bonding layer 103.

[0156] In some embodiments of the present application, after forming the first interconnect layer 102 and the first bonding layer 103 , step S400 is further included: forming a first interconnect structure 109 in the first interconnect layer 102 and forming a first bonding pad 107 in the first bonding layer 103 .

[0157] In some embodiments of the present application, the first device layer 101 includes a memory unit, and the first interconnect structure 109 is connected between the first bonding pad 107 and the memory unit.

[0158] In some embodiments of the present application, please refer to FIG. 8F to FIG. 8G , step S200 includes:

[0159] Step S210 : forming a second insulating material layer 116 on one side of the second device layer 106 in the first direction X1 , wherein the material of the second insulating material layer 116 includes Si—O bonds.

[0160] Step S220 : forming a second bonding layer 104 on a side of the second insulating material layer 116 away from the second device layer 106 in the first direction X1 , and forming a second interconnection layer 105 on the other part of the second insulating material layer 116 .

[0161] In some embodiments of the present application, step S220 includes:

[0162] Step S221 : injecting a first element into the second insulating material layer 116 at a side of the second insulating material layer 116 away from the second device layer 106 in the first direction X1 to form the second bonding layer 104 .

[0163] In some embodiments of the present application, step S220 includes:

[0164] Step S222 : implanting the first element and the second element into the second insulating material layer 116 at a side of the second insulating material layer 116 away from the second device layer 106 in the first direction X1 to form the second bonding layer 104 .

[0165] In some embodiments of the present application, the second interconnect layer 105 and the second bonding layer 104 are formed from the second insulating material layer 116. Therefore, the thickness of the second insulating material layer 116 is the sum of the thicknesses of the second interconnect layer 105 and the second bonding layer 104. The second insulating material layer 116 forms the second interconnect layer 105 and the second bonding layer 104, which simplifies the process and reduces the high-temperature process compared to forming the second interconnect layer 105 and the second bonding layer 104 in batches, which is beneficial to protecting the formed structure and improving the product reliability of the formed semiconductor structure.

[0166] In some embodiments of the present application, please refer to FIG. 8H to FIG. 8J , step S200 includes:

[0167] Step S230: forming a second interconnect layer 105 on one side of the second device layer 106 in the first direction X1, wherein the material of the second interconnect layer 105 has Si—O bonds.

[0168] Step S240 : forming a second bonding layer 104 on a side of the second interconnect layer 105 away from the second device layer 106 in the first direction X1.

[0169] In some embodiments of the present application, please refer to FIG. 8H to FIG. 8J , step S240 includes:

[0170] Step S241 : forming a fifth insulating material layer 118 on a side of the second interconnect layer 105 away from the second device layer 106 in the first direction X1 , wherein the material of the fifth insulating material layer 118 has Si—O bonds.

[0171] Step S242 : Injecting a first element into the fifth insulating material layer 118 at a side of the fifth insulating material layer 118 away from the second interconnect layer 105 in the first direction X1 to form the second bonding layer 104 .

[0172] In some embodiments of the present application, please refer to FIG. 8H to FIG. 8J , step S240 includes:

[0173] Step S243: forming a fifth insulating material layer 118 on a side of the second interconnect layer 105 away from the second device layer 106 in the first direction X1, wherein the material of the fifth insulating material layer 118 has Si—O bonds.

[0174] Step S244 : implanting the first element and the second element into the fifth insulating material layer 118 at a side of the fifth insulating material layer 118 away from the second interconnection layer 105 in the first direction X1 to form the second bonding layer 104 .

[0175] In some embodiments of the present application, the atoms of the first element and the Si atoms form a first covalent bond in the second bonding layer 104, and the bond length of the first covalent bond is less than the bond length of the Si-O bond in the material of the second bonding layer 104. The atoms of the second element and the Si atoms form a second covalent bond in the second bonding layer 104, and the bond length of the second covalent bond is less than the bond length of the Si-O bond in the material of the second bonding layer 104.

[0176] In some embodiments of the present application, the material of the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118 may be a silicon oxide compound, and the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118 may be formed by low temperature growth. For example, the second insulating material layer 116 may be formed by a plasma enhanced chemical vapor deposition process using a silane-based reaction gas (such as tetramethylsilane, etc.) on one side of the second device layer 106 in the first direction X1. When the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118 are formed by a low-temperature growth method, the formation temperature of the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118 can be between 300°C and 450°C, preferably greater than or equal to 300°C and less than 400°C, which is beneficial to protecting the structure formed before the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118 is formed (such as: the structure in the second device layer 106), and avoiding the problem that the temperature of the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118 is too high during the formation of the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118, which may cause damage to the structure formed before the second insulating material layer 116, the second interconnection layer 105 or the fifth insulating material layer 118.

[0177] In some embodiments of the present application, when the second bonding layer 104 is formed by injecting the first element into the second insulating material layer 116 or the fifth insulating material layer 118, the first element may be injected into the second insulating material layer 116 or the fifth insulating material layer 118 by plasma injection. For example, when the first element is carbon, carbon-containing plasma is injected into the second insulating material layer 116 or the fifth insulating material layer 118 to form the first covalent bond in the second insulating material layer 116 or the fifth insulating material layer 118, thereby forming the second bonding layer 104; when the first element is nitrogen, nitrogen-containing plasma is injected into the second insulating material layer 116 or the fifth insulating material layer 118 to form the first covalent bond in the second insulating material layer 116 or the fifth insulating material layer 118, thereby forming the second bonding layer 104.

[0178] In some embodiments of the present application, when the second bonding layer 104 is formed by injecting the first element and the second element into the second insulating material layer 116 or the fifth insulating material layer 118, the first element and the second element may be injected into the second insulating material layer 116 or the fifth insulating material layer 118 by plasma injection. For example, when the first element is carbon and the second element is nitrogen, by injecting carbon- and nitrogen-containing plasma into the second insulating material layer 116 or the fifth insulating material layer 118, the first covalent bond and the second covalent bond are formed in the second insulating material layer 116 or the fifth insulating material layer 118, thereby forming the second bonding layer 104.

[0179] In some embodiments of the present application, the atomic percentage of carbon atoms in the second bonding layer 104 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of carbon atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of carbon atoms in the second bonding layer 104 is greater than or equal to 25% and less than or equal to 40%.

[0180] In some embodiments of the present application, the atomic percentage of nitrogen atoms in the second bonding layer 104 is greater than or equal to 10% and less than or equal to 40%. For example, the atomic percentage of nitrogen atoms may be 15%, 20%, 25%, 30%, 35%, etc.; in some embodiments of the present application, the atomic percentage of nitrogen atoms in the second bonding layer 104 is greater than or equal to 25% and less than or equal to 40%.

[0181] When the second bonding layer 104 is formed by ion implantation, the atomic concentration of the first element first increases and then decreases, and the atomic concentration of the second element first increases and then decreases in the direction from the second bonding layer 104 to the second interconnection layer 105. For example, in the second bonding layer 104, in the first direction X1, the atomic concentration of carbon atoms first increases and then decreases, and the atomic concentration of nitrogen atoms first increases and then decreases.

[0182] By forming the second bonding layer 104 by ion implantation, the formation temperature of the second bonding layer 104 can be made lower than 400°C, which is beneficial for protecting the structure formed before the second bonding layer 104 is formed (such as the structure within the second device layer 106) and avoiding problems such as damage to the structure formed before the second bonding layer 104 is formed due to excessively high temperature during the formation of the second bonding layer 104.

[0183] In some embodiments of the present application, the first bonding layer 103 and the second bonding layer 104 can be formed by the same process, which is helpful to simplify the process and reduce the manufacturing cost of the semiconductor structure. At the same time, the concentration changes of the first atoms and the second atoms in the first bonding layer 103 in the direction from the first bonding layer 103 to the first interconnection layer 102 are respectively the same or similar to the concentration changes of the first atoms and the second atoms in the second bonding layer 104 in the direction from the second bonding layer 104 to the second interconnection layer 105, so that the atomic concentrations of multiple atoms on the side of the first bonding layer 103 close to the second bonding layer 104 in the first direction X1 are the same or similar to the atomic concentrations of multiple atoms on the side of the second bonding layer 104 close to the first bonding layer 103 in the first direction X1, which is beneficial for the active sites generated on the side of the first bonding layer 103 close to the second bonding layer 104 in the first direction X1 and the active sites generated on the side of the second bonding layer 104 close to the first bonding layer 103 in the first direction X1 when the first bonding layer 103 is bonded to the second bonding layer 104 to be the same or similar in number, type and distribution, so as to improve the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0184] In some embodiments of the present application, after forming the second interconnect layer 105 and the second bonding layer 104 , step S500 is further included: forming a second interconnect structure 110 in the second interconnect layer 105 and forming a second bonding pad 108 in the second bonding layer 104 .

[0185] In some embodiments of the present application, the second device layer 106 includes a peripheral circuit, and the second interconnect structure 110 is connected between the second bonding pad 108 and the peripheral circuit.

[0186] In some embodiments of the present application, please refer to Figure 8K , step S300 includes:

[0187] Step S310 : activating a side of the first bonding layer 103 away from the first device layer 101 in the first direction X1, and / or activating a side of the second bonding layer 104 away from the second device layer 106 in the first direction X1.

[0188] Step S320 : bonding the side of the second bonding layer 104 away from the second device layer 106 in the first direction X1 to the side of the first bonding layer 103 away from the first device layer 101 in the first direction X1.

[0189] In some embodiments of the present application, the side of the first bonding layer 103 away from the first device layer 101 in the first direction X1 is activated by plasma bombardment. After the activation treatment, the first covalent bond, the second covalent bond, the Si-O bond, etc. of the first bonding layer 103 away from the first device layer 101 in the first direction X1 are broken, thereby forming a bonding active site. Since the bond energy of the first covalent bond and the second covalent bond in the first bonding layer 103 is less than the bond energy of the Si-O bond, the first covalent bond and the second covalent bond of the first bonding layer 103 away from the first device layer 101 in the first direction X1 are more likely to form an active site, thereby providing more active sites, which is beneficial to improving the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0190] Similarly, in some embodiments of the present application, the side of the second bonding layer 104 away from the second device layer 106 in the first direction X1 is activated by plasma bombardment on the side of the second bonding layer 104 away from the second device layer 106 in the first direction X1. After the activation treatment, the first covalent bond, the second covalent bond, the Si-O bond, etc. of the second bonding layer 104 away from the second device layer 106 in the first direction X1 are broken, thereby forming a bonding active site. Since the bond energy of the first covalent bond and the second covalent bond in the second bonding layer 104 is less than the bond energy of the Si-O bond, the first covalent bond and the second covalent bond of the second bonding layer 104 away from the second device layer 106 in the first direction X1 are more likely to form an active site, thereby providing more active sites, which is beneficial to improving the bonding strength between the first bonding layer 103 and the second bonding layer 104.

[0191] In some embodiments of the present application, step S320 includes:

[0192] Step S321 : a side of the first bonding layer 103 away from the first device layer 101 in the first direction X1 is bonded to a side of the second bonding layer 104 away from the second device layer 106 in the first direction X1.

[0193] Step S323: annealing the first bonding layer 103 and the second bonding layer 104, and bonding and fixing the side of the first bonding layer 103 away from the first device layer 101 in the first direction X1 and the side of the second bonding layer 104 away from the second device layer 106 in the first direction X1.

[0194] In some embodiments of the present application, the temperature of the annealing treatment is less than 400°C. In some embodiments of the present application, the temperature of the annealing treatment is greater than or equal to 350°C and less than 400°C, which is beneficial to protecting the structure formed before the first bonding layer 103 and the second bonding layer 104 are bonded and fixed (such as: the structure within the first device layer 101 and the second device layer 106), and avoiding the problem that the temperature is too high when the first bonding layer 103 and the second bonding layer 104 are bonded and fixed, causing damage to the structure formed before the first bonding layer 103 and the second bonding layer 104 are bonded and fixed.

[0195] In some embodiments of the present application, the first bonding layer 103 is bonded and fixed at a side away from the first device layer 101 and a side of the second bonding layer 104 is bonded and fixed at a side away from the second device layer 106 , and the first bonding pad 107 and the second bonding pad 108 are bonded and connected.

[0196] The method for preparing a semiconductor structure provided in the present application uses a material containing elements different from the material of the first interconnection layer 102 in the step of forming the first bonding layer 103, thereby enhancing the bonding strength between the first bonding layer 103 and the second bonding layer 104 while at least reducing the diffusion of the metal material in the first bonding layer 103, thereby improving the product performance of the semiconductor structure.

[0197] See also Fig. 9 The embodiment of the present application further provides a storage system 10, which includes a controller 12 and a memory 11. The controller 12 is coupled to the memory 11 and is used to control the memory 11 to store data; wherein the memory 11 includes the semiconductor structure 100 in any of the above embodiments.

[0198] The storage system 10 may be a mobile phone, a desktop computer, a laptop computer, a tablet computer, a vehicle computer, a game console, a printer, a positioning device, a wearable electronic device, a smart sensor, a virtual reality (VR) device, an augmented reality (AR) device, or any other suitable electronic device having a storage device therein. The controller may be configured to control operations of the semiconductor package structure, such as read, erase, and program operations.

[0199] In some embodiments of the present application, the controller 12 is designed to operate in a low duty cycle environment, such as a Secure Digital (SD) card, a Compact Flash (CF) card, a Universal Serial Bus (USB) flash drive, or other media for use in electronic devices such as personal computers, digital cameras, mobile phones, etc.

[0200] In some embodiments of the present application, the controller 12 is designed to operate in a solid state drive (SSD) or an embedded multi media card (eMMC), and the SSD or eMMC is used as a data storage for mobile devices such as smart phones, tablet computers, laptop computers, etc., as well as enterprise storage arrays.

[0201] The present application provides a semiconductor structure and a preparation method thereof, and a storage system. The semiconductor structure includes a first device layer, a first interconnection layer, a first bonding layer, a second bonding layer, a second interconnection layer and a second device layer stacked in sequence along a first direction. In the first direction, the first bonding layer is bonded and fixed to the second bonding layer, and the material of the first bonding layer contains an element different from the material of the first interconnection layer. The present application bonds and fixes the first bonding layer to the second bonding layer in the first direction, and the material of the first bonding layer contains an element different from the material of the first interconnection layer. While enhancing the bonding strength between the first bonding layer and the second bonding layer, the diffusion of the metal material in the first bonding layer is at least reduced, thereby improving the product performance of the semiconductor structure.

[0202] The semiconductor structure and its preparation method and storage system provided in the embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A semiconductor structure, characterized in that: include: a first device layer; a first interconnect layer located at one side of the first device layer in a first direction; a first bonding layer, located on a side of the first interconnect layer away from the first device layer in the first direction; a second bonding layer, located on a side of the first bonding layer away from the first interconnection layer in the first direction; a second interconnection layer, located on a side of the second bonding layer away from the first bonding layer in the first direction; a second device layer, located on a side of the second interconnect layer away from the second bonding layer in the first direction; Wherein, in the first direction, the first bonding layer is bonded and fixed to the second bonding layer, and the material of the first bonding layer contains an element different from the material of the first interconnection layer.

2. The semiconductor structure according to claim 1, wherein: The material of the first bonding layer comprises at least Si atoms, O atoms and first atoms, there is a Si-O bond between the Si atoms and the O atoms, there is a first covalent bond between the Si atoms and the first atom, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer.

3. The semiconductor structure according to claim 2, wherein: The material of the first bonding layer further has a second atom, a second covalent bond exists between the Si atom and the second atom, and a bond length of the second covalent bond is smaller than a bond length of a Si—O bond in the material of the first bonding layer.

4. The semiconductor structure according to claim 3, characterized in that The bond energy of the first covalent bond is lower than the bond energy of the Si—O bond in the material of the first bonding layer; and / or, The bond energy of the second covalent bond is lower than the bond energy of the Si—O bond in the material of the first bonding layer.

5. The semiconductor structure according to claim 1, wherein: A material of the second bonding layer includes an element different from a material of the second interconnect layer.

6. The semiconductor structure according to claim 5, characterized in that The material of the second bonding layer has at least Si atoms, O atoms and first atoms, there is a Si-O bond between the Si atoms and the O atoms, there is a first covalent bond between the Si atoms and the first atom, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer.

7. The semiconductor structure according to claim 6, wherein: The material of the second bonding layer further has a second atom, a second covalent bond exists between the Si atom and the second atom, and a bond length of the second covalent bond is smaller than a bond length of a Si—O bond in the material of the second bonding layer.

8. The semiconductor structure according to claim 7, wherein: The bond energy of the first covalent bond is lower than the bond energy of the Si—O bond in the material of the second bonding layer; and / or, The bond energy of the second covalent bond is lower than the bond energy of the Si—O bond in the material of the second bonding layer.

9. The semiconductor structure according to claim 3 or 7, characterized in that: The first atom is selected from one of a carbon atom and a nitrogen atom, and the second atom is selected from the other of a carbon atom and a nitrogen atom.

10. The semiconductor structure according to claim 9, wherein: The first covalent bond is selected from one of a Si-C bond and a Si-N bond, and the second covalent bond is selected from the other of a Si-C bond and a Si-N bond.

11. The semiconductor structure according to claim 10, characterized in that In the first bonding layer, the atomic percentage of carbon atoms is greater than or equal to 10% and less than or equal to 40%, and the atomic percentage of nitrogen atoms is greater than or equal to 10% and less than or equal to 40%; In the second bonding layer, the atomic percentage of carbon atoms is greater than or equal to 10% and less than or equal to 40%, and the atomic percentage of nitrogen atoms is greater than or equal to 10% and less than or equal to 40%.

12. The semiconductor structure according to claim 1, wherein: The bonding strength between the first bonding layer and the second bonding layer is greater than or equal to 2.2 J / m 2 .

13. The semiconductor structure according to claim 1, wherein: The thickness of the first bonding layer is greater than or equal to 20 nanometers and less than or equal to 200 nanometers; The thickness of the second bonding layer is greater than or equal to 20 nanometers and less than or equal to 200 nanometers.

14. The semiconductor structure according to claim 1, wherein: The material of the first interconnect layer includes Si—O bonds, and the material of the second interconnect layer includes Si—O bonds.

15. The semiconductor structure according to claim 1, wherein: The semiconductor structure further includes a first bonding pad located in the first bonding layer, and a second bonding pad located in the second bonding layer, wherein the first bonding pad is connected to the second bonding pad in the first direction; The first device layer includes memory cells, and the second device layer includes peripheral circuits; The semiconductor structure further includes a first interconnect structure located within the first interconnect layer, and a second interconnect structure located within the second interconnect layer; The first interconnect structure is connected between the first bonding pad and the memory unit, and the second interconnect structure is connected between the second bonding pad and the peripheral circuit.

16. A method for preparing a semiconductor structure, characterized in that: include: Forming a first interconnect layer and a first bonding layer stacked in sequence on one side of the first device layer in a first direction; Forming a second interconnect layer and a second bonding layer stacked in sequence on one side of the second device layer in the first direction; Bonding and fixing a side of the first bonding layer away from the first device layer and a side of the second bonding layer away from the second device layer in the first direction; The step of forming the first bonding layer includes using a material containing an element different from a material of the first interconnect layer.

17. The method for preparing a semiconductor structure according to claim 16, wherein: The step of forming the first interconnect layer and the first bonding layer includes: forming a first insulating material layer on one side of the first device layer in the first direction, wherein the material of the first insulating material layer has Si—O bonds; A first bonding layer is formed on a side of the first insulating material layer away from the first device layer in the first direction, and the other part of the first insulating material layer forms a first interconnection layer.

18. The method for preparing a semiconductor structure according to claim 17, characterized in that: The step of forming the first bonding layer comprises: Injecting a first element into the first insulating material layer at a side of the first insulating material layer away from the first device layer in the first direction to form the first bonding layer; The atoms of the first element and Si atoms form a first covalent bond in the first bonding layer, and the bond length of the first covalent bond is shorter than the Si—O bond in the material of the first bonding layer.

19. The method for preparing a semiconductor structure according to claim 17, wherein: The step of forming the first bonding layer comprises: Injecting a first element and a second element into the first insulating material layer at a side of the first insulating material layer away from the first device layer in the first direction to form the first bonding layer; Among them, the atoms of the first element and the Si atoms form a first covalent bond in the first bonding layer, and the bond length of the first covalent bond is smaller than the Si-O bond in the material of the first bonding layer; the atoms of the second element and the Si atoms form a second covalent bond in the first bonding layer, and the bond length of the second covalent bond is smaller than the bond length of the Si-O bond in the material of the first bonding layer.

20. The method for preparing a semiconductor structure according to claim 16, wherein: The step of forming the second interconnect layer and the second bonding layer comprises: forming a second insulating material layer on one side of the second device layer in the first direction, wherein the material of the second insulating material layer includes Si—O bonds; A second bonding layer is formed on a side of the second insulating material layer away from the second device layer in the first direction, and the other part of the second insulating material layer forms a second interconnection layer.

21. The method for preparing a semiconductor structure according to claim 20, characterized in that: The step of forming the second bonding layer comprises: Injecting a first element into the second insulating material layer at a side of the second insulating material layer away from the second device layer in the first direction to form the second bonding layer; The atoms of the first element and Si atoms form a first covalent bond in the second bonding layer, and the bond length of the first covalent bond is smaller than the bond length of the Si—O bond in the material of the second bonding layer.

22. The method for preparing a semiconductor structure according to claim 20, wherein: The step of forming the second bonding layer comprises: Injecting a first element and a second element into the second insulating material layer at a side of the second insulating material layer away from the second device layer in the first direction to form the second bonding layer; Among them, the atoms of the first element and the Si atoms form a first covalent bond in the second bonding layer, and the bond length of the first covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer; the atoms of the second element and the Si atoms form a second covalent bond in the second bonding layer, and the bond length of the second covalent bond is smaller than the bond length of the Si-O bond in the material of the second bonding layer.

23. The method for preparing a semiconductor structure according to claim 19 or 22, characterized in that: The first element is selected from one of carbon and nitrogen, and the second element is selected from the other of carbon and nitrogen.

24. The method for preparing a semiconductor structure according to claim 16, wherein: The step of bonding and fixing the side of the first bonding layer away from the first device layer and the side of the second bonding layer away from the second device layer in the first direction comprises: Activating a side of the first bonding layer in the first direction away from the first device layer, and / or activating a side of the second bonding layer in the first direction away from the second device layer; The bonding process is performed between a side of the second bonding layer away from the second device layer in the first direction and a side of the first bonding layer away from the first device layer in the first direction.

25. A storage system, characterized in that: The storage system includes a memory and a controller, wherein the controller is coupled to the memory and is used to control the memory to store data; Wherein, the memory comprises the semiconductor structure as claimed in any one of claims 1 to 15.

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