Control system of complementary metal oxide semiconductor chip and computer equipment

By introducing a discharge control circuit into the CMOS chip control system, the discharge control logic of disconnecting power supply and grounding is implemented, and the cumbersome and difficult problem of clearing CMOS chip data in the prior art is solved, and efficient and universal data clearing effect is achieved.

CN119891703APending Publication Date: 2025-04-25INSPUR (SHANDONG) COMPUTER TECH CO LTD
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Patent Information

Application Number
CN202510120720.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-24
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

The lack of a mature CMOS chip management and control system in the prior art, resulting in cumbersome operation, high technical difficulty and poor universality in clearing CMOS chip data.

Method used

It provides a control system for a complementary metal oxide semiconductor chip. It performs the discharge control logic of "disconnecting power supply and grounding of CMOS chip" when there is a discharge control requirement through a discharge control circuit, and performs the power supply control logic of "recovering power supply and disconnecting of CMOS chip" after a preset time period, thereby simply and efficiently realizing the removal of data of CMOS chip.

Benefits of technology

It realizes simple and efficient clearance of CMOS chip data, and is suitable for various types of computer equipment, reducing operation difficulty and time.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a management and control system of a complementary metal oxide semiconductor chip and computer equipment, belongs to the field of electronic circuits, and considers that (1) discharge and normal power supply of the CMOS chip of the computer equipment can be controlled through a discharge control circuit connected with a power supply circuit and the CMOS chip; therefore, the discharge control circuit (which is connected with the power supply circuit and the CMOS chip) executes the discharge control logic of cutting off the power supply and grounding the CMOS chip when the discharge control requirement exists, and executes the power supply control logic of restoring the power supply and cutting off the grounding of the CMOS chip after the preset duration, so that the data of the CMOS chip can be cleared easily and efficiently. Therefore, the data of the CMOS chip can be simply and efficiently cleared, and the method is suitable for various types of computer equipment.
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Description

Technical Field

[0001] The present invention relates to the field of electronic circuits, and in particular to a complementary metal oxide semiconductor chip management and control system and computer equipment. Background Art

[0002] CMOS (Complementary Metal Oxide Semiconductor) is used to store BIOS (Basic Input / Output System) setting information in computer devices. When some servers cannot be started normally, it is necessary to discharge the CMOS chip to clear the data in the CMOS chip in an attempt to make the server start normally. However, the related technology lacks a mature CMOS chip management and control system, resulting in the operation of clearing CMOS chip data being cumbersome, technically difficult, and having poor universality.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present. Summary of the invention

[0004] The purpose of the present invention is to provide a complementary metal oxide semiconductor chip management and control system and computer equipment. In the present invention, a discharge control circuit (respectively connected to a power supply circuit and a CMOS chip) executes a discharge control logic of "disconnecting power and grounding the CMOS chip" when there is a discharge control demand, and executes a power supply control logic of "restoring power and disconnecting the CMOS chip from the ground" after a preset time, thereby simply and efficiently clearing data from the CMOS chip, and is suitable for various types of computer equipment.

[0005] In order to solve the above technical problems, the present invention provides a complementary metal oxide semiconductor chip management and control system, comprising:

[0006] The power supply circuit is used to supply power to the complementary metal oxide semiconductor chip of the central processing unit;

[0007] A discharge control circuit connected to the power supply circuit and the complementary metal oxide semiconductor chip respectively, for executing the discharge control logic when there is a discharge control demand, and executing the power supply control logic after a first preset time period;

[0008] Among them, the discharge control logic is: controlling the power supply circuit to stop supplying power, and controlling the power supply pin of the complementary metal oxide semiconductor chip to be grounded and discharged; the power supply control logic is: controlling the power supply circuit to resume power supply, and controlling the power supply pin of the complementary metal oxide semiconductor chip to be disconnected from the ground.

[0009] On the other hand, the discharge control circuit comprises:

[0010] A first controllable switch having an input end connected to a power supply circuit, an output end connected to a complementary metal oxide semiconductor chip, and a control end connected to a controller;

[0011] A second controllable switch having an input end connected to the complementary metal oxide semiconductor chip, an output end connected to ground, and a control end connected to the controller;

[0012] A controller, configured to execute a discharge control logic when a discharge control demand exists, and execute a power supply control logic after a first preset time period;

[0013] The discharge control logic is: controlling the first controllable switch to be turned off and controlling the second controllable switch to be turned on; the power supply control logic is: controlling the first controllable switch to be turned on and controlling the second controllable switch to be turned off.

[0014] On the other hand, the power supply circuit comprises:

[0015] A battery power supply module, used for providing a voltage output of a first voltage value;

[0016] A voltage source, configured to provide a voltage output of a second voltage value, wherein the second voltage value is greater than the first voltage value;

[0017] A channel selection module, used for outputting the output voltage of the voltage source from its own output terminal when the voltage source has an output, and outputting the output voltage of the battery power supply module from its own output terminal when the voltage source has no output;

[0018] The battery power supply module comprises a battery base and a battery detachably mounted on the battery base.

[0019] On the other hand, the complementary metal oxide semiconductor chip management and control system further includes:

[0020] A connector having a first pin connected to an output end of the channel selection module, a second pin connected to the complementary metal oxide semiconductor chip and an input end of the second controllable switch, respectively, and a third pin connected to ground, and used for realizing electrical connection between the output end of the first controllable switch and the complementary metal oxide semiconductor chip when the first pin is electrically connected to the second pin, and realizing grounding of the complementary metal oxide semiconductor chip when the second pin is electrically connected to the third pin;

[0021] A jumper cap is used to realize an electrical connection between the first pin and the second pin of the connector, or to realize an electrical connection between the second pin and the third pin of the connector.

[0022] On the other hand, the first detection port of the controller is also connected to the output end of the battery power supply module;

[0023] The controller is also used to, after the server is powered on, if the voltage value detected by the first detection port is lower than a preset threshold, control the prompter to prompt that the battery power supply module is abnormal;

[0024] The complementary metal oxide semiconductor chip management and control system further includes:

[0025] A prompter connected to the controller.

[0026] On the other hand, the voltage source is disposed on a mainboard of a computer device;

[0027] The voltage source is also used to supply power to a designated load on a mainboard of a computer device;

[0028] The controller comprises a baseboard management controller of a computer device.

[0029] On the other hand, the second detection port of the controller is also connected to the power supply pin of the complementary metal oxide semiconductor chip;

[0030] The controller is also used to record an execution log when executing the discharge control logic; after the server is powered on, if the voltage value detected by the second detection port is lower than a preset threshold and there is an execution log that is no longer than a second preset time, the control prompter prompts that the discharge control logic and / or power supply control logic of the controller is abnormal;

[0031] The complementary metal oxide semiconductor chip management and control system further includes:

[0032] A prompter connected to the controller.

[0033] On the other hand, the controller is further configured to:

[0034] After the server is powered on, if the voltage value detected by the second detection port is lower than the preset threshold and there is no execution log that is no more than the second preset time period from now, the control prompter prompts a jumper connection error.

[0035] On the other hand, the first controllable switch includes a P-channel metal oxide semiconductor field effect transistor, and the second controllable switch includes an N-channel metal oxide semiconductor field effect transistor;

[0036] The complementary metal oxide semiconductor chip management and control system further includes:

[0037] A potential pull-down circuit having a first end connected to the gate of the second controllable switch and a second end grounded is used to pull down the potential of the gate of the second controllable switch to ensure that the second controllable switch is disconnected when the controller executes the power supply control logic.

[0038] In order to solve the above technical problems, the present invention further provides a computer device, including a computer device body, and also including a management and control system of the above-mentioned metal oxide semiconductor chip connected to the computer device body.

[0039] Beneficial effect: The present invention provides a complementary metal oxide semiconductor chip control system. Considering that (1) the discharge control circuit connected to the power supply circuit and the CMOS chip can control the discharge and normal power supply of the CMOS chip of the computer device, the data of the CMOS chip can be simply and efficiently cleared. Therefore, in the present invention, the discharge control circuit (respectively connected to the power supply circuit and the CMOS chip) executes the discharge control logic of "disconnecting the power supply and grounding the CMOS chip" when there is a discharge control demand, and executes the power supply control logic of "restoring the power supply and disconnecting the CMOS chip from the ground" after a preset time, thereby simply and efficiently realizing the data clearing of the CMOS chip, and is suitable for various types of computer devices.

[0040] The present invention also provides a computer device having the same beneficial effects as the above complementary metal oxide semiconductor chip management and control system. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the relevant technologies and the drawings required for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A schematic diagram of the structure of a CMOS chip management and control system provided by the present invention;

[0043] Figure 2 A schematic diagram of the structure of another CMOS chip management and control system provided by the present invention;

[0044] Figure 3 It is a structural schematic diagram of a battery base;

[0045] Figure 4 It is a structural schematic diagram of a jump cap;

[0046] Figure 5 A schematic diagram of the structure of another CMOS chip control system provided by the present invention. DETAILED DESCRIPTION

[0047] The core of the present invention is to provide a complementary metal oxide semiconductor chip management and control system and computer equipment. In the present invention, a discharge control circuit (connected to a power supply circuit and a CMOS chip, respectively) executes a discharge control logic of "disconnecting power and grounding the CMOS chip" when there is a discharge control demand, and executes a power supply control logic of "restoring power and disconnecting the CMOS chip from the ground" after a preset time, thereby simply and efficiently clearing the data of the CMOS chip, and is suitable for various types of computer equipment.

[0048] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0049] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a CMOS chip control system provided by the present invention, the complementary metal oxide semiconductor chip control system includes:

[0050] A power supply circuit 1, used to supply power to a complementary metal oxide semiconductor chip of a central processing unit;

[0051] A discharge control circuit 2 connected to the power supply circuit 1 and the complementary metal oxide semiconductor chip, respectively, for executing the discharge control logic when there is a discharge control demand, and executing the power supply control logic after a first preset time;

[0052] Among them, the discharge control logic is: control the power supply circuit 1 to stop supplying power, and control the power supply pin of the complementary metal oxide semiconductor chip to be grounded and discharged; the power supply control logic is: control the power supply circuit 1 to resume power supply, and control the power supply pin of the complementary metal oxide semiconductor chip to be disconnected from the ground.

[0053] Specifically, taking into account the technical problems in the above background technology, and in combination with the consideration that "the discharge control circuit 2 connected to the power supply circuit 1 and the CMOS chip can control the discharge and normal power supply of the CMOS chip of the computer device, thereby simply and efficiently clearing data of the CMOS chip", the embodiment of the present invention intends to realize "discharge to clear data" and "re-power on for continued work" for the CMOS chip through the discharge control circuit 2 when there is a discharge control demand. Therefore, the management and control system of the CMOS chip in the embodiment of the present invention includes a power supply circuit 1 and a discharge control circuit 2 connected to the power supply circuit 1. The discharge control circuit 2 can execute the discharge control logic when there is a discharge control demand, and execute the power supply control logic after the first preset time period, that is, to realize "discharge to clear data" and "re-power on for continued work" for the CMOS chip.

[0054] Among them, the discharge control logic includes two parts of control sub-logics, one part is to control the power supply circuit 1 to stop power supply, and the other part is to control the power supply pin of the CMOS chip to be grounded and discharged, so as to perform rapid discharge while ensuring the safety of the power supply circuit 1, so that the CMOS chip can clear data after discharge; correspondingly, in order to facilitate the CMOS chip to work normally after the computer device is restarted, the power supply control logic can also include two parts of control sub-logics, that is, one part is to control the power supply circuit 1 to resume power supply, and the other part is to control the power supply pin of the CMOS chip to be disconnected and grounded.

[0055] Specifically, since the "power supply stop and power supply resumption control" of the power supply circuit 1 and the control of "whether the power supply pin is grounded" of the CMOS chip can be widely used in various types and models of computer equipment, the CMOS chip management and control system in the embodiment of the present invention can be applied to various types of computer equipment, and the operation of the above two control actions is relatively simple, the requirements for professional knowledge are relatively low, and the operation difficulty of the staff is reduced.

[0056] The computer device may be of various types, such as a server, etc., which is not limited in the embodiment of the present invention.

[0057] The present invention provides a complementary metal oxide semiconductor chip control system. Considering that (1) the discharge control circuit connected to the power supply circuit and the CMOS chip can control the discharge and normal power supply of the CMOS chip of the computer device, the data of the CMOS chip can be simply and efficiently cleared. Therefore, in the present invention, the discharge control circuit (respectively connected to the power supply circuit and the CMOS chip) executes the discharge control logic of "disconnecting the power supply and grounding the CMOS chip" when there is a discharge control demand, and executes the power supply control logic of "restoring the power supply and disconnecting the CMOS chip from the ground" after a preset time, thereby simply and efficiently realizing the data clearing of the CMOS chip, and is suitable for various types of computer devices.

[0058] Based on the above embodiments:

[0059] As an optional embodiment, the discharge control circuit 2 includes:

[0060] A first controllable switch having an input end connected to the power supply circuit 1, an output end connected to the complementary metal oxide semiconductor chip, and a control end connected to the controller;

[0061] A second controllable switch having an input end connected to the complementary metal oxide semiconductor chip, an output end connected to ground, and a control end connected to the controller;

[0062] A controller, configured to execute a discharge control logic when a discharge control demand exists, and execute a power supply control logic after a first preset time period;

[0063] The discharge control logic is: controlling the first controllable switch to be turned off and controlling the second controllable switch to be turned on, and the power supply control logic is: controlling the first controllable switch to be turned on and controlling the second controllable switch to be turned off.

[0064] Specifically, in order to better illustrate the embodiments of the present invention, please refer to Figure 2 , Figure 2 A schematic diagram of the structure of another CMOS chip control system provided by the present invention, Figure 2 Q1 in the embodiment may be a first controllable switch, Q2 may be a second controllable switch, and the sender of the "BMC_CLR_CMOS" signal to Q1 and Q2 through the IN pin is the controller. Figure 2 As shown in FIG. 1 , PVDDBT_RTC_CPU can be regarded as a power supply pin of the CMOS chip, and C4 is a filter capacitor of the power supply pin of the CMOS chip.

[0065] Specifically, considering that "control of stopping power supply and resuming power supply for the power supply circuit 1" can be implemented based on a switch connected in series to the power supply circuit 1, and "control of whether the power supply pin of the CMOS chip is grounded" can also be implemented based on "a switch that grounds the power supply pin of the CMOS chip", the embodiment of the present invention intends to implement "control of stopping power supply and resuming power supply for the power supply circuit 1" and "control of whether the power supply pin of the CMOS chip is grounded" based on two controllable switches, and control of the two controllable switches is implemented through a controller. Therefore, the discharge control circuit 2 in the embodiment of the present invention includes a first controllable switch (the input end is connected to the power supply circuit 1, the output end is connected to the complementary metal oxide semiconductor chip, and the control end is connected to the controller), a second controllable switch (the input end is connected to the complementary metal oxide semiconductor chip, the output end is grounded, and the control end is connected to the controller), and a controller.

[0066] The discharge control circuit 2 in the embodiment of the present invention has the advantages of simple structure, low cost and easy operation.

[0067] Of course, in addition to this specific structure, the discharge control circuit 2 can also be of other types, which will not be described in detail in the embodiments of the present invention.

[0068] As an optional embodiment, the power supply circuit 1 includes:

[0069] A battery power supply module, used for providing a voltage output of a first voltage value;

[0070] A voltage source, configured to provide a voltage output of a second voltage value, wherein the second voltage value is greater than the first voltage value;

[0071] A channel selection module, used for outputting the output voltage of the voltage source from its own output terminal when the voltage source has an output, and outputting the output voltage of the battery power supply module from its own output terminal when the voltage source has no output;

[0072] The battery power supply module comprises a battery base and a battery which is detachably mounted on the battery base.

[0073] Specifically, in order to better illustrate the embodiments of the present invention, please refer to Figure 3 , Figure 3 The figure is a structural schematic diagram of a battery base.

[0074] Specifically, in Figure 2In the figure, J1 is the battery base, R1 (resistance can be 1K ohm) and R2 are both current limiting resistors, P3C_BAT is the output voltage of the battery, P3V3_STBY is a voltage source, and the voltage source can come from the motherboard of the computer device, D1 is a channel selection module, and P3V3_RTC_STBY can be the output voltage of the channel selection module, C1 can be a filter capacitor, and PTC_3V3_R can be the output voltage of the first controllable switch.

[0075] Specifically, considering that (1) when the main power supply is cut off, the CMOS chip needs to be continuously powered to prevent data loss, and (2) the staff has the need to "clear the CMOS chip data by disconnecting the main power supply and the battery power supply", the power supply circuit 1 in the embodiment of the present invention first includes two types of power supply modes: a voltage source and a battery power supply module. The setting of the channel selection module can automatically and adaptively select the most suitable one from the two power supply paths for selection, that is, when the voltage source has an output, the output voltage of the voltage source is output from its own output terminal, and when the voltage source has no output, the output voltage of the battery power supply module is output from its own output terminal.

[0076] Specifically, in order to facilitate the staff to discharge the CMOS chip and clear the data by removing the battery, the battery power supply module in the embodiment of the present invention includes a battery base and a battery detachably installed on the battery base. This battery power supply module has the advantages of simple structure and low cost.

[0077] Of course, in addition to this specific structure, the battery power supply module can also be of other types, which is not limited in the embodiment of the present invention.

[0078] Among them, the channel selection module can be of various types, for example, it can be a gate diode, and the output voltage of the voltage source can be slightly higher than the output voltage of the battery power module (for example, the output voltage of the voltage source is 3.3V and the output voltage of the battery power module is 3V, etc.). In this case, when the voltage source is working normally, since the output voltage of the voltage source is higher than the battery power module, the gate diode can automatically use the output voltage of the voltage source as its own output, and when the voltage source is not working, since the battery power module can output normally at this time, the output voltage of the battery power module can be used as its own output. This power supply method can reduce the loss of the battery and extend the battery life. The gate diode has the advantages of simple structure, small size and low cost, and the embodiments of the present invention are not limited here.

[0079] Specifically, when you want to clear the data in the CMOS chip by removing the battery, you can first turn off the power of the computer device, then remove the battery from the battery base, and then put the battery back after a period of time.

[0080] As an optional embodiment, the complementary metal oxide semiconductor chip management and control system further includes:

[0081] A connector having a first pin connected to an output end of a channel selection module, a second pin connected to a complementary metal oxide semiconductor chip and an input end of a second controllable switch, respectively, and a third pin connected to ground, and used for realizing electrical connection between the output end of the first controllable switch and the complementary metal oxide semiconductor chip when the first pin thereof is electrically connected to the second pin, and realizing grounding of the complementary metal oxide semiconductor chip when the second pin thereof is electrically connected to the third pin;

[0082] The jumper cap is used to realize the electrical connection between the first pin and the second pin of the connector, or realize the electrical connection between the second pin and the third pin of the connector.

[0083] Specifically, in order to better illustrate the embodiments of the present invention, please refer to Figure 4 , Figure 4 The figure is a schematic diagram of the structure of a jump cap.

[0084] Specifically, considering that the connection mode of the pins on the connector can be changed by using a jumper cap, the discharge of the CMOS chip can also be achieved. Therefore, the CMOS control system in the embodiment of the present invention also includes a connector and a jumper cap. Figure 2 The J2 in the figure is the connector. The 1, 2 and 3 on the connector are the first pin, the second pin and the third pin respectively. The jumper cap is not in Figure 2 As shown in the figure, under normal conditions, the jumper cap can realize the electrical connection between the first pin and the second pin of the connector, and when the CMOS is to be discharged to clear data, the jumper cap can be used to realize the electrical connection between the second pin and the third pin of the connector. Through the cooperation of the connector and the jumper cap in the embodiment of the present invention, the staff can manually operate the jumper cap to realize the discharge of the CMOS to clear data.

[0085] Specifically, when you want to clear the data of the CMOS chip by "changing the connection of the jumper cap", you can first turn off the power of the computer device, then remove the jumper caps on the first pin and the second pin of the connector, change them to the position of the second pin and the third pin, and then jump the jumper cap back to the first pin and the second pin after a period of time.

[0086] As an optional embodiment, the first detection port of the controller is also connected to the output end of the battery power supply module;

[0087] The controller is also used to, after the server is powered on, if the voltage value detected by the first detection port is lower than a preset threshold, control the prompter to prompt that the battery power supply module is abnormal;

[0088] The control system of complementary metal oxide semiconductor chips also includes:

[0089] A reminder connected to the controller.

[0090] Specifically, considering that there are many ways to "discharge the CMOS chip", operating errors in these ways may cause the CMOS chip to be unable to be powered normally, such as forgetting to reinstall the battery after removal, not restoring the jumper cap to the normal position after discharge, etc., considering that in the case of abnormality of the battery, the output voltage of the battery power supply module will be very low or zero, so in the embodiment of the present invention, the first detection port ( Figure 2 The OUT pin for transmitting the BMC_ADC1 signal in the control unit is also connected to the output end of the battery power supply module. After the server is powered on, if the voltage value detected by the first detection port is lower than the preset threshold, the controller will prompt the battery power supply module to be abnormal, which is conducive to guiding the staff to quickly locate the fault and improve the efficiency of fault location.

[0091] Among them, the prompter can be of various types, for example, it can be a display, and the controller can display relevant content through the display. When the controller is a BMC (Baseboard Management Controller), the BMC can display relevant content through the BMC web page based on the display. The embodiment of the present invention is not limited here.

[0092] As an optional embodiment, the voltage source is arranged on a mainboard of the computer device;

[0093] Voltage sources are also used to power designated loads on the motherboard of computer equipment;

[0094] The controller includes a baseboard management controller of a computer device.

[0095] Specifically, considering that the voltage source on the mainboard of the computer device can power the CMOS chip while supplying power to the designated load on the mainboard, the voltage source in the embodiment of the present invention can be set on the mainboard of the computer device, and considering that the BMC can be used to control the discharge control circuit 2 and detect the output voltage of the battery power module, the controller in the embodiment of the present invention can include the BMC of the computer device, thereby reducing the modification of the computer device and reducing the cost.

[0096] Of course, in addition to the above specific examples, the voltage source and the controller may be of other types, and the embodiments of the present invention are not limited here.

[0097] As an optional embodiment, the second detection port of the controller is also connected to a power supply pin of the complementary metal oxide semiconductor chip;

[0098] The controller is also used to record the execution log when executing the discharge control logic; after the server is powered on, if the second detection port ( Figure 2 If the voltage value detected by the OUT pin for transmitting the BMC_ADC2 signal is lower than the preset threshold and there is an execution log that is no more than a second preset time from now, the control prompter prompts that the discharge control logic and / or the power supply control logic of the controller is abnormal;

[0099] The control system of complementary metal oxide semiconductor chips also includes:

[0100] A reminder connected to the controller.

[0101] Specifically, in order to better illustrate the embodiments of the present invention, please refer to Figure 5 , Figure 5 A schematic diagram of the structure of another CMOS chip control system provided by the present invention, Figure 5 There is a CMOS chip inside the central processing unit, the baseboard management controller serves as a controller, the controllable switch includes a first controllable switch and a second controllable switch, and the monitoring circuit is respectively connected to the output end of the battery power module and the power supply pin of the CMOS chip "the first detection port and the second detection port of the controller".

[0102] Specifically, by Figure 2 It can be seen that when the controller controls the CMOS chip to discharge through the power-off control circuit, it is equivalent to grounding the power supply pin of the CMOS chip, and after the discharge is completed, the power-off control circuit needs to be reset (that is, the first controllable switch is turned on and the second controllable switch is turned off), so that the power supply circuit 1 can normally supply power to the CMOS chip. If the controller does not normally reset the power-off control circuit after "controlling the CMOS chip to discharge through the power-off control circuit", the power supply pin of the CMOS chip will be continuously pulled down, that is, the power supply pin of the CMOS chip will present a low potential. In order to assist the staff in locating this abnormal situation, the second detection port of the controller in the embodiment of the present invention is also connected to the power supply pin of the complementary metal oxide semiconductor chip, and the controller can record the execution log when executing the discharge control logic; after the server is powered on, if the voltage value detected by the second detection port is lower than the preset threshold and there is an execution log that does not exceed the second preset time length, the control prompter prompts that the discharge control logic and / or power supply control logic of the controller is abnormal, so as to facilitate the staff to locate the fault for the abnormal situation that the CMOS does not power on.

[0103] The second preset duration may be flexibly and independently set, and the embodiment of the present invention does not limit this.

[0104] In addition, considering that when the controller is executing the discharge control logic, if the discharge control logic or related components fail, the power supply pin of the CMOS chip may not be successfully discharged and still maintain a high level. In order to detect this situation in time, the controller in the embodiment of the present invention can also determine whether the voltage value of the power supply pin of the CMOS chip is lower than the preset threshold during the execution of the discharge control logic. If not, the control prompter prompts that the "discharge control logic" execution has failed, which helps the staff to speed up the fault location.

[0105] As an optional embodiment, the controller is further configured to:

[0106] After the server is powered on, if the voltage value detected by the second detection port is lower than a preset threshold and there is no execution log that is no more than a second preset time period from now, the control prompter prompts a jumper connection error.

[0107] Specifically, by Figure 2 It can be seen intuitively that, considering that when discharging the CMOS chip through the jumper cap, the second pin of the connector needs to be connected to the third pin, which is equivalent to grounding the power supply pin of the COMS chip. If the jumper cap is not reset (the first pin of the connector is connected to the second pin) after discharging the CMOS chip through the jumper cap, the power supply pin of the COMS chip will continue to show zero voltage due to grounding. Therefore, in order to assist the staff in locating the fault of this abnormal situation, the second detection port of the controller in the embodiment of the present invention is also connected to the power supply pin of the complementary metal oxide semiconductor chip, and the controller can be powered on on the server. If the voltage value detected by the second detection port is lower than the preset threshold and there is no execution log that is no more than the second preset time from now, the control prompter prompts that the jumper cap connection is wrong, thereby assisting the staff in locating the fault of the abnormal situation of "forgetting to restore the jumper cap position", which is conducive to further improving the efficiency of fault location.

[0108] As an optional embodiment, the first controllable switch includes a P-channel metal oxide semiconductor field effect transistor, and the second controllable switch includes an N-channel metal oxide semiconductor field effect transistor;

[0109] The control system of complementary metal oxide semiconductor chips also includes:

[0110] The potential pull-down circuit has a first end connected to the gate of the second controllable switch and a second end grounded, and is used to pull down the potential of the gate of the second controllable switch to ensure that the second controllable switch is disconnected when the controller executes the power supply control logic.

[0111] Specifically, considering that the level states of the conduction control levels of PMOS (P-channel Metal-Oxide-Semiconductor) and NMOS (N-channel Metal-Oxide-Semiconductor, N-channel Metal-Oxide-Semiconductor) are opposite, that is, the conduction control level of PMOS is low, while the conduction control level of NMOS is high, the "first controllable switch and the second controllable switch" can be controlled to execute the discharge control logic and the power supply control logic through a single port, that is, a low level is output to the "first controllable switch and the second controllable switch" under the power supply control logic, and a high level is output to the "first controllable switch and the second controllable switch" under the discharge control logic, thereby reducing the occupancy of the signal port of the controller and the number of lines.

[0112] Specifically, in order to prevent abnormal interference voltage from causing the second controllable switch to be accidentally turned on under the power supply control logic, a potential pull-down circuit with a first end connected to the gate of the second controllable switch and a second end connected to the ground is also provided in the embodiment of the present invention, for pulling down the potential of the gate of the second controllable switch, so as to ensure that the second controllable switch is disconnected when the controller executes the power supply control logic.

[0113] Among them, see Figure 2 It can be seen that the potential pull-down circuit may include a resistor R3 and a capacitor C2.

[0114] Of course, in addition to this specific case, the first controllable switch and the second controllable switch may also be of other types, which is not limited in the embodiment of the present invention.

[0115] The present invention further provides a computer device, including a computer device body, and also including a management and control system of the MOS chip as described in the above embodiment connected to the computer device body.

[0116] For an introduction to the embodiments of the present invention, please refer to the aforementioned embodiments of the control system for complementary metal oxide semiconductor chips, and the embodiments of the present invention are not limited here.

[0117] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the embodiments can be referred to each other. It should also be noted that in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also include elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the element.

[0118] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A complementary metal oxide semiconductor chip management and control system, characterized in that: include: The power supply circuit is used to supply power to the complementary metal oxide semiconductor chip of the central processing unit; A discharge control circuit connected to the power supply circuit and the complementary metal oxide semiconductor chip respectively, for executing the discharge control logic when there is a discharge control demand, and executing the power supply control logic after a first preset time period; Among them, the discharge control logic is: controlling the power supply circuit to stop supplying power, and controlling the power supply pin of the complementary metal oxide semiconductor chip to be grounded and discharged; the power supply control logic is: controlling the power supply circuit to resume power supply, and controlling the power supply pin of the complementary metal oxide semiconductor chip to be disconnected from the ground.

2. The complementary metal oxide semiconductor chip management and control system according to claim 1, characterized in that: The discharge control circuit comprises: A first controllable switch having an input end connected to a power supply circuit, an output end connected to a complementary metal oxide semiconductor chip, and a control end connected to a controller; A second controllable switch having an input end connected to the complementary metal oxide semiconductor chip, an output end connected to ground, and a control end connected to the controller; A controller, configured to execute a discharge control logic when a discharge control demand exists, and execute a power supply control logic after a first preset time period; The discharge control logic is: controlling the first controllable switch to be turned off and controlling the second controllable switch to be turned on; the power supply control logic is: controlling the first controllable switch to be turned on and controlling the second controllable switch to be turned off.

3. The complementary metal oxide semiconductor chip management and control system according to claim 2, characterized in that: The power supply circuit comprises: A battery power supply module, used for providing a voltage output of a first voltage value; A voltage source, configured to provide a voltage output of a second voltage value, wherein the second voltage value is greater than the first voltage value; A channel selection module, used for outputting the output voltage of the voltage source from its own output terminal when the voltage source has an output, and outputting the output voltage of the battery power supply module from its own output terminal when the voltage source has no output; The battery power supply module comprises a battery base and a battery detachably mounted on the battery base.

4. The complementary metal oxide semiconductor chip management and control system according to claim 3, characterized in that: The complementary metal oxide semiconductor chip management and control system further includes: A connector having a first pin connected to an output end of the channel selection module, a second pin connected to the complementary metal oxide semiconductor chip and an input end of the second controllable switch, respectively, and a third pin connected to ground, and used for realizing electrical connection between the output end of the first controllable switch and the complementary metal oxide semiconductor chip when the first pin is electrically connected to the second pin, and realizing grounding of the complementary metal oxide semiconductor chip when the second pin is electrically connected to the third pin; A jumper cap is used to realize an electrical connection between the first pin and the second pin of the connector, or to realize an electrical connection between the second pin and the third pin of the connector.

5. The complementary metal oxide semiconductor chip management and control system according to claim 3, characterized in that: The first detection port of the controller is also connected to the output end of the battery power supply module; The controller is also used to, after the server is powered on, if the voltage value detected by the first detection port is lower than a preset threshold, control the prompter to prompt that the battery power supply module is abnormal; The complementary metal oxide semiconductor chip management and control system further includes: A prompter connected to the controller.

6. The complementary metal oxide semiconductor chip management and control system according to claim 3, characterized in that: The voltage source is arranged on the mainboard of the computer device; The voltage source is also used to supply power to a designated load on a mainboard of a computer device; The controller comprises a baseboard management controller of a computer device.

7. The complementary metal oxide semiconductor chip management and control system according to any one of claims 3 to 6, characterized in that: The second detection port of the controller is also connected to the power supply pin of the complementary metal oxide semiconductor chip; The controller is also used to record an execution log when executing the discharge control logic; after the server is powered on, if the voltage value detected by the second detection port is lower than a preset threshold and there is an execution log that is no longer than a second preset time, the control prompter prompts that the discharge control logic and / or power supply control logic of the controller is abnormal; The complementary metal oxide semiconductor chip management and control system further includes: A prompter connected to the controller.

8. The complementary metal oxide semiconductor chip management and control system according to claim 7, characterized in that: The controller is also used for: After the server is powered on, if the voltage value detected by the second detection port is lower than the preset threshold and there is no execution log that is no more than the second preset time period from now, the control prompter prompts a jumper connection error.

9. The complementary metal oxide semiconductor chip management and control system according to claim 2, characterized in that: The first controllable switch comprises a P-channel metal oxide semiconductor field effect transistor, and the second controllable switch comprises an N-channel metal oxide semiconductor field effect transistor; The complementary metal oxide semiconductor chip management and control system further includes: A potential pull-down circuit having a first end connected to the gate of the second controllable switch and a second end grounded is used to pull down the potential of the gate of the second controllable switch to ensure that the second controllable switch is disconnected when the controller executes the power supply control logic.

10. A computer device, characterized in that: It comprises a computer device body and also comprises a management and control system of the metal oxide semiconductor chip as claimed in any one of claims 1 to 9 connected to the computer device body.

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