Current source type converter and working condition test circuit for equivalent effect

Abstract

The invention relates to a current source type converter and an equivalent effect working condition test circuit. The current source type converter comprises a multi-level conversion unit, a total alternating current port and a total direct current port. The multi-level conversion unit includes a multi-level converter and a main converter each having a first port, a second port, and a third port. The total DC port has a first end and a second end. Wherein a first port of the multi-level converter is connected with a first port of the main converter; the second port of the multi-level converter is connected with the first end of the total direct current port; a third port of the multi-level converter is connected with a second end of the total direct current port; the second port of the main converter is connected with the second port of the multi-level converter and the first end of the total direct current port; and a third port of the main converter is connected with the total alternating current port. The programmable performance of the current source and the bridge arm level efficiency of the current source can be improved at the same time, and the implementation difficulty is reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of power electronics, and in particular to a current source converter and an equivalent application working condition test circuit. Background Art

[0002] The equivalent application condition test uses a dedicated test circuit to reproduce the characteristic stress of the device under test or the core components of the device under test in the application condition. At present, the commonly used test circuit can be composed of a high-voltage and low-current voltage source, a low-voltage and high-current current source and the device under test in parallel, where the device under test is, for example, a power semiconductor device or a converter valve assembly.

[0003] When conducting an equivalent application condition test, in conjunction with the control timing of each component, the voltage source can generate characteristic voltage stress when the device under test is blocked, and the current source can generate characteristic current stress when the device under test is turned on. However, there are significant differences between the characteristic stress waveforms of different application conditions. In order to improve the versatility of the test circuit and the accuracy of the equivalent application condition test results, how to effectively improve the programmable performance of the voltage source and current source to generate characteristic stress close to the target application condition needs to be further optimized. Summary of the invention

[0004] Based on this, the embodiments of the present disclosure provide a current source converter and an equivalent application condition test circuit, which can effectively improve the bridge arm level efficiency of the current source converter while improving the programmable performance of the current source, and reduce the difficulty of implementing a multi-level current source converter.

[0005] In order to achieve the above-mentioned purpose, in the first aspect, some embodiments of the present disclosure provide a current source converter. The current source converter includes: a multi-level conversion unit, a total AC port and a total DC port. The multi-level conversion unit includes a multi-level converter and a main converter, and the multi-level converter and the main converter both have a first port, a second port and a third port; the total DC port has a first end and a second end. Among them, the first port of the multi-level converter is connected to the first port of the main converter; the second port of the multi-level converter is connected to the first end of the total DC port; the third port of the multi-level converter is connected to the second end of the total DC port; the second port of the main converter is connected to the second port of the multi-level converter and the first end of the total DC port; the third port of the main converter is connected to the total AC port.

[0006] In some embodiments of the present disclosure, a multilevel converter includes: n groups of two-level converters and a first smoothing reactor. The n groups of two-level converters are connected in parallel between a first port and a second port of the multilevel converter, where n is a positive integer greater than or equal to 1. The first smoothing reactor is connected in series between a third port of the multilevel converter and the n groups of two-level converters. The two-level converter includes: a first bridge arm and a second bridge arm connected in series with a common cathode, and a second smoothing reactor connected in parallel to both ends of the second bridge arm.

[0007] Optionally, the main converter includes: a three-phase converter formed by connecting six groups of third bridge arms; wherein every two groups of third bridge arms are connected in series to form a half bridge, and three groups of half bridges are connected in parallel.

[0008] In some embodiments of the present disclosure, the first bridge arm, the second bridge arm and the third bridge arm are all composed of reverse resistance fully controlled power semiconductor devices connected in series. Or, in other embodiments of the present disclosure, the first bridge arm and the second bridge arm are all composed of reverse resistance fully controlled power semiconductor devices connected in series; the third bridge arm is composed of reverse resistance half controlled power semiconductor devices connected in series.

[0009] Optionally, the main converter includes: a single-phase converter formed by connecting four groups of fourth bridge arms.

[0010] In some embodiments of the present disclosure, the inductance values ​​of the second smoothing reactors in each two-level converter are the same. Or, in other embodiments of the present disclosure, the inductance values ​​of the second smoothing reactors in each two-level converter are arranged as an equal proportion sequence of 1: 2: … : 2(n-1). Or, in still other embodiments of the present disclosure, the inductance values ​​of the second smoothing reactors in each two-level converter are arranged as an equal proportion sequence of 1: 2: … : 2(n-1), and the sum of the inductance values ​​of the second smoothing reactors in each two-level converter is the same as the inductance value of the first smoothing reactor.

[0011] Optionally, the number of the multi-level conversion units is m groups, where m is a positive integer greater than or equal to 2.

[0012] Accordingly, in some embodiments of the present disclosure, the third port of the main converter in each multi-level conversion unit is connected in parallel to the total AC port; the second port of the multi-level converter in each multi-level conversion unit is connected in parallel to the first end of the total DC port; the third port of the multi-level converter in each multi-level conversion unit is connected in parallel to the second end of the total DC port. Or, in other embodiments of the present disclosure, the third port of the main converter in each multi-level conversion unit is connected in parallel to the total AC port; the multi-level converters in each multi-level conversion unit are connected in series between the first end and the second end of the total DC port in sequence.

[0013] Optionally, the multilevel converter includes: n groups of two-level converters connected in parallel between a first port, a second port, and a third port of the multilevel converter, where n is a positive integer greater than or equal to 1. The two-level converter includes: a first bridge arm and a second bridge arm connected in series with a common anode, and a second smoothing reactor; a cathode of the first bridge arm is connected to the first port of the multilevel converter, and a cathode of the second bridge arm is connected to the second port of the multilevel converter; one end of the second smoothing reactor is connected between the first bridge arm and the second bridge arm, and the other end is connected to the third port of the multilevel converter.

[0014] Optionally, the multi-level converter includes: n groups of two-level converters connected in parallel between the first port, the second port and the third port of the multi-level converter, where n is a positive integer greater than or equal to 1. The two-level converter includes: a first bridge arm, a second bridge arm, a coupling inductor, a buffer capacitor and a fifth bridge arm; one end of the first bridge arm and one end of the second bridge arm are connected and connected to the third port of the multi-level converter; the other end of the first bridge arm is connected to one end of the first winding in the coupling inductor and the first plate of the buffer capacitor; the other end of the second bridge arm is connected to one end of the second winding in the coupling inductor and the second plate of the buffer capacitor; the other end of the first winding and the other end of the second winding are connected and connected to the first port of the multi-level converter and the anode end of the fifth bridge arm; the cathode end of the fifth bridge arm is connected to the second port of the multi-level converter.

[0015] In a second aspect, some embodiments of the present disclosure further provide an equivalent application condition test circuit, comprising a current source; the current source comprises a current source type converter as described in any of the above embodiments.

[0016] The embodiments of the present disclosure may or at least have the following advantages:

[0017] In the disclosed embodiment, a multi-level conversion unit of a current source type converter includes a multi-level converter and a main converter, and both the multi-level converter and the main converter have a first port, a second port and a third port, and the first port of the multi-level converter is connected to the first port of the main converter, the second port of the multi-level converter is connected to the first end of the total DC port, the third port of the multi-level converter is connected to the second end of the total DC port, the second port of the main converter is connected to the second port of the multi-level converter and the first end of the total DC port, and the third port of the main converter is connected to the total AC port, so that by designing the number of bridge arms in the multi-level converter and the corresponding connection relationship, the programmable performance of the current source can be effectively improved, the bridge arm level efficiency of the current source converter can be effectively improved, and the difficulty of realizing the multi-level current source converter can be reduced.

[0018] The details of one or more embodiments of the present disclosure are set forth in the following drawings and description. Other features, objects, and advantages of the present disclosure will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 is a schematic structural diagram of a current source converter provided in some embodiments;

[0021] Figure 2 is a schematic structural diagram of a multi-level converter provided in some embodiments;

[0022] Figure 3 is a schematic structural diagram of a two-level converter provided in some embodiments;

[0023] Figure 4 is a structural schematic diagram of a main converter provided in some embodiments;

[0024] Figure 5 is a structural schematic diagram of another main converter provided in some embodiments;

[0025] Figure 6 is a structural schematic diagram of another main converter provided in some embodiments;

[0026] Figure 7 is a schematic structural diagram of another current source converter provided in some embodiments;

[0027] Figure 8 is a schematic structural diagram of another current source converter provided in some embodiments;

[0028] Fig. 9 is a schematic structural diagram of another multi-level converter provided in some embodiments;

[0029] Fig.10 is a schematic structural diagram of another two-level converter provided in some embodiments;

[0030] Fig.11 is a structural schematic diagram of another two-level converter provided in some embodiments;

[0031] Fig.12A comparison diagram of bridge arm level efficiency of a same-inductance multi-level current source converter provided in some embodiments and a current source converter in related technologies;

[0032] Fig.13 A comparison diagram of bridge arm level efficiencies of a heterogeneous inductance multi-level current source converter provided in some embodiments and a current source converter in related technologies;

[0033] Fig.14 A comparison diagram of bridge arm level efficiencies of a magnetically integrated multi-level current source converter provided in some embodiments and a current source converter in related technologies.

[0034] Description of reference numerals:

[0035] 1-multilevel converter, 1'-m-th group of multilevel converters, 11-first port of the multilevel converter, 12-second port of the multilevel converter, 13-third port of the multilevel converter, 14-two-level converter, 141-first bridge arm, 142-second bridge arm, 143-second smoothing reactor, 144-first port of the two-level converter, 145-second port of the two-level converter, 146-third port of the two-level converter, 147-coupling inductor, 148-buffer capacitor, 149-fifth bridge arm, 15-first smoothing reactor, 2-main converter, 2'-m-th group of main converters, 21-third bridge arm, 22-fourth bridge arm, 3-total AC port, 4-total DC port. DETAILED DESCRIPTION

[0036] In order to facilitate understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0038] It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish an element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0039] It should be understood that when an element is considered to be "connected" to another element, it can be directly connected to the other element, or connected to the other element through an intermediate element. In addition, the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is transmission of electrical signals or data between the connected objects.

[0040] It should be understood that the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0041] For equivalent application condition testing, there are significant differences between the characteristic stress waveforms of different application conditions. In order to improve the versatility of the test circuit and the accuracy of the test results of equivalent application conditions, how to effectively improve the programmable performance of the voltage source and current source to generate characteristic stress close to the target application condition needs further optimization.

[0042] In the related technology, the voltage source has developed the function of programmably generating arbitrary waveforms based on modular multi-level converters. The principle is to quickly change the output discrete voltage levels of each module and superimpose them in series. Therefore, the programmable performance of the voltage source can be improved by increasing the number of levels, and ensuring that the stress waveform generated by the voltage source is closer to the characteristic stress of the device under test in the application conditions, thereby improving the versatility of the test circuit and the accuracy of the test results of equivalent application conditions.

[0043] However, the current source is limited by the topological structure of the existing current source converter, with a low degree of modularization and difficulty in increasing the number of levels. It currently does not have the function of programmable generation of arbitrary waveforms. However, due to the high unit capacity of the current source converter and the ability to effectively handle DC short-circuit faults without stopping, it has significant technical advantages in applications such as wind power transmission and offshore wind power networking. Therefore, how to optimize the programmable performance of the current source has become the current technical focus.

[0044] In the related art, the common topological unit of the current source converter is the device direct series structure. For example, the bridge arm is composed of reverse resistance fully controlled power semiconductor devices directly connected in series, two groups of bridge arms are connected in series to form a half bridge, and three groups of half bridges are connected in parallel to form the power electronics part of the current source converter. The two ends of each half bridge are connected to the DC port through a smoothing reactor, and the midpoint of each half bridge is connected to the AC port through an LC filter.

[0045] Accordingly, when the current source converter is in steady-state operation, the current amplitude of the smoothing reactor is approximately constant. Moreover, when the upper arm of the half-bridge is turned on and the lower arm is blocked, a positive current is injected into the corresponding phase AC port, and the current amplitude is the same as that of the smoothing reactor. When the lower arm of the half-bridge is turned on and the upper arm is blocked, a negative current is injected into the corresponding phase AC port, and the current amplitude is the same as that of the smoothing reactor. When the upper and lower arms of the half-bridge are turned on at the same time, the smoothing reactor continues current through the short-circuited half-bridge, and the current amplitude injected into the corresponding phase AC port is zero. Therefore, the current source converter using the device direct series structure can only generate three levels at the AC port. It has a small number of levels, low programmable performance, and high harmonic content in the output waveform. It is not suitable as a current source for the test circuit, and it is easy to affect or even endanger the power quality of the load connected to the AC port.

[0046] It can be understood that in the related art, by connecting multiple groups of the above-mentioned topological units in parallel or in series to form a current source converter, the number of levels of the AC port in the current source converter can be increased, thereby improving the programmable performance of the current source converter.

[0047] For example, in a current source converter with multiple groups of topological units connected in parallel, the bridge arm is first connected in series with the smoothing reactor to form a topological unit, and the DC ports and AC ports of the multiple groups of topological units are respectively connected in parallel to form a total DC current port and a total AC port. Accordingly, when the current source converter with multiple groups of topological units connected in parallel is in steady state operation, the current amplitudes of the smoothing reactors of each group of topological units are approximately equal. When the upper bridge arm of each group of topological units is turned on, a positive current is injected into the AC port of the corresponding phase, and the current amplitude is, for example, nI dc , where n is the number of topological units, I dc is the current amplitude of each group of smoothing reactors. When the lower bridge arm of each group of topological units is turned on, a negative current is injected into the AC port of the corresponding phase. For example, the current amplitude is nI dc Therefore, by coordinating the switching states of each bridge arm, (2n+1) levels can be generated on the AC port of the corresponding phase. Since each topological unit has 6 bridge arms, the total number of bridge arms in the current source converter is 6n, and the level efficiency of each bridge arm is (2n+1) / 6n.

[0048] For example, in a current source converter with multiple groups of topological units connected in series, the bridge arm first forms a topological unit with devices in direct series, the DC port of each group of topological units is connected in series with a smoothing reactor to form a total DC port, and the AC port of each group of topological units is connected in parallel through transformer coupling to form a total AC port. Accordingly, when the current source converter with multiple groups of topological units connected in series is in steady state operation, the current amplitude of the smoothing reactor is approximately constant. In addition, similar to the current source converter with multiple groups of topological units connected in parallel, when the upper bridge arm of each group of topological units is turned on, a positive current is injected into the corresponding phase AC port, and the current amplitude is, for example, nI dc , where n is the number of topological units, I dc is the current amplitude of each group of smoothing reactors. When the lower bridge arm of each group of topological units is turned on, a negative current is injected into the corresponding phase AC port. The current amplitude is, for example, nI dc Therefore, by coordinating the switching states of each bridge arm, (2n+1) levels can be generated on the AC port of the corresponding phase. Since each topological unit has 6 bridge arms, the total number of bridge arms in the current source converter is 6n, and the level efficiency of each bridge arm is (2n+1) / 6n.

[0049] In summary, the bridge arm level efficiency of the current source converter is the same when multiple groups of topological units are connected in parallel or in series, which is (2n+1) / 6n; that is, for every increase of 2 in the number of levels of the AC port, the number of bridge arms will increase by 6. It can be seen that the bridge arm level efficiency of the above-mentioned current source converter is low. If the same number of levels is to be generated, more bridge arms and switching devices are required, which is likely to greatly increase the implementation cost, control difficulty and operating loss of the multi-level current source converter, reduce the technical advantages of the multi-level current source converter, and further hinder its application in the test circuit and power processing of equivalent application condition testing.

[0050] Based on this, some embodiments of the present disclosure provide a current source converter and an equivalent application condition test circuit, which can effectively improve the bridge arm level efficiency of the current source converter while improving the programmable performance of the current source, and reduce the difficulty of implementing multi-level current source converters.

[0051] See also Figure 1, the current source converter provided by the embodiment of the present disclosure includes: a multi-level conversion unit, a total AC port 3 and a total DC port 4. Among them, the multi-level conversion unit includes a multi-level converter 1 and a main converter 2, and the multi-level converter 1 and the main converter 2 both have a first port, a second port and a third port; the total DC port 4 has a first end and a second end. The first port of the multi-level converter 1 is connected to the first port of the main converter 2; the second port of the multi-level converter 1 is connected to the first end of the total DC port 4; the third port of the multi-level converter 1 is connected to the second end of the total DC port 4; the second port of the main converter 2 is connected to the second port of the multi-level converter 1 and the first end of the total DC port 4; the third port of the main converter 2 is connected to the total AC port 3.

[0052] It can be understood that the first port and the second port of the main converter 2 are DC ports thereof, and the multilevel converter 1 is connected in parallel to the DC port of the main converter 2. The disclosed embodiment can effectively improve the programmable performance of the current source by designing the number of bridge arms in the multilevel converter 1 and the main converter 2 and the corresponding connection relationship, and effectively improve the bridge arm level efficiency of the current source converter, and reduce the difficulty of implementing the multi-level current source converter.

[0053] In some embodiments, see Figure 2 The multilevel converter 1 includes: n groups of two-level converters 14 and a first smoothing reactor 15. The n groups of two-level converters 14 are connected in parallel between the first port 11 and the second port 12 of the multilevel converter 1, where n is a positive integer greater than or equal to 1. The first smoothing reactor 15 is connected in series between the third port 13 of the multilevel converter 1 and the n groups of two-level converters 14.

[0054] For example, see Figure 3 The two-level converter 14 includes: a first bridge arm 141 and a second bridge arm 142 connected in series with a common cathode, and a second smoothing reactor 143 connected in parallel to both ends of the second bridge arm 142 .

[0055] Optionally, see Figure 4 The main converter 2 comprises: a three-phase converter formed by connecting six groups of third bridge arms 21; wherein, every two groups of third bridge arms 21 are connected in series to form a half bridge, and three groups of half bridges are connected in parallel. The three-phase converter adopts a device direct series structure.

[0056] It is worth mentioning that in some embodiments of the present disclosure, the first bridge arm 141, the second bridge arm 142 and the third bridge arm 21 are all composed of reverse resistance fully controlled power semiconductor devices connected in series, and the number of series connection stages is greater than or equal to 1.

[0057] Optionally, the reverse-resistance fully-controlled power semiconductor device includes but is not limited to a reverse-resistance integrated gate commutated thyristor (IGCT), a reverse-resistance insulated gate bipolar transistor (IGBT), and a reverse-conducting or asymmetric power semiconductor device connected in series with a diode.

[0058] Optionally, the inductance values ​​of the second smoothing reactors 143 in each two-level converter 14 are the same.

[0059] As described above, when the current source converter provided by this embodiment is in steady state operation, the current amplitudes of the first smoothing reactor 15 and the second smoothing reactor 143 are approximately constant. When the inductance values ​​of the second smoothing reactors 143 of each two-level converter 14 are the same, the current amplitude of the first smoothing reactor 15 will be n times that of the second smoothing reactor 143.

[0060] In the above two-level converter 14, when the second bridge arm 142 is blocked and the first bridge arm 141 is turned on, a voltage with an amplitude of I is injected into the first port 11 of the multilevel converter 1. dc Negative current, amplitude I dc That is, the current amplitude of the second smoothing reactor 143. When the second bridge arm 142 is turned on, the second smoothing reactor 143 continues current through the second bridge arm 142, and the port current of the two-level converter 14 is zero.

[0061] In the above-mentioned main converter 2, the current of the DC port of the main converter 2 is the current obtained by subtracting the port current of all two-level converters 14 from the current of the first smoothing reactor 15. Since n groups of two-level converters 14 can combine (n+1) current levels, the number of current levels of the DC port of the main converter 2 is (n+1). Moreover, in a half-bridge of one phase of the main converter 2, when the first bridge arm 141 is turned on, a positive current level is injected into the AC port of the corresponding phase, and the number of possible levels is the same as the number of current levels of the DC port, which is (n+1); when the second bridge arm 142 is turned on, a negative current level is injected into the AC port of the corresponding phase, and the number of possible levels is also (n+1). Since the zero levels of the positive and negative current levels overlap, the total number of current levels of the total AC port 3 is (2n+1). In this way, the current source converter in this embodiment adopts the same inductance reduction architecture. After calculation, the total number of bridge arms of the current source converter in this embodiment is (2n+6), and the bridge arm level efficiency can be obtained as (2n+1) / (2n+6).

[0062] In other embodiments of the present disclosure, the current source converter can adopt the same inductance reduction architecture and be used in conjunction with the main converter 2 composed of semi-controlled devices. For example, the first bridge arm 141 and the second bridge arm 142 of the two-level converter 14 in the multi-level converter 1 are both composed of reverse resistance full-controlled power semiconductor devices connected in series, and the number of series connections is greater than or equal to 1; and the third bridge arm 21 in the main converter 2 is composed of reverse resistance semi-controlled power semiconductor devices connected in series, and the number of series connections is greater than or equal to 1, for example Figure 5 as shown in .

[0063] Optionally, the reverse blocking half-controlled power semiconductor device includes but is not limited to a thyristor.

[0064] As described above, when the current source converter provided by this embodiment is in steady state operation, the current amplitudes of the first smoothing reactor 15 and the second smoothing reactor 143 are approximately constant. When the inductance values ​​of the second smoothing reactors 143 of each two-level converter 14 are the same, the current amplitude of the first smoothing reactor 15 will be n times that of the second smoothing reactor 143.

[0065] In the above two-level converter 14, when the second bridge arm 142 is blocked and the first bridge arm 141 is turned on, a voltage with an amplitude of I is injected into the first port 11 of the multilevel converter 1. dc Negative current, amplitude I dc That is, the current amplitude of the second smoothing reactor 143. When the second bridge arm 142 is turned on, the second smoothing reactor 143 continues current through the second bridge arm 142, and the port current of the two-level converter 14 is zero.

[0066] In the above-mentioned main converter 2, the current of the DC port of the main converter 2 is the current of the first smoothing reactor 15 minus the port current of all two-level converters 14. Since n groups of two-level converters 14 can combine (n+1) current levels, the number of current levels of the DC port of the main converter 2 is (n+1). Moreover, in a one-phase half bridge of the main converter 2, when the first bridge arm 141 is turned on, a positive current level is injected into the AC port of the corresponding phase, and the number of possible levels is the same as the number of current levels of the DC port, which is (n+1); when the second bridge arm 142 is turned on, a negative current level is injected into the AC port of the corresponding phase, and the number of possible levels is also (n+1). Since the zero levels of the positive and negative current levels overlap, the total number of current levels of the total AC port 3 is (2n+1). It should be supplemented that, in the embodiment of the present disclosure, the main converter 2 uses a half-controlled power semiconductor device to form a bridge arm, which cannot be actively shut down, but can be passively shut down by reducing the current level of the DC port to zero. In this way, after calculation, the total number of bridge arms of the current source converter in this embodiment is (2n+6), and the bridge arm level efficiency is (2n+1) / (2n+6), which is the same as the bridge arm level efficiency in the aforementioned embodiment, but this embodiment can greatly reduce manufacturing costs and operating losses through the use of semi-controlled power semiconductor devices.

[0067] In some other embodiments of the present disclosure, please refer to Figure 6 , the main converter 2 includes: a single-phase converter formed by connecting four groups of fourth bridge arms 22. In this way, when the main converter 2 in this embodiment is working, the opposite bridge arms can be turned on at the same time or the upper and lower bridge arms can be turned on at the same time, so as to be suitable for the application scenario of single-phase output. The total number of levels that can be output in this embodiment and the level efficiency are the same as those in the above embodiment.

[0068] It is worth mentioning that in some embodiments of the present disclosure, the current source converter can be constructed by using m groups of multi-level conversion units connected in parallel as a whole or in series and parallel as a whole, where m is a positive integer greater than or equal to 2.

[0069] Optionally, m groups of multi-level conversion units are connected in parallel as a whole. Figure 7, the third port of the main converter 2 in each multi-level conversion unit (for example, from the first group of main converters 2 to the mth group of main converters 2') is connected in parallel to the total AC port 3; the second port of the multi-level converter 1 in each multi-level conversion unit (for example, from the first group of multi-level converters 1 to the mth group of multi-level converters 1') is connected in parallel to the first end of the total DC port 4; the third port of the multi-level converter 1 in each multi-level conversion unit (for example, from the first group of multi-level converters 1 to the mth group of multi-level converters 1') is connected in parallel to the second end of the total DC port 4. In this way, this embodiment can effectively increase the current output capacity, and its maximum output current can be increased to m times, and the corresponding number of current levels can be increased to m(2n+1). In this way, after calculation, the total number of bridge arms of the current source converter in this embodiment is m(2n+6), and the bridge arm level efficiency can be obtained as (2n+1) / (2n+6), which is the same as the bridge arm level efficiency in some of the aforementioned embodiments.

[0070] Optionally, m groups of multi-level conversion units are connected in series and in parallel as a whole. Figure 8 , the third port of the main converter 2 in each multi-level conversion unit (for example, from the first group of main converters 2 to the mth group of main converters 2') is connected in parallel to the total AC port 3; the multi-level converters 1 in each multi-level conversion unit (for example, from the first group of multi-level converters 1 to the mth group of multi-level converters 1') are sequentially connected in series between the first end and the second end of the total DC port 4. In this way, this embodiment can effectively increase the DC voltage bearing capacity and AC current output capacity. The maximum DC voltage of the current source converter in this embodiment can be increased to m times, and the maximum AC output current of the current source converter in this embodiment can be increased to m times, and the corresponding number of current levels can be increased to m(2n+1). In this way, after calculation, the total number of bridge arms of the current source converter in this embodiment is m(2n+6), and the bridge arm level efficiency can be obtained as (2n+1) / (2n+6), which is the same as the bridge arm level efficiency in some of the aforementioned embodiments.

[0071] In some other embodiments of the present disclosure, the current source converter may adopt a heterogeneous inductance reduction architecture. Figure 2 and Figure 3 It is understood that the inductance values ​​of the second smoothing reactors 143 in each two-level converter 14 can be arranged in an equal proportion sequence of 1: 2: ... : 2 (n-1), and the sum of the inductance values ​​of the second smoothing reactors 143 in each two-level converter 14 is the same as the inductance value of the first smoothing reactor 15. Therefore, when the current source converter provided by this embodiment is in steady state operation, the current amplitude of the first smoothing reactor 15 is (2 times) the minimum current amplitude of each second smoothing reactor 143. n -1) times.

[0072] In the above two-level converter 14, when the second bridge arm 142 is blocked and the first bridge arm 141 is turned on, a voltage with an amplitude of I is injected into the first port 11 of the multilevel converter 1. dc Negative current, amplitude I dc That is, the current amplitude of the second smoothing reactor 143. When the second bridge arm 142 is turned on, the second smoothing reactor 143 continues current through the second bridge arm 142, and the port current of the two-level converter 14 is zero.

[0073] In the above main converter 2, the current at the DC port of the main converter 2 is the current obtained by subtracting the port currents of all two-level converters 14 from the current of the first smoothing reactor 15. n There are two current levels, so the number of current levels at the DC port of the main converter 2 is 2 n Moreover, in one-phase half bridge of the main converter 2, when the first bridge arm 141 is turned on, a positive current level is injected into the AC port of the corresponding phase, and the number of possible levels is the same as the number of current levels of the DC port, which is 2. n When the second bridge arm 142 is turned on, a negative current level is injected into the AC port of the corresponding phase, and the number of possible levels is also 2 n Since the zero levels of positive and negative current levels overlap, the total number of current levels at the AC port 3 is (2 n+1 -1). Thus, after calculation, the total number of bridge arms of the current source converter in this embodiment is (2n+6), and the bridge arm level efficiency is (2 n+1 -1) / (2n+6).

[0074] In some other embodiments of the present disclosure, the current source converter may adopt a same inductor superposition architecture. Fig. 9 , the multilevel converter 1 adopts other structures different from those in some of the aforementioned embodiments. For example, the multilevel converter 1 includes: n groups of two-level converters 14 connected in parallel between the first port 11, the second port 12 and the third port 13 of the multilevel converter 1, where n is a positive integer greater than or equal to 1. That is, the two-level converter 14 is a three-terminal structure, the first ends of the n groups of two-level converters 14 are connected in parallel to the first port 11 of the multilevel converter 1, the second ends of the n groups of two-level converters 14 are connected in parallel to the second port 12 of the multilevel converter 1, and the third ends of the n groups of two-level converters 14 are connected in parallel to the third port 13 of the multilevel converter 1.

[0075] For example, please combine Fig. 9 and Fig.10It is understood that the two-level converter 14 includes: a first bridge arm 141 and a second bridge arm 142 connected in series with a common anode, and a second smoothing reactor 143. Among them, the cathode of the first bridge arm 141 (for example, the second port 145 of the two-level converter 14) is connected to the first port 11 of the multi-level converter 1, and the cathode of the second bridge arm 142 (for example, the third port 146 of the two-level converter 14) is connected to the second port 12 of the multi-level converter 1. One end of the second smoothing reactor 143 is connected between the first bridge arm 141 and the second bridge arm 142, and the other end (for example, the first port 144 of the two-level converter 14) is connected to the third port 13 of the multi-level converter 1.

[0076] On this basis, optionally, the main converter 2 adopts a three-phase converter.

[0077] Optionally, the first bridge arm 141 , the second bridge arm 142 and the third bridge arm 21 are all composed of reverse resistance fully controlled power semiconductor devices connected in series, and the number of series connection stages is greater than or equal to 1.

[0078] Optionally, the inductance values ​​of the second smoothing reactors 143 of each two-level converter 14 are the same.

[0079] As described above, when the current source converter provided by this embodiment is operating in a steady state, the current amplitude of the second smoothing reactor 143 in each two-level converter 14 is approximately constant and substantially the same.

[0080] In the above two-level converter 14, when the second bridge arm 142 is blocked and the first bridge arm 141 is turned on, a voltage with an amplitude of I is injected into the first port 11 of the multilevel converter 1. dc Positive current, amplitude I dc That is, the current amplitude of the second smoothing reactor 143. When the second bridge arm 142 is turned on, the second smoothing reactor 143 continues current through the second bridge arm 142, and the port current of the two-level converter 14 is zero.

[0081] In the above-mentioned main converter 2, the current of the DC port of the main converter 2 is the sum of the port currents of all two-level converters 14. Since n groups of two-level converters 14 can combine (n+1) current levels, the number of current levels of the DC port of the main converter 2 is (n+1). Moreover, in a half-bridge of one phase of the main converter 2, when the first bridge arm 141 is turned on, a positive current level is injected into the AC port of the corresponding phase, and the number of possible levels is the same as the number of current levels of the DC port, which is (n+1); when the second bridge arm 142 is turned on, a negative current level is injected into the AC port of the corresponding phase, and the number of possible levels is also (n+1). Since the zero levels of the positive and negative current levels overlap, the total number of current levels of the total AC port 3 is (2n+1). Thus, after calculation, the total number of bridge arms of the current source converter in this embodiment is (2n+6), and the bridge arm level efficiency can be obtained as (2n+1) / (2n+6).

[0082] In some other embodiments of the present disclosure, the current source converter may adopt a heterogeneous inductor superposition architecture. Fig. 9 The multilevel converter 1 includes: n groups of two-level converters 14 connected in parallel between the first port 11, the second port 12 and the third port 13 of the multilevel converter 1, where n is a positive integer greater than or equal to 1. That is, the two-level converter 14 has a three-terminal structure, the first ends of the n groups of two-level converters 14 are connected in parallel to the first port 11 of the multilevel converter 1, the second ends of the n groups of two-level converters 14 are connected in parallel to the second port 12 of the multilevel converter 1, and the third ends of the n groups of two-level converters 14 are connected in parallel to the third port 13 of the multilevel converter 1.

[0083] On this basis, optionally, the main converter 2 adopts a three-phase converter.

[0084] Optionally, the first bridge arm 141 , the second bridge arm 142 and the third bridge arm 21 are all composed of reverse resistance fully controlled power semiconductor devices connected in series, and the number of series connection stages is greater than or equal to 1.

[0085] Optionally, the inductance values ​​of the second smoothing reactors 143 in each two-level converter 14 may be arranged in an equal proportion series of 1:2:…:2(n-1).

[0086] As described above, when the current source converter provided by this embodiment is in steady state operation, the current amplitude of the second smoothing reactor 143 in each two-level converter 14 is approximately constant and its ratio is the same as the ratio of the corresponding inductance value.

[0087] In the above two-level converter 14, when the second bridge arm 142 is blocked and the first bridge arm 141 is turned on, a voltage with an amplitude of I is injected into the first port 11 of the multilevel converter 1. dc Positive current, amplitude I dcThat is, the current amplitude of the second smoothing reactor 143. When the second bridge arm 142 is turned on, the second smoothing reactor 143 continues current through the second bridge arm 142, and the port current of the two-level converter 14 is zero.

[0088] In the above main converter 2, the current of the DC port of the main converter 2 is the sum of the port currents of all two-level converters 14. n There are two current levels, so the number of current levels at the DC port of the main converter 2 is 2 n Moreover, in one-phase half bridge of the main converter 2, when the first bridge arm 141 is turned on, a positive current level is injected into the AC port of the corresponding phase, and the number of possible levels is the same as the number of current levels of the DC port, which is 2. n When the second bridge arm 142 is turned on, a negative current level is injected into the AC port of the corresponding phase, and the number of possible levels is also 2 n Since the zero levels of positive and negative current levels overlap, the total number of current levels at the AC port 3 is (2 n+1 -1). Thus, after calculation, the total number of bridge arms of the current source converter in this embodiment is (2n+6), and the bridge arm level efficiency is (2 n+1 -1) / (2n+6).

[0089] In some other embodiments of the present disclosure, the current source converter may also adopt a magnetic integrated superposition architecture. Fig. 9 The multilevel converter 1 includes: n groups of two-level converters 14 connected in parallel between the first port 11, the second port 12 and the third port 13 of the multilevel converter 1, where n is a positive integer greater than or equal to 1. That is, the two-level converter 14 has a three-terminal structure, the first ends of the n groups of two-level converters 14 are connected in parallel to the first port 11 of the multilevel converter 1, the second ends of the n groups of two-level converters 14 are connected in parallel to the second port 12 of the multilevel converter 1, and the third ends of the n groups of two-level converters 14 are connected in parallel to the third port 13 of the multilevel converter 1.

[0090] For example, please combine Fig. 9 and Fig.11It is understood that the two-level converter 14 includes: a first bridge arm 141, a second bridge arm 142, a coupling inductor 147, a buffer capacitor 148 and a fifth bridge arm 149. Among them, one end of the first bridge arm 141 and one end of the second bridge arm 142 are connected to the first port 144 of the two-level converter 14 and connected to the third port 13 of the multi-level converter 1; the other end of the first bridge arm 141 is connected to one end of the first winding in the coupling inductor 147 and the first plate of the buffer capacitor 148; the other end of the second bridge arm 142 is connected to one end of the second winding in the coupling inductor 147 and the second plate of the buffer capacitor 148; the other end of the first winding in the coupling inductor 147 and the other end of the second winding are connected to the second port 145 of the two-level converter 14 and connected to the first port 11 of the multi-level converter 1, and the anode end of the fifth bridge arm 149; the cathode end of the fifth bridge arm 149 (for example, the third port 146 of the two-level converter 14) is connected to the second port 12 of the multi-level converter 1.

[0091] On this basis, optionally, the main converter 2 adopts a three-phase converter.

[0092] Optionally, the fifth bridge arm 149 and the third bridge arm 21 are both composed of reverse resistance fully controlled power semiconductor devices connected in series, and the number of series connection stages is greater than or equal to 1.

[0093] Optionally, the first bridge arm 141 and the second bridge arm 142 are both composed of reverse-resistance fully-controlled power semiconductor devices or bidirectional fully-controlled power semiconductor devices connected in series, and the number of series connection stages is greater than or equal to 1. The bidirectional fully-controlled power semiconductor devices include but are not limited to bidirectional metal oxide semiconductor field effect transistors (Metal Oxide Semiconductor Field Effect Transistor, MOSFET for short), reverse-resistance devices connected in reverse parallel or reverse-conducting devices connected in reverse series, etc.

[0094] Optionally, the inductance values ​​of the coupling inductors 147 of the two-level converters 14 are the same.

[0095] As described above, when the current source converter provided by this embodiment is operating in a steady state, the current amplitude of the coupling inductor 147 in each two-level converter 14 is approximately constant and substantially the same.

[0096] In the above two-level converter 14, the first bridge arm 141 and the second bridge arm 142 can stabilize the total current amplitude of the coupled inductor 147 through the switching action. In this way, when the fifth bridge arm 149 is turned on, the coupled inductor 147 is freewheeling through the second bridge arm 142, and the output current of the second port 145 of the two-level converter 14 is zero. When the fifth bridge arm 149 is blocked, the coupled inductor 147 forces a positive current to be injected into the second port 145 of the two-level converter 14.

[0097] In the above-mentioned main converter 2, the current of the DC port of the main converter 2 is the sum of the port currents of all two-level converters 14. Since n groups of two-level converters 14 can combine (n+1) current levels, the number of current levels of the DC port of the main converter 2 is (n+1). Moreover, in a one-phase half bridge of the main converter 2, when the first bridge arm 141 is turned on, a positive current level is injected into the AC port of the corresponding phase, and the number of possible levels is the same as the number of current levels of the DC port, which is (n+1); when the second bridge arm 142 is turned on, a negative current level is injected into the AC port of the corresponding phase, and the number of possible levels is also (n+1). Since the zero levels of the positive and negative current levels overlap, the total number of current levels of the total AC port 3 is (2n+1). Thus, after calculation, the total number of bridge arms of the current source converter in this embodiment is (3n+6), and the bridge arm level efficiency can be obtained as (2n+1) / (3n+6).

[0098] In summary, compared with the change in bridge arm level efficiency of the current source converter in the related art, each current source converter provided by the embodiments of the present disclosure can effectively increase the bridge arm level efficiency as the number of two-level converters increases. Figure 12~Figure 14 A comparison diagram of the bridge arm level efficiency of the current source converter provided by some embodiments of the present disclosure and the current source converter in the related art is provided by way of example, wherein: Fig.12 A comparison diagram of the bridge arm level efficiency of a same-inductance multi-level current source converter provided in some embodiments of the present disclosure and a current source converter in related technologies, Fig.13 A comparison diagram of bridge arm level efficiency of a heterogeneous inductance multi-level current source converter provided in some embodiments of the present disclosure and a current source converter in related technologies, Fig.14 A comparison diagram of bridge arm level efficiencies of the magnetically integrated multi-level current source converter provided in some embodiments of the present disclosure and the current source converter in related technologies.

[0099] By analyzing Figure 12~Figure 14 It can be seen that in each current source converter provided in the embodiment of the present disclosure, as the number of two-level converters 14 (i.e., n value) increases, the bridge arm level efficiency increases synchronously. However, in the current source converter provided by the related art, as the number of groups of topological units increases, its bridge arm level efficiency decreases synchronously. Therefore, when the number of two-level converters 14 (i.e., n value) in the current source converter is greater than 1, the bridge arm level efficiency of each current source converter provided in the embodiment of the present disclosure is significantly better than that of the related art, and has a better efficiency improvement effect.

[0100] Furthermore, in each current source converter provided in the embodiments of the present disclosure, not only can it have a higher bridge arm level efficiency, but it is also beneficial to use fewer bridge arms and switching devices when generating the same number of levels, thereby greatly reducing the implementation cost, control difficulty and operating loss of the current source converter, thereby further improving the power quality and control flexibility of the multi-level current source converter, and thus facilitating the generation of large current stress of any shape on the device under test in the equivalent application condition test (that is, it can have better current source programmable performance), so as to improve the equivalence and accuracy of the equivalent application condition test.

[0101] Some embodiments of the present disclosure also provide an equivalent application condition test circuit, including a current source; the current source includes a current source type converter as described in any of the above embodiments. The equivalent application condition test circuit also has the technical advantages of the above current source type converter.

[0102] In addition, it can be understood that the current source converter mentioned in the embodiment of the present disclosure can be applied not only to the above-mentioned equivalent application condition test circuit, but also to any circuit, device or equipment in the field of power electronics technology that requires a current source. The embodiment of the present disclosure does not specifically limit this.

[0103] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0104] The above-described embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure shall be subject to the attached claims.

Claims

1. A current source converter, characterized in that: include: A multi-level conversion unit, a total AC port and a total DC port; wherein, The multi-level conversion unit includes a multi-level converter and a main converter, and the multi-level converter and the main converter each have a first port, a second port and a third port; the total DC port has a first end and a second end; The first port of the multilevel converter is connected to the first port of the main converter; the second port of the multilevel converter is connected to the first end of the total DC port; the third port of the multilevel converter is connected to the second end of the total DC port; the second port of the main converter is connected to the second port of the multilevel converter and the first end of the total DC port; the third port of the main converter is connected to the total AC port.

2. The current source converter according to claim 1, characterized in that: The multilevel converter comprises: n groups of two-level converters are connected in parallel between the first port and the second port of the multi-level converter, where n is a positive integer greater than or equal to 1; A first smoothing reactor is connected in series between the third port of the multi-level converter and the n groups of two-level converters; The two-level converter comprises: a first bridge arm and a second bridge arm connected in series with a common cathode, and a second smoothing reactor connected in parallel to both ends of the second bridge arm.

3. The current source converter according to claim 2, characterized in that: The main converter comprises: a three-phase converter formed by connecting six groups of third bridge arms; wherein, every two groups of the third bridge arms are connected in series to form a half bridge, and three groups of the half bridges are connected in parallel.

4. The current source converter according to claim 3, characterized in that: The first bridge arm, the second bridge arm and the third bridge arm are all composed of reverse resistance fully controlled power semiconductor devices connected in series; Alternatively, the first bridge arm and the second bridge arm are both composed of reverse-resistance fully-controlled power semiconductor devices connected in series; and the third bridge arm is composed of reverse-resistance half-controlled power semiconductor devices connected in series.

5. The current source converter according to claim 2, characterized in that: The main converter comprises: a single-phase converter formed by connecting four groups of fourth bridge arms.

6. The current source converter according to claim 2, characterized in that: The inductance value of the second smoothing reactor in each of the two-level converters is the same; Or, the inductance values ​​of the second smoothing reactors in each of the two-level converters are arranged in an equal proportion sequence of 1: 2: … : 2(n-1); Or, the inductance values ​​of the second smoothing reactors in each of the two-level converters are arranged in an equal proportion sequence of 1: 2: … : 2(n-1), and the sum of the inductance values ​​of the second smoothing reactors in each of the two-level converters is the same as the inductance value of the first smoothing reactor.

7. The current source converter according to claim 1, characterized in that: The number of the multi-level conversion units is m groups, where m is a positive integer greater than or equal to 2; wherein, The third port of the main converter in each of the multi-level conversion units is connected in parallel to the total AC port; the second port of the multi-level converter in each of the multi-level conversion units is connected in parallel to the first end of the total DC port; the third port of the multi-level converter in each of the multi-level conversion units is connected in parallel to the second end of the total DC port; Or, the third port of the main converter in each of the multi-level conversion units is connected in parallel to the total AC port; the multi-level converters in each of the multi-level conversion units are sequentially connected in series between the first end and the second end of the total DC port.

8. The current source converter according to claim 1, characterized in that: The multi-level converter comprises: n groups of two-level converters connected in parallel between the first port, the second port and the third port of the multi-level converter, where n is a positive integer greater than or equal to 1; wherein the two-level converter comprises: A first bridge arm and a second bridge arm connected in series with a common anode; a cathode of the first bridge arm is connected to the first port of the multi-level converter, and a cathode of the second bridge arm is connected to the second port of the multi-level converter; A second smoothing reactor has one end connected between the first bridge arm and the second bridge arm, and the other end connected to the third port of the multi-level converter.

9. The current source converter according to claim 1, characterized in that: The multi-level converter comprises: n groups of two-level converters connected in parallel between the first port, the second port and the third port of the multi-level converter, where n is a positive integer greater than or equal to 1; wherein, The two-level converter includes: a first bridge arm, a second bridge arm, a coupled inductor, a buffer capacitor and a fifth bridge arm; one end of the first bridge arm and one end of the second bridge arm are connected and connected to the third port of the multi-level converter; the other end of the first bridge arm is connected to one end of the first winding in the coupled inductor and the first plate of the buffer capacitor; the other end of the second bridge arm is connected to one end of the second winding in the coupled inductor and the second plate of the buffer capacitor; the other end of the first winding and the other end of the second winding are connected and connected to the first port of the multi-level converter and the anode end of the fifth bridge arm; the cathode end of the fifth bridge arm is connected to the second port of the multi-level converter.

10. An equivalent application condition test circuit, characterized in that: Comprising a current source; the current source comprises a current source converter as described in any one of claims 1 to 9.

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