Adaptive feedback RC oscillator
By introducing an adaptive feedback mechanism into the RC oscillator, the reference voltage feedback circuit is used to adjust the reference voltage to compensate the comparator delay time, the problems of oscillation frequency stability and high power consumption of existing RC oscillators are solved, and the dual optimization of frequency stability and power consumption is achieved.
Patent Information
- Application Number
- CN202411825652.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-04-25
AI Technical Summary
The existing RC oscillator has poor oscillation frequency stability and high power consumption, making it difficult to take into account frequency stability in low-power designs.
An adaptive feedback RC oscillator is designed, including a reference voltage generation circuit, a capacitor charge and discharge circuit, a reference voltage feedback circuit, a comparator and a pulse signal generation circuit. The oscillation frequency drop is detected by the reference voltage feedback circuit, the reference voltage is adjusted to compensate for the comparator delay time, ensuring the stability of the oscillation frequency, and reducing power consumption by reducing the capacitance charge and discharge current.
The stability of the oscillation frequency and the reduction of power consumption are achieved, which meets the requirements of low-power design, and improves the frequency stability of the oscillator.
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Figure CN119891952A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to an adaptive feedback RC (resistance-capacitance) oscillator. Background Art
[0002] The oscillator can generate a clock signal to drive the entire chip to work. It is a vital part of the chip. Oscillators are divided into ring oscillators, adaptive feedback RC oscillators, LC (inductor capacitor) oscillators, crystal oscillators, etc.
[0003] Crystal oscillators have high precision and good frequency stability, but they are expensive, large in size, and difficult to integrate; LC oscillators have relatively stable frequencies, but the use of inductors results in a large chip area, which is difficult to be compatible with CMOS (Complementary Metal Oxide Semiconductor, MOS) tube processes; ring oscillators have simple circuit structures, small in size, and low in cost, but their frequency stability is not high. Adaptive feedback RC oscillators are easy to integrate, small in size, and low in cost, but their frequency is easily affected by process, voltage, and temperature. How to improve the frequency stability of adaptive feedback RC oscillators is a current research hotspot.
[0004] like Figure 1 The figure shows a schematic diagram of an existing classic RC oscillator circuit, which is mainly composed of a reference current, a charging and discharging capacitor, a comparator, and an RS (reset / set) trigger. Its working principle is to use a constant current to periodically charge and discharge the capacitor, and then compare it with the reference voltage at the inverting input of the comparator. When it is lower or higher than the reference voltage, the state of the output terminal changes, and finally a clock signal of a certain frequency is obtained. The specific process is as follows:
[0005] (1) When the current source I10 charges the capacitor C0, the potential of Vc rises. Assume that the moment is t1.
[0006] (2) When the voltage Vc is higher than the voltage Vhigh, the comparator output voltage resets the RS trigger and the oscillator enters the discharge process.
[0007] (3) Capacitor C0 discharges through current source I20, and the potential of Vc decreases. Assume that this moment is t2.
[0008] (4) When the voltage Vc is lower than the voltage Vlow, the output voltage of another comparator sets the RS trigger, and the oscillator enters the charging process.
[0009] (5) Current source I10 charges capacitor C0, and the potential of Vc rises again. Assume that the moment is t3. It can be seen that the oscillator repeats steps (1) to (4) to generate an output oscillation frequency by periodically charging and discharging capacitor C0.
[0010] The oscillation frequency of a traditional RC oscillator is easily affected by the delay of the comparator, and the delay of the comparator is easily affected by temperature and power supply voltage, so the stability of the oscillation frequency is not high. The traditional solution is to increase the current of the comparator to reduce the delay of the comparator, thereby reducing the impact of the comparator delay on the oscillation frequency, but this will increase power consumption and does not meet the requirements of low-power design. Summary of the invention
[0011] The technical problem to be solved by the present disclosure is to provide an adaptive feedback RC oscillator in order to overcome the defects of poor stability of oscillation frequency and high power consumption of the RC oscillator in the prior art.
[0012] The present invention solves the above technical problems through the following technical solutions:
[0013] Provided is an adaptive feedback RC oscillator, the adaptive feedback RC oscillator comprising a reference voltage generating circuit, a capacitor charging and discharging circuit, a reference voltage feedback circuit, a comparator and a pulse signal generating circuit;
[0014] The reference voltage generating circuit is used to generate a first reference voltage;
[0015] The capacitor charging and discharging circuit includes a first capacitor, and the capacitor charging and discharging circuit is used to generate a first oscillating voltage;
[0016] The reference voltage feedback circuit is used to receive the first reference voltage and the first oscillation voltage, and output the reference voltage to the comparator;
[0017] The comparator is used to receive the first oscillation voltage and the reference voltage, and output a first level signal to the pulse signal generating circuit;
[0018] The pulse signal generating circuit is used for performing periodic charging and discharging operations on the first capacitor based on the first level signal, so that the adaptive feedback RC oscillator generates a pulse signal of a corresponding oscillation frequency;
[0019] The reference voltage is positively correlated with the difference between the first reference voltage and the first oscillation voltage.
[0020] Preferably, the reference voltage feedback circuit includes an operational amplifier module and a follower module;
[0021] The operational amplifier module is used to receive the first reference voltage and the first oscillation voltage, and output an amplified voltage;
[0022] The follower module is used to receive the amplified voltage and output the reference voltage;
[0023] The amplified voltage is K times the difference between the first reference voltage and the first oscillation voltage, K is greater than 1, and the reference voltage is equal to the amplified voltage.
[0024] Preferably, the operational amplifier module includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube, a ninth MOS tube and a second capacitor;
[0025] The follower module includes a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube and a third capacitor;
[0026] The gate of the first MOS transistor is used to receive the first oscillation voltage, and the gate of the second MOS transistor is used to receive the first reference voltage;
[0027] The source of the first MOS tube is electrically connected to the source of the second MOS tube, and the drain of the first MOS tube is electrically connected to the drain and gate of the third MOS tube respectively;
[0028] The gate of the third MOS tube is electrically connected to the gate of the fourth MOS tube, the drain of the second MOS tube is electrically connected to the drain of the fourth MOS tube, and the source of the third MOS tube and the source of the fourth MOS tube are grounded;
[0029] The drain of the fourth MOS tube is electrically connected to the gate of the seventh MOS tube, the drain of the seventh MOS tube is electrically connected to the drain of the eighth MOS tube, the source of the seventh MOS tube is grounded, one end of the second capacitor is electrically connected to the drain of the seventh MOS tube, and the other end of the second capacitor is electrically connected to the gate of the seventh MOS tube;
[0030] The gate of the fifth MOS tube is electrically connected to the gate of the eighth MOS tube, the gate of the sixth MOS tube is electrically connected to the gate of the ninth MOS tube, the drain of the sixth MOS tube is electrically connected to the source of the fifth MOS tube, the drain of the fifth MOS tube is electrically connected to the source of the first MOS tube, and the drain of the ninth MOS tube is electrically connected to the source of the eighth MOS tube;
[0031] The gate of the sixth MOS tube and the gate of the ninth MOS tube are respectively used to receive a first bias voltage, the source of the sixth MOS tube and the source of the ninth MOS tube are respectively used to receive a first power supply voltage, and the gate of the fifth MOS tube and the gate of the eighth MOS tube are respectively used to receive a second bias voltage;
[0032] The drain of the tenth MOS tube is electrically connected to the source of the eleventh MOS tube, the source of the tenth MOS tube is grounded, the drain of the eleventh MOS tube is electrically connected to the source of the twelfth MOS tube, and the gate of the twelfth MOS tube is electrically connected to the drain of the eighth MOS tube;
[0033] One end of the third capacitor is electrically connected to the source of the tenth MOS transistor, and the other end of the third capacitor is electrically connected to the drain of the tenth MOS transistor;
[0034] The gate of the tenth MOS tube is used to receive the third bias voltage, the gate of the eleventh MOS tube is used to receive the fourth bias voltage, the drain of the twelfth MOS tube is used to receive the first power supply voltage, the gate of the twelfth MOS tube is used to receive the amplified voltage, and the source of the eleventh MOS tube is used to output the output reference voltage.
[0035] Preferably, the third MOS tube, the fourth MOS tube, the seventh MOS tube, the tenth MOS tube, the eleventh MOS tube and the twelfth MOS tube are all N-type MOS tubes; the first MOS tube, the second MOS tube, the fifth MOS tube, the sixth MOS tube, the eighth MOS tube and the ninth MOS tube are all P-type MOS tubes.
[0036] Preferably, the reference voltage generating circuit comprises a first current source and a first resistor;
[0037] One end of the first resistor is electrically connected to the first current source, and the other end of the first resistor is grounded;
[0038] The capacitor charging and discharging circuit also includes a second current source;
[0039] One end of the first capacitor is electrically connected to the second current source, and the other end of the first capacitor is grounded.
[0040] Preferably, the first current source and the second current source are both zero temperature coefficient current sources;
[0041] The first resistor is a low temperature coefficient resistor.
[0042] Preferably, the first resistor is an adjustable resistor.
[0043] Preferably, the current value of the second current source is M times the current value of the first current source;
[0044] Wherein, M is a positive number.
[0045] Preferably, M is equal to 2;
[0046] Preferably, the first resistor is a POLY resistor.
[0047] Preferably, the pulse signal generating circuit comprises an isolation module, a first clock module and a second clock module;
[0048] The input end of the isolation module is electrically connected to the output end of the comparator, and the output end of the isolation module is electrically connected to the first clock module and the second clock module respectively;
[0049] The input end of the isolation module is used to receive the first level signal, and the output end of the isolation module is used to output the second level signal;
[0050] The first clock module is used to receive the second level signal and output a first clock signal based on the second level signal;
[0051] The second clock module is used to receive the second level signal and output a second clock signal based on the second level signal;
[0052] The oscillation frequency of the first clock signal is the oscillation frequency of the adaptive feedback RC oscillator.
[0053] Preferably, the isolation module comprises at least one NOT logic gate.
[0054] Preferably, the first clock module comprises a T flip flop (T flip flop, referred to as TFF);
[0055] The second clock module includes three sequentially connected first NOT logic gates, second NOT logic gates, third NOT logic gates and OR logic gates, fourth NOT logic gates and thirteenth MOS transistors;
[0056] The first input end of the OR logic gate is electrically connected to the output end of the third NOT logic gate, and the second input end of the OR logic gate is electrically connected to the output end of the isolation module;
[0057] The input end of the fourth NOT logic gate is electrically connected to the output end of the OR logic gate, the output end of the fourth NOT logic gate is electrically connected to the gate of the thirteenth MOS transistor, the source of the thirteenth MOS transistor is grounded, and the drain of the thirteenth MOS transistor is used to receive the first oscillation voltage;
[0058] The first clock signal is a square wave signal, and the duty cycle of the first clock signal is greater than the duty cycle of the second clock signal.
[0059] On the basis of being in accordance with the common sense in the art, the above-mentioned preferred conditions can be arbitrarily combined to obtain the preferred embodiments of the present disclosure.
[0060] The positive and progressive effects of this disclosure are:
[0061] The adaptive feedback RC oscillator disclosed in the present invention comprises a reference voltage generating circuit, a capacitor charging and discharging circuit, a reference voltage feedback circuit, a comparator and a pulse signal generating circuit, wherein the reference voltage generating circuit is used to generate a first reference voltage, the capacitor charging and discharging circuit comprises a first capacitor, the capacitor charging and discharging circuit is used to generate a first oscillation voltage, the reference voltage feedback circuit is used to receive the first reference voltage and the first oscillation voltage, and output the reference voltage to the comparator, the comparator is used to receive the first oscillation voltage and the reference voltage, and output the first level signal to the pulse signal generating circuit, the pulse signal generating circuit is used to perform periodic charging and discharging operations on the first capacitor based on the first level signal, so that the adaptive feedback RC oscillator disclosed in the present invention comprises a reference voltage generating circuit, a capacitor charging and discharging ... oscillation voltage, and the reference voltage feedback circuit is used to receive the first oscillation voltage and the reference voltage, and output the first level signal to the pulse signal generating circuit, the pulse signal generating circuit is used to perform periodic charging and discharging operations on the first capacitor based on the first level signal, so that the adaptive feedback RC oscillator disclosed in the present invention comprises a reference voltage generating circuit, a capacitor charging and discharging circuit is used to generate a first oscillation voltage, and the The feedback RC oscillator generates a pulse signal of the corresponding oscillation frequency; when the delay of the comparator causes the charging time of the first capacitor to increase and the oscillation frequency to decrease, the first oscillation voltage will decrease. At this time, the reference voltage feedback circuit detects the decrease in oscillation frequency. Since the reference voltage output by the reference voltage feedback circuit is positively correlated with the difference between the first reference voltage and the first oscillation voltage, the reference voltage also decreases, causing the comparator to flip in advance, thereby adaptively compensating for the delay time of the comparator to ensure the stability of the oscillation frequency. At the same time, the first oscillation voltage is small in value, and its low swing oscillation greatly reduces the requirements of the first capacitor on the charging and discharging current, further reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS
[0062] Figure 1 It is a schematic diagram of the existing classic RC oscillator circuit;
[0063] Figure 2 for Figure 1 Oscillation waveform diagram of the classic RC oscillator circuit in;
[0064] Figure 3 A first structural schematic diagram of an adaptive feedback RC oscillator provided by the present disclosure;
[0065] Figure 4 A second structural schematic diagram of the adaptive feedback RC oscillator provided by the present disclosure;
[0066] Figure 5 A schematic diagram of the structure of a reference voltage feedback circuit in an adaptive feedback RC oscillator provided by the present disclosure;
[0067] Figure 6 A third structural schematic diagram of the adaptive feedback RC oscillator provided by the present disclosure;
[0068] Figure 7 This is a fourth structural schematic diagram of the adaptive feedback RC oscillator provided by the present disclosure.
[0069] Description of reference numerals:
[0070] A first current source I1; A second current source I2;
[0071] A first resistor R; A first capacitor C;
[0072] A first MOS tube M1; A second MOS tube M2;
[0073] The third MOS tube M3; the fourth MOS tube M4
[0074] A fifth MOS tube M5; A sixth MOS tube M6;
[0075] A seventh MOS tube M7; An eighth MOS tube M8;
[0076] Ninth MOS tube M9; Second capacitor Cm;
[0077] The tenth MOS tube M10; The eleventh MOS tube M11;
[0078] A twelfth MOS tube M12; A third capacitor Cf;
[0079] Thirteenth MOS tube M13;
[0080] A first NOT logic gate F1; A second NOT logic gate F2;
[0081] The third NOT logic gate F3; The fourth NOT logic gate F4
[0082] OR logic gate H1. DETAILED DESCRIPTION
[0083] The present disclosure is further described below by way of examples, but the present disclosure is not limited to the scope of the examples.
[0084] Prefixes such as "first" and "second" are used in the embodiments of the present disclosure only to distinguish different description objects, and have no limiting effect on the position, order, priority, quantity or content of the described objects. The use of prefixes such as ordinal numbers to distinguish description objects in the embodiments of the present disclosure does not constitute a limitation on the described objects. For the statement of the described objects, please refer to the description in the context of the claims or embodiments, and no unnecessary limitation should be constituted due to the use of such prefixes. In addition, in the description of the present embodiment, unless otherwise specified, the meaning of "plurality" is two or more.
[0085] In the embodiments of the present disclosure, the collection, storage, use, processing, transmission, provision and disclosure of user personal information involved are in compliance with the provisions of relevant laws and regulations and do not violate public order and good morals.
[0086] Figure 1The oscillation waveform of the classic RC oscillator circuit is shown in Figure 2 As shown, assuming that the charging and discharging time of capacitor C0 is t charge and t discharge , the voltage across capacitor C0 is U, and the current source I10=I20=I;
[0087] Known: ;
[0088] Points: ;
[0089] Available charging time: ;
[0090] Similarly, the discharge time can be obtained: ;
[0091] The oscillation period T of the oscillator can be obtained 0 for:
[0092] ;
[0093] Then the oscillation frequency f0 is:
[0094] ;
[0095] Where I0 is Figure 1 The current source size, C0 is the capacitance value of capacitor C0, V high and V low is the reference voltage of the comparator. It can be seen that the oscillation frequency of the oscillator is mainly affected by the reference voltage of the comparator.
[0096] Therefore, the present disclosure provides an adaptive feedback RC oscillator, which can adaptively adjust the reference voltage of the comparator, and then adaptively compensate for the delay time of the comparator to ensure the stability of the oscillation frequency of the oscillator. Specifically:
[0097] This embodiment provides an adaptive feedback RC oscillator, such as Figure 3 As shown, the adaptive feedback RC oscillator includes a reference voltage generating circuit 1, a capacitor charging and discharging circuit 2, a reference voltage feedback circuit 3, a comparator 4 and a pulse signal generating circuit 5;
[0098] The reference voltage generating circuit 1 is used to generate a first reference voltage;
[0099] The capacitor charging and discharging circuit 2 includes a first capacitor, and the capacitor charging and discharging circuit 2 is used to generate a first oscillating voltage;
[0100] The reference voltage feedback circuit 3 is used for receiving the first reference voltage and the first oscillation voltage, and outputting the reference voltage to the comparator 4;
[0101] The comparator 4 is used for receiving the first oscillation voltage and the reference voltage, and outputting a first level signal to the pulse signal generating circuit 5;
[0102] The pulse signal generating circuit 5 is used to perform periodic charging and discharging operations on the first capacitor based on the first level signal, so that the adaptive feedback RC oscillator generates a pulse signal of a corresponding oscillation frequency;
[0103] The reference voltage is positively correlated with the difference between the first reference voltage and the first oscillation voltage.
[0104] The reference voltage generating circuit 1 generates a first reference voltage and outputs the first reference voltage to the reference voltage feedback circuit 3. The capacitor charging and discharging circuit 2 generates a first oscillation voltage and outputs the first oscillation voltage to the reference voltage feedback circuit 3. The reference voltage feedback circuit 3 outputs the reference voltage to the comparator 4 based on the received first reference voltage and the first oscillation voltage. The comparator 4 outputs a first level signal to the pulse signal generating circuit 5 based on the received first oscillation voltage and the reference voltage. The pulse signal generating circuit 5 performs periodic charging and discharging operations on the first capacitor in the capacitor charging and discharging circuit 2 based on the first level signal, so that the adaptive feedback RC oscillator generates a pulse signal of a corresponding oscillation frequency.
[0105] Specifically, Figure 4 As shown, the first reference voltage is represented by Vref, the first oscillation voltage is represented by Vosc, and the reference voltage is represented by Vfb. The first oscillation voltage Vosc is compared with the first reference voltage Vref. When the first oscillation voltage Vosc is lower than or higher than the first reference voltage Vref, the state of the output terminal of the comparator changes, and finally a clock signal with a certain oscillation frequency is obtained; when the delay of the comparator causes the charging time of the first capacitor to increase and the oscillation frequency to decrease, the first oscillation voltage Vosc will decrease. At this time, the reference voltage feedback circuit detects the decrease in oscillation frequency. Since the reference voltage output by the reference voltage feedback circuit is positively correlated with the difference between the first reference voltage and the first oscillation voltage, the reference voltage also decreases, causing the comparator to flip in advance, thereby adaptively compensating for the delay time of the comparator.
[0106] In an optional embodiment, if Figure 4 As shown, the reference voltage feedback circuit 3 includes an operational amplifier module 31 and a follower module 32;
[0107] The operational amplifier module 31 is used to receive the first reference voltage and the first oscillation voltage, and output an amplified voltage;
[0108] The follower module 32 is used to receive the amplified voltage and output a reference voltage;
[0109] The amplified voltage is K times the difference between the first reference voltage and the first oscillation voltage, K is greater than 1, and the reference voltage is equal to the amplified voltage.
[0110] Specifically, the amplified voltage is expressed as Vy, then Vy=K(Vref-Vosc), K is greater than 1, and since the reference voltage Vfb is equal to the amplified voltage, Vfb=Vy=K(Vref-Vosc).
[0111] In this embodiment, the difference between the first reference voltage and the first oscillation voltage is amplified by the operational amplifier module to provide gain for the back-end follower module. The follower module follows the output reference voltage to provide a variable reference voltage for the comparator.
[0112] In an optional embodiment, if Figure 5 As shown, the operational amplifier module 31 includes a first MOS transistor (M1), a second MOS transistor (M2), a third MOS transistor (M3), a fourth MOS transistor (M4), a fifth MOS transistor (M5), a sixth MOS transistor (M6), a seventh MOS transistor (M7), an eighth MOS transistor (M8), a ninth MOS transistor (M9) and a second capacitor (Cm);
[0113] The follower module 32 includes a tenth MOS transistor (M10), an eleventh MOS transistor (M11), a twelfth MOS transistor (M12) and a third capacitor (Cf);
[0114] The gate of the first MOS tube is used to receive the first oscillation voltage, and the gate of the second MOS tube is used to receive the first reference voltage;
[0115] The source of the first MOS tube is electrically connected to the source of the second MOS tube, and the drain of the first MOS tube is electrically connected to the drain and gate of the third MOS tube respectively;
[0116] The gate of the third MOS tube is electrically connected to the gate of the fourth MOS tube, the drain of the second MOS tube is electrically connected to the drain of the fourth MOS tube, and the source of the third MOS tube and the source of the fourth MOS tube are grounded;
[0117] The drain of the fourth MOS tube is electrically connected to the gate of the seventh MOS tube, the drain of the seventh MOS tube is electrically connected to the drain of the eighth MOS tube, the source of the seventh MOS tube is grounded, one end of the second capacitor is electrically connected to the drain of the seventh MOS tube, and the other end of the second capacitor is electrically connected to the gate of the seventh MOS tube;
[0118] The gate of the fifth MOS tube is electrically connected to the gate of the eighth MOS tube, the gate of the sixth MOS tube is electrically connected to the gate of the ninth MOS tube, the drain of the sixth MOS tube is electrically connected to the source of the fifth MOS tube, the drain of the fifth MOS tube is electrically connected to the source of the first MOS tube, and the drain of the ninth MOS tube is electrically connected to the source of the eighth MOS tube;
[0119] The gate of the sixth MOS tube and the gate of the ninth MOS tube are respectively used to receive the first bias voltage, the source of the sixth MOS tube and the source of the ninth MOS tube are respectively used to receive the first power supply voltage, and the gate of the fifth MOS tube and the gate of the eighth MOS tube are respectively used to receive the second bias voltage;
[0120] The drain of the tenth MOS tube is electrically connected to the source of the eleventh MOS tube, the source of the tenth MOS tube is grounded, the drain of the eleventh MOS tube is electrically connected to the source of the twelfth MOS tube, and the gate of the twelfth MOS tube is electrically connected to the drain of the eighth MOS tube;
[0121] One end of the third capacitor is electrically connected to the source of the tenth MOS transistor, and the other end of the third capacitor is electrically connected to the drain of the tenth MOS transistor;
[0122] The gate of the tenth MOS tube is used to receive the third bias voltage, the gate of the eleventh MOS tube is used to receive the fourth bias voltage, the drain of the twelfth MOS tube is used to receive the first power supply voltage, the gate of the twelfth MOS tube is used to receive the amplified voltage, and the source of the eleventh MOS tube is used to output the reference voltage.
[0123] Specifically, Figure 5 As shown, the first bias voltage is represented as Vbp1, the first power supply voltage is represented as Vdd, the second bias voltage is represented as Vbp2, the third bias voltage is represented as Vbn1, the fourth bias voltage is represented as Vbn2, the amplified voltage is represented as Vy, and the reference voltage is represented as Vfb.
[0124] Based on the first bias voltage Vbp1, bias voltages are provided for the gates of the sixth MOS tube (M6) and the ninth MOS tube (M9); based on the second bias voltage Vbp2, bias voltages are provided for the gates of the fifth MOS tube (M5) and the eighth MOS tube (M8); based on the first power supply voltage Vdd, power supply voltages are provided for the source of the sixth MOS tube (M6), the source of the ninth MOS tube (M9) and the drain of the twelfth MOS tube (M12); based on the third bias voltage Vbn1, bias voltages are provided for the gate of the tenth MOS tube (M10); based on the fourth bias voltage Vbn2, bias voltages are provided for the gate of the eleventh MOS tube (M11); the gate of the twelfth MOS tube (M12) receives the amplified voltage Vy; and the source of the eleventh MOS tube (M11) outputs a reference voltage Vfb.
[0125] Specifically, the third MOS tube (M3), the fourth MOS tube (M4), the seventh MOS tube (M7), the tenth MOS tube (M10), the eleventh MOS tube (M11) and the twelfth MOS tube (M12) are all N-type MOS tubes; the first MOS tube (M1), the second MOS tube (M2), the fifth MOS tube (M5), the sixth MOS tube (M6), the eighth MOS tube (M8) and the ninth MOS tube (M9) are all P-type MOS tubes.
[0126] Figure 5 The operational amplifier module 31 in the embodiment can also be called a secondary operational amplifier with Miller compensation. Figure 5 The follower module 32 in FIG. 3 may also be referred to as a source follower.
[0127] Figure 7 The A in the figure represents the capacitors other than the second capacitor (Cm). Figure 5 The operational amplifier module 31 in Figure 7 SF in the figure represents the capacitor other than the third capacitor (Cf). Figure 5 The follower module 32 in .
[0128] The third capacitor (Cf) can reduce the fluctuation of the reference voltage Vfb, improve the stability of the reference voltage, and further improve the stability of the oscillation frequency.
[0129] Since the swing amplitude of the first oscillation voltage Vosc is very low, the voltage value of the reference voltage Vfb is reduced by performing level shifting through the eleventh MOS transistor (M11).
[0130] The operational amplifier module of this embodiment is a low-pass filter module, which has a shaping effect on noise, can better filter out noise, and reduce the impact of temperature fluctuations on the oscillation frequency.
[0131] In an optional embodiment, if Figure 6 As shown, the reference voltage generating circuit 1 includes a first current source I1 and a first resistor R;
[0132] One end of the first resistor R is electrically connected to the first current source I1, and the other end of the first resistor R is grounded;
[0133] The capacitor charging and discharging circuit 2 also includes a second current source I2;
[0134] One end of the first capacitor C is electrically connected to the second current source I2 , and the other end of the first capacitor C is grounded.
[0135] In an optional implementation, the first current source I1 and the second current source I2 are both zero temperature coefficient current sources;
[0136] The first resistor R is a resistor with a low temperature coefficient.
[0137] Zero temperature coefficient current source, also known as zero temperature coefficient current reference source, is a kind of resistor that can keep the current value unchanged at different temperatures, thereby ensuring the stability and reliability of the circuit at different ambient temperatures; low temperature coefficient resistor is a resistor with strong temperature stability, also known as low temperature drift resistor. When the temperature of this type of resistor changes, the resistance value only changes slightly, which can ensure the stability of the circuit.
[0138] In this embodiment, the first current source is a zero temperature coefficient current source, and the first resistor is a low temperature coefficient resistor, which ensures the stability and reliability of the first reference voltage at different ambient temperatures; the second current source is a zero temperature coefficient current source, which ensures the stability and reliability of the first oscillation voltage at different ambient temperatures, thereby ensuring the stability and reliability of the adaptive feedback RC oscillator.
[0139] In an optional embodiment, if Figure 6 As shown, the first resistor R is an adjustable resistor.
[0140] The value of the first reference voltage Vref is related to the oscillation frequency of the adaptive feedback RC oscillator. By changing the resistance of the first resistor, the value of the first reference voltage Vref can be changed, thereby achieving the adjustment of the oscillation frequency.
[0141] Figure 6 The positive end of the amplifier 4 shown receives the first oscillation voltage Vosc, and the negative end receives the reference voltage Vfb, which can be adjusted during actual use, for example, the positive end receives the reference voltage Vfb, and the negative end receives the first oscillation voltage Vosc.
[0142] In an optional implementation, the current value of the second current source is M times the current value of the first current source; wherein M is a positive number.
[0143] That is, the relationship between the first current source I1 and the second current source I2 is: I2=M*I1.
[0144] Specifically, Figure 6 The oscillation period Tz of the adaptive feedback RC oscillator shown is:
[0145] ;
[0146] Wherein, M is a positive number, R is the resistance of the first resistor, and C is the capacitance of the first capacitor;
[0147] Then the oscillation frequency fz of the adaptive feedback RC oscillator is:
[0148] ;
[0149] It can be seen that the oscillation frequency of the adaptive feedback RC oscillator is related to the resistance of the first resistor, the capacitance of the first capacitor and the value of M.
[0150] In an optional embodiment, M is equal to 2.
[0151] Based on the above, Figure 6 The oscillation frequency fz of the adaptive feedback RC oscillator shown is:
[0152] ;
[0153] When M is equal to 2, the oscillation frequency ;
[0154] It can be seen that at this time, the oscillation frequency of the adaptive feedback RC oscillator is only related to the resistance value of the first resistor and the capacitance value of the first capacitor, which simplifies the factors affecting the oscillation frequency and facilitates the adjustment of the oscillation frequency of the adaptive feedback RC oscillator.
[0155] In an optional implementation, the first resistor is a POLY resistor.
[0156] POLY resistors are resistors made of polysilicon (POLY) material. POLY resistors have high voltage resistance and low resistance, and are suitable for high-voltage environments. Under the same resistance value, they occupy a small area and have excellent performance.
[0157] In an optional embodiment, if Figure 6 , Figure 7 As shown, the pulse signal generating circuit 5 includes an isolation module 51, a first clock module 52 and a second clock module 53;
[0158] The input end of the isolation module 51 is electrically connected to the output end of the comparator 4, and the output end of the isolation module 51 is electrically connected to the first clock module 52 and the second clock module 53 respectively;
[0159] The input end of the isolation module 51 is used to receive a first level signal, and the output end of the isolation module 51 is used to output a second level signal;
[0160] The first clock module 52 is used to receive the second level signal and output the first clock signal based on the second level signal;
[0161] The second clock module 53 is used to receive the second level signal and output a second clock signal based on the second level signal to control the first capacitor to perform periodic charging and discharging operations;
[0162] The oscillation frequency of the first clock signal is the oscillation frequency of the adaptive feedback RC oscillator.
[0163] In an optional implementation, the isolation module 51 includes at least one NOT logic gate.
[0164] The NOT logic gate can achieve the effect of electrical isolation of the signal. When electrical fluctuations occur in the circuits connected at both ends of the isolation module, electrical isolation can be effectively performed to prevent abnormal voltage or current from affecting the device.
[0165] Specifically, Figure 7 As shown, the isolation module 51 includes three sequentially connected NOT logic gates, and the three NOT logic gates have stronger load driving capability and isolation performance.
[0166] In an optional embodiment, if Figure 7 As shown, the first clock module 52 includes a T flip-flop;
[0167] The second clock module 53 includes three sequentially connected first NOT logic gate (F1), second NOT logic gate (F2), third NOT logic gate (F3) and OR logic gate (H1), fourth NOT logic gate (F4) and thirteenth MOS transistor (M13);
[0168] The first input terminal of the OR logic gate (H1) is electrically connected to the output terminal of the third NOT logic gate (F3), and the second input terminal of the OR logic gate (H1) is electrically connected to the output terminal of the isolation module 51;
[0169] The input end of the fourth NOT logic gate (F4) is electrically connected to the output end of the OR logic gate (H1), the output end of the fourth NOT logic gate (F4) is electrically connected to the gate of the thirteenth MOS transistor (M13), the source of the thirteenth MOS transistor (M13) is grounded, and the drain of the thirteenth MOS transistor (M13) is used to receive the first oscillation voltage Vosc;
[0170] The first clock signal is a square wave signal, and the duty cycle of the first clock signal is greater than the duty cycle of the second clock signal.
[0171] The T flip-flop is a flip-flop with hold and flip functions depending on the value of the input level signal T. That is, the circuit can keep the state unchanged when T=0 and flip when T=1, thereby stably outputting a square wave signal with a duty cycle of 50%.
[0172] The T flip-flop is an existing mature device, and its specific structure will not be described in detail here.
[0173] The first clock module 52 outputs a first clock signal CLK having a duty cycle of 50% based on the second level signal.
[0174] The second clock module 53 outputs a second clock signal based on the second level signal to control the first capacitor to perform periodic charging and discharging operations. The first clock signal is a square wave signal with a duty cycle of 50%, and the second clock signal is a narrow pulse signal, that is, the duty cycle of the first clock signal is greater than the duty cycle of the second clock signal. The thirteenth MOS tube (M13) is driven to work based on the narrow pulse signal, which can reduce the power consumption of the adaptive feedback RC oscillator.
[0175] Although the specific embodiments of the present disclosure are described above, those skilled in the art should understand that this is only an example, and the protection scope of the present disclosure is defined by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principles and essence of the present disclosure, but these changes and modifications all fall within the protection scope of the present disclosure.
Claims
1. An adaptive feedback RC oscillator, characterized in that: The adaptive feedback RC oscillator includes a reference voltage generating circuit, a capacitor charging and discharging circuit, a reference voltage feedback circuit, a comparator and a pulse signal generating circuit; The reference voltage generating circuit is used to generate a first reference voltage; The capacitor charging and discharging circuit includes a first capacitor, and the capacitor charging and discharging circuit is used to generate a first oscillating voltage; The reference voltage feedback circuit is used for receiving the first reference voltage and the first oscillation voltage, and outputting the reference voltage to the comparator; The comparator is used to receive the first oscillation voltage and the reference voltage, and output a first level signal to the pulse signal generating circuit; The pulse signal generating circuit is used for performing periodic charging and discharging operations on the first capacitor based on the first level signal, so that the adaptive feedback RC oscillator generates a pulse signal of a corresponding oscillation frequency; The reference voltage is positively correlated with the difference between the first reference voltage and the first oscillation voltage.
2. The adaptive feedback RC oscillator according to claim 1, characterized in that: The reference voltage feedback circuit includes an operational amplifier module and a follower module; The operational amplifier module is used to receive the first reference voltage and the first oscillation voltage, and output an amplified voltage; The follower module is used to receive the amplified voltage and output the reference voltage; The amplified voltage is K times the difference between the first reference voltage and the first oscillation voltage, K is greater than 1, and the reference voltage is equal to the amplified voltage.
3. The adaptive feedback RC oscillator according to claim 2, characterized in that: The operational amplifier module includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube, a ninth MOS tube and a second capacitor; The follower module includes a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube and a third capacitor; The gate of the first MOS transistor is used to receive the first oscillation voltage, and the gate of the second MOS transistor is used to receive the first reference voltage; The source of the first MOS tube is electrically connected to the source of the second MOS tube, and the drain of the first MOS tube is electrically connected to the drain and gate of the third MOS tube respectively; The gate of the third MOS tube is electrically connected to the gate of the fourth MOS tube, the drain of the second MOS tube is electrically connected to the drain of the fourth MOS tube, and the source of the third MOS tube and the source of the fourth MOS tube are grounded; The drain of the fourth MOS tube is electrically connected to the gate of the seventh MOS tube, the drain of the seventh MOS tube is electrically connected to the drain of the eighth MOS tube, the source of the seventh MOS tube is grounded, one end of the second capacitor is electrically connected to the drain of the seventh MOS tube, and the other end of the second capacitor is electrically connected to the gate of the seventh MOS tube; The gate of the fifth MOS tube is electrically connected to the gate of the eighth MOS tube, the gate of the sixth MOS tube is electrically connected to the gate of the ninth MOS tube, the drain of the sixth MOS tube is electrically connected to the source of the fifth MOS tube, the drain of the fifth MOS tube is electrically connected to the source of the first MOS tube, and the drain of the ninth MOS tube is electrically connected to the source of the eighth MOS tube; The gate of the sixth MOS tube and the gate of the ninth MOS tube are respectively used to receive a first bias voltage, the source of the sixth MOS tube and the source of the ninth MOS tube are respectively used to receive a first power supply voltage, and the gate of the fifth MOS tube and the gate of the eighth MOS tube are respectively used to receive a second bias voltage; The drain of the tenth MOS tube is electrically connected to the source of the eleventh MOS tube, the source of the tenth MOS tube is grounded, the drain of the eleventh MOS tube is electrically connected to the source of the twelfth MOS tube, and the gate of the twelfth MOS tube is electrically connected to the drain of the eighth MOS tube; One end of the third capacitor is electrically connected to the source of the tenth MOS transistor, and the other end of the third capacitor is electrically connected to the drain of the tenth MOS transistor; The gate of the tenth MOS tube is used to receive the third bias voltage, the gate of the eleventh MOS tube is used to receive the fourth bias voltage, the drain of the twelfth MOS tube is used to receive the first power supply voltage, the gate of the twelfth MOS tube is used to receive the amplified voltage, and the source of the eleventh MOS tube is used to output the output reference voltage.
4. The adaptive feedback RC oscillator according to claim 3, characterized in that: The third MOS tube, the fourth MOS tube, the seventh MOS tube, the tenth MOS tube, the eleventh MOS tube and the twelfth MOS tube are all N-type MOS tubes; the first MOS tube, the second MOS tube, the fifth MOS tube, the sixth MOS tube, the eighth MOS tube and the ninth MOS tube are all P-type MOS tubes.
5. The adaptive feedback RC oscillator according to claim 1, characterized in that: The reference voltage generating circuit comprises a first current source and a first resistor; One end of the first resistor is electrically connected to the first current source, and the other end of the first resistor is grounded; The capacitor charging and discharging circuit also includes a second current source; One end of the first capacitor is electrically connected to the second current source, and the other end of the first capacitor is grounded.
6. The adaptive feedback RC oscillator according to claim 5, characterized in that: The first current source and the second current source are both zero temperature coefficient current sources; The first resistor is a low temperature coefficient resistor.
7. The adaptive feedback RC oscillator according to claim 5, characterized in that: The first resistor is an adjustable resistor.
8. The adaptive feedback RC oscillator according to claim 5, characterized in that: The current value of the second current source is M times the current value of the first current source; Wherein, M is a positive number.
9. The adaptive feedback RC oscillator according to claim 8, characterized in that: M is equal to 2; And / or, the first resistor is a POLY resistor.
10. The adaptive feedback RC oscillator according to claim 1, characterized in that: The pulse signal generating circuit comprises an isolation module, a first clock module and a second clock module; The input end of the isolation module is electrically connected to the output end of the comparator, and the output end of the isolation module is electrically connected to the first clock module and the second clock module respectively; The input end of the isolation module is used to receive the first level signal, and the output end of the isolation module is used to output the second level signal; The first clock module is used to receive the second level signal and output a first clock signal based on the second level signal; The second clock module is used to receive the second level signal and output a second clock signal based on the second level signal; The oscillation frequency of the first clock signal is the oscillation frequency of the adaptive feedback RC oscillator.
11. The adaptive feedback RC oscillator according to claim 10, characterized in that: The isolation module includes at least one NOT logic gate; And / or, the first clock module includes a T trigger; The second clock module includes three sequentially connected first NOT logic gates, second NOT logic gates, third NOT logic gates and OR logic gates, fourth NOT logic gates and thirteenth MOS transistors; The first input end of the OR logic gate is electrically connected to the output end of the third NOT logic gate, and the second input end of the OR logic gate is electrically connected to the output end of the isolation module; The input end of the fourth NOT logic gate is electrically connected to the output end of the OR logic gate, the output end of the fourth NOT logic gate is electrically connected to the gate of the thirteenth MOS transistor, the source of the thirteenth MOS transistor is grounded, and the drain of the thirteenth MOS transistor is used to receive the first oscillation voltage; The first clock signal is a square wave signal, and the duty cycle of the first clock signal is greater than the duty cycle of the second clock signal.