Wide-power detection semi-active amplitude limiting circuit

Abstract

The invention provides a wide-power detection semi-active amplitude limiting circuit. The wide-power detection semi-active amplitude limiting circuit comprises a coupler, a front-stage amplitude limiting network, a rear-stage amplitude limiting network, a wide-power detection network, a first capacitor, a first resistor, a feed inductor, a first microstrip line and a second microstrip line, the wide-power detection network is used for converting the coupling power in the wide dynamic range into direct-current voltage and accelerating conduction of the front-stage amplitude limiting network, the front-stage amplitude limiting network is used for limiting the amplitude of external feed-in power, and the rear-stage amplitude limiting network is used for limiting the amplitude of leakage power of the front-stage amplitude limiting network. And the amplitude limiting capability is improved.

Description

Technical Field

[0001] The invention relates to the technical field of electronic circuits, and in particular to a wide power detection semi-active amplitude limiting circuit. Background Art

[0002] The limiter is a protective device at the receiving end of the wireless communication system. It allows the input small signal to pass almost without loss. When high-power microwave power is input, the limiter can effectively attenuate the signal to ensure that the microwave power reaching sensitive components such as the low-noise amplifier at the back end is always below the safe power to avoid microwave damage. The semi-active limiter circuit is the most common limiter structure at present. It has the advantages of high power tolerance and high reliability. Its schematic diagram is shown in the figure below. Figure 1 As shown. The coupler couples part of the RF energy from the main link and feeds it into the detection network. The detection network converts the RF energy into DC and feeds it into the PIN limiting network, accelerating the conduction of the PIN limiting network. The PIN limiting network enters a low-resistance state, reflects the input RF energy, ensures that the output power is small and within the threshold of the safe power, and realizes the limiting function. The circuit structure is shown as Figure 1 shown.

[0003] However, in the design of high-power limiting circuits, in order to ensure that the input power of the detection diode does not exceed its power capacity, the coupler is usually fixed to a larger coupling value, which will result in a higher starting power point for the PIN limiting network to be accelerated. At the same time, the power range of efficient detection of the traditional detection network is narrow. When the coupled energy exceeds its detection range, the detection network cannot provide sufficient detection voltage, which will result in a higher leakage power and lower isolation of the limiter within its power capacity range. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a wide power detection semi-active limiting circuit, which specifically includes:

[0005] In a first aspect, the present invention provides a wide power detection semi-active limiting circuit, comprising:

[0006] Coupler U1, front-stage limiting network, rear-stage limiting network, wide power detection network, first capacitor C1, first resistor R1, feeding inductor L1, first microstrip line W1 and second microstrip line W2;

[0007] The first end of the first capacitor C1 is the input end of the wide power detection semi-active limiting circuit, and the second end is connected to the first end of the first microstrip line W1;

[0008] The input end of the coupler U1 is connected to the second end of the first microstrip line W1, the coupling end is connected to the first end of the wide power detection network, the through end is connected to the first end of the front-stage limiting network, and the isolation end is connected to the first end of the first resistor R1;

[0009] The second end of the wide power detection network is connected to the second end of the feeding inductor L1;

[0010] The second end of the front-stage limiting network is connected to the first end of the feeding inductor L1, the third end is connected to the second end of the first resistor R1, and the fourth end is connected to the first end of the second microstrip line W2;

[0011] The input end of the post-stage limiting network is connected to the second end of the second microstrip line W2, and the output end is the output end of the wide power detection semi-active limiting circuit;

[0012] A second end of the first resistor R1 is grounded;

[0013] Wide power detection network, used to convert the coupled power with wide dynamic range into DC voltage, accelerating the conduction of the front-stage limiting network;

[0014] The front-stage limiting network is used to limit the external input power;

[0015] The post-stage limiting network is used to limit the leakage power of the pre-stage limiting network.

[0016] In a second aspect, the present invention further provides a chip, comprising any wide power detection semi-active limiting circuit provided in the first aspect.

[0017] In a third aspect, the present invention further provides an electronic device, comprising any chip provided in the second aspect.

[0018] Beneficial effects of the present invention:

[0019] The wide power detection semi-active limiting circuit provided by the present invention benefits from the wide dynamic range of the detection power of the wide power detection network, so that the PIN limiting network, that is, the front-stage limiting network, is more fully opened within its power capacity range and is opened earlier, with lower leakage power, greater isolation, smoother output curve, wider power range of continuous full opening, wider detection range, thereby reducing leakage power and improving limiting capability.

[0020] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of the structure of a conventional semi-active limiting circuit provided by the present invention;

[0022] Figure 2 A schematic diagram of the structure of a wide power detection semi-active limiting circuit provided by the present invention;

[0023] Figure 3 A schematic diagram of a simulation result provided by the present invention;

[0024] Figure 4 Another schematic diagram of simulation results provided by the present invention;

[0025] Figure 5 The present invention provides another schematic diagram of simulation results. DETAILED DESCRIPTION

[0026] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0027] Figure 2 A schematic diagram of the structure of a wide power detection semi-active limiting circuit provided by the present invention is shown in FIG. Figure 2 As shown, the circuit includes:

[0028] Coupler U1, front-stage limiting network 10, rear-stage limiting network 20, wide power detection network 30, first capacitor C1, first resistor R1, feeding inductor L1, first microstrip line W1 and second microstrip line W2.

[0029] A first end of the first capacitor C1 is an input end of the wide power detection semi-active limiting circuit, and a second end is connected to a first end of the first microstrip line W1.

[0030] The input end of the coupler U1 is connected to the second end of the first microstrip line W1 , the coupling end is connected to the first end of the wide power detection network 30 , the through end is connected to the first end of the front-stage limiting network 10 , and the isolation end is connected to the first end of the first resistor R1 .

[0031] A second end of the wide power detection network 30 is connected to a second end of the feeding inductor L1 .

[0032] The second end of the front-stage limiting network 10 is connected to the first end of the feeding inductor L1 , the third end is connected to the second end of the first resistor R1 , and the fourth end is connected to the first end of the second microstrip line W2 .

[0033] The input end of the post-stage limiting network 20 is connected to the second end of the second microstrip line W2, and the output end is the output end of the wide power detection semi-active limiting circuit.

[0034] A second end of the first resistor R1 is grounded.

[0035] The wide power detection network 30 is used to convert the coupling power with a wide dynamic range into a DC voltage, and accelerate the conduction of the front-stage limiting network 10 to improve the power resistance level of the limiting circuit.

[0036] The front-stage limiting network 10 is used to limit the external input power. It can withstand the external input power and limit it. The maximum power tolerance index of the circuit depends on the design of the front-stage limiting network 10.

[0037] The rear-stage limiting network 20 is used to limit the leakage power of the front-stage limiting network 10. It tolerates the leakage power of the front-stage limiting network 10, limits it, and further reduces the leakage power of the final output. The number of stages of the rear-stage limiting network 20 can be one or more, which is adjusted according to specific indicator requirements.

[0038] The wide power detection semi-active limiting circuit provided by the present invention cancels the coupling detection network of the traditional semi-active limiter and adopts a wide power detection network, thereby improving the utilization range and utilization rate of the coupled energy, increasing the limiting isolation, reducing the leakage power, and improving the stability of the circuit.

[0039] In a possible implementation, the wide power detection network 30 includes:

[0040] Impedance compression network 301, N detection branches, N DC filters and ninth microstrip line W9.

[0041] Wherein, N is a positive integer greater than or equal to 1.

[0042] The first end of the impedance compression network 301 is the input end of the wide power detection network 30 .

[0043] The second end of the ninth microstrip line W9 is the output end of the wide power detection network 30 .

[0044] The first end of each detection branch is respectively connected to the second end to the N+1th end of the impedance compression network 301 .

[0045] The first end of each detection branch is connected to the first end of a different DC filter.

[0046] The second end of each DC filter is connected to the first end of the ninth microstrip line W9.

[0047] The impedance compression network 301 is used to widen the input power range of the power detection network 30 .

[0048] The detection branch is used to rectify the input AC signal.

[0049] The DC filter is used to filter out the fundamental wave and higher harmonics and output a DC signal.

[0050] Specifically, the N detection branches correspond to the N DC filters one by one.

[0051] The wide power detection semi-active limiting circuit provided by the present invention uses impedance compression technology as the input port network of the wide power detection network, effectively solving the problem that the input impedance of the detection circuit changes with the input power, widening the input power range of the detection circuit and maintaining good matching performance.

[0052] Furthermore, the dual-path detection structure can further broaden the detection range, improve the power resistance of the detection network, and absorb reflected power to improve detection efficiency.

[0053] In a possible implementation, the impedance compression network 301 includes:

[0054] The fifth microstrip line W5, the eighth microstrip line W8 and the microstrip line group 3011, the microstrip line group 3011 includes at least one microstrip line.

[0055] The first end of the eighth microstrip line W8 is respectively connected to the second end of the fifth microstrip line W5 and the first end of each microstrip line in the microstrip line group 3011 .

[0056] The second end of the eighth microstrip line W8 is the first end of the impedance compression network 301 .

[0057] The second end of each microstrip line in the microstrip line group 3011 is respectively connected to the first end of a different detection branch.

[0058] The impedance compression network 301 is designed by microstrip lines. The impedance compression technology uses the microstrip line structure design to reduce the sensitivity of the impedance to the input power change, effectively solves the problem that the input impedance of the wide power detection network 30 changes with the input power, broadens the input power range of the wide power detection network 30 and maintains good matching performance. When the microstrip line group 3011 includes one microstrip line, a single-channel rectifier circuit designed by complex impedance compression technology is formed, which can broaden the input power range and maintain high efficiency compared to the traditional rectifier circuit. When the microstrip line group 3011 includes multiple microstrip lines, for example, 2 microstrip lines, a dual-channel structure is formed. The dual-channel structure not only improves the power resistance, but also completes energy recovery. In the impedance mismatch state of the wide power detection network 30, the energy cannot be input into the rectifier circuit, and the energy will be reflected back. The reflected energy will be recovered by the dual-channel structure, which improves the detection efficiency.

[0059] Specifically, assume that the characteristic impedance of the quarter-wavelength microstrip lines W6 and W7 is Z 0 , the single-channel impedance compression network 301 expression is as follows:

[0060]

[0061] Among them, Z in It represents the impedance value of the single-channel detection branch from the input port, R represents the impedance value of the wide power detection network from the input port, ±jX represents the series impedance of a quarter-wavelength microstrip line, and its square is X 2 , R L Indicates branch load (detection branch and through filter).

[0062] Optionally, the microstrip line group 3011 includes a sixth microstrip line W6 and a seventh microstrip line W7.

[0063] Accordingly, the wide power detection network 30 includes a first detection branch 222 and a second detection branch 223 .

[0064] The first detection branch 302 and the second detection branch 303 have different internal parameters and operate in different input power ranges.

[0065] The DC filter includes a first DC filter 304 and a second DC filter 305 .

[0066] The first end of the eighth microstrip line W8 is respectively connected to the second end of the fifth microstrip line W5 , the first end of the sixth microstrip line W6 , and the first end of the seventh microstrip line W7 .

[0067] A first end of the first detection branch 302 is connected to a second end of the sixth microstrip line W6 , a second end is grounded, and a third end is connected to a first end of the first DC filter 304 .

[0068] A first end of the second detection branch 303 is connected to a second end of the seventh microstrip line W7 , a second end is grounded, and a third end is connected to a first end of the second DC filter 305 .

[0069] The second end of the first DC filter 304 and the second end of the second DC filter 305 are both connected to the first end of the ninth microstrip line W9 .

[0070] The first detection branch 302 includes a first diode D1 and a second diode D2.

[0071] The anode of the first diode D1 is grounded.

[0072] The cathode of the first diode D1 is connected to the second end of the sixth microstrip line W6 and the anode of the second diode D2 respectively.

[0073] The cathode of the second diode D2 is connected to the first end of the first DC filter 304 .

[0074] The second detection branch 303 includes a third diode D3 and a fourth diode D4.

[0075] The cathode of the third diode D3 is connected to the second end of the seventh microstrip line W7 and the first end of the fourth diode D4 respectively.

[0076] The anode of the third diode D3 is grounded.

[0077] A cathode of the fourth diode D4 is connected to the first end of the second DC filter 305 .

[0078] Specifically, the parameters of the first diode D1 and the second diode D2 are consistent, and the parameters of the third diode D3 and the fourth diode D4 are consistent, but the first detection branch 302 and the second detection branch 303 use Schottky diodes (Schottky Barrier Diode, SBD) with different parameters, thereby distinguishing the optimal power points of the two branches so that they operate in different power areas. For example, the first detection branch 302 operates in a high input power range, and the second detection branch 303 operates in a low input power range.

[0079] This structure broadens the detection power range, and can provide sufficient detection voltage within a wider power range. Due to the expansion of the detection power range, the coupling degree of the coupler can take a smaller value. When a small signal is input, the front-stage limiting network and the wide power detection network are not turned on, and the small signal passes almost losslessly; when the input signal continues to increase and reaches the minimum power for the wide power detection network to be turned on, the wide power detection network starts to work, and the detection voltage provided by the network will be fed into the main link, accelerating the conduction of the front-stage limiting network, and the state of the front-stage limiting network changes from off to on. The front-stage limiting network in the working state will reflect the RF input signal; when a high-power microwave signal is input, the wide power detection network will not be burned due to its wide power tolerance range.

[0080] Optionally, the first diode D1 , the second diode D2 , the third diode D3 and the fourth diode D4 are gallium nitride Schottky diodes.

[0081] In a possible implementation, the front-stage limiting network 10 includes:

[0082] A third microstrip line W3, a fifth diode D5 and a sixth diode D6.

[0083] The first end of the third microstrip line W3 is respectively connected to the through end of the coupler U1 and the second end of the feeding inductor L1 .

[0084] The second end of the third microstrip line W3 is respectively connected to the anode of the fifth diode D5, the anode of the sixth diode D6, and the first end of the second microstrip line W2.

[0085] The cathode of the fifth diode D5 is connected to the cathode of the sixth diode D6 and the second end of the first resistor R1 respectively.

[0086] In a possible implementation, the post-stage limiting network 20 includes:

[0087] A second capacitor C2, a third capacitor C3, an inductor L2, a seventh diode D7 and a fourth microstrip line W4.

[0088] A first end of the second capacitor C2 is connected to a second end of the second microstrip line W2.

[0089] The second end of the second capacitor C2 is respectively connected to the second end of the inductor L2, the anode of the seventh diode D7 and the first end of the fourth microstrip line W4.

[0090] The first end of the inductor L2 and the cathode of the seventh diode D7 are both grounded.

[0091] A first end of the third capacitor C3 is connected to a second end of the fourth microstrip line W4 , and the second end is an output end of the post-stage limiting network 20 .

[0092] Optionally, the fifth diode D5, the sixth diode D6 and the seventh diode D7 are silicon-based PIN diodes.

[0093] Optionally, the feeding inductor L1 is 8 nH, the inductor L2 is 25 nH, the capacitance of the first capacitor C1, the second capacitor C2 and the third capacitor C3 is equal to 33 pF, and the resistance of the first resistor R1 is 50 ohms.

[0094] Optionally, the seventh diode D7 in the post-stage limiting network 20 can be various types of limiting diodes, such as gallium nitride Schottky diode (GaN Schottky Barrier Diode, GaN SBD), silicon-based PIN diode (si PINDiode, siPIN), gallium arsenide PIN diode (GaAs PINDiode, GaAs PIN), etc., and can also be in the form of gallium nitride monolithic microwave limiting chip (GaN Limiter Monolithic Microwave Integrated Circuit, GaAs MMIC), GaN MMIC limiting chip, etc.

[0095] Optionally, the resistors of the wide power detection semi-active limiting circuit are thin film resistors or spiral strip resistors, the inductors are microstrip inductors or stripline inductors or spiral inductors, and the capacitors are microstrip capacitors or metal-insulator-metal capacitors or metal-oxide-metal capacitors or flat plate capacitors or interdigital capacitors.

[0096] The wide power detection semi-active limiting circuit provided by the present invention benefits from the wide dynamic range of the detection power of the detection network. The front-stage limiting network is more fully opened within its power capacity range, the leakage power is lower, the isolation is greater, the output curve is smoother, and a wider detection range is finally obtained. Therefore, the front-stage limiting network is fully opened earlier and the power range of continuous full opening is wider, thereby reducing the leakage power and improving the limiting capability.

[0097] The present invention also provides a chip, comprising any wide power detection semi-active amplitude limiting circuit provided by the present invention.

[0098] The present invention also provides an electronic device, comprising any chip provided by the present invention.

[0099] In order to further demonstrate the beneficial effects of the present invention, the present invention also provides a set of simulation data, as follows:

[0100] 1. Simulation conditions

[0101] ADS simulation software was used for simulation, the simulation frequency band was set to 3-5 GHz, the input power scanning range was -10 dBm-60 dBm, and the S parameter frequency scanning range was 3-5 GHz.

[0102] 2. Simulation Content

[0103] Simulation 1, set two-stage limiter, the first stage limiter uses three silicon-based PIN diodes in parallel, the second stage limiter uses a single PIN diode in parallel with a 25nH inductor, and the detection network is a wide power detection network. The relationship between the leakage power of the present invention and the input power is simulated, and the results are as follows: Figure 3 As shown, taking the 4GH frequency as an example, the maximum leakage power is less than 11dBm, and within the input power range of 22-60dBm, the leakage power is less than 5dBm, which has a significant limiting advantage.

[0104] Simulation 2, set two-stage limiter, the first stage limiter uses three silicon-based PIN diodes in parallel, the second stage limiter uses a single PIN diode in parallel with a 25nH inductor, and the detection network is a wide power detection network. The S21 and S11 parameters of the present invention are simulated with frequency changes, and the results are as follows Figure 4 As shown, within the frequency range of 3-5GHz, the insertion loss is greater than -0.2dB and the input return loss is less than -30dB, with excellent performance.

[0105] Simulation 3, set the detection network to a traditional coupled detection network, and keep other device parameters and quantities consistent with the example of the present invention. Simulate the relationship between the leakage power of the traditional semi-active limiting circuit and the input power. The results are as follows: Figure 5 As shown, taking 4 GHz frequency as an example, the maximum leakage power is less than 22 dBm. From the law of the limiting curve, there is a big gap between the limiting effect of the example of the present invention and that of the present invention.

[0106] The core circuit size of the present invention is less than 0.6 square millimeters, and achieves small insertion loss, excellent standing wave characteristics, ultra-high isolation and ultra-low leakage power in a wide frequency band of 3-5 GHz, and is suitable for broadband and high-power RF front-end systems.

[0107] As for the chip / electronic device embodiment, since it is basically similar to the circuit embodiment, the description is relatively simple, and the specific contents and beneficial effects and other related matters can be referred to the partial description of the circuit embodiment.

[0108] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0109] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A wide power detection semi-active limiting circuit, characterized in that: include: Coupler U1, front-stage limiting network, rear-stage limiting network, wide power detection network, first capacitor C1, first resistor R1, feeding inductor L1, first microstrip line W1 and second microstrip line W2; The first end of the first capacitor C1 is the input end of the wide power detection semi-active limiting circuit, and the second end is connected to the first end of the first microstrip line W1; The input end of the coupler U1 is connected to the second end of the first microstrip line W1, the coupling end is connected to the first end of the wide power detection network, the through end is connected to the first end of the front-stage limiting network, and the isolation end is connected to the first end of the first resistor R1; The second end of the wide power detection network is connected to the second end of the feeding inductor L1; The second end of the front-stage limiting network is connected to the first end of the feeding inductor L1, the third end is connected to the second end of the first resistor R1, and the fourth end is connected to the first end of the second microstrip line W2; The input end of the post-stage limiting network is connected to the second end of the second microstrip line W2, and the output end is the output end of the wide power detection semi-active limiting circuit; The second end of the first resistor R1 is grounded; The wide power detection network is used to convert the coupling power with a wide dynamic range into a DC voltage to accelerate the conduction of the front-stage limiting network; The front-stage limiting network is used to limit the external input power; The post-stage limiting network is used to limit the leakage power of the pre-stage limiting network.

2. The circuit according to claim 1, characterized in that The wide power detection network comprises: An impedance compression network, N detection branches, N DC filters and a ninth microstrip line W9, where N is a positive integer greater than or equal to 1; The first end of the impedance compression network is the input end of the wide power detection network; The second end of the ninth microstrip line W9 is the output end of the wide power detection network; The first end of each detection branch is respectively connected to the second end of the impedance compression network to the N+1th end; The first end of each detection branch is respectively connected to the first end of a different DC filter; The second end of each of the DC filters is connected to the first end of the ninth microstrip line W9; The impedance compression network is used to broaden the input power range of the wide power detection network; The detection branch is used to rectify the input AC signal; The DC filter is used to filter out the fundamental wave and higher harmonics and output a DC signal.

3. The circuit according to claim 2, characterized in that The impedance compression network comprises: a fifth microstrip line W5, an eighth microstrip line W8 and a microstrip line group, wherein the microstrip line group includes at least one microstrip line; The first end of the eighth microstrip line W8 is respectively connected to the second end of the fifth microstrip line W5 and the first end of each microstrip line in the microstrip line group; The second end of the eighth microstrip line W8 is the first end of the impedance compression network; The second end of each microstrip line in the microstrip line group is respectively connected to the first end of different detection branches.

4. The circuit according to claim 3, characterized in that The microstrip line group includes a sixth microstrip line W6 and a seventh microstrip line W7; Correspondingly, the wide power detection network includes a first detection branch and a second detection branch, the first detection branch and the second detection branch have different internal parameters and operate in different input power ranges; The DC filter comprises a first DC filter and a second DC filter; The first end of the eighth microstrip line W8 is respectively connected to the second end of the fifth microstrip line W5, the first end of the sixth microstrip line W6 and the first end of the seventh microstrip line W7; The first end of the first detection branch is connected to the second end of the sixth microstrip line W6, the second end is grounded, and the third end is connected to the first end of the first DC filter; The first end of the second detection branch is connected to the second end of the seventh microstrip line W7, the second end is grounded, and the third end is connected to the first end of the second DC filter; The second end of the first DC filter and the second end of the second DC filter are both connected to the first end of the ninth microstrip line W9; The first detection branch includes a first diode D1 and a second diode D2; The anode of the first diode D1 is grounded; The cathode of the first diode D1 is connected to the second end of the sixth microstrip line W6 and the anode of the second diode D2 respectively; The cathode of the second diode D2 is connected to the first end of the first DC filter; The second detection branch includes a third diode D3 and a fourth diode D4; The cathode of the third diode D3 is connected to the second end of the seventh microstrip line W7 and the first end of the fourth diode D4 respectively; The anode of the third diode D3 is grounded; A cathode of the fourth diode D4 is connected to the first end of the second DC filter.

5. The circuit according to claim 4, characterized in that The first diode D1 , the second diode D2 , the third diode D3 , and the fourth diode D4 are gallium nitride Schottky diodes.

6. The circuit according to any one of claims 1 to 5, characterized in that: The front-stage limiting network comprises: A third microstrip line W3, a fifth diode D5 and a sixth diode D6; The first end of the third microstrip line W3 is respectively connected to the through end of the coupler U1 and the second end of the feeding inductor L1; The second end of the third microstrip line W3 is respectively connected to the anode of the fifth diode D5, the anode of the sixth diode D6 and the first end of the second microstrip line W2; The cathode of the fifth diode D5 is connected to the cathode of the sixth diode D6 and the second end of the first resistor R1 respectively.

7. The circuit according to claim 6, characterized in that The post-stage limiting network comprises: A second capacitor C2, a third capacitor C3, an inductor L2, a seventh diode D7 and a fourth microstrip line W4; A first end of the second capacitor C2 is connected to a second end of the second microstrip line W2; The second end of the second capacitor C2 is respectively connected to the second end of the inductor L2, the anode of the seventh diode D7 and the first end of the fourth microstrip line W4; The first end of the inductor L2 and the cathode of the seventh diode D7 are both grounded; The first end of the third capacitor C3 is connected to the second end of the fourth microstrip line W4, and the second end is the output end of the post-stage limiting network.

8. The circuit according to claim 7, characterized in that The fifth diode D5 , the sixth diode D6 , and the seventh diode D7 are silicon-based PIN diodes.

9. A chip, characterized in that: It comprises a wide power detection semi-active limiting circuit as described in any one of claims 1-7.

10. An electronic device, characterized in that: Comprising a chip as described in any one of claim 9.

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