A PCB board anti-interference current limiting circuit structure

Abstract

The present invention discloses an anti-interference current-limiting circuit structure for a printed circuit board (PCB), comprising: components arranged on a grid board; three pins of a P-type transistor Q8 located on one side of a tube body of the P-type transistor Q8; a first voltage stabilizing module adjacent to the tube body of the P-type transistor Q8 and located on one side of an emitter pin of the P-type transistor Q8; resistors R61, R60, R59, and R71 arranged parallel to each other between the three pins and a first edge; a P-type transistor Q10 arranged adjacent to the resistor R71 and the base pin of the P-type transistor Q8, respectively; and resistors R58, transistor Q9, R55, R56, transistor Q6, transistor Q7, and a second voltage stabilizing module located on the other side of the P-type transistor Q8 and arranged opposite to the first voltage stabilizing module. The present invention adjusts the positions of some components in the current limiting circuit, thereby reducing the circumference of the loop between resistors R59, R60, R61 and the B and E ends of the P-type transistor Q10, thereby ensuring normal output and use of the PCB board circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit boards, and in particular to an anti-interference current-limiting circuit structure of a PCB board. Background Art

[0002] The circuits on the PCB usually involve current limiting circuits, for example, the current is limited to about 130mA. When the load at the output end becomes smaller and the current increases to 130mA, the P-type transistor Q10 in the current limiting circuit is turned on, causing the base voltage of the P-type transistor Q8 to increase, and the voltage difference between the base voltage and the emitter voltage of Q8 to decrease, thereby limiting the output current. In existing current limiting circuits, such as Figure 1 As shown, R59, R60, and R61 form a loop with the B and E terminals of the P-type transistor Q10. This loop creates an antenna effect, sensing the changing electromagnetic field in the air interface and generating a periodically changing weak current in the antenna loop. When this periodically changing current is large enough, the voltages at the B and E terminals reach the P-type transistor Q10's turn-on voltage of 0.7V, turning on the P-type transistor Q10. As a result, the voltage difference between the E and B terminals of the P-type transistor Q8 becomes less than 0.7V, turning off the P-type transistor Q8. This results in no output current from the product, and the antenna effect generated by the loop affects normal product operation. Summary of the Invention

[0003] In order to solve the above problems existing in the prior art, the present invention provides a PCB board anti-interference current limiting circuit structure. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0004] A first aspect of an embodiment of the present invention provides a PCB board anti-interference current limiting circuit structure, comprising:

[0005] A first voltage stabilizing module, a P-type transistor Q8, a resistor R59, a resistor R60, a resistor R61, a resistor R71, a resistor R58, a transistor Q9, a resistor R55, a resistor R56, a P-type transistor Q10, a transistor Q6, a transistor Q7, and a second voltage stabilizing module are provided on the grid plate; wherein the material of the grid plate is copper;

[0006] The three pins of the P-type transistor Q8 are located on one side of the tube body of the P-type transistor Q8, and the three pins are all located between the tube body of the P-type transistor Q8 and the first edge of the PCB board;

[0007] The first voltage stabilizing module is adjacent to the body of the P-type transistor Q8 and is located on one side of the emitter pin of the P-type transistor Q8;

[0008] The resistor R61, the resistor R60, the resistor R59, and the resistor R71 are respectively arranged between the three pins and the first edge. The resistors R61, the resistor R60, the resistor R59, and the resistor R71 are parallel and aligned with each other, and the short sides of the resistors R61, the resistor R60, the resistor R59, and the resistor R71 are oriented toward the three pins.

[0009] The P-type transistor Q10 is respectively arranged adjacent to the pins of the resistor R71 and the base of the P-type transistor Q8;

[0010] The resistor R58 , the transistor Q9 , the resistor R55 , the resistor R56 , the transistor Q6 , the transistor Q7 and the second voltage stabilizing module are located on the other side of the P-type transistor Q8 and are arranged opposite to the first voltage stabilizing module.

[0011] In one embodiment of the present invention, the resistor R59, the resistor R60, and the resistor R61 are sequentially connected in series, and both ends of the resistor R71 are connected to one end of the resistor R59 and one end of the resistor R61;

[0012] The emitter of the P-type transistor Q8 is connected to the circuit between the resistor R61 and the resistor R71, the base of the P-type transistor Q8 is connected to the collector of the P-type transistor Q10, the base of the P-type transistor Q10 is connected to the emitter of the P-type transistor Q8, and the emitter of the P-type transistor Q10 is connected to the circuit between the resistor R59 and the resistor R71;

[0013] The resistor R55 is connected to the resistor 71 and the transistor Q6. The transistor Q6 is also connected to the collector of the P-type transistor Q10 and the second voltage stabilizing module. The second voltage stabilizing module is connected to the resistor R56. The transistor Q9 is connected to both ends of the resistor R58. One end of the resistor R58 is connected to the transistor Q7.

[0014] In one embodiment of the present invention, the collector pin of the P-type transistor Q10 faces the inner side of the PCB board; the collector pin of the transistor Q6 faces the inner side of the PCB board;

[0015] The resistor R55 and the transistor Q6 are located on one side of the P-type transistor Q10 and opposite to the resistor R71 .

[0016] In one embodiment of the present invention, the second voltage stabilizing module includes: a voltage stabilizing diode Z13 and a voltage stabilizing diode Z14;

[0017] The resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 are all located on one side of the transistor Q6 and the P-type transistor Q10 and opposite to the resistor R55; the resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 are sequentially arranged in a direction away from the P-type transistor Q8 and are parallel to each other, with the short sides of the resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 facing the transistor Q6;

[0018] The collector of the transistor Q6 is also connected to the collector of the P-type transistor Q10, and the transistor Q6 is also connected to one end of the voltage regulator Z13, the other end of the voltage regulator Z13 is connected to one end of the voltage regulator Z14, and the other end of the voltage regulator Z14 is connected to the resistor R56.

[0019] In one embodiment of the present invention, the resistor R58 is located between the transistor Q9 and the transistor Q7, and the short side of the resistor R58 faces the P-type transistor Q8;

[0020] The collector pin of the transistor Q9 is directed toward the resistor R56.

[0021] Beneficial effects of the present invention:

[0022] The present invention adjusts the positions of some components in the current limiting circuit so that the distance between resistors R59, R60, and R61 and the P-type transistor Q10 is reduced, thereby reducing the loop circumference of resistors R59, R60, and R61 and the B and E terminal pins of the P-type transistor Q10, reducing the amplitude of the electromagnetic field sensed in the air, weakening the current that forms a periodic change in the antenna loop, thereby preventing the P-type transistor Q8 from being turned off, and ensuring the normal output and use of the PCB board circuit. Furthermore, the current limiting circuit is arranged on a copper mesh plate, which can shield and absorb some external electromagnetic interference, reduce interference with the current limiting circuit and the PCB circuit, and further ensure the normal use of the PCB board.

[0023] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purposes and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings.

[0024] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0026] Figure 1 A schematic diagram of the layout of components on a PCB board provided by the prior art;

[0027] Figure 2 A schematic diagram of the component layout of a PCB board anti-interference current limiting circuit structure provided by an embodiment of the present invention;

[0028] Figure 3 This is a diagram showing output voltage measurements of an oscilloscope with and without interference added in the prior art;

[0029] Figure 4 This is a diagram of the output voltage measured by an oscilloscope with and without interference provided by an embodiment of the present invention.

[0030] Figure 5 A circuit connection schematic diagram of a PCB anti-interference current limiting circuit structure provided by an embodiment of the present invention;

[0031] Figure 6 for Figure 1 Schematic diagram of loop interception;

[0032] Figure 7 A schematic diagram of a loop interception of an anti-interference current limiting circuit structure of a PCB board provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0034] like Figure 1 As shown, an embodiment of the present invention provides a PCB board anti-interference current limiting circuit structure, including: a first voltage stabilizing module, a P-type transistor Q8, a resistor R59, a resistor R60, a resistor R61, a resistor R71, a resistor R58, a transistor Q9, a resistor R55, a resistor R56, a P-type transistor Q10, a transistor Q6, a transistor Q7, and a second voltage stabilizing module, provided on a grid board. The grid board is made of copper.

[0035] The three pins of the P-type transistor Q8 are located on one side of the tube body of the P-type transistor Q8 , and the three pins are all located between the tube body of the P-type transistor Q8 and the first edge of the PCB board.

[0036] The first voltage stabilizing module is adjacent to the body of the P-type transistor Q8 and is located on one side of the emitter pin 3 of the P-type transistor Q8 .

[0037] Resistors R61, R60, R59, and R71 are respectively arranged between the three pins of the P-type transistor Q8 and the first edge. Resistors R61, R60, R59, and R71 are parallel and aligned with each other, with the short sides of resistors R61, R60, R59, and R71 facing the direction of the three pins. Figure 2 As shown in Figure 1, the four resistors are placed horizontally. The edge of the PCB closest to the three pins is the first edge.

[0038] P-type transistor Q10 is positioned adjacent to resistor R71 and pin 1 of the base of P-type transistor Q8. Resistor R58, transistor Q9, resistor R55, resistor R56, transistor Q6, transistor Q7, and the second voltage stabilizing module are positioned on the other side of P-type transistor Q8 and opposite the first voltage stabilizing module.

[0039] It should be noted that the existing technology Figure 1 As shown, resistors R59, R60, and R61 are close to the upper end, and P-type transistor Q10 is close to the lower end. There are six voltage regulator tubes between the three resistors and Q10. Therefore, the distance between the three resistors and Q10 is long, and they need to be connected to form a loop. Therefore, the connection line is long and the loop circumference is long, as shown in FIG. Figure 6 As shown in the figure, the loop circumference measured by the software - Altium Designer is 63.7mm.

[0040] In this embodiment, the principle of the current limiting circuit and the electrical connection relationship between the various components are the same as those in the prior art. Only the relative position relationship between some components in the current limiting circuit is changed, so that the loop circumference of the resistor R59, the resistor R60, the resistor R61 and the B and E terminal pins of the P-type transistor Q10 is greatly reduced. Figure 7 As shown, the loop circumference measured using the Altium Designer software is 40 mm.

[0041] like Figure 2 As shown, in this embodiment, the circuit structure further includes a voltage regulator tube Z16, a voltage regulator tube Z20, a resistor R62, a resistor R63, a resistor R57, a voltage regulator tube Z15 and a resistor R64. The positions of the transistor Q7, the resistor R62, the resistor R63, the resistor R57, the voltage regulator tube Z15 and the resistor R64 on the PCB are the same as those on the PCB. Figure 1 Similarly, transistor Q7, resistor R62, resistor R63, resistor R57, voltage regulator Z15 and resistor R64 are located near resistor R58. Resistors R62, resistor R63, resistor R57, voltage regulator Z15 and resistor R64 are also arranged on the grid plate.

[0042] In this embodiment, the Figure 1In comparison, the positions of the first voltage stabilizing module (including Zener diodes Z17, Z18, Z19, Z21, Z22, and Z23) and the P-type transistor Q8 are swapped, and resistors R59, R60, R61, and R71 are concentrated on one side of the P-type transistor Q8, closer to the position of the P-type transistor Q10. This shortens the connection between resistors R59, R60, and R61 and the B and E pins of the P-type transistor Q10, reducing the circumference of the loop formed. The positions of Zener diodes Z17, Z18, and Z19 are swapped with those of Zener diodes Z21, Z22, and Z23.

[0043] Furthermore, the collector pin of the P-type transistor Q10 faces the inside of the PCB board; the collector pin of the transistor Q6 faces the inside of the PCB board. Resistor R55 and transistor Q6 are located on one side of the P-type transistor Q10 and opposite to resistor R71.

[0044] Here, with Figure 1 By comparison, the position of resistor R55 is swapped with that of P-type transistor Q10 and transistor Q6. Figure 1 The collectors of the two transistors face the first edge of the PCB. In this embodiment, the collectors of the two transistors face the inner side of the PCB.

[0045] Furthermore, the second voltage stabilizing module includes: a voltage stabilizing tube Z13 and a voltage stabilizing tube Z14.

[0046] The resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 are all located on one side of the transistor Q6 and the P-type transistor Q10 and opposite to the resistor R55; the resistor R64, the resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 are arranged in sequence and parallel to each other in a direction away from the P-type transistor Q8, with the short sides of the resistor R64, the resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 facing the transistor Q6.

[0047] Here, with Figure 1 In comparison, the resistor R56, the Zener diode Z13 and the Zener diode Z14 are arranged horizontally, and the pin direction of the transistor Q6 is changed, so the connection with the resistor R55 and the Zener diode Z13 is more convenient and direct, which is convenient for making connections and saving materials.

[0048] Furthermore, the resistor R58 is located between the transistor Q9 and the transistor Q7 , with the short side of the resistor R58 facing the P-type transistor Q8 ; and the collector pin of the transistor Q9 faces the resistor R56 .

[0049] In this embodiment, the resistor R58 is located between the transistor Q9 and the transistor Q7 so that the resistor is directly connected to the two transistors, which reduces the bending of the line connection, facilitates the connection and saves materials.

[0050] The electrical connections between the various components in the embodiment of the present invention remain unchanged. Specifically, resistors R59, R60, and R61 are connected in series, with both ends of resistor R71 connected to one end of resistor R59 and one end of resistor R61. The emitter of P-type transistor Q8 is connected to the circuit between resistors R61 and R71. The base of P-type transistor Q8 is connected to the collector of P-type transistor Q10, which is connected to the emitter of P-type transistor Q8. The emitter of P-type transistor Q10 is connected to the circuit between resistor R59 and R71. Resistor R55 is connected to resistor R71 and transistor Q6. Transistor Q6 is also connected to the collector of P-type transistor Q10 and the second voltage stabilizing module. The second voltage stabilizing module is connected to resistor R56. Transistor Q9 is connected to both ends of resistor R58, and one end of resistor R58 is connected to transistor Q7. The transistor Q6 is further connected to one end of the voltage regulator tube Z13 , the other end of the voltage regulator tube Z13 is connected to one end of the voltage regulator tube Z14 , and the other end of the voltage regulator tube Z14 is connected to the resistor R56 .

[0051] Specifically, if Figure 5As shown, the emitter of transistor Q6 is connected to one end of resistor R55, the base of transistor Q6 is connected to the other end of resistor R55 and the negative electrode of Zener diode Z13, and the collector of transistor Q6 is connected to the collector of P-type transistor Q10. The positive electrode of the Zener diode Z13 is connected to the negative electrode of the Zener diode Z14, the positive electrode of the Zener diode Z14 is connected in series with one end of the resistor R56, the other end of the resistor R56 is connected to the positive electrode of the Zener diode Z15, the negative electrode of the Zener diode Z15 is connected to the emitter of the transistor Q7, the emitter of the transistor Q7 is connected to one end of the resistor R57, the other end of the resistor R57 is connected to the emitter of the P-type transistor Q10, one end of the resistor R59, and one end of the resistor R71, the other end of the resistor R59 is connected in series with the resistor R60 and the resistor R61, the resistor R61 is connected to the other end of the resistor R71, the other end of the resistor R71 is connected to the base of the P-type transistor Q10, the collector of the P-type transistor Q10 is connected to the base of the P-type transistor Q8, the emitter of the P-type transistor Q8 is connected to the other end of the resistor R71, and the P-type transistor The collector of transistor Q8 is connected to one end of resistor R62, the other end of resistor R62 is connected to the base of transistor Q7, the collector of transistor Q7 is connected to the base of transistor Q9 and one end of resistor R58, the collector of transistor Q9 is connected to one end of resistor R64, the other end of resistor R64 is connected to the collector of P-type transistor Q10, the other end of resistor R58 is connected to one end of resistor R63, and the other end of resistor R63 is connected to the base of transistor Q7. Zener diodes Z16, Z17, Z18, and Z19 are connected in series and connected in parallel as a whole between one end of resistor R62 and one end of resistor R63. Zener diodes Z20, Z21, Z22, and Z23 are connected in series and connected in parallel as a whole between one end of resistor R62 and one end of resistor R63.

[0052] The present invention adjusts the positions of some components in the current limiting circuit so that the distance between resistors R59, R60, and R61 and the P-type transistor Q10 is reduced, thereby reducing the loop circumference of resistors R59, R60, and R61 and the B and E terminal pins of the P-type transistor Q10, reducing the amplitude of the electromagnetic field sensed in the air, weakening the current that forms a periodic change in the antenna loop, thereby preventing the P-type transistor Q8 from being turned off, and ensuring the normal output and use of the PCB board circuit. Furthermore, the current limiting circuit is arranged on a copper mesh plate, which can absorb and shield some external electromagnetic interference, reduce interference with the current limiting circuit and the PCB circuit, and further ensure the normal use of the PCB board.

[0053] The following is an explanation of the verification experiment of the beneficial effects of the present invention:

[0054] Use a walkie-talkie frequency of 480MHz to simulate the interference during on-site use, 10CM away from the circuit part, and use an oscilloscope to measure the output voltage.

[0055] Existing technology Figure 1 When no interference signal is added to the PCB board, such as Figure 3 As shown, the oscilloscope outputs 12V when no interference is added. Figure 3 As shown in the figure, when the interference segment is added to the oscilloscope, the voltage output by the product drops from 12V to about 5V, and there are messy interference waves.

[0056] The PCB board of the present invention has an oscilloscope with no interference signal added and with interference signal added. Figure 4 As shown, there is no obvious change in the voltage at the output end, indicating that the interference can be effectively reduced after the circuit is optimized.

[0057] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0058] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0059] In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "connect," "fixed," etc. should be understood broadly. For example, they may refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0060] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Furthermore, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0061] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0062] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to include such changes and modifications.

Claims

1. A PCB board anti-interference current limiting circuit structure, characterized in that: include: A first voltage stabilizing module, a P-type transistor Q8, a resistor R59, a resistor R60, a resistor R61, a resistor R71, a resistor R58, a transistor Q9, a resistor R55, a resistor R56, a P-type transistor Q10, a transistor Q6, a transistor Q7, and a second voltage stabilizing module are provided on the grid plate; wherein the material of the grid plate is copper; The three pins of the P-type transistor Q8 are located on one side of the tube body of the P-type transistor Q8, and the three pins are all located between the tube body of the P-type transistor Q8 and the first edge of the PCB board; The first voltage stabilizing module is adjacent to the body of the P-type transistor Q8 and is located on one side of the emitter pin of the P-type transistor Q8; The resistor R61, the resistor R60, the resistor R59, and the resistor R71 are respectively arranged between the three pins and the first edge. The resistors R61, the resistor R60, the resistor R59, and the resistor R71 are parallel and aligned with each other, and the short sides of the resistors R61, the resistor R60, the resistor R59, and the resistor R71 are oriented toward the three pins. The P-type transistor Q10 is respectively arranged adjacent to the pins of the resistor R71 and the base of the P-type transistor Q8; The resistor R58, the transistor Q9, the resistor R55, the resistor R56, the transistor Q6, the transistor Q7 and the second voltage stabilizing module are located on the other side of the P-type transistor Q8 and are arranged opposite to the first voltage stabilizing module; The resistor R59, the resistor R60, and the resistor R61 are connected in series in sequence, and both ends of the resistor R71 are connected to one end of the resistor R59 and one end of the resistor R61; The emitter of the P-type transistor Q8 is connected to the circuit between the resistor R61 and the resistor R71, the base of the P-type transistor Q8 is connected to the collector of the P-type transistor Q10, the base of the P-type transistor Q10 is connected to the emitter of the P-type transistor Q8, and the emitter of the P-type transistor Q10 is connected to the circuit between the resistor R59 and the resistor R71; The resistor R55 is connected to the resistor R71 and the transistor Q6. The transistor Q6 is also connected to the collector of the P-type transistor Q10 and the second voltage stabilizing module. The second voltage stabilizing module is connected to the resistor R56. The transistor Q9 is connected to both ends of the resistor R58. One end of the resistor R58 is connected to the transistor Q7.

2. A PCB board anti-interference current limiting circuit structure according to claim 1, characterized in that: The collector pin of the P-type transistor Q10 faces the inner side of the PCB board; the collector pin of the transistor Q6 faces the inner side of the PCB board; The resistor R55 and the transistor Q6 are located on one side of the P-type transistor Q10 and opposite to the resistor R71 .

3. A PCB board anti-interference current limiting circuit structure as claimed in claim 1, characterized in that: The second voltage stabilizing module includes: a voltage stabilizing tube Z13 and a voltage stabilizing tube Z14; The resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 are all located on one side of the transistor Q6 and the P-type transistor Q10 and opposite to the resistor R55; the resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 are sequentially arranged in a direction away from the P-type transistor Q8 and are parallel to each other, with the short sides of the resistor R56, the voltage-stabilizing diode Z13, and the voltage-stabilizing diode Z14 facing the transistor Q6; The collector of the transistor Q6 is also connected to the collector of the P-type transistor Q10, and the transistor Q6 is also connected to one end of the voltage regulator Z13, the other end of the voltage regulator Z13 is connected to one end of the voltage regulator Z14, and the other end of the voltage regulator Z14 is connected to the resistor R56.

4. A PCB board anti-interference current limiting circuit structure according to claim 1, characterized in that: The resistor R58 is located between the transistor Q9 and the transistor Q7, and the short side of the resistor R58 faces the P-type transistor Q8; The collector pin of the transistor Q9 faces the resistor R56 .

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