Preparation method of array substrate, display panel, preparation method of display panel and display device

Abstract

The invention provides a preparation method of an array substrate, a display panel, a preparation method of the display panel and a display device, the display panel is provided with a display area and a peripheral area located on the periphery of the display area, the display panel comprises the array substrate and a color film substrate, and the color film substrate comprises a first substrate and a black matrix layer. The array substrate comprises a substrate body, and a gate layer, a gate insulating layer, a source and drain layer, a first insulating layer and an electrode layer which are sequentially arranged on the substrate body in the thickness direction of the substrate body. The display panel further comprises a driving circuit which is arranged on the substrate and located in the peripheral area, the driving circuit comprises a first via hole and a second via hole, and the electrode layer covers the first via hole and the second via hole so that the grid electrode layer and the source and drain electrode layer can be electrically connected through the electrode layer to form the driving circuit. A second insulating layer is arranged on the side, away from the substrate, of the electrode layer, and the orthographic projection of the second insulating layer on the substrate is the same as the orthographic projection of the black matrix layer on the substrate.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and more specifically, relates to a method for preparing an array substrate, a display panel and a method for preparing the same, and a display device. Background Art

[0002] Before a display device leaves the factory, it is usually subjected to reliability tests, such as high temperature and high humidity environment tests. As consumers have higher and higher requirements for the reliability of display devices, harsh high temperature and high humidity conditions such as boiling, double 85, 65 / 95 are constantly being updated. The main component of the frame glue usually used to encapsulate the display panel is resin, and the main component of the alignment film PI is polyimide. Both materials are hydrophobic materials and are easy to absorb water. Water vapor can easily enter the display panel under high temperature and high humidity environments.

[0003] The display panel in the related art includes a color film substrate, a liquid crystal layer and an array substrate, a driving circuit is arranged in a peripheral area on one side of the array substrate of the display panel, and the driving circuit includes a first via hole and a second via hole opened on a first insulating layer, and an electrode layer is covered on the first via hole and the second via hole, so that the gate layer and the source and drain layer are electrically connected through the electrode layer. When water vapor enters the display panel, the two via holes in the driving circuit are easily exposed to water vapor and electrochemical corrosion occurs, resulting in abnormal display of the display panel, and the reliability of the display panel is poor. Summary of the invention

[0004] The embodiments of the present application provide a method for preparing an array substrate, a display panel and a method for preparing the same, and a display device. The second insulating layer is covered on the electrode layer above the via hole of the driving circuit on the side of the array substrate in the related art. In this way, water vapor is blocked and the driving circuit is protected during environmental testing. Moreover, the orthographic projection of the second insulating layer on the base substrate is the same as the orthographic projection of the black matrix layer in the color film substrate on the base substrate. In this way, a black matrix mask can be used when preparing the second insulating layer, and there is no need to increase the cost of the mask. This improves the reliability of the display panel without increasing the cost too much.

[0005] In the first aspect, the present application provides a display panel, which has a display area and a peripheral area located around the display area, the display panel includes an array substrate and a color film substrate, the color film substrate includes a first substrate and a black matrix layer, the array substrate includes a base substrate, and a gate layer, a gate insulating layer, a source and drain layer, a first insulating layer and an electrode layer are sequentially arranged on the base substrate along the thickness direction of the base substrate; the display panel also includes a driving circuit arranged on the base substrate, and the driving circuit is located in the peripheral area; the driving circuit includes a first via hole and a second via hole, the first via hole penetrates the first insulating layer to the source and drain layer, the second via hole penetrates the first insulating layer to the gate layer, the electrode layer covers the first via hole and the second via hole, so that the gate layer and the source and drain layer are electrically connected through the electrode layer to form the driving circuit; a second insulating layer is provided on the side of the electrode layer away from the base substrate, and the orthographic projection of the second insulating layer on the base substrate is the same as the orthographic projection of the black matrix layer on the base substrate.

[0006] In some embodiments, the black matrix layer includes a first black matrix portion located in the display area and a second black matrix portion located in the peripheral area, the first black matrix portion is distributed in a grid pattern and has multiple openings, and the second black matrix portion is ring-shaped; the orthographic projection of the second insulating layer on the base substrate is the same as the orthographic projection of the second black matrix portion on the base substrate.

[0007] In some embodiments, the first black matrix portion includes a plurality of first strips and a plurality of second strips, the plurality of first strips are arranged at intervals along a first direction, the plurality of second strips are arranged at intervals along a second direction, and the second direction is perpendicular to the first direction; two adjacent first strips and two adjacent second strips form the opening, a filter layer is provided on the black matrix layer, the filter layer includes a plurality of color resists, and the plurality of color resists correspond one-to-one to the plurality of openings.

[0008] In some embodiments, a semiconductor active layer is further provided between the gate insulating layer and the source / drain electrode layer; the source / drain electrode layer includes a source electrode and a drain electrode located in the display area and a conductive electrode located in the peripheral area, the source electrode is connected to the semiconductor active layer, and the drain electrode is connected to the semiconductor active layer to form a thin film transistor.

[0009] In some embodiments, the electrode layer includes a first electrode region located in the peripheral area and a second electrode region located in the display area, and the first electrode region covers the first insulating layer, the first via hole, and the second via hole located in the peripheral area.

[0010] In a second aspect, the present application further provides a method for preparing an array substrate, wherein the array substrate is the array substrate in the display panel according to the first aspect, and the method for preparing the array substrate comprises:

[0011] Forming a gate layer and a gate insulating layer in sequence on the base substrate along the thickness direction of the base substrate;

[0012] forming a source-drain electrode layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source-drain electrode layer;

[0013] A first via hole and a second via hole are formed in the first insulating layer, wherein the first via hole penetrates the first insulating layer to the source-drain electrode layer; and the second via hole is located at an end of the source-drain electrode layer and penetrates from the first insulating layer to the gate layer.

[0014] forming an electrode layer on the first insulating layer, the electrode layer covering the first via hole and the second via hole, the gate layer and the source and drain layer being electrically connected through the electrode layer to form a driving circuit;

[0015] Using a first photomask to form the second insulating layer on the electrode layer;

[0016] Wherein, the first photomask is a photomask used for preparing the black matrix layer.

[0017] In some embodiments, after forming the second insulating layer on the electrode layer using the first photomask, the method further includes:

[0018] The portion of the second insulating layer located in the display area of ​​the display panel is etched away, and the portion located in the peripheral area of ​​the display panel is retained.

[0019] In some embodiments, forming a source-drain electrode layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source-drain electrode layer, includes:

[0020] forming a semiconductor active layer and a pixel electrode between the gate insulating layers;

[0021] forming a source-drain electrode layer on the gate insulating layer, wherein the source-drain electrode layer covers the semiconductor active layer, and the source-drain electrode layer covers a portion of the pixel electrode;

[0022] forming a third via hole penetrating the source / drain electrode layer in the source / drain electrode layer to form a source electrode and a drain electrode connected to the semiconductor active layer;

[0023] A first insulating layer is formed on the gate insulating layer, wherein the first insulating layer covers the source and drain electrode layer and the third via hole.

[0024] In a third aspect, the present application further provides a method for manufacturing a display panel, including the method for manufacturing the array substrate described in the second aspect, and forming a black matrix layer on a first substrate using the first mask.

[0025] In a fourth aspect, the present application further provides a display device, comprising a housing and the display panel described in the first aspect, wherein the display panel is disposed on the housing.

[0026] The beneficial effect of the display panel provided by the present application is that: compared with the prior art, the display panel provided by the present application, by covering the second insulating layer on the electrode layer above the first via hole and the second via hole on the first insulating layer on the array substrate side in the related technology, so that when conducting environmental tests, the second insulating layer can block water vapor and protect the driving circuit, thereby improving the reliability of the display panel; moreover, the orthographic projection of the second insulating layer on the base substrate is the same as the orthographic projection of the black matrix layer in the color film substrate on the base substrate, so that when preparing the second insulating layer, a black matrix mask can be used, without the need to increase the cost of the mask, thereby improving the reliability of the display panel without increasing too much cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0028] Figure 1 A schematic diagram of a portion of the structure of a display panel provided in Embodiment 1 of the present application;

[0029] Figure 2 for Figure 1 A schematic structural diagram of an array substrate in FIG.

[0030] Figure 3 A schematic diagram of a top view of the structure of a second insulating layer provided in Example 1 of the present application;

[0031] Figure 4 for Figure 3 An enlarged view of the second insulating layer at the dot-dash line of the display area;

[0032] Figure 5 A flow chart of the preparation of an array substrate provided in Example 2 of the present application;

[0033] Figure 6 for Figure 5 Specific preparation flow chart of step S120 in FIG.

[0034] Figure 7 A flow chart of the preparation of an array substrate provided in Example 3 of the present application;

[0035] Figure 8 A schematic diagram of the structure of an array substrate provided in Embodiment 3 of the present application;

[0036] Fig. 9 A flow chart of the preparation of a color film substrate for a display panel provided in Example 4 of the present application;

[0037] Fig.10 This is a partial structural schematic diagram of the display device provided in Example 5 of the present application.

[0038] Among them, the reference numerals in the figure are:

[0039] 100. display panel; 200. housing;

[0040] 1. Array substrate; 101. Display area; 102. Peripheral area; 2. Color film substrate; 3. Liquid crystal layer; 4. Frame glue; 5. Spacer;

[0041] 11. substrate; 12. gate layer; 13. gate insulating layer; 130. pixel electrode; 14. source-drain electrode layer; 141. source electrode; 142. drain electrode; 143. conductive electrode; 15. first insulating layer; 16. electrode layer; 161. first electrode region; 162. second electrode region; 17. second insulating layer; 18. semiconductor active layer; 19. second alignment film;

[0042] 20, opening; 21, first substrate; 22, black matrix layer; 221, first black matrix portion; 2211, first stripe; 2212, second stripe; 222, second black matrix portion; 23, filter layer; 230, color resist; 24, protective film; 25, first alignment film;

[0043] 31. First via hole; 32. Second via hole. DETAILED DESCRIPTION

[0044] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0045] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0046] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0047] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0048] Before a display device leaves the factory, it is usually subjected to reliability tests, such as high temperature and high humidity environment tests. As consumers have higher and higher requirements for the reliability of display devices, harsh high temperature and high humidity conditions such as boiling, double 85, 65 / 95 are constantly being updated. The main component of the frame glue usually used to encapsulate the display panel is resin, and the main component of the alignment film PI is polyimide. Both materials are hydrophobic materials and are easy to absorb water. Water vapor can easily enter the display panel under high temperature and high humidity environments.

[0049] The display panel in the related art includes a color film substrate, a liquid crystal layer and an array substrate, a driving circuit is arranged in a peripheral area on one side of the array substrate of the display panel, and the driving circuit includes a first via hole and a second via hole opened on a first insulating layer, and an electrode layer is covered on the first via hole and the second via hole, so that the gate layer and the source and drain layer are electrically connected through the electrode layer to form a driving circuit. Since only one electrode layer is covered on the first via hole and the second via hole, when water vapor enters the display panel, the two via holes in the driving circuit are easily exposed to water vapor and electrochemical corrosion occurs, resulting in abnormal display of the display panel, and the reliability of the display panel is poor.

[0050] In order to solve the above-mentioned technical problems, the technical solution of the present application is to cover the electrode layer above the first via hole and the second via hole on the first insulating layer with a second insulating layer. In this way, when conducting environmental tests, the two insulating layers on both sides of the electrode layer can block water vapor and protect the driving circuit, thereby improving the reliability of the display panel. At the same time, the second insulating layer can be formed by using a mask used to prepare a certain layer in the display panel. When preparing the second insulating layer on the electrode layer, the same mask as that for preparing the black matrix layer can be used. In this way, there is no need to increase the cost of the mask, thereby improving the reliability of the display panel without increasing the cost too much.

[0051] Embodiment 1

[0052] like Figure 1 and Figure 2 As shown, the present application provides a display panel 100, the display panel 100 has a display area 101 and a peripheral area 102 located around the display area 101, the display panel 100 includes an array substrate 1 and a color filter substrate 2, the color filter substrate 2 includes a first substrate 21 and a black matrix layer 22, the array substrate 1 includes a base substrate 11, and a gate layer 12, a gate insulating layer 13, a source and drain electrode layer 14, a first insulating layer 15 and an electrode layer 16 are sequentially arranged on the base substrate 11 along the thickness direction of the base substrate 11; the display panel 100 also includes a driving circuit arranged on the base substrate 11, And the driving circuit is located in the peripheral area 102; the driving circuit includes a first via 31 and a second via 32, the first via 31 penetrates the first insulating layer 15 to the source and drain layer 14, the second via 32 penetrates the first insulating layer 15 to the gate layer 12, and the electrode layer 16 covers the first via 31 and the second via 32, so that the gate layer 12 and the source and drain layer 14 are electrically connected through the electrode layer 16 to form a driving circuit; a second insulating layer 17 is provided on the side of the electrode layer 16 away from the base substrate 11, and the orthographic projection of the second insulating layer 17 on the base substrate 11 is the same as the orthographic projection of the black matrix layer 22 on the base substrate 11.

[0053] The first substrate 21 is also provided with a filter layer 23 and a protective film 24. The filter layer 23 includes a plurality of color resists 230, and the plurality of color resists 230 may include red, green and blue. The array substrate 1 and the color filter substrate 2 are also provided with a liquid crystal layer 3, and the liquid crystal layer 3 includes liquid crystal and a spacer 5, and the spacer 5 plays a supporting role. Of course, the plurality of color resists 230 may also include only one or two of red, green and blue to achieve the display of a specific color.

[0054] By covering the second insulating layer 17 on the electrode layer 16 located on the side of the array substrate 1 in the related art and above the first via hole 31 and the second via hole 32 of the driving circuit, the second insulating layer 17 can block water vapor and protect the driving circuit during environmental testing, thereby improving the reliability of the display panel 100; and the orthographic projection of the second insulating layer 17 on the base substrate 11 is the same as the orthographic projection of the black matrix layer 22 in the color film substrate 2 on the base substrate 11, so that the black matrix mask can be used when preparing the second insulating layer 17, and the cost of the mask does not need to be increased, thereby improving the reliability of the display panel 100 without increasing too much cost. At the same time, the display panel 100 can be modified by adding a preparation process of the second insulating layer 17 to the array substrate 1 in the related art, which not only improves the reliability of the display panel 100 in the related art, but also has low modification costs.

[0055] It should be noted that the display panel 100 generally further includes a frame glue 4 , and the frame glue 4 mainly plays the role of protecting and encapsulating the display panel 100 .

[0056] like Figure 2 As shown, in some embodiments, a semiconductor active layer 18 and a pixel electrode 130 are further provided between the gate insulating layer 13 and the source-drain electrode layer 14; the source-drain electrode layer 14 includes a source and a drain located in the display area 101 and a conductive electrode 143 located in the peripheral area 102, the source is connected to the semiconductor active layer 18, and the drain is connected to the semiconductor active layer 18 to form a thin film transistor.

[0057] like Figure 2 As shown, in some embodiments, the electrode layer 16 includes a first electrode region 161 located in the peripheral region 102 and a second electrode region 162 located in the display region 101 , and the first electrode region 161 covers the first insulating layer 15 , the first via hole 31 , and the second via hole 32 located in the peripheral region 102 .

[0058] The above-mentioned electrode layer 16 is usually made of ITO (transparent indium tin oxide). The first electrode area 161 located in the peripheral area 102 mainly serves to electrically connect the gate layer 12 and the source and drain layer 14 through the first via hole 31 and the second via hole 32, and the second electrode area 162 located in the display area 101 is a common electrode. The second electrode area 162 works together with the pixel electrode 130 on the gate insulating layer 13 to deflect the liquid crystal in the liquid crystal layer 3, thereby displaying the picture.

[0059] like Figure 1 and Figure 2 As shown, a first alignment film 25 is disposed on one side of the color filter substrate 2 close to the liquid crystal layer 3 , and the array substrate 1 further comprises a second alignment film 19 . The first alignment film 25 is respectively disposed on both sides of the liquid crystal layer 3 , and mainly plays a role in controlling the arrangement direction of the liquid crystal.

[0060] like Figure 3 As shown, in some embodiments, the black matrix layer 22 includes a first black matrix portion 221 located in the display area 101 and a second black matrix portion 222 located in the peripheral area 102, the first black matrix portion 221 is distributed in a grid pattern, and the first black matrix portion 221 has a plurality of openings 20, and the second black matrix portion 222 is ring-shaped; the orthographic projection of the second insulating layer 17 on the base substrate 11 is the same as the orthographic projection of the second black matrix portion 222 on the base substrate 11.

[0061] Through the above arrangement, when preparing the second insulating layer 17, at least the area located in the peripheral area 102 is covered with the second insulating layer 17, and whether the area located in the display area 101 is covered with the second insulating layer 17 is not limited. When forming the second insulating layer 17, the mask used by the black matrix layer 22 can be directly used to form a pattern exactly the same as the black matrix layer 22 in the display area 101 and the peripheral area 102, that is, a ring located in the peripheral area 102 and a mesh located in the display area 101; or a pattern only the same as the ring located in the peripheral area 102 can be formed, and the part of the second insulating layer 17 located in the display area 101 is not provided or is provided, and then the part located in the display area 101 is etched and removed when necessary. With such a design, users can prepare according to different requirements, so that the display panel 100 can be applied in different scenarios.

[0062] like Figure 3 and Figure 4 As shown, in some embodiments, the first black matrix portion 221 includes a plurality of first strips 2211 and a plurality of second strips 2212, wherein the plurality of first strips 2211 are arranged along a first direction (eg, Figure 3 The plurality of second strips 2212 are arranged in a spaced relationship along the second direction (eg Figure 3 The second direction is perpendicular to the first direction; two adjacent first strips 2211 and two adjacent second strips 2212 form an opening 20, and a filter layer 23 is provided on the black matrix layer 22. The filter layer 23 includes a plurality of color resists 230, and the plurality of color resists 230 correspond to the plurality of openings 20 one by one.

[0063] Through the above arrangement, although a second insulating layer 17 is added on the array substrate 1 side of the display panel 100, since the array substrate 1 and the color film substrate 2 are used in conjunction with each other, and the orthographic projection of the second insulating layer 17 on the base substrate 11 is the same as the orthographic projection of the black matrix layer 22 on the base substrate 11, the area corresponding to the added second insulating layer 17 and the color resist 230 is empty and can allow light to pass through. Therefore, the added second insulating layer 17 does not affect the light output of the display surface, so that the display panel 100 can achieve the purpose of taking into account both high reliability and good display effect.

[0064] Embodiment 2

[0065] like Figure 5 As shown, the present application further provides a method for preparing an array substrate, the array substrate being the array substrate in the display panel of the first embodiment, and the method for preparing the array substrate comprising:

[0066] Step S110: forming a gate layer and a gate insulating layer in sequence on the base substrate along the thickness direction of the base substrate;

[0067] Step S120: forming a source-drain electrode layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source-drain electrode layer;

[0068] Step S130: opening a first via hole and a second via hole in the first insulating layer, wherein the first via hole penetrates the first insulating layer to the source-drain layer; and the second via hole is located at the end of the source-drain layer and penetrates from the first insulating layer to the gate layer.

[0069] Step S140: forming an electrode layer on the first insulating layer, the electrode layer covering the first via hole and the second via hole, and the gate layer and the source and drain layer are electrically connected through the electrode layer to form a driving circuit;

[0070] Step S150: forming a second insulating layer on the electrode layer using a first photomask;

[0071] The first photomask is a photomask used to prepare the black matrix layer.

[0072] By using the first photomask to form the second insulating layer on the electrode layer, the array substrate prepared by the above steps makes the orthographic projection of the second insulating layer on the base substrate the same as the orthographic projection of the black matrix layer in the color film substrate on the base substrate. In this way, not only can the second insulating layer block water vapor and protect the driving circuit during environmental testing, thereby improving the reliability of the display panel; moreover, when preparing the second insulating layer, the black matrix photomask can be used for preparation, and there is no need to increase the cost of the photomask, thereby improving the reliability of the display panel without increasing too much cost. At the same time, the display panel can be modified by adding a second insulating layer preparation process to the array substrate in the related art, which not only improves the reliability of the display panel in the related art, but also has low modification costs.

[0073] like Figure 6 As shown, a source-drain electrode layer and a first insulating layer are formed on the gate insulating layer, and the first insulating layer covers the source-drain electrode layer, including:

[0074] Step S121: forming a semiconductor active layer and a pixel electrode on the gate insulating layer;

[0075] Step S122: forming a source-drain electrode layer on the gate insulating layer, wherein the source-drain electrode layer covers the semiconductor active layer and covers a portion of the pixel electrode;

[0076] Step S123: forming a third via hole penetrating the source and drain electrode layer in the source and drain electrode layer to form a source electrode and a drain electrode connected to the semiconductor active layer;

[0077] Step S124: forming a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source and drain electrode layers and the third via hole.

[0078] It should be noted that after step S123, the source electrode and the drain electrode are respectively connected to the semiconductor active layer to form thin film transistors, and the number of the thin film transistors is the same as the number of the third via holes.

[0079] Execute step S110 before step S121, and continue steps S130 to S150 after step S124 until the following is formed: Figure 2 The array substrate shown.

[0080] Embodiment 3

[0081] The method for preparing the array substrate in the third embodiment is different from the method for preparing the array substrate in the second embodiment in that after forming the second insulating layer on the electrode layer by using the first photomask, it further includes step S160.

[0082] like Figure 7 and Figure 8 As shown, the method for preparing the array substrate in this embodiment includes:

[0083] Step S110: forming a gate layer and a gate insulating layer in sequence on the base substrate along the thickness direction of the base substrate;

[0084] Step S120: forming a source-drain electrode layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source-drain electrode layer;

[0085] Step S130: opening a first via hole and a second via hole in the first insulating layer, wherein the first via hole penetrates the first insulating layer to the source-drain layer; and the second via hole is located at the end of the source-drain layer and penetrates from the first insulating layer to the gate layer.

[0086] Step S140: forming an electrode layer on the first insulating layer, the electrode layer covering the first via hole and the second via hole, and the gate layer and the source and drain layer are electrically connected through the electrode layer to form a driving circuit;

[0087] Step S150: using a first photomask to form a second insulating layer on the electrode layer; wherein the first photomask is a photomask used to prepare a black matrix layer;

[0088] Step S160: etching away the portion of the second insulating layer located in the display area of ​​the display panel, and retaining the portion located in the peripheral area of ​​the display panel.

[0089] The structure of the array substrate formed according to the above steps is as follows Figure 8 shown.

[0090] The array substrate prepared by the above steps is not only conducive to improving the reliability of the display panel, but also further reduces the impact on the display of the display panel. At the same time, by etching away the portion of the second insulating layer located in the display area of ​​the display panel and retaining the portion located in the peripheral area of ​​the display panel, the thickness of the display panel in the display area is reduced, which is conducive to controlling the overall thickness of the display panel, thereby enabling the display panel to achieve the purpose of taking into account high reliability, high display and lightness.

[0091] Embodiment 4

[0092] The present application also provides a method for preparing a display panel, including a method for preparing an array substrate, and step S210: forming a black matrix layer on a first substrate by using a first mask.

[0093] The method for preparing the array substrate in the display panel in the fourth embodiment is similar to the method for preparing the array substrate in the second embodiment or the third embodiment. Figure 5 to Figure 7 shown.

[0094] like Fig. 9 As shown, the preparation process of the color filter substrate of the display panel in this embodiment includes:

[0095] Step S210: After forming a black matrix layer on the first substrate using a first photomask, the process further includes:

[0096] Step S220: forming a filter layer, a protection film and an alignment film on the first substrate.

[0097] In this way, a color film substrate is manufactured to match the array substrate. Figure 1 As shown;

[0098] Finally, the color filter substrate, the liquid crystal layer and the array substrate are assembled together to form a display panel. Figure 1 shown.

[0099] The preparation process of the color filter substrate in the display panel of this embodiment and the assembly process of the color filter substrate, liquid crystal layer and array substrate of the display panel can be made by conventional preparation methods, which will not be described in detail here. At the same time, the display panel of this embodiment of the application has the same effect as that of the second embodiment, which will not be described in detail here.

[0100] Embodiment 5

[0101] like Figure 1 and 10 As shown, the present application further provides a display device, including a housing 200 and the display panel 100 of the first embodiment, wherein the display panel 100 is disposed on the housing 200 .

[0102] The display panel 100 includes an array substrate 1, a color filter substrate 2 and a liquid crystal layer 3. The display panel 100 has a display area 101 and a peripheral area 102 located around the display area 101. The color filter substrate 2 includes a first substrate 21, a black matrix layer 22, a filter layer 23 and a protective film 24. The filter layer 23 includes a plurality of color resists 230, and the plurality of color resists 230 may include red, green and blue; the array substrate 1 includes a base substrate 11, and a gate layer 12, a gate insulating layer 13, a semiconductor active layer 18, a pixel electrode 130, a source and drain layer 14, a first insulating layer 15 and an electrode layer 16 are sequentially arranged on the base substrate 11 along the thickness direction of the base substrate 11; the display panel 100 also includes a driving circuit arranged on the base substrate 11, and the driving circuit is located in the peripheral area 102 of the display panel 100; the driving circuit includes The first via hole 31 and the second via hole 32 are included, the first via hole 31 penetrates the first insulating layer 15 to the source-drain electrode layer 14, the second via hole 32 penetrates the first insulating layer 15 to the gate layer 12, and the electrode layer 16 covers the first via hole 31 and the second via hole 32, so that the gate layer 12 and the source-drain electrode layer 14 are electrically connected through the electrode layer 16 to form a driving circuit; a second insulating layer 17 is provided on the side of the electrode layer 16 away from the base substrate 11, and the orthographic projection of the second insulating layer 17 on the base substrate 11 is the same as the orthographic projection of the black matrix layer 22 on the base substrate 11.

[0103] By covering the second insulating layer 17 on the electrode layer 16 located on the side of the array substrate 1 in the related art and above the first via hole 31 and the second via hole 32 of the driving circuit, the second insulating layer 17 can block water vapor and protect the driving circuit during environmental testing, thereby improving the reliability of the display panel 100; and the orthographic projection of the second insulating layer 17 on the base substrate 11 is the same as the orthographic projection of the black matrix layer 22 in the color film substrate 2 on the base substrate 11, so that the black matrix mask can be used when preparing the second insulating layer 17, and the cost of the mask does not need to be increased, thereby improving the reliability of the display panel 100 without increasing too much cost. At the same time, the display panel 100 can be modified by adding a preparation process of the second insulating layer 17 to the array substrate 1 in the related art, which not only improves the reliability of the display panel 100 in the related art, but also has low modification costs.

[0104] The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A display panel, the display panel comprising a display area (101) and a peripheral area (102) located around the display area (101), the display panel comprising an array substrate (1) and a color filter substrate (2), the color filter substrate (2) comprising a first substrate (21) and a black matrix layer (22), the array substrate (1) comprising a base substrate (11), and a gate layer (12), a gate insulating layer (13), a source-drain electrode layer (14), a first insulating layer (15) and an electrode layer (16) sequentially arranged on the base substrate (11) along a thickness direction of the base substrate (11); characterized in that: The display panel further comprises a driving circuit arranged on the base substrate (11), and the driving circuit is located in the peripheral area (102); The driving circuit comprises a first via hole and a second via hole, the first via hole penetrates the first insulating layer (15) to the source-drain electrode layer (14), the second via hole penetrates the first insulating layer (15) to the gate layer (12), and the electrode layer (16) covers the first via hole and the second via hole, so that the gate layer (12) and the source-drain electrode layer (14) are electrically connected through the electrode layer (16), thereby forming the driving circuit; A second insulating layer (17) is provided on a side of the electrode layer (16) away from the base substrate (11), and an orthographic projection of the second insulating layer (17) on the base substrate (11) is the same as an orthographic projection of the black matrix layer (22) on the base substrate (11).

2. The display panel according to claim 1, characterized in that: The black matrix layer (22) comprises a first black matrix portion (221) located in the display area (101) and a second black matrix portion (222) located in the peripheral area (102), the first black matrix portion (221) is distributed in a mesh shape and has a plurality of openings (20), and the second black matrix portion (222) is ring-shaped; The orthographic projection of the second insulating layer (17) on the base substrate (11) is the same as the orthographic projection of the second black matrix portion (222) on the base substrate (11).

3. The display panel according to claim 2, characterized in that: The first black matrix portion (221) comprises a plurality of first strips (2211) and a plurality of second strips (2212), wherein the plurality of first strips (2211) are arranged at intervals along a first direction, and the plurality of second strips (2212) are arranged at intervals along a second direction, and the second direction is perpendicular to the first direction; Two adjacent first strips (2211) and two adjacent second strips (2212) form the opening (20); a filter layer (23) is provided on the black matrix layer (22); the filter layer (23) comprises a plurality of color resists (230); and the plurality of color resists (230) correspond one-to-one to the plurality of openings (20).

4. The display panel according to claim 1, characterized in that: A semiconductor active layer (18) is also provided between the gate insulating layer (13) and the source-drain electrode layer (14); The source-drain electrode layer (14) comprises a source electrode (141) and a drain electrode (142) located in the display area (101) and a conductive electrode (143) located in the peripheral area (102); the source electrode (141) is connected to the semiconductor active layer (18), and the drain electrode (142) is connected to the semiconductor active layer (18), so as to form a thin film transistor.

5. The display panel according to claim 1, characterized in that: The electrode layer (16) comprises a first electrode region (161) located in the peripheral region (102) and a second electrode region (162) located in the display region (101), wherein the first electrode region (161) covers the first insulating layer (15), the first via hole (31) and the second via hole (32) located in the peripheral region (102).

6. A method for preparing an array substrate, wherein the array substrate is an array substrate in a display panel according to any one of claims 1 to 5, characterized in that: include: Forming a gate layer and a gate insulating layer in sequence on the base substrate along the thickness direction of the base substrate; forming a source-drain electrode layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source-drain electrode layer; A first via hole and a second via hole are formed in the first insulating layer, wherein the first via hole penetrates the first insulating layer to the source and drain electrode layer; The second via hole is located at the end of the source-drain electrode layer and penetrates from the first insulating layer to the gate layer; forming an electrode layer on the first insulating layer, the electrode layer covering the first via hole and the second via hole, the gate layer and the source and drain layer being electrically connected through the electrode layer to form a driving circuit; Using a first photomask to form the second insulating layer on the electrode layer; Wherein, the first photomask is a photomask used for preparing the black matrix layer.

7. The method for preparing an array substrate according to claim 6, characterized in that: After forming the second insulating layer on the electrode layer using the first photomask, the method further includes: The portion of the second insulating layer located in the display area of ​​the display panel is etched away, and the portion located in the peripheral area of ​​the display panel is retained.

8. The method for preparing an array substrate according to claim 6 or 7, characterized in that: The step of forming a source-drain electrode layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source-drain electrode layer, comprises: forming a semiconductor active layer and a pixel electrode between the gate insulating layers; forming a source-drain electrode layer on the gate insulating layer, wherein the source-drain electrode layer covers the semiconductor active layer, and the source-drain electrode layer covers a portion of the pixel electrode; forming a third via hole penetrating the source / drain electrode layer in the source / drain electrode layer to form a source electrode and a drain electrode connected to the semiconductor active layer; A first insulating layer is formed on the gate insulating layer, wherein the first insulating layer covers the source and drain electrode layer and the third via hole.

9. A method for preparing a display panel, characterized in that: include: The method for preparing an array substrate according to any one of claims 6 to 8; A black matrix layer is formed on the first substrate using the first photomask.

10. A display device, characterized in that: include: case, The display panel according to any one of claims 1 to 5, wherein the display panel is arranged on the housing.

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