Anti-hydrolysis LED epitaxial structure and preparation method thereof
By designing growth windows and generating V-pits in SiO2 masks, the problem of hydrolysis of LED chips and epitaxial layers is solved, and efficient hydrolysis resistance and low-cost preparation process are achieved.
Patent Information
- Application Number
- CN202510014749.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-06
- Publication Date
- 2025-04-25
AI Technical Summary
LED chips and epitaxial layers are susceptible to water vapor erosion in outdoor applications, resulting in hydrolysis failure. The existing solutions increase production costs and manufacturing process complexity.
By designing a growth window in the SiO2 mask, using GaN material to different growth behaviors at the edges and central areas of the growth window, a high-density V-pit is generated and the V-pit extends upwards into the second n-GaN layer, reducing the probability that the GaN (0001) polar surface comes into contact with water.
It effectively alleviates the hydrolysis phenomenon of LED chips, improves the hydrolysis resistance of GaN-based LEDs, and simplifies the preparation method and reduces production costs.
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Figure CN119894178A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of semiconductor devices, and in particular to a hydrolysis-resistant LED epitaxial structure and a preparation method thereof. Background Art
[0002] In the field of light-emitting diode (LED) technology, the hydrolysis problem of LED chips and epitaxial layers is a long-standing technical challenge. Hydrolysis refers to the process in which water molecules react chemically with materials, resulting in a decrease in material performance. In LEDs, hydrolysis usually occurs in epitaxial layers and electrodes, especially in LED devices used outdoors. Due to environmental factors, water vapor can easily penetrate into the LED chip through the gap between the die-bonding adhesive and the encapsulation adhesive, causing the LED chip to hydrolyze and fail, ultimately leading to a dead light phenomenon.
[0003] At present, there are three main methods to solve the hydrolysis problem of LED chips and epitaxial layers. The first is to use anti-hydrolysis materials as a protective layer to prevent water vapor from corroding the epitaxial layer. Commonly used anti-hydrolysis materials include silicon dioxide (SiO2), silicon nitride (SiNx) and other materials; the second is to design an anti-hydrolysis structure and introduce a barrier structure into the LED chip structure to block water vapor erosion; the third is to improve the packaging process, improve the air tightness of the packaging structure, and reduce water vapor infiltration. However, these methods will not only increase the production cost of LEDs, but also increase the complexity of the manufacturing process. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a method for preparing a hydrolysis-resistant LED epitaxial structure, which can significantly improve the hydrolysis resistance of the LED epitaxial structure, and the preparation method is simple and has low production cost.
[0005] In order to solve the above technical problems, the present invention provides a method for preparing a hydrolysis-resistant LED epitaxial structure, comprising the following steps:
[0006] (1) Growing an AlN layer and a GaN bottom layer sequentially on a substrate;
[0007] (2) depositing a SiO2 mask on the surface of the GaN bottom layer;
[0008] (3) performing photolithography on the SiO2 mask to form a plurality of growth windows spaced apart from each other in the SiO2 mask, wherein one end of the growth window extends to the GaN bottom layer;
[0009] (4) growing a V-shaped pit layer on the SiO2 mask after photolithography, wherein the material of the V-shaped pit layer includes GaN material, and utilizing the different growth behaviors of the GaN material at the edge and the center of the growth window during the growth process to generate V-shaped pits in the V-shaped pit layer;
[0010] (5) growing a first n-GaN layer on the V-shaped pit layer, so that the V-shaped pit extends to the first n-GaN layer;
[0011] (6) growing a second n-GaN layer on the first n-GaN layer, wherein the growth temperature of the second n-GaN layer is greater than the growth temperature of the first n-GaN layer, repairing the V-shaped pits, and obtaining a second n-GaN layer with a smooth surface;
[0012] (7) A multi-quantum well layer, an electron blocking layer and a p-GaN layer are sequentially grown on the second n-GaN layer to obtain a hydrolysis-resistant LED epitaxial structure.
[0013] As an improvement of the above technical solution, in step (3), a plurality of the growth windows are arranged at equal intervals;
[0014] The width of the growth window is W, the distance between two adjacent growth windows is K, and W and K satisfy the following formula: W / (W+K)>0.5.
[0015] As an improvement of the above technical solution, in step (3), the width of the growth window is 5 μm to 10 μm.
[0016] As an improvement of the above technical solution, in step (4), the V-shaped pit layer is a GaN layer, or the V-shaped pit layer includes a GaN layer and an InGaN layer stacked in sequence;
[0017] The growth temperature of the V-shaped pit layer is 750° C. to 850° C., and the growth thickness is 100 nm to 300 nm.
[0018] As an improvement of the above technical solution, in step (5), the growth temperature of the first n-GaN layer is 800° C. to 950° C., and the growth thickness is 300 nm to 1000 nm.
[0019] As an improvement of the above technical solution, in step (6), the growth temperature of the second n-GaN layer is 900° C. to 1050° C., and the growth thickness is 300 nm to 1000 nm.
[0020] Correspondingly, the present invention also provides a hydrolysis-resistant LED epitaxial structure, which is prepared by the above-mentioned method for preparing the hydrolysis-resistant LED epitaxial structure, and comprises a substrate, and an AlN layer, a GaN bottom layer, a SiO2 mask, a V-shaped pit layer, a first n-GaN layer, a second n-GaN layer, a multi-quantum well layer, an electron blocking layer and a p-GaN layer sequentially stacked on the substrate;
[0021] The SiO2 mask is provided with a plurality of growth windows arranged at intervals, and one end of the growth window extends to the GaN bottom layer;
[0022] A V-shaped pit is provided in the combined layer consisting of the V-shaped pit layer, the first n-GaN layer and the second n-GaN layer. The V-shaped pit extends from the bottom of the V-shaped pit layer to the lower part of the second n-GaN layer.
[0023] As an improvement of the above technical solution, the multiple growth windows are arranged at equal intervals, the width of the growth window is W, the distance between two adjacent growth windows is K, and W and K satisfy the following formula: W / (W+K)>0.5.
[0024] As an improvement of the above technical solution, the thickness of the SiO2 mask is 80nm-200nm; the width of the growth window is 5μm-10μm.
[0025] As an improvement of the above technical solution, the thickness of the AlN layer is 10nm to 30nm, and the thickness of the GaN bottom layer is 500nm to 1500nm;
[0026] The first n-GaN layer is doped with Si, and the Si doping concentration is 1×10 19 atoms / cm3~3×10 19 atoms / cm3;
[0027] The second n-GaN layer is doped with Si, and the Si doping concentration is 1×10 19 atoms / cm3~3×10 19 atoms / cm3.
[0028] The implementation of the present invention has the following beneficial effects:
[0029] 1. By designing a SiO2 mask with a growth window, the growth behavior of GaN material at the edge and center of the growth window in the SiO2 mask is different. At the same time, with the help of dislocations extending in the growth window area, a high-density V-shaped pit is generated, and the V-shaped pit is extended upward to the second n-GaN layer. Since the generated V-shaped pit has six sides, each side is The surface of the exposed n-GaN material near the cutting path is partially exposed to the GaN (0001) polar surface. The surface replacement can make the exposed n-GaN near the cutting path contact with H2O with less c-polar surface, thereby reducing the probability of (0001) polar surface contacting with water. The surface is not easy to combine with H2O to produce a hydrolysis effect, so it can effectively alleviate the occurrence of hydrolysis, thereby improving the ability of GaN-based LEDs to resist hydrolysis.
[0030] 2. The preparation method of this embodiment is simple and can obtain an LED epitaxial structure with excellent anti-hydrolysis performance. In the later stage, there is no need to use anti-hydrolysis materials as a protective layer, no need to design a complex anti-hydrolysis structure, and no need to use a complex packaging process, which can reduce the production cost of LED chips and the difficulty of the manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 is a schematic structural diagram of a hydrolysis-resistant LED epitaxial structure obtained in Example 1 of the present invention;
[0032] Figure 2 is a trend diagram of reverse leakage current of Examples 1 to 3 and Comparative Examples 1 to 2 as a function of aging time;
[0033] Among them, substrate 1, AlN layer 2, GaN bottom layer 3, SiO2 mask 4, V-shaped pit layer 5, first n-GaN layer 6, second n-GaN layer 7, multi-quantum well layer 8, electron blocking layer 9, p-GaN layer 10, growth window 11, and V-shaped pit 12. DETAILED DESCRIPTION
[0034] To make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. The present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present invention more thorough and comprehensive.
[0035] If no specific techniques or conditions are specified in the examples, the techniques or conditions described in the literature in the field or the product instructions are used. Raw materials used without specifying the manufacturer are all conventional products that can be obtained through commercial purchase.
[0036] like Figure 1 As shown, this embodiment discloses a method for preparing a hydrolysis-resistant LED epitaxial structure, comprising the following steps:
[0037] (1) An AlN layer 2 and a GaN bottom layer 3 are sequentially grown on a substrate 1; specifically, an AlN layer is first grown on the substrate by PVD, and then the substrate with the AlN layer is placed in MOCVD for epitaxial growth, and a GaN bottom layer without any doping is first grown;
[0038] (2) using PECVD to deposit a SiO2 mask 4 on the surface of the GaN bottom layer;
[0039] (3) performing photolithography on the SiO2 mask to form a plurality of growth windows 11 spaced apart from each other in the SiO2 mask, wherein one end of the growth window extends to the GaN bottom layer;
[0040] (4) growing a V-shaped pit layer 5 on the SiO2 mask after photolithography, wherein the material of the V-shaped pit layer includes GaN material, and utilizing the different growth behaviors of the GaN material at the edge and the center of the growth window during the growth process to generate V-shaped pits 12 in the V-shaped pit layer;
[0041] (5) growing a first n-GaN layer 6 on the V-shaped pit layer, so that the V-shaped pit extends to the first n-GaN layer;
[0042] (6) growing a second n-GaN layer 7 on the first n-GaN layer, wherein the growth temperature of the second n-GaN layer is greater than the growth temperature of the first n-GaN layer, repairing the V-shaped pits, and obtaining a second n-GaN layer with a smooth surface;
[0043] (7) A multi-quantum well layer 8, an electron blocking layer 9 and a p-GaN layer 10 are sequentially grown on the second n-GaN layer to obtain a hydrolysis-resistant LED epitaxial structure.
[0044] It is worth noting that the hydrolysis of LED epitaxial layer is mainly caused by water vapor entering the chip, which can directly contact the GaN material that is not protected by the passivation layer, especially the n-GaN layer near the cutting path. The GaN material reacts with H2O to generate Ga2O3, which will cause the expansion and cracking of the epitaxial layer, directly affecting the performance of the LED. The electron concentration in n-GaN is high, and it is easy to produce electron transfer with H2O and interact with the surface. At the same time, the contact angle of H2O on the polar surface of GaN (0001) can reach a minimum of 21.8°, which is more hydrophilic and easier to adsorb than other crystal surfaces of GaN. Moreover, the adsorption type of the polar surface of GaN (0001) is mainly the dissociative adsorption of H2O, which belongs to chemical adsorption. Therefore, the polar surface of GaN (0001) is more likely to combine with H2O and produce a hydrolysis effect, causing the LED chip to fail by hydrolysis, and eventually leading to the phenomenon of dead light. In this embodiment, a growth window is designed in the SiO2 mask, and the growth behavior of GaN at the edge and center of the growth window in the SiO2 mask is different. At the same time, with the help of dislocations extending in the growth window area, a V-shaped pit can be generated and extended upward to the second n-GaN layer. The V-shaped pit generated in wurtzite GaN is an inverted pyramid with six side walls, each of which is noodle, The surface is not easy to combine with H2O and produce a hydrolysis effect. The crystal surface of the side wall of the V-shaped pit is different from the (0001) polar surface of traditional GaN, which can reduce the probability of the (0001) polar surface of traditional GaN contacting with water, and achieve the exposed n-GaN near the cutting path to contact with H2O with less c polar surface, which can effectively alleviate the occurrence of GaN hydrolysis effect, thereby improving the ability of GaN-based LEDs to resist hydrolysis.
[0045] To further explain, in step (4), since it is difficult for GaN material to nucleate and grow on SiO2, the lateral and longitudinal growth rates at the edge of the growth window (i.e., the junction of SiO2 and GaN) are different from those in the central area of the growth window, and the stress release capabilities generated by lattice adaptation during the growth process are different. In addition, the GaN crystal plane at the edge of the growth window (i.e., the junction of SiO2 and GaN) will be slightly tilted, which makes the growth behavior of the edge and central areas of the growth window different. At the same time, with the help of dislocations extending from the GaN material in the growth window area, irregularly arranged and high-density V-pits are generated in the V-pit layer.
[0046] Specifically, the multi-quantum well layer, the electron blocking layer and the p-GaN layer in this embodiment can be grown by using existing processes and raw materials, and will not be further elaborated in this embodiment.
[0047] In one embodiment, in step (3), a plurality of the growth windows are arranged at equal intervals;
[0048] The width of the growth window is W, the distance between two adjacent growth windows is K, and W and K satisfy the following formula: W / (W+K)>0.5.
[0049] By controlling the relationship between the width W of the growth window in the SiO2 mask and the spacing K between two adjacent growth windows, the width of the growth window is made larger and the spacing is made smaller. By utilizing the different growth behaviors of GaN in the edge and center regions of the growth window, more V-shaped pits can be formed. At the same time, since the formation of the V-shaped pits is also related to defects such as dislocations extending in the growth window region, by controlling the width of the growth window within a larger range, the GaN material is more likely to grow together on the SiO2 mask, which is more conducive to the formation of V-shaped pits, thereby generating high-density V-shaped pits, that is, a large number of V-shaped pits in a unit GaN plane, so that the exposed n-GaN material (without passivation layer protection) near the cutting path is The more GaN (0001) faces, the fewer GaN (0001) polar faces, further reducing the probability of the GaN (0001) polar face in contact with water, further alleviating the occurrence of hydrolysis, and thus further improving the LED's anti-hydrolysis performance. If the width of the growth window is small and the spacing is large, it will make it difficult for GaN to merge, and it will take longer to form two-dimensional growth. It will also inhibit dislocations and be unfavorable for the formation of V-pits, which will lead to a lack of significant improvement in anti-hydrolysis performance.
[0050] In one embodiment, in step (3), the width of the growth window is 5 μm to 10 μm. By further limiting the width range of the growth window, a higher density of the growth window can be obtained in the SiO2 mask, which is more conducive to the generation of high-density V-shaped pits, thereby introducing high-density (large number) V-shaped pits into the n-GaN material exposed after later cutting, thereby further improving the hydrolysis resistance of the LED epitaxial structure.
[0051] Specifically, the width of the growth window is illustratively 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, and 10 μm, but is not limited thereto.
[0052] In one embodiment, in step (4), the V-shaped pit layer of this embodiment is a GaN or GaN / InGaN layer, that is, the V-shaped pit layer is a GaN layer, or the V-shaped pit layer includes a GaN layer and an InGaN layer stacked in sequence;
[0053] The growth temperature of the V-shaped pit layer is 750° C. to 850° C., and the growth thickness is 100 nm to 300 nm. Under the condition of 750° C. to 850° C., it is favorable to generate V-shaped pits.
[0054] Specifically, the growth temperature of the V-shaped pit layer is exemplarily 750° C., 760° C., 770° C., 780° C., 790° C., 800° C., 810° C., 820° C., 830° C., 840° C., 850° C., but not limited thereto. The growth thickness of the V-shaped pit layer is exemplarily 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 220 nm, 250 nm, 280 nm, 300 nm, but not limited thereto.
[0055] In one embodiment, in step (5), the growth temperature of the first n-GaN layer is 800°C to 950°C, and the growth thickness is 300nm to 1000nm. The first n-GaN layer is grown on the V-pit layer, and by controlling the growth temperature to 800°C to 950°C, at this lower growth temperature, the V-pit can continue to extend upward to the n-GaN layer, thereby retaining a high density of V-pits in the first n-GaN layer. Since the V-pit extends upward to the n-GaN layer, the area of the six side walls of the V-pit can be effectively increased, further reducing the (0001) polarity plane in the n-GaN material exposed after cutting, thereby further improving the hydrolysis resistance of the LED epitaxial structure. In addition, since the growth thickness of the first n-GaN layer is relatively thick, at 300nm to 1000nm, the area of the side walls of the V-pit can be further increased, thereby further improving the hydrolysis resistance of the LED epitaxial structure.
[0056] Specifically, the growth temperature of the first n-GaN layer is exemplarily 800° C., 810° C., 820° C., 830° C., 840° C., 850° C., 860° C., 870° C., 880° C., 890° C., 900° C., 910° C., 920° C., 930° C., 940° C., 950° C., but is not limited thereto. The growth thickness of the first n-GaN layer is exemplarily 300 nm, 350, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, 1000 nm, but is not limited thereto.
[0057] In one embodiment, in step (6), the growth temperature of the second n-GaN layer is 900°C to 1050°C, and the growth thickness is 300nm to 1000nm. By controlling the growth temperature of the second n-GaN layer to be greater than the growth temperature of the first n-GaN layer, and controlling the growth temperature of the second n-GaN layer to be 900°C to 1050°C, and using high-temperature GaN to repair the V-shaped pits, a second n-GaN layer with a smooth surface can be obtained to facilitate the subsequent growth of the multi-quantum well layer. Specifically, high temperature conditions can promote atomic migration during the growth of GaN, which is beneficial to two-dimensional growth, making GaN easier to merge and grow, and is not conducive to the formation of V-shaped pits. Therefore, high-temperature growth of a certain thickness will gradually repair the V-shaped pits and obtain a second n-GaN layer with a smooth surface, which is beneficial to the subsequent growth of LED epitaxial structures and can improve the crystal quality.
[0058] Specifically, the growth temperature of the second n-GaN layer is exemplarily 900°C, 910°C, 920°C, 930°C, 940°C, 950°C, 960°C, 970°C, 980°C, 990°C, 1000°C, 1010°C, 1020°C, 1030°C, 1040°C, 1050°C, but is not limited thereto. The growth thickness of the second n-GaN layer is exemplarily 300nm, 350, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 750nm, 800nm, 850nm, 900nm, 950nm, 1000nm, but is not limited thereto.
[0059] Correspondingly, the present embodiment also discloses a hydrolysis-resistant LED epitaxial structure, which is prepared by the above-mentioned method for preparing the hydrolysis-resistant LED epitaxial structure, comprising a substrate 1, and an AlN layer 2, a GaN bottom layer 3, a SiO2 mask 4, a V-shaped pit layer 5, a first n-GaN layer 6, a second n-GaN layer 7, a multi-quantum well layer 8, an electron blocking layer 9 and a p-GaN layer 10 stacked in sequence on the substrate;
[0060] The SiO2 mask is provided with a plurality of growth windows 11 arranged at intervals, and one end of the growth window extends to the GaN bottom layer;
[0061] A V-shaped pit 12 is provided in the combined layer consisting of the V-shaped pit layer, the first n-GaN layer and the second n-GaN layer. The V-shaped pit extends from the bottom of the V-shaped pit layer to the lower part of the second n-GaN layer.
[0062] In one embodiment, the plurality of growth windows are arranged at equal intervals, the width of the growth window is W, the distance between two adjacent growth windows is K, and W and K satisfy the following formula: W / (W+K)>0.5.
[0063] In one embodiment, the thickness of the SiO2 mask is 80nm to 200nm, and illustratively is 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, and 200nm, but is not limited thereto.
[0064] In one embodiment, the thickness of the AlN layer is 10 nm to 30 nm, and illustratively is 10 nm, 12 nm, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm, 28 nm, and 30 nm, but is not limited thereto.
[0065] In one embodiment, the thickness of the GaN bottom layer is 500 nm to 1500 nm, exemplarily 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, 1100 nm, 1200 nm, 1300 nm, 1400 nm, 1500 nm, but not limited thereto.
[0066] In one embodiment, the first n-GaN layer is doped with Si, and the Si doping concentration is 1×10 19 atoms / cm3~3×10 19 atoms / cm3, exemplarily 1×10 19 atoms / cm3、1.5×10 19 atoms / cm3、2×10 19 atoms / cm3、2.5×10 19 atoms / cm3、3×10 19 atoms / cm3, but not limited to this;
[0067] In one embodiment, the second n-GaN layer is doped with Si, and the Si doping concentration is 1×10 19 atoms / cm3~3×1019 atoms / cm3, exemplarily 1×10 19 atoms / cm3、1.5×10 19 atoms / cm3、2×10 19 atoms / cm3、2.5×10 19 atoms / cm3、3×10 19 atoms / cm3, but not limited thereto.
[0068] The technical solution of the present invention is further described below through specific embodiments and comparative examples.
[0069] Example 1
[0070] This embodiment provides a method for preparing a hydrolysis-resistant LED epitaxial structure, comprising the following steps:
[0071] (1) First, an AlN layer is grown on the substrate by PVD, and the thickness of the AlN layer is 20 nm. Then, the substrate with the AlN layer is placed in MOCVD for epitaxial growth. First, a GaN bottom layer without any doping is grown, and the thickness of the GaN bottom layer is 700 nm.
[0072] (2) using PECVD to deposit a SiO2 mask on the surface of the GaN bottom layer, wherein the thickness of the SiO2 mask is 120 nm;
[0073] (3) performing photolithography on the SiO2 mask to form a plurality of equally spaced growth windows in the SiO2 mask, with one end of the growth window extending to the GaN bottom layer; wherein the width W of the growth window is 6 μm, and the spacing K between two adjacent growth windows is 5 μm. In this embodiment, W / (W+K)≈0.545;
[0074] (4) growing a V-shaped pit layer on the SiO2 mask after photolithography, the V-shaped pit layer being a GaN layer, with a growth temperature of 780°C and a growth thickness of 200 nm. During the growth process of the GaN material, the growth behaviors at the edge and center of the growth window are different. Meanwhile, with the help of dislocations extending in the growth window area, V-shaped pits are generated in the V-shaped pit layer.
[0075] (5) The first n-GaN layer is grown on the V-pit layer. The growth temperature of the first n-GaN layer is 830°C, the growth thickness is 350 nm, and the Si doping concentration is 1×10 19 atoms / cm3, so that the V-shaped pit continues to the first n-GaN layer;
[0076] (6) A second n-GaN layer is grown on the first n-GaN layer. The growth temperature of the second n-GaN layer is 960°C, the growth thickness is 650 nm, and the Si doping concentration is 2×1019 atoms / cm3, using high-temperature GaN to repair the V-shaped pits and obtain a second n-GaN layer with a smooth surface;
[0077] (7) A multi-quantum well layer, an electron blocking layer and a p-GaN layer are sequentially grown on the second n-GaN layer to obtain a hydrolysis-resistant LED epitaxial structure.
[0078] Example 2
[0079] This embodiment provides a method for preparing a hydrolysis-resistant LED epitaxial structure, which is basically the same as Example 1, except that: the width W of the growth window in the SiO2 mask of Example 2 is 9μm, and the distance K between two adjacent growth windows is 5.5μm. In this embodiment, W / (W+K)≈0.62.
[0080] Example 3
[0081] This embodiment provides a method for preparing a hydrolysis-resistant LED epitaxial structure, which is basically the same as that of embodiment 2, except that: in embodiment 3, the growth temperature of the first n-GaN layer is 850°C, the growth thickness is 800nm, and the Si doping concentration is 2×10 19 atoms / cm3, so that the V-shaped pit continues to the first n-GaN layer.
[0082] Comparative Example 1
[0083] This comparative example provides a method for preparing an LED epitaxial structure, comprising the following steps:
[0084] (1) First, an AlN layer is grown on the substrate by PVD, and the thickness of the AlN layer is 20 nm. Then, the substrate with the AlN layer is placed in MOCVD for epitaxial growth. First, a GaN layer without any doping is grown at a growth temperature of 1100°C, and the thickness of the GaN layer is 900 nm.
[0085] (2) An n-GaN layer is grown on the GaN layer. The growth temperature of the n-GaN layer is 1040°C, the growth thickness is 1800 nm, and the Si doping concentration is 1×10 19 atoms / cm3;
[0086] (3) A multi-quantum well layer, an electron blocking layer and a p-GaN layer are sequentially grown on the n-GaN layer to obtain an LED epitaxial structure.
[0087] Comparative Example 2
[0088] This comparative example provides an LED epitaxial structure, which is basically the same as Example 1, except that: the width W of the growth window in the SiO2 mask of comparative example 2 is 3μm, the spacing K between two adjacent growth windows is 7μm, and in this comparative example, W / (W+K)=0.3.
[0089] Specifically, the LED epitaxial structures obtained in Example 1, Example 2, Example 3, Comparative Example 1 and Comparative Example 2 were prepared into LED chips using the same chip process conditions, and aged for 528 hours under the conditions of "double 85" (temperature of 85°C and humidity of 85%) and a current of 30 mA. During the test, the reverse leakage current of the sample was counted every 24 hours (tested at -10V). The reverse leakage current was used to reflect the anti-hydrolysis performance of the sample. The test results are shown in Tables 1 and 2. Figure 2 shown.
[0090] Table 1 Hydrolysis resistance test results
[0091]
[0092] Specifically, Figure 2 The reverse leakage current (IR) of Example 1, Example 2, Example 3, Comparative Example 1 and Comparative Example 2 varies with the aging time. Figure 2 It can be observed that the reverse leakage current (IR) of the LED chip made of the epitaxial structure of Example 1 increases to 0.001 μA only after the aging time reaches 168 hours, while the reverse leakage current (IR) of the LED chip made of the conventional epitaxial structure of Comparative Example 1 increases to 0.001 μA after 120 hours; and when the aging time reaches 528 hours, the reverse leakage current (IR) of the LED chip of Example 1 is still 0.001 μA, while the reverse leakage current (IR) of the LED chip of Comparative Example 1 is 0.004 μA at this time, which is 4 times that of Example 1. It can be seen that the reverse leakage current (IR) of Example 1 changes for a longer time under the high temperature and high humidity conditions of 85°C and 85% humidity, and the reverse leakage current (IR) changes less with the increase of aging time. Therefore, the hydrolysis resistance of the LED chip made of the epitaxial structure of Example 1 is significantly better than the hydrolysis resistance of the LED chip made of the conventional epitaxial structure of Comparative Example 1.
[0093] From Table 1 and Figure 2It can be seen from the test results of Example 2 and Example 3 that Example 2 can further improve the anti-hydrolysis performance of the LED chip by increasing the width of the growth window and increasing the ratio of the width of the growth window (W) to the period spacing (W+K). Based on Example 2, Example 3 can further improve the anti-hydrolysis performance of the LED chip by further increasing the growth thickness of the first n-GaN layer and optimizing the growth conditions of the first n-GaN layer.
[0094] It can be seen from the test results of Comparative Example 2 that when the width of the growth window is small and the ratio of the width of the growth window (W) to the period spacing (W+K) is small, the hydrolysis resistance of the LED chip will be affected, resulting in a significant decrease in the hydrolysis resistance of the LED chip.
[0095] The above disclosure is only a preferred embodiment of the present invention, which certainly cannot be used to limit the scope of the present invention. Therefore, equivalent changes made according to the claims of the present invention are still within the scope of the present invention.
Claims
1. A method for preparing a hydrolysis-resistant LED epitaxial structure, characterized in that: The steps include: (1) Growing an AlN layer and a GaN bottom layer sequentially on a substrate; (2) depositing a SiO2 mask on the surface of the GaN bottom layer; (3) performing photolithography on the SiO2 mask to form a plurality of growth windows spaced apart from each other in the SiO2 mask, wherein one end of the growth window extends to the GaN bottom layer; (4) growing a V-shaped pit layer on the SiO2 mask after photolithography, wherein the material of the V-shaped pit layer includes GaN material, and utilizing the different growth behaviors of the GaN material at the edge and the center of the growth window during the growth process to generate V-shaped pits in the V-shaped pit layer; (5) growing a first n-GaN layer on the V-shaped pit layer, so that the V-shaped pit extends to the first n-GaN layer; (6) growing a second n-GaN layer on the first n-GaN layer, wherein the growth temperature of the second n-GaN layer is greater than the growth temperature of the first n-GaN layer, and repairing the V-shaped pit to obtain a second n-GaN layer with a smooth surface; (7) A multi-quantum well layer, an electron blocking layer and a p-GaN layer are sequentially grown on the second n-GaN layer to obtain a hydrolysis-resistant LED epitaxial structure.
2. The method for preparing a hydrolysis-resistant LED epitaxial structure according to claim 1, characterized in that: In step (3), a plurality of the growth windows are arranged at equal intervals; The width of the growth window is W, the distance between two adjacent growth windows is K, and W and K satisfy the following formula: W / (W+K)>0.
5.
3. The method for preparing a hydrolysis-resistant LED epitaxial structure according to claim 2, characterized in that: In step (3), the width of the growth window is 5 μm to 10 μm.
4. The method for preparing a hydrolysis-resistant LED epitaxial structure according to claim 1, characterized in that: In step (4), the V-shaped pit layer is a GaN layer, or the V-shaped pit layer includes a GaN layer and an InGaN layer stacked in sequence; The growth temperature of the V-shaped pit layer is 750° C. to 850° C., and the growth thickness is 100 nm to 300 nm.
5. The method for preparing a hydrolysis-resistant LED epitaxial structure according to claim 1, characterized in that: In step (5), the growth temperature of the first n-GaN layer is 800° C. to 950° C., and the growth thickness is 300 nm to 1000 nm.
6. The method for preparing a hydrolysis-resistant LED epitaxial structure according to claim 1, characterized in that: In step (6), the growth temperature of the second n-GaN layer is 900° C. to 1050° C., and the growth thickness is 300 nm to 1000 nm.
7. A hydrolysis-resistant LED epitaxial structure, characterized in that: The method for preparing a hydrolysis-resistant LED epitaxial structure according to any one of claims 1 to 6 comprises a substrate, and an AlN layer, a GaN bottom layer, a SiO2 mask, a V-shaped pit layer, a first n-GaN layer, a second n-GaN layer, a multi-quantum well layer, an electron blocking layer and a p-GaN layer sequentially stacked on the substrate; The SiO2 mask is provided with a plurality of growth windows arranged at intervals, and one end of the growth window extends to the GaN bottom layer; A V-shaped pit is provided in the combined layer consisting of the V-shaped pit layer, the first n-GaN layer and the second n-GaN layer. The V-shaped pit extends from the bottom of the V-shaped pit layer to the lower part of the second n-GaN layer.
8. The hydrolysis-resistant LED epitaxial structure according to claim 7, characterized in that: The plurality of growth windows are arranged at equal intervals, the width of the growth window is W, the distance between two adjacent growth windows is K, and W and K satisfy the following formula: W / (W+K)>0.
5.
9. The hydrolysis-resistant LED epitaxial structure according to claim 8, characterized in that: The thickness of the SiO2 mask is 80nm-200nm; the width of the growth window is 5μm-10μm.
10. The hydrolysis-resistant LED epitaxial structure according to claim 7, characterized in that: The thickness of the AlN layer is 10nm to 30nm, and the thickness of the GaN bottom layer is 500nm to 1500nm; The first n-GaN layer is doped with Si, and the Si doping concentration is 1×10 19 atoms / cm3~3×10 19 atoms / cm3; The second n-GaN layer is doped with Si, and the Si doping concentration is 1×10 19 atoms / cm3~3×10 19 atoms / cm3.