Manufacturing method of semiconductor device
By forming a patterned mask layer in a semiconductor device and injecting ions, the failure and step problems caused by the bird's beak structure in micron-scale high-voltage devices are solved, and the flatness of the top surface of the substrate and the reliability of the device are improved.
Patent Information
- Application Number
- CN202311402737.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-26
- Publication Date
- 2025-04-29
AI Technical Summary
In micron-level high-voltage devices, the bird's beak structure of gate oxide exists, resulting in device failure, step formation, structural position occupation and leakage problems, affecting the device's miniaturization and reliability.
Based on the initial local oxidation structure that has been generated, the patterned mask layer is formed, and ions are injected for increasing the oxidation rate, and thermal oxidation is performed under mask to form a relocal oxidation structure to improve the problem of the edge portion.
By improving the edge portion of the initial local oxidation structure, the formation of the beak structure is avoided, the flatness of the top surface of the substrate is improved, the reliability of the device is enhanced, and the miniaturization of the device is facilitated.
Smart Images
Figure CN119905394A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor device manufacturing, and in particular to a method for manufacturing a semiconductor device. Background Art
[0002] For micron-scale high-voltage devices, the formation of gate oxide GOX is a local oxidation process, such as Figure 1 As shown, it is usually performed in-situ growth of gate oxide GOX on the surface of the active area AA. Due to the influence of lateral diffusion oxidation of oxygen, an oxide layer will be formed under the hard mask at a slower growth rate. The farther away from the hard mask opening area, the slower the growth rate, resulting in a bird's beak structure at the edge of the gate oxide on the active area after the gate oxide is grown, as shown in FIG. Figure 1 The dotted circle in the middle shows the location. The existence of the bird's beak structure has the following disadvantages: (1) It may cause the gate formed on the gate oxide GOX to be broken, causing device failure; (2) The bird's beak structure causes a step to be formed on the top surface of the active area AA below it, and the existence of the step affects the manufacturing and performance of the corresponding structure on the subsequent active area; (3) The bird's beak structure occupies the formation position of the subsequent structure (such as metal silicide or local field oxide or field oxide plate with uniform thickness), resulting in these structures needing to be formed in other positions, which seriously affects the miniaturization of the device for micron-level high-voltage devices; (4) At small sizes, the area with thinner thickness of the bird's beak structure may also cause leakage problems, affecting device reliability.
[0003] In addition, the above-mentioned problem also exists in other local oxidation processes similar to the gate oxide process of high-voltage devices, and also exists in some other local oxidation processes in which the edge of the local oxidation structure causes unnecessary steps to be formed on the top surface of the substrate. Therefore, improving the problems caused by the edge of the local oxidation structure (such as the bird's beak problem or the problem of substrate interface steps) is one of the technical problems that urgently need to be solved in this field. Summary of the invention
[0004] The object of the present invention is to provide a method for manufacturing a semiconductor device, which improves the problems caused by the edge of the initial local oxidation structure (such as the bird's beak problem or the substrate interface step problem) through a process based on the initial local oxidation structure that has been generated.
[0005] To achieve the above object, the present invention provides a method for manufacturing a semiconductor device, which comprises the following steps:
[0006] Providing a substrate, and thermally oxidizing a surface layer of a local region of the substrate to form an initial local oxidation structure, wherein the initial local oxidation structure has an edge portion;
[0007] forming a patterned mask layer having an opening on the substrate and the initial local oxidation structure, wherein the opening is aligned with a portion of the substrate where the edge portion and the sidewall thereof are connected;
[0008] Under the masking of the patterned mask layer and the edge portion, ions for increasing the oxidation rate are injected into the substrate at the opening, and under the shielding of the edge portion, the ion injection concentration in the substrate below the edge portion and in contact with the sidewall thereof is different;
[0009] Under the masking of the patterned mask layer, etching away the edge portion to expose the surface of the substrate at the opening;
[0010] Under the masking of the patterned mask layer, the substrate exposed at the opening is thermally oxidized to form a re-local oxidation structure.
[0011] Optionally, the top surface heights of the substrate at different positions below the edge portion are complementary to the difference in implantation concentration of the ions in the substrate, so that the top surface of the substrate below the formed re-local oxidation structure is flat.
[0012] Optionally, a top surface of the substrate below the re-local oxidation structure is flush with a top surface of the substrate below the remaining initial local oxidation structure.
[0013] Optionally, a top surface of the re-local oxidation structure is lower than a top surface of the remaining initial local oxidation structure to form a step.
[0014] Optionally, the thickness of the patterned mask layer is And / or, under the masking of the patterned mask layer, the edge portion exposed by the opening is etched away by an anisotropic etching process.
[0015] Optionally, the ions include at least one of oxygen ions, amorphization ions and halogen ions.
[0016] Optionally, the re-local oxidation structure is connected to the remaining initial local oxidation structure to form a new local oxidation structure, and the new local oxidation structure or the remaining initial local oxidation structure is subsequently used as: a gate oxide layer formed on the top of the active area of the substrate, or a device isolation structure formed between adjacent active areas in the substrate, or a field oxide plate formed in a local area of the active area of the substrate, or a blocking layer formed on the top of the active area of the substrate and used to block subsequent ion implantation.
[0017] Optionally, providing a substrate, and thermally oxidizing a local surface layer of the substrate to form the initial local oxidation structure comprises:
[0018] Providing a substrate, and etching the substrate to form a device isolation trench;
[0019] Filling the device isolation trench with an insulating dielectric material and performing chemical mechanical planarization to form a device isolation structure filled in the device isolation trench and define an active area;
[0020] forming a patterned hard mask layer to expose a portion of the top surface of the active area and mask the surface of the remaining area;
[0021] Under the mask of the patterned hard mask layer, thermal oxidation is performed on the top of the active area exposed by the patterned hard mask layer to form the initial local oxidation structure, and the opening is aligned with the edge portion and the active area remaining outside thereof.
[0022] Optionally, after thermally oxidizing the substrate exposed at the opening to form a re-local oxidation structure under the mask of the patterned mask layer, the method further includes: etching the re-local oxidation structure to thin or remove the re-local oxidation structure under the mask of the patterned mask layer; and removing the patterned mask layer.
[0023] Optionally, after etching the re-local oxidation structure to thin or remove the re-local oxidation structure and before or after removing the patterned mask layer, the method further includes: performing ion implantation on the substrate at the opening;
[0024] And / or, after removing the patterned mask layer, the method further includes: forming a silicide blocking layer on a corresponding area of the substrate; and forming metal silicide on a surface of the substrate exposed by the silicide blocking layer.
[0025] Compared with the prior art, the technical solution of the present invention forms a patterned mask layer on the basis of the initial local oxidation structure, and the opening of the patterned mask layer is aligned with the edge portion of the initial local oxidation structure (the region is prone to bird's beak problem or active area interface step problem) and part of the substrate outside thereof. Under the masking effect of the patterned mask layer with the opening and the edge portion, ion implantation for improving the oxidation rate is performed on the substrate located below the edge portion and outside the sidewall of the opening, and different positions in the opening have different blocking effects on the injected ions (for example, the edge portion has a stronger blocking effect on the injected ions, and the position without the edge portion has a weaker blocking effect on the injected ions). , so that the ion implantation concentration in the substrate below the edge portion and outside the side wall of the opening is different, and then after removing the film layer including the edge portion on the substrate at the opening, when the substrate in the opening is thermally oxidized, the different ion implantation concentrations at different positions in the opening lead to different oxidation rates and oxidation thicknesses of the substrate at different positions in the opening, thereby making the top surface of the substrate below the formed local oxidation structure smoother than the top surface of the substrate in the original area after thermal oxidation, thereby improving the problems caused by the edge portion of the original initial local oxidation structure (such as the bird's beak problem or the active area interface step problem), improving the device reliability and facilitating the miniaturization of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.
[0027] Figure 1 This is a scanning electron microscope image of the bird's beak problem in a micron-scale high-voltage device.
[0028] Figure 2 It is a flow chart of a method for manufacturing a semiconductor device according to a specific embodiment of the present invention.
[0029] Figure 3 It is a schematic diagram of the cross-sectional structure of a device in a method for manufacturing a semiconductor device according to a specific embodiment of the present invention. DETAILED DESCRIPTION
[0030] In the following description, a large number of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described. It should be understood that the present invention can be implemented in different forms and should not be interpreted as being limited to the embodiments proposed here. On the contrary, providing these embodiments will make the disclosure thorough and complete, and the scope of the present invention will be fully conveyed to those skilled in the art. The same reference numerals represent the same elements from beginning to end. It should be understood that when an element is referred to as "connected to", "coupled" other elements, it can be directly connected to other elements, or there can be intervening elements. On the contrary, when an element is referred to as "directly connected to" other elements, there is no intervening element. When used here, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates another way. It should also be understood that the term "comprising" is used to identify the presence of features, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, steps, operations, elements, components and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0031] The technical solution proposed by the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0032] Please refer to Figure 2 An embodiment of the present invention provides a method for manufacturing a semiconductor device, which comprises the following steps:
[0033] S1, providing a substrate, and thermally oxidizing a surface layer of a local area of the substrate to form an initial local oxidation structure, wherein the initial local oxidation structure has an edge portion;
[0034] S2, forming a patterned mask layer having an opening on the substrate and the initial local oxidation structure, wherein the opening is aligned with a portion of the substrate where the edge portion and the sidewall thereof are connected;
[0035] S3, under the masking of the patterned mask layer and the edge portion, ions for increasing the oxidation rate are injected into the substrate at the opening, and under the shielding of the edge portion, the ions are injected at different concentrations in the substrate below the edge portion and in contact with the sidewall thereof;
[0036] S4, under the mask of the patterned mask layer, etching and removing the edge portion to expose the surface of the substrate at the opening;
[0037] S5, under the mask of the patterned mask layer, thermally oxidizing the substrate exposed at the opening to form a re-local oxidation structure.
[0038] In step S1, refer to Figure 3 In (A), first, a substrate 100 is provided, which may be any suitable semiconductor substrate material, such as pure silicon, silicon germanium (SiGe), silicon carbide (SiC) or silicon on insulator (SOI), etc. Then, a device isolation structure 101 is formed in the substrate 100, and the device isolation structure may be a shallow trench isolation structure STI or a local field oxygen isolation structure. The device isolation structure 101 is used to define an active area in the substrate 100.
[0039] Please refer to Figure 3 In (A), taking a shallow trench isolation structure STI as an example, the specific steps of forming a device isolation structure 101 in the substrate 100 include:
[0040] (1) A pad oxide layer (PAD OX) 102 is formed on a substrate 100 by any suitable process such as thermal oxidation, atomic layer deposition or plasma enhanced chemical vapor deposition, and a first hard mask layer (not shown) such as silicon nitride is further deposited on the pad oxide layer 102 by a chemical vapor deposition process, a photoresist (not shown) is coated on the first hard mask layer, the photoresist is photolithographically processed, and the first hard mask layer is etched using the photoresist after photolithography as a mask, and then the photoresist is removed to form a first patterned hard mask layer (not shown) for defining a shallow trench (i.e., a device isolation trench) formation area.
[0041] (2) Using the first patterned hard mask layer as a mask, the pad oxide layer 102 and the substrate 100 are etched to form a shallow trench (ie, a device isolation trench, not shown) in the substrate 100 .
[0042] (3) A linear oxide layer (not shown) is formed on the inner surface of the shallow trench by thermal oxidation, atomic layer deposition or plasma enhanced chemical vapor deposition, and an insulating dielectric material (not shown) is further deposited by a high aspect ratio filling process or a high density plasma deposition process to fill the shallow trench.
[0043] (4) The top of the insulating dielectric material is flattened to the first patterned hard mask layer by a chemical mechanical polishing (CMP) process, thereby removing excess insulating dielectric material, thereby forming a shallow trench isolation structure STI filled in the shallow trench and having a flat top surface and serving as a device isolation structure 101. The device isolation structure 101 defines (i.e., encloses) an active area AA in the substrate 100 (the active area can be an active area of any semiconductor device to be manufactured, such as a high-voltage device).
[0044] (5) The first patterned hard mask layer is removed by any suitable process such as a wet etching process, so that the top of the device isolation structure 101 is higher than the top of the pad oxide layer 102. In other examples, the first patterned hard mask layer is removed by a chemical mechanical polishing (CMP) process, so that the top of the device isolation structure 101 can also be flush with the top of the pad oxide layer 102.
[0045] Optionally, before etching the substrate 100 to form a shallow trench for manufacturing the device isolation structure 101 , or after forming the device isolation structure 101 , well ion implantation is performed on the substrate 100 to form a desired well, and the well is located in the active area AA.
[0046] In step S1, refer to Figure 3 In (A), after forming the device isolation structure 101, a hard mask material such as silicon nitride is further re-deposited on the pad oxide layer 102 and the device isolation structure 101 through processes such as chemical vapor deposition to form a second hard mask layer 103; then the second hard mask layer 103 is photolithographically and etched to pattern the second hard mask layer 103 to define the area where the initial local oxidation structure 104 is to be formed. The second hard mask layer 103 can be a single-layer film structure such as silicon nitride, or a multi-layer film composite structure formed by alternating stacking of silicon oxide and silicon nitride. Next, the pad oxide layer 102 is etched under the mask of the patterned second hard mask layer 103 to expose the surface of the corresponding area of the active area AA, thereby forming a patterned hard mask layer. Afterwards, the exposed active area AA is thermally oxidized under the mask of the patterned hard mask layer (i.e., the patterned second hard mask layer 103 and the remaining pad oxide layer 102) to form an initial local oxidation structure 104 (which can be used as a gate oxide layer of a transistor). In the thermal oxidation process, due to the influence of lateral diffusion oxidation of oxygen, an oxide layer is formed at a relatively slow growth rate under the second hard mask layer 103, and the farther from the opening area of the second hard mask layer 103, the slower the growth rate, resulting in the edge portion 104a of the initial local oxidation structure 104 being easily in a bird's beak shape after the thermal oxidation of the gate is completed, or the top surface of the active area AA below the edge portion 104a forms a step with the top surface of the active area AA around it.
[0047] In one example, the initial local oxidation structure 104 has a non-edge portion 104b and an edge portion 104a with different thicknesses. The edge portion 104a is located at one side edge of the initial local oxidation structure 104, and the non-edge portion 104b is the portion of the initial local oxidation structure 104 excluding the edge portion 104a. The bottom surface of the non-edge portion 104b itself is relatively flat (that is, the top surface of the active area AA below the non-edge portion 104b is relatively flat), the edge portion 104a is located outside the non-edge portion 104b and extends outward from the outside of the non-edge portion 104b to a partial area of the active area below the bottom of the second hard mask layer 103, the thickness of the edge portion 104a is uneven, and its overall bottom surface is shallower than the bottom surface of the non-edge portion 104b, and the active area AA below the edge portion 104a and the top surface of the active area AA covered by the liner oxide layer 102 on the outside of the side wall of the edge portion 104a form a step, and the top surface step of the active area AA in this area does not meet the device manufacturing and performance requirements and needs to be improved.
[0048] In another example, the oxide layer can be used as a sacrificial layer, which is wet-removed by using any suitable etching solution such as HF acid solution, SPM (a mixture of H2SO4, H2O2, and H2O) or SC1 (a mixture of NH4OH, H2O2, and H2O), thereby forming a groove (not shown) that re-exposes the top surface of the active area in the area, and then the active area in the groove is thermally oxidized again to form an initial local oxidation structure 104 whose top surface is not higher than, not higher than, or slightly higher than the top surface of the substrate 100 in other areas. The initial local oxidation structure 104 also has a non-edge portion 104b and an edge portion 104a, and the edge portion 104a is located outside the non-edge portion 104b and extends outward from the outside of the non-edge portion 104b. Moreover, the top surface of the active area AA below the edge portion 104a and the active area AA near the outside of the side wall of the edge portion 104a will also form a step. The top surface step of the active area AA in this area is also a structure that does not meet the device manufacturing and performance requirements and needs to be improved.
[0049] In step S2, please refer to Figure 3 In (B), after forming the initial local oxidation structure 104, the second hard mask layer 103 is removed, and a hard mask material such as silicon nitride is further re-deposited on the liner oxide layer 102, the device isolation structure 101 and the initial local oxidation structure 104 by a process such as chemical vapor deposition (the deposition thickness is, for example, ), and coated with photoresist (not shown) to perform photolithography and etching on the deposited hard mask material to form a patterned mask layer 105. Optionally, the patterned mask layer 105 can be a single-layer film structure such as silicon nitride, or a multi-layer film composite structure formed by alternating stacking of silicon oxide and silicon nitride. The patterned mask layer 105 has an opening 105a, and parameters such as the position and line width of the opening 105a mainly depend on the key parameters of the edge portion 104a. It can align with the edge portion 104a and the part of the active area AA near the outer side of the sidewall. The non-edge portion 104b covered by the patterned mask layer 105 outside the opening 105a (i.e., the remaining portion of the initial local oxidation structure 104 minus the edge portion 104a) is the required portion that meets the device manufacturing and performance requirements. In other embodiments of the present invention, the patterned mask layer 105 can also be a photoresist, or a structure formed by stacking a photoresist and silicon nitride thereunder. The opening 105a may not expose the top of the device isolation structure 101 near the periphery of the edge portion 104a, or may expose the top of one side of the device isolation structure 101 near the periphery of the edge portion 104a close to the edge portion 104a. Preferably, the opening exposes the top of one side of the device isolation structure 101 near the periphery of the edge portion 104a close to the edge portion 104a (i.e., the top corner region of the device isolation structure 101 close to the edge portion 104a), which reduces the difficulty of aligning the opening 105a with the edge portion 104a on the one hand, and on the other hand, the top corner of the device isolation structure 101 can be removed at the same time as the edge portion 104b is removed in the subsequent step S4, thereby avoiding the formation of a new bird's beak structure on the top of the substrate near the device isolation structure 101 during the thermal oxidation process in the subsequent step S5.
[0050] In step S3, please continue to refer to Figure 3In (B), with the patterned mask layer 105 as a mask, under the masking effect of the patterned mask layer 105 and the edge portion 104a, ions for increasing the oxidation rate are injected into the active area AA below the edge portion 104a at the opening 105a and the active area AA below the pad oxide layer 102 outside the side wall of the edge portion 104a. Because the thickness of the edge portion 104a and the pad oxide layer 102 at the opening 105a are different, they serve as shielding layers with different thicknesses and will have different degrees of blocking effect on the ions injected into the opening 105a. The thicker the shielding layer at the corresponding position, the better the shielding effect, and the smaller the ion injection concentration in the active area AA below the shielding layer at this position, thereby making the ion injection concentrations in the active area AA at different positions at the opening 105a different, and then in the thermal oxidation process of the subsequent step S5, the oxidation rates of the active area AA at different positions are different, so that the interface of the top surface of the substrate after thermal oxidation tends to be flat. In one example, if the patterned mask layer 105 is composed of a photoresist and a hard mask layer such as silicon nitride thereunder, the photoresist may be further removed after the ion implantation to prevent the presence of the photoresist from affecting the effect of subsequent processes.
[0051] It should be understood that the ions implanted in this step for increasing the oxidation rate may be any suitable ions, and may be a single ion or a mixture of multiple ions. For example, the ions implanted for increasing the oxidation rate may be oxygen ions, or may include at least one of oxygen ions, amorphization ions and halogen ions. Among them, the implantation of oxygen ions can increase the oxygen content in the active area AA, thereby increasing the oxidation rate of the substrate in the active area AA below the subsequent opening 105a during oxidation; amorphizing ions include, for example, silicon ions, germanium ions or argon ions, and the implantation of amorphizing ions can convert the single crystal silicon in the active area AA below the opening 105a into amorphous silicon, thereby increasing the oxidation rate of the substrate in the active area AA below the subsequent opening 105a during oxidation; halogen ions include, for example, at least one of chloride ions (Cl), fluorine ions (F) and bromide ions (Br), and the implantation of halogen ions can act as a catalyst and has the effect of weakening the Si-O bond energy. Therefore, when the re-local oxidation structure 106 is subsequently formed at the opening 105a by thermal oxidation, the SO bond energy of SiO2 of the formed local oxide 206 is weaker, making it easier for oxygen to diffuse into, thereby increasing the oxidation rate of the substrate in the active area AA below the subsequent opening 105a during oxidation.
[0052] In addition, the thickness of the shielding layer (i.e., the edge portion 104a of the initial local oxidation structure 104 and the pad oxide layer 102) exposed at the opening 105a at different positions (or the bottom surface depth of the shielding layer) is complementary to the difference in the ion implantation concentration in the active area AA below it, and an ion implantation area 100a with an uneven distribution of ion implantation concentration can be formed in the active area AA at the opening 105a. The smaller the thickness of the shielding layer (i.e., the edge portion 104a of the initial local oxidation structure 104 and the pad oxide layer 102) exposed at the corresponding position of the opening 105a (i.e., the shallower the bottom surface depth of the shielding layer), the greater the ion implantation concentration in the active area AA below it, and the higher the subsequent thermal oxidation rate in step S5.
[0053] In step S4, please continue to refer to Figure 3 In (C), any suitable anisotropic etching process such as dry etching is used to etch away the edge portion 104a and the pad oxide layer 102 exposed in the opening 105a, thereby exposing the uneven top surface of the active area AA at the opening 105a. The characteristics of the anisotropic etching can ensure that the oxides such as the pad oxide layer 102 masked by the patterned mask layer 105 are protected, thereby preventing the silicon of the active area AA in the masked area of the patterned mask layer 105 from participating in the reaction in large quantities in the next step of thermal oxidation. It should be understood that when the opening 105a exposes the top corner of the device isolation structure 101, and the etching selectivity of the device isolation structure 101 and the edge portion 104a is relatively low, in this step, the anisotropic etching can remove the top corner of the device isolation structure 101 and trim the top sidewall morphology of the device isolation structure 101.
[0054] In step S4, please continue to refer to Figure 3In (D), under the masking effect of the patterned mask layer 105, an oxide is grown in situ on the top surface of the active area AA exposed at the opening 105a by using any suitable thermal oxidation method such as furnace thermal oxidation to form a re-local oxidation structure 106. In the thermal oxidation process, the top surface height of the active area AA at the corresponding position area of the opening 105a is associated with the ion implantation concentration in the position area. The higher the original top surface height of the active area AA at the corresponding position area of the opening 105a (i.e., the top surface height after removing the edge portion 104a, etc.), the greater the ion implantation concentration in the position area, the greater the oxidation rate of the active area AA at the position area, and the more the active area AA substrate is consumed. In addition, due to the injection of ions for increasing the oxidation rate, the longitudinal oxidation rate at the opening 105a is much greater than the lateral oxidation rate. Therefore, according to the difference in the original top surface height of the active area AA and the ion implantation concentration, the thermal oxidation process time is controlled to make the active area AA originally located below the liner oxide layer 102 in the opening 105a. The growth rate of the oxide layer on the source area AA is faster than the growth rate of the oxide layer on the active area AA originally located below the edge portion 104a, and the oxidation of the active area masked below the bottom of the patterned mask layer 105 in the laterally direction is slower, thereby ensuring that the bottom depth and lateral width of the formed re-local oxidation structure 106 meet the requirements, and thus the bird's beak structure that extends outward beyond the requirement will not be re-formed in the laterally direction. At the same time, in the longitudinal direction, the top surface of the active area below the re-local oxidation structure 106 at the opening 105a is lowered to the required height and the flatness also meets the requirements. Furthermore, the height difference between the top surface of the active area below the re-local oxidation structure 106 and the top surface of the active area AA below the remaining non-edge portion 104b can meet the device manufacturing and performance requirements. At this time, the re-local oxidation structure 106 is connected to the remaining non-edge portion 104b and forms a new local oxidation structure, and the bottom surface flatness of the new local oxidation structure is greatly improved compared to the bottom surface flatness of the initial local oxidation structure 104 formed in step S1, and the step of the active area AA at the opening 105a is greatly reduced or even eliminated, thereby improving the bird's beak problem. Preferably, the top surface of the active area below the re-local oxidation structure 106 at the opening 105a is lowered to be substantially flush with the top surface of the active area below the remaining non-edge portion 104b.
[0055] Optionally, after forming the re-local oxidation structure 106, any suitable etching process such as dry etching can be used to etch the re-local oxidation structure 106 at the opening 105a under the masking effect of the patterned mask layer 105 to thin or remove the re-local oxidation structure 106, and then remove the patterned mask layer 105. While thinning the re-local oxidation structure 106 to a required thickness, the top surface of the remaining re-local oxidation structure 106 can be flattened, so that the remaining re-local oxidation structure 106 is retained as a blocking layer (i.e., a shielding layer, a protective layer) for subsequent processes (such as subsequent ion implantation processes) or as a necessary layer required for device manufacturing and performance (such as a part of a gate oxide layer or a part of a field oxide plate, etc.).
[0056] Further optionally, after etching and thinning or removing the re-local oxidation structure 106, and before or after removing the patterned mask layer 105, the manufacturing method of the present invention further includes: performing at least one ion implantation on the active area AA at the opening 105, and the ion implantation includes a threshold voltage adjustment ion implantation or a source-drain ion implantation, etc. For example, after etching and thinning the re-local oxidation structure 106, and before removing the patterned mask layer 105, at least one ion implantation is performed on the active area AA at the opening 105, and the ion implantation includes a threshold voltage adjustment ion implantation or a source-drain ion implantation, etc.
[0057] Further optionally, after removing the patterned mask layer 105, the manufacturing method of the present invention also includes: forming a gate through a gate process, and forming source and drain regions through a source and drain ion implantation process, and further forming a silicide barrier layer (SAB, not shown) on the corresponding area of the substrate 100 through material deposition, photolithography and etching; and, forming a metal silicide (not shown) on the surface of the substrate exposed by the silicide barrier layer, and continuing with other back-end processes.
[0058] It should be understood that the remaining non-edge portion 104b or the new local oxidation structure composed of the remaining non-edge portion 104b and the remaining re-local oxidation structure 106 can be used subsequently as: a gate oxide layer formed on the top of the active area AA (for example, a gate oxide layer of a high-voltage device), or, a local device isolation structure formed between adjacent active areas AA, or, a field oxide plate formed in a local area of the active area AA, or, a blocking layer formed on the top of the active area AA of the substrate and used to block subsequent ion implantation.
[0059] In addition, it should be noted that the above-mentioned embodiment is mainly described by taking the edge portion 104a of the initial local oxidation structure in step S1 in a bird's beak shape (or a bird's beak structure) as an example. After being processed by the technical solution of the present invention, the edge portion 104a in the bird's beak shape can be removed, and an oxide layer can be regrown in this area, so that the top surface of the active area originally located below the edge portion 104a and the top surface of the active area around it tend to be flat, but the technical solution of the present invention is not limited to this. In other embodiments of the present invention, the edge portion 104a of the initial local oxidation structure in step S1 may not be in a bird's beak shape, but an undesirable step is formed between the top surface of the active area below the edge portion 104a and the top surface of the active area around it. After being processed by the technical solution of the present invention, the edge portion 104a can be removed, and an oxide layer can be regrown in this area, so that the top surface of the active area originally located below the edge portion 104a and the top surface of the active area around it tend to be aligned, thereby eliminating the step problem on the top surface of the active area in this area.
[0060] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the technical solution of the present invention.
Claims
1. A method for manufacturing a semiconductor device, characterized in that: The following steps are involved: Providing a substrate, and thermally oxidizing a surface layer of a local region of the substrate to form an initial local oxidation structure, wherein the initial local oxidation structure has an edge portion; forming a patterned mask layer having an opening on the substrate and the initial local oxidation structure, wherein the opening is aligned with a portion of the substrate where the edge portion and the sidewall thereof are connected; Under the masking of the patterned mask layer and the edge portion, ions for increasing the oxidation rate are injected into the substrate at the opening, and under the shielding of the edge portion, the ion injection concentration in the substrate below the edge portion and in contact with the sidewall thereof is different; Under the masking of the patterned mask layer, etching away the edge portion to expose the surface of the substrate at the opening; Under the masking of the patterned mask layer, the substrate exposed at the opening is thermally oxidized to form a re-local oxidation structure.
2. The manufacturing method according to claim 1, characterized in that The top surface heights of the substrate at different positions below the edge portion are complementary to the difference in the implanted ion concentration in the substrate, so that the top surface of the substrate below the formed re-local oxidation structure is flat.
3. The manufacturing method according to claim 2, characterized in that: A top surface of the substrate below the re-local oxidation structure is flush with a top surface of the substrate below the remaining initial local oxidation structure.
4. The manufacturing method according to claim 1, characterized in that: A top surface of the re-local oxidation structure is lower than a top surface of the remaining initial local oxidation structure to form a step.
5. The manufacturing method according to claim 1, characterized in that: The thickness of the patterned mask layer is And / or, under the masking of the patterned mask layer, the edge portion exposed by the opening is etched away by an anisotropic etching process.
6. The manufacturing method according to claim 1, characterized in that: The ions include at least one of oxygen ions, amorphization ions, and halogen ions.
7. The manufacturing method according to claim 1, characterized in that: The re-local oxidation structure is connected to the remaining initial local oxidation structure to form a new local oxidation structure, and the new local oxidation structure or the remaining initial local oxidation structure is subsequently used as: a gate oxide layer formed on the top of the active area of the substrate, or a device isolation structure formed between adjacent active areas in the substrate, or a field oxide plate formed in a local area of the active area of the substrate, or a blocking layer formed on the top of the active area of the substrate and used to block subsequent ion implantation.
8. The manufacturing method according to claim 1, characterized in that: The step of providing a substrate and thermally oxidizing a local surface layer of the substrate to form the initial local oxidation structure comprises: Providing a substrate, and etching the substrate to form a device isolation trench; Filling the device isolation trench with an insulating dielectric material and performing chemical mechanical planarization to form a device isolation structure filled in the device isolation trench and define an active area; forming a patterned hard mask layer to expose a portion of the top surface of the active area and mask the surface of the remaining area; Under the mask of the patterned hard mask layer, thermal oxidation is performed on the top of the active area exposed by the patterned hard mask layer to form the initial local oxidation structure, and the opening is aligned with the edge portion and the active area remaining outside thereof.
9. The manufacturing method according to any one of claims 1 to 8, characterized in that: After thermally oxidizing the substrate exposed at the opening to form a re-local oxidation structure under the mask of the patterned mask layer, the method further includes: etching the re-local oxidation structure to thin or remove the re-local oxidation structure under the mask of the patterned mask layer; and removing the patterned mask layer.
10. The manufacturing method according to claim 9, characterized in that: After etching the re-local oxidation structure to thin or remove the re-local oxidation structure and before or after removing the patterned mask layer, the method further includes: performing ion implantation on the substrate at the opening; And / or, after removing the patterned mask layer, the method further includes: forming a silicide blocking layer on a corresponding area of the substrate; and forming metal silicide on a surface of the substrate exposed by the silicide blocking layer.