High dynamic range optical-to-digital converter

Abstract

The invention provides a high-dynamic-range optical-to-digital converter. The high-dynamic-range optical-to-digital converter comprises an analog-to-digital converter module, a current reference source, a clock generation module, a direct-current offset module and a background light offset module, wherein the analog-to-digital converter module has different working modes, and performs analog-to-digital conversion on received light current signals in the different working modes; the current reference source is used for converting externally supplied power supply voltage into a reference current source available for each module; the clock generation module performs frequency division and combinational logic on an externally input total clock and a control signal, generates an on-chip clock and a control signal, and controls the working time sequence and the working mode of each module; and the direct current offset module and the background light offset module are arranged at the signal input end to remove a direct current component and a background light component in the light current signal so as to cooperate with the analog-to-digital converter module to perform analog-to-digital conversion on an alternating current component in the light current signal. Input light current signals are converted into digital signals in a high-integration, low-power-consumption and high-dynamic-range mode.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a high dynamic range light-to-digital converter. Background Art

[0002] With the progress of modern electronic technology in the medical and biological fields, a series of sensor-based electronic devices have emerged to enhance and replace human organs, such as photodiode sensing circuits for high-resolution retinal prostheses; cochlear sensing technology to help the deaf hear; wearable PPG technology for blood pressure and blood oxygen detection, etc. In these sensing technologies, the design of the front-end readout circuit is mostly required to have low power consumption, high dynamic response, and high degree of integration due to the extremely weak sensitive signals and application power supply requirements.

[0003] Take the blood pressure and blood oxygen detection of photoplethysmogram (PPG) as an example. Compared with the traditional ECG electrocardiogram that uses bioelectric signals for detection, PPG uses the reflection or projection of light of different wavelengths by human tissue to obtain physiological information of the human body. Based on this, it provides the feasibility of adaptive placement in different parts of the human body for portable detection, and has become the most popular technical application means for measuring blood sugar and blood oxygen in wearable devices.

[0004] The basic principle of PPG monitoring is that the light source irradiates the skin tissue with a specific wavelength, the photodiode receives the reflected light signal and converts it into photocurrent, and then extracts the corresponding useful signal through the digital-analog hybrid circuit. By analyzing the PPG signals of different wavelengths, the physiological parameters of human blood are extracted to estimate blood pressure, heart rate and its variability, respiratory rate, atrial hardness and blood sugar level. For example, using near-infrared light (NIL) to obtain this band (wavelength: 700nm-900nm) can reflect the signal intensity related to blood oxygen concentration.

[0005] The front-end signal processing chip of the PPG sensor usually consists of two parts: a photocurrent read-out integrated circuit (ROIC) and an LED driver. The traditional way to obtain information about blood pressure or blood oxygen is to connect a photodiode (PD) to a transimpedance amplifier (TIA) to convert the photocurrent into a voltage, and then process it through an anti-aliasing filter (AAF) and a high-precision ADC to extract the original signal that can reflect HRV and SpO from the digital signal obtained by the ADC. 2Due to the power consumption limitation of battery-powered wearable devices, maximizing the energy utilization of PPG front-end chips is one of the challenges that existing technologies must face.

[0006] In recent years, light-to-digital converters (LDCs) for front-end detection have emerged. Compared with traditional architectures, LDCs have received widespread attention due to their potential in terms of chip area and power consumption. However, there are many ways to implement the specific circuit structure of LDCs. Using the parasitic capacitance of the PD as a passive integrator of the first-order ΔΣ ADC saves power consumption at the expense of reduced conversion linearity.

[0007] In addition, due to the inherent characteristics of the detected optical signal (PPG signal), the dynamic range (DR) of the input signal of the front-end detection chip is required. The photocurrent consists of the direct current (DC) component caused by the skin and bones and the alternating current (AC) component caused by the PPG signal, and their ratio is the perfusion index (PI). The AC signal related to the PPG signal is our detection target, and how to remove the influence of the DC signal is a problem that needs to be considered in system design. Summary of the invention

[0008] In view of this, an embodiment of the present application provides a high dynamic range optical-to-digital converter to solve the technical defects in the optical-to-digital converters of the prior art in terms of input signal dynamic range, power consumption and integration.

[0009] According to a first aspect of an embodiment of the present application, there is provided a high dynamic range optical digital converter, comprising an analog-to-digital converter module, a current reference source, a clock generation module, a DC cancellation module, and a background light cancellation module;

[0010] Wherein, the analog-to-digital converter module has different working modes to meet the requirements of high dynamic range of input signals, and in different working modes, the photocurrent signal received by the high dynamic range optical-to-digital converter is subjected to analog-to-digital conversion;

[0011] The current reference source converts the externally supplied power supply voltage into a reference current source available to each module inside the high dynamic range optical-to-digital converter;

[0012] The clock generation module performs frequency division and combination logic on the external input total clock and control signal to control the working timing and working mode of each module inside the high dynamic range optical to digital converter;

[0013] The DC cancellation module and the background light cancellation module are at the signal input end of the high dynamic range optical-to-digital converter to remove the DC component and the background light component in the photocurrent signal, so as to cooperate with the analog-to-digital converter module to perform analog-to-digital conversion on the AC component in the photocurrent signal.

[0014] Optionally, the analog-to-digital converter module adopts an incremental timing design and a second-order continuous-time CIFB Sigma-Delta ADC structure;

[0015] Wherein, the analog-to-digital converter module includes a two-stage integrator, a 1.5-bit quantizer and a 1.5-bit digital-to-analog conversion feedback circuit;

[0016] The two-stage integrator includes a programmable integrating amplifier and a programmable resistor and capacitor circuit, and the working mode is adjusted by the control signal, and different working modes correspond to different signal paths;

[0017] The 1.5-bit quantizer performs sampling and quantization in the time domain and amplitude on the continuous signal output by the second-stage integrator in the two-stage integrator;

[0018] The 1.5-bit digital-to-analog conversion feedback circuit converts the digital signal output by the 1.5-bit quantizer into an analog signal, and feeds the analog signal back to the input end of the two-stage integrator. The input signal passes through the feedback path to achieve signal low-pass and noise high-pass within the sampling bandwidth in the frequency domain.

[0019] Optionally, the programmable integrator amplifier comprises a two-stage folded cascode input stage and a push-pull output stage, and the push-pull output stage is programmably designed.

[0020] Optionally, the 1.5-bit quantizer adopts a Strong-RAM dynamic comparator as a basic structure.

[0021] Optionally, the programmable integrator amplifier and the programmable resistor and capacitor circuit, through a preset programmable design and timing design, enable the analog-to-digital converter module to operate in a DC test mode state. After obtaining a digital signal associated with a DC component in a photocurrent signal, the programmable integrator amplifier, the programmable resistor and capacitor circuit and the related analog-to-digital converter module are enabled to operate in an AC test mode state. At the same time, the DC component and the background light component in the photocurrent signal are subtracted through the DC cancellation module and the background light cancellation module, and the AC component in the photocurrent signal is detected to obtain a digital signal corresponding to the target signal.

[0022] Optionally, the current reference source adopts a subthreshold constant transconductance reference source circuit structure to convert an externally supplied power supply voltage into the reference current source required by each module inside the high dynamic range optical-to-digital converter.

[0023] Optionally, the high dynamic range light-to-digital converter is connected to an LED driver, and the output current range of the LED driver is 1-128 mA.

[0024] Optionally, the 1.5-bit feedback digital-to-analog converter adopts a current-steering digital-to-analog conversion circuit structure, and the 1.5-bit feedback digital-to-analog converter is synchronously programmable.

[0025] Optionally, the analog-to-digital converter module, the current reference source, the clock generation module, the DC offset module, the background light offset module and the LED driver are all integrated into a high dynamic range light-to-digital conversion chip.

[0026] The present application provides a high dynamic range optical digital converter, including an analog-to-digital converter module, a current reference source, a clock generation module, a DC offset module and a background light offset module; wherein the analog-to-digital converter module has different working modes to meet the requirements of high dynamic range of input signals, and in different working modes, performs analog-to-digital conversion on the photocurrent signal received by the high dynamic range optical digital converter; the current reference source converts the externally supplied power supply voltage into a reference current source available to each module inside the high dynamic range optical digital converter; the clock generation module divides the externally input total clock and control signal and performs combination logic to control the working timing and working mode of each module inside the high dynamic range optical digital converter; the DC offset module and the background light offset module are at the signal input end of the high dynamic range optical digital converter, remove the DC component and the background light component in the photocurrent signal, and cooperate with the analog-to-digital converter module to perform analog-to-digital conversion on the AC component in the photocurrent signal. The input photocurrent signal is converted into a digital signal with high integration, low power consumption and high dynamic range. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 is a schematic structural diagram of a high dynamic range optical-to-digital converter provided by an embodiment of the present application;

[0029] Figure 2This is a working timing diagram of a high dynamic range optical-to-digital converter provided by an embodiment of the present application;

[0030] Figure 3 This is a circuit design diagram of a DC / background light cancellation module in a high dynamic range light-to-digital converter provided in one embodiment of the present application;

[0031] Figure 4 It is a signal transmission schematic diagram of a second-order continuous-time Sigma-Delta ADC with a 1.5-bit quantizer in a high dynamic range optical-to-digital converter provided by an embodiment of the present application;

[0032] Figure 5 is an output dynamic performance diagram of ADC system modeling provided by an embodiment of the present application;

[0033] Figure 6 This is a circuit design diagram of a programmable integrating amplifier in a high dynamic range optical-to-digital converter provided by an embodiment of the present application;

[0034] Figure 7 This is a circuit design diagram of a 1.5-bit quantizer in a high dynamic range optical-to-digital converter provided by an embodiment of the present application;

[0035] Figure 8 This is a circuit design diagram of a current reference source module in a high dynamic range optical-to-digital converter provided by an embodiment of the present application;

[0036] Fig. 9 This is a circuit design diagram of an LED driver in a high dynamic range light-to-digital converter provided by an embodiment of the present application;

[0037] Fig.10 This is a circuit design diagram of a feedback analog-to-digital converter in a high dynamic range optical-to-digital converter provided in one embodiment of the present application. DETAILED DESCRIPTION

[0038] Many specific details are described in the following description to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present application, so the present application is not limited by the specific implementation disclosed below.

[0039] The terms used in one or more embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit one or more embodiments of the present application. The singular forms of "a", "said" and "the" used in one or more embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in one or more embodiments of the present application refers to and includes any or all possible combinations of one or more associated listed items.

[0040] It should be understood that, although the terms first, second, etc. may be used to describe various information in one or more embodiments of the present application, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of one or more embodiments of the present application, the first may also be referred to as the second, and similarly, the second may also be referred to as the first.

[0041] First, the terms involved in one or more embodiments of the present invention are explained.

[0042] Transimpedance amplifier: Transimpedance Amplifier is a circuit design used to convert an input current signal into a corresponding voltage output signal.

[0043] Anti-aliasing filter: An anti-aliasing filter is a low-pass filter that reduces the aliased frequency components to a negligible level in the output level.

[0044] In the present application, a high dynamic range optical digital converter is provided, which is described in detail in the following embodiments.

[0045] Figure 1 A schematic structural diagram of a high dynamic range optical-to-digital converter provided according to an embodiment of the present application is shown, which specifically includes an analog-to-digital converter module, a current reference source, a clock generation module, a DC compensation module, and a background light compensation module;

[0046] Wherein, the analog-to-digital converter module has different working modes to meet the requirements of high dynamic range of input signals, and in different working modes, the photocurrent signal received by the high dynamic range optical-to-digital converter is subjected to analog-to-digital conversion;

[0047] The current reference source converts the externally supplied power supply voltage into a reference current source available to each module inside the high dynamic range optical-to-digital converter;

[0048] The clock generation module performs frequency division and combination logic on the external input total clock and control signal to control the working timing and working mode of each module inside the high dynamic range optical to digital converter;

[0049] The DC cancellation module and the background light cancellation module are at the signal input end of the high dynamic range optical-to-digital converter to remove the DC component and the background light component in the photocurrent signal, so as to cooperate with the analog-to-digital converter module to perform analog-to-digital conversion on the AC component in the photocurrent signal.

[0050] Based on this, Figure 1 As shown in FIG. 1 , the DC background light cancellation module is the DC cancellation module and the background light cancellation module, and the second-order CIFB continuous time Sigma-Delta ADC with 1.5-bit quantization is the analog-to-digital converter module. Through the external input control signal, the working mode of the high dynamic range optical digital converter provided in this embodiment is controlled to expand the dynamic range of the input signal. The specific working timing is as follows Figure 2 A working timing diagram of a high dynamic range optical-to-digital converter is provided.

[0051] Furthermore, the programmable integrator amplifier and the programmable resistor and capacitor circuit, through preset programmable design and timing design, enable the analog-to-digital converter module to operate in a DC test mode state. After obtaining the digital signal associated with the DC component in the photocurrent signal, the programmable integrator amplifier, the programmable resistor and capacitor circuit and the related analog-to-digital converter module are enabled to operate in an AC test mode state. At the same time, the DC component and the background light component in the photocurrent signal are subtracted through the DC cancellation module and the background light cancellation module, and the AC component in the photocurrent signal is detected to obtain a digital signal corresponding to the target signal.

[0052] Specifically, in actual use scenarios, such as PPG monitoring in biomedical front-end sensing scenarios, the optical-to-digital converter system determines the paths of different test modes through programmable control to test different signals. For example, before testing the useful AC signal of the PPG signal, the system converts the DC / background light component of the received input signal into a corresponding digital signal, and offsets the DC component and background light component in the input signal through the feedback loop associated with the DC offset module. Then the programmable structure is biased in the small signal test mode, and the system tests the AC component in the signal after offsetting the DC component and the background light component to obtain the corresponding digital signal.

[0053] In summary, the high dynamic range optical-to-digital converter provided in this embodiment realizes high integration, low power consumption, and high dynamic range of converting input optical signals into digital signals through its circuit architecture and module circuit tube-level circuit design. It should be noted that the specific structures of the DC cancellation module and the background light cancellation module are as follows: Figure 3 A circuit design diagram of a DC / background light cancellation module in a high dynamic range light-to-digital converter is provided.

[0054] Furthermore, the analog-to-digital converter module adopts an incremental timing design and a second-order continuous-time CIFBSigma-Delta ADC structure;

[0055] Among them, the analog-to-digital converter module includes a two-stage integrator, a 1.5-bit quantizer and a 1.5-bit digital-to-analog conversion feedback circuit; the two-stage integrator contains a programmable integrating amplifier and a programmable resistor-capacitor circuit, and the working mode is adjusted by the control signal, and different working modes correspond to different signal paths; the 1.5-bit quantizer samples and quantizes the continuous signal output by the second-stage integrator in the two-stage integrator in time domain and amplitude; the 1.5-bit digital-to-analog conversion feedback circuit converts the digital signal output by the 1.5-bit quantizer into an analog signal, and feeds the analog signal back to the input end of the two-stage integrator. The input signal passes through the feedback path to achieve low-pass signal and high-pass noise within the sampling bandwidth in the frequency domain.

[0056] Among them, the incremental timing design ensures that the circuit only works during the conversion period and enters the sleep time during the non-conversion time, which reduces power consumption. It is also used in the high-precision, low-frequency, narrow-band signal detection range in biomedical, instrumentation, and measurement applications to meet the actual input signal frequency range. The inherent integration capacitor of the two-stage integrator it contains can eliminate the design of anti-aliasing filters and additional integrator modules, reducing system power consumption.

[0057] It should be noted that see Figure 1 The 1.5-bit digital-to-analog conversion feedback circuit includes a first-stage feedback digital-to-analog converter and a second-stage feedback digital-to-analog converter. This structure achieves the effect of low-pass signal and high-pass noise within the sampling bandwidth, that is, the effect of high signal-to-noise ratio in low-frequency bandwidth.

[0058] Therefore, if Figure 4 As shown in the signal transmission schematic diagram of a second-order continuous-time Sigma-Delta ADC with a 1.5-bit quantizer in a high dynamic range optical-to-digital converter, the analog signal is fed back to the input end of the two-stage integrator, and the input signal passes through the feedback path to achieve the effect of low-pass signal and high-pass noise within the sampling bandwidth in the frequency domain, that is, noise shaping, within the signal bandwidth, and obtain the performance requirements of high signal-to-noise ratio (resolution) within the target bandwidth.

[0059] In addition, regarding the process of determining the integrator order of the analog-to-digital converter module, since the effective number of bits is related to the quantizer bit number (N), the loop filter order (L) and the oversampling rate (OSR), it can be known that a two-stage integrator can meet the accuracy requirements of the circuit while ensuring that there will be no over-design problems. In addition, the PPG signal is a photocurrent signal, and the CIFF feedforward structure cannot be used, so the CIFB feedback structure is used. For the second-order CIFB structure, the clock frequency can be set to the Mhz level.

[0060] According to Matlab modeling and actual measurement, comparing 1-bit quantization and 1.5-bit quantization, such as Figure 5 As shown in the output dynamic performance diagram of the ADC system modeling provided by an embodiment of the present application, 1.5-bit can achieve lower in-band noise and higher resolution. Therefore, the 1.5-bit quantizer can ensure system performance while leaving a certain design margin for the actual tube-level circuit construction in the later stage of the system. Figure 6 As shown in the circuit design diagram of a programmable integrator amplifier in a high dynamic range optical-to-digital converter, since the programmable resistor and capacitor circuit adopts a programmable structure, the value of the resistor and capacitor array can be selected by a control signal to achieve the signal dynamic range requirements of signal acquisition.

[0061] Furthermore, the programmable integrator amplifier comprises a two-stage folded cascode input stage and a push-pull output stage.

[0062] Among them, the programmable integrating amplifier can adopt a push-pull output stage structure, which adopts a programmable design, a two-stage folded cascode ensures that the amplifier has a sufficiently large gain requirement, and a push-pull output stage ensures that the amplifier has sufficient driving capability for the integrating capacitor.

[0063] Based on this, since the high dynamic range optical-to-digital converter has a large integral capacitor and the speed requirement of the amplifier is mainly determined by the slew rate rather than the gain-bandwidth product, a push-pull output stage is used to increase the driving capability of the output stage.

[0064] Furthermore, the 1.5-bit quantizer adopts a Strong-RAM dynamic comparator as a basic structure.

[0065] Among them, Figure 7As shown in the circuit design diagram of a 1.5-bit quantizer in a high dynamic range optical-to-digital converter provided, the 1.5-bit quantizer uses a Strong-RAM dynamic comparator as the basic structure of the comparator to achieve sampling and quantization of continuous signals in the time domain and amplitude, and the structure has low noise and power consumption to meet the design requirements of high signal-to-noise ratio and low power consumption. In addition, it also has the characteristics of zero static power consumption, rail-to-rail output, and low input reference offset.

[0066] Furthermore, the current reference source adopts a subthreshold constant transconductance reference source circuit structure to convert an externally supplied power supply voltage into the reference current source required by each module inside the high dynamic range optical-to-digital converter.

[0067] Among them, Figure 8 As shown in the circuit design diagram of a current reference source module in a high dynamic range optical-to-digital converter, a subthreshold constant transconductance reference source circuit is used to convert an externally supplied power supply voltage into a lower reference current source, thereby achieving the design requirement of low power consumption.

[0068] Furthermore, the high dynamic range light-to-digital converter is connected to an LED driver, and the output current range of the LED driver is 1-128 mA.

[0069] Among them, Fig. 9 As shown in the circuit design diagram of an LED driver in a high dynamic range light-to-digital converter, the LED driver sends a light source of a specific wavelength to illuminate the skin tissue of the person being tested to meet the subsequent reception of photocurrent signals. By combining the LED driver with the high dynamic range light-to-digital converter, the system integration is increased.

[0070] Furthermore, the 1.5-bit feedback digital-to-analog converter adopts a current-steering digital-to-analog conversion circuit structure, and the 1.5-bit feedback digital-to-analog converter is synchronously programmable.

[0071] Specifically, the closed-loop transfer function of the 1.5-bit feedback DAC is related to the characteristics of the 1.5-bit feedback DAC. In CT-ΔΣM, the resolution achieved by the system is seriously affected by the noise and linearity of the 1.5-bit feedback DAC. In order to avoid increasing the complexity of the timing design and the reference voltage design, the complementary current-steering DAC structure is used to output better linearity to achieve the design requirements of high signal-to-noise ratio within the target bandwidth. Compared with the 1-bit complementary current-steering DAC, the control timing is adjusted, and compared with the traditional setting of two 1-bit complementary current-steering DACs, the power consumption and area are reduced.

[0072] Based on this, the circuit structure of the 1.5-bit feedback digital-to-analog converter is as follows: Fig.10As shown in the circuit design diagram of a feedback analog-to-digital converter in a high dynamic range optical-to-digital converter, the current steering DAC controls the output of the current source by a pair of differential switch tubes. Compared with a single switch controlling the output of the current source, the normally open current source makes the voltage fluctuation of the current source drain terminal smaller, and the differential structure inherently generates a pair of differential currents. The 1.5-bit feedback digital-to-analog converter controls the output of the current source by a pair of differential switch tubes. Compared with a single switch controlling the output of the current source, the normally open current source makes the voltage fluctuation of the current source drain terminal smaller, and the differential structure inherently generates a pair of differential currents. Since the analog-to-digital converter module adopts programmable processing, the 1.5-bit feedback digital-to-analog converter can be synchronously programmable.

[0073] Furthermore, the analog-to-digital converter module, current reference source, clock generation module, DC offset module, background light offset module, and LED driver of the high dynamic range optical-to-digital converter are all integrated on the high dynamic range optical-to-digital conversion chip. Compared with the analog-to-digital conversion of traditional photoelectric signals, it does not require the participation of transimpedance amplifiers and anti-aliasing filters, has a compact area, and has lower power consumption.

[0074] The above describes specific embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0075] It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described action sequence, because according to the present application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0076] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0077] The preferred embodiments of the present application disclosed above are only used to help explain the present application. The optional embodiments do not describe all the details in detail, nor do they limit the invention to the specific implementation methods described. Obviously, many modifications and changes can be made according to the content of the present application. The present application selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can understand and use the present application well. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. A high dynamic range optical digital converter, characterized in that: It includes an analog-to-digital converter module, a current reference source, a clock generation module, a DC offset module and a background light offset module; Wherein, the analog-to-digital converter module has different working modes to meet the requirements of high dynamic range of input signals, and in different working modes, the photocurrent signal received by the high dynamic range optical-to-digital converter is subjected to analog-to-digital conversion; The current reference source converts the externally supplied power supply voltage into a reference current source available to each module inside the high dynamic range optical-to-digital converter; The clock generation module performs frequency division and combination logic on the external input total clock and control signal to control the working timing and working mode of each module inside the high dynamic range optical to digital converter; The DC cancellation module and the background light cancellation module are at the signal input end of the high dynamic range optical-to-digital converter to remove the DC component and the background light component in the photocurrent signal, so as to cooperate with the analog-to-digital converter module to perform analog-to-digital conversion on the AC component in the photocurrent signal.

2. The high dynamic range optical digital converter according to claim 1, characterized in that: The analog-to-digital converter module adopts an incremental timing design and a second-order continuous-time CIFB Sigma-Delta ADC structure; Wherein, the analog-to-digital converter module includes a two-stage integrator, a 1.5-bit quantizer and a 1.5-bit digital-to-analog conversion feedback circuit; The two-stage integrator includes a programmable integrating amplifier and a programmable resistor and capacitor circuit, and the working mode is adjusted by the control signal, and different working modes correspond to different signal paths; The 1.5-bit quantizer performs sampling and quantization in the time domain and amplitude on the continuous signal output by the second-stage integrator in the two-stage integrator; The 1.5-bit digital-to-analog conversion feedback circuit converts the digital signal output by the 1.5-bit quantizer into an analog signal, and feeds the analog signal back to the input end of the two-stage integrator. The input signal passes through the feedback path to achieve signal low-pass and noise high-pass within the sampling bandwidth in the frequency domain.

3. The high dynamic range optical digital converter according to claim 2, characterized in that: The programmable integrator amplifier comprises a two-stage folded cascode input stage and a push-pull output stage, and the push-pull output stage is programmably designed.

4. The high dynamic range optical digital converter according to claim 2, characterized in that: The 1.5-bit quantizer adopts a Strong-RAM dynamic comparator as a basic structure.

5. The high dynamic range optical to digital converter according to claim 2, characterized in that: The programmable integrator amplifier and the programmable resistor and capacitor circuit, through preset programmable design and timing design, enable the analog-to-digital converter module to operate in a DC test mode state. After obtaining a digital signal associated with a DC component in a photocurrent signal, the programmable integrator amplifier, the programmable resistor and capacitor circuit and the related analog-to-digital converter module operate in an AC test mode state. At the same time, the DC component in the photocurrent signal is subtracted through the DC cancellation module and the background light cancellation module, and the AC component in the photocurrent signal is detected to obtain a digital signal corresponding to the target signal.

6. The high dynamic range optical to digital converter according to claim 1, characterized in that: The current reference source adopts a subthreshold constant transconductance reference source circuit structure to convert an externally supplied power supply voltage into the reference current source required by each module inside the high dynamic range optical-to-digital converter.

7. The high dynamic range optical to digital converter according to claim 1, characterized in that: The high dynamic range light-to-digital converter is connected to an LED driver, and the output current range of the LED driver is 1-128 mA.

8. The high dynamic range optical to digital converter according to claim 1, wherein: The 1.5-bit feedback digital-to-analog converter adopts a current-steering digital-to-analog conversion circuit structure, and the 1.5-bit feedback digital-to-analog converter is synchronously programmable.

9. The high dynamic range optical to digital converter according to claims 1-8, characterized in that: The analog-to-digital converter module, the current reference source, the clock generation module, the direct current offset module, the background light offset module and the LED driver are all integrated into a high dynamic range light-to-digital conversion chip.

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