RF Switch Chip Structure

Abstract

The present invention relates to the field of wireless communication technologies, and provides a radio frequency switch chip structure. The radio frequency switch chip structure includes a substrate, a coupler region, an antenna switch region, a grounding region, and an analog and digital control region that are sequentially disposed on the substrate; the antenna switch region includes a series switch group, a parallel switch group, and a metal layer; a control end of the series switch group is used to be connected to the antenna end, an output end of the series switch group is connected to an output end of the parallel switch group, and a control end of the parallel switch group is grounded; the metal layer is respectively disposed on a side of the series switch group and the parallel switch group away from the substrate, and the metal layer is respectively connected to the series switch group and the parallel switch group. The radio frequency switch chip structure of the present invention can reduce the influence of analog signals on the harmonics of the radio frequency switch.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technologies, and particularly to a radio frequency switch chip structure. Background Art

[0002] In the field of wireless communication, radio frequency switches are one of the most important components in 4G and 5G communications. They are responsible for switching between different transmit and receive links, and the most concerned metrics include insertion loss (IL), isolation (ISO), and harmonics, etc. Especially in the radio frequency front-end module (L-PAMID module), they are responsible for controlling the signal transmission path to ensure that the signal flows to the correct circuit part as required. The antenna switch in the L-PAMID module requires a high harmonic suppression ability, especially in the case of mismatch, when the voltage standing wave ratio VSWR is 5:1 or 6:1, to ensure that no excessive harmonic components are generated when transmitting signals.

[0003] Many existing methods for suppressing harmonics in radio frequency switches are carried out from the design parameters of the switch itself, such as the width of the switch transistor, the gate length, and the number of transistor stacks (stack), etc. However, in the actual application process, the analog control signal has a certain impact on the radio frequency signal. When the radio frequency signal passes through the switch, due to the on (+2.6V) and off (-2.6V) actions of the switch, the transient change of the voltage will cause the analog control signal to fluctuate at a certain frequency, generating certain harmonic components. However, these harmonic components may interfere with the radio frequency signal passing through the switch, resulting in the deterioration of the harmonics of the signal passing through the switch and poor performance of the radio frequency switch. Summary of the Invention

[0004] Aiming at the above deficiencies of the prior art, the present invention proposes a radio frequency switch chip structure to solve the problem of signal harmonic deterioration of the existing radio frequency switch chip structure.

[0005] To solve the above technical problems, the present invention adopts the following technical solutions:

[0006] An embodiment of the present invention provides a radio frequency switch chip structure, which includes a substrate, a coupler region, an antenna switch region, a ground region, and an analog and digital control region sequentially arranged on the substrate; the input end of the coupler region is used to connect to the antenna end, the output end of the coupler region is connected to the input end of the antenna switch region, and the output end of the antenna switch region is connected to the analog and digital control region; the ground region is respectively connected to the antenna switch region and the analog and digital control region to separate the antenna switch region from the analog and digital control region;

[0007] The antenna switch region includes a series switch group, a parallel switch group, and a metal layer; a control end of the series switch group is used to connect to the antenna end, an output end of the series switch group is connected to an output end of the parallel switch group, and a control end of the parallel switch group is grounded; the metal layer is respectively disposed on a side of the series switch group and the parallel switch group away from the substrate, and the metal layer is respectively connected to the series switch group and the parallel switch group;

[0008] The radio frequency switch chip structure further includes a first annular metal structure and a first resistor; a first opening is provided on a side surface of the antenna switch region, and the first opening is used to separate the antenna switch region from the analog and digital control region; the first annular metal structure is located in the first opening, and the analog and digital control region is connected to the ground region after being connected in series with the first resistor.

[0009] Preferably, the radio frequency switch chip structure further includes a second annular metal structure and a second resistor; a second opening is further provided on the side surface of the antenna switch region, a projection of the second opening along the width direction of the ground region onto the ground region partially falls within the range of the ground region, and the second opening is used to separate the antenna switch region from the analog and digital control region; the second annular metal structure is located in the second opening, and the analog and digital control region is connected to the ground region after being connected in series with the second resistor.

[0010] Preferably, the series switch group includes n first transistors, a third resistor, and a fourth resistor; gates of each of the first transistors are respectively connected to a first end of the third resistor, and a second end of the third resistor is used to receive an external first control signal; substrates of each of the first transistors are respectively connected to a first end of the fourth resistor, and a second end of the fourth resistor is used to receive an external second control signal; in two adjacent first transistors, a drain of the latter first transistor is connected to a source of the former first transistor; in the series switch group, a drain of the first first transistor is used as a control end of the series switch group, and a source of the nth first transistor is used as an output end of the series switch group;

[0011] The parallel switch group includes n second transistors, a fifth resistor, and a sixth resistor; the gates of each of the second transistors are respectively connected to the first end of the fifth resistor, and the second end of the fifth resistor is used to receive the first control signal; the substrates of each of the second transistors are respectively connected to the first end of the sixth resistor, and the second end of the sixth resistor is used to receive the second control signal; among two adjacent second transistors, the source of the latter second transistor is connected to the drain of the former second transistor; in the parallel switch group, the source of the first second transistor serves as the control end of the parallel switch group, and the drain of the nth second transistor serves as the output end of the parallel switch group;

[0012] where n is a positive integer greater than or equal to 2.

[0013] Preferably, the resistance value of the first resistor is 10 - 30 kohm.

[0014] Preferably, the resistance value of the second resistor is 10 - 30 kohm.

[0015] Preferably, the radio frequency switch chip structure further includes an isolation switch, which is disposed in the analog and digital control region and is used to disconnect the first annular metal structure in the analog and digital control region.

[0016] Preferably, the radio frequency switch chip structure further includes a control line, the first end of the control line is respectively connected to the series switch group and the parallel switch group, and is used to control the conduction and disconnection of the series switch group and the parallel switch group; the second end of the control line passes through the grounding region and is connected to the analog and digital control region.

[0017] Preferably, the radio frequency switch chip structure further includes two switch control lines, the first ends of the switch control lines are respectively connected to the series switch group and the parallel switch group, and the second ends of the switch control lines pass through the grounding region and are connected to the analog and digital control region.

[0018] Compared with the related art, in the embodiments of the present invention, the input end of the coupler area is used to connect to the antenna end, the output end of the coupler area is connected to the input end of the antenna switch area, and the output end of the antenna switch area is connected to the analog and digital control area; the grounding area is respectively connected to the antenna switch area and the analog and digital control area to separate the antenna switch area from the analog and digital control area; the control end of the series switch group in the antenna switch area is used to connect to the antenna end, the output end of the series switch group is connected to the output end of the parallel switch group, and the control end of the parallel switch group is grounded; the metal layer is respectively disposed on the side of the series switch group and the parallel switch group away from the substrate, and the metal layer is respectively connected to the series switch group and the parallel switch group. Through the corresponding layout of the metal layer, the influence of the analog signal on the harmonics of the RF switch is reduced; a first opening is provided on the side of the antenna switch area, and the first opening is used to separate the antenna switch area from the analog and digital control area; a first annular metal structure is located in the first opening, and the analog and digital control area is connected to the grounding area after being connected in series with a first resistor; the antenna switch area is disconnected from the analog and digital control area through the grounding area, and the first opening position is sealed by the first annular metal structure to prevent moisture from invading from the side disconnection; at the same time, by connecting the first resistor to make the analog and digital control area perform analog grounding, the signals of the analog and digital control area and the antenna switch area are prevented from interfering with each other, thereby reducing the influence of the analog signal on the harmonics of the RF switch and also avoiding external interference of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present invention will be described in detail below with reference to the drawings. Through the detailed description in conjunction with the following drawings, the above or other aspects of the present invention will become clearer and easier to understand. In the drawings:

[0020] Figure 1 is a module diagram of the RF switch chip structure provided by the embodiment of the present invention;

[0021] Figure 2 is a top view of the RF switch chip structure provided by the embodiment of the present invention;

[0022] Figure 3 is a specific switch circuit diagram of the antenna switch area of the RF switch chip structure provided by the second embodiment of the present invention.

[0023] Among them, 100 is a radio frequency switch chip structure, 1 is a substrate, 2 is a coupler area, 3 is an antenna switch area, 31 is a series switch group, 32 is a parallel switch group, 4 is a grounding area, 5 is an analog and digital control area, 6 is a first annular metal structure, 7 is a second annular metal structure, 8 is a first opening, 9 is a second opening, 10 is an isolation switch, 11 is a switch control line, 12 is a first control signal, 13 is a second control signal, 14 is a control line, and 15 is a metal layer. Detailed implementation manners

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs; the terms used in the description of this application in the specification are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above drawings are intended to cover non-exclusive inclusion. The terms "first", "second", etc. in the specification and claims of this application or the above drawings are used to distinguish different objects and not to describe a specific order.

[0025] As used herein, the mention of "embodiments" means that the specific features, structures or characteristics described in connection with the embodiments can be included in at least one embodiment of this application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0026] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0027] Please refer to Figures 1 - 3As shown in the figure, an embodiment of the present invention provides a radio frequency switch chip structure 100. The radio frequency switch chip structure 100 includes a substrate 1, a coupler region 2, an antenna switch region 3, a ground region 4, and an analog and digital control region 5 that are sequentially arranged on the substrate 1. The input end of the coupler region 2 is used to connect to an antenna end, the output end of the coupler region 2 is connected to the input end of the antenna switch region 3, and the output end of the antenna switch region 3 is connected to the analog and digital control region 5. The ground region 4 is respectively connected to the antenna switch region 3 and the analog and digital control region 5, and is used to separate the antenna switch region 3 from the analog and digital control region 5.

[0028] The antenna switch region 3 includes a series switch group 31, a parallel switch group 32, and a metal layer 15. The control end of the series switch group 31 is used to connect to the antenna end, the output end of the series switch group 31 is connected to the output end of the parallel switch group 32, and the control end of the parallel switch group 32 is grounded. The metal layer 15 is respectively arranged on the sides of the series switch group 31 and the parallel switch group 32 away from the substrate, and the metal layer 15 is respectively connected to the series switch group 31 and the parallel switch group 32. Through the corresponding layout of the metal layer 15, the influence of analog signals on the harmonics of the radio frequency switch is reduced.

[0029] Among them, the metal layer 15 is an aluminum material layer, generally an aluminum PAD (die).

[0030] The radio frequency switch chip structure 100 further includes a first annular metal structure 6 and a first resistor R1. A first opening 8 is provided on the side of the antenna switch region 3, and the first opening 8 is used to separate the antenna switch region 3 from the analog and digital control region 5. The first annular metal structure 6 is located in the first opening 8, and the analog and digital control region 5 is connected to the ground region 4 after being connected in series with the first resistor R1. By disconnecting the antenna switch region 3 from the analog and digital control region 5 through the ground region 4 and using the first annular metal structure 6 to seal the position of the first opening 8, moisture intrusion from the side disconnection can be prevented. At the same time, by connecting the first resistor R1, the analog and digital control region 5 is grounded analogously, avoiding the signal crosstalk between the analog and digital control region 5 and the signal of the antenna switch region 3, thereby reducing the influence of analog signals on the harmonics of the radio frequency switch and also avoiding external interference to the chip.

[0031] In this embodiment, the RF switch chip structure 100 further includes a second annular metal structure 7 and a second resistor R2. A second opening 9 is further provided on the side of the antenna switch region 3, and the projection of the second opening 9 along the width direction of the grounding region 4 onto the grounding region 4 partially falls within the range of the grounding region 4. The second opening 9 is used to separate the antenna switch region 3 from the analog and digital control region 5. The second annular metal structure 7 is located within the second opening 9, and the analog and digital control region 5 is connected to the grounding region 4 after being connected in series with the second resistor R2. By disconnecting the antenna switch region 3 from the second annular metal structure 7, the second resistor R2 is connected to the grounding region 4 to achieve the grounding function, avoiding crosstalk between the signals of the analog and digital control region 5 and the signals of the antenna switch region 3, thus affecting the harmonics of the RF switch, and also avoiding external interference to the chip, and preventing moisture from invading from the side break.

[0032] Optionally, the first annular metal structure 6 and the second annular metal structure 7 can also be a sealing ring structure, etc., which can prevent moisture from invading from the side break and has good reliability.

[0033] In this embodiment, the series switch group 31 includes n first transistors M, a third resistor R3, and a fourth resistor R4. The gate of each first transistor M is respectively connected to the first end of the third resistor R3, and the second end of the third resistor R3 is used to receive a first control signal 12. The substrate of each first transistor M is respectively connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is used to receive an external second control signal 13. Among adjacent two first transistors M, the drain of the latter first transistor M is connected to the source of the former first transistor M; in the series switch group 31, the drain of the first first transistor M1 serves as the control end of the series switch group 31, and the source of the nth first transistor Mn serves as the output end of the series switch group 31. By connecting the gates of multiple first transistors M to the third resistor R3 and then receiving the first control signal 12, the first control signal 12 is used to control the first transistor M to achieve switching. By connecting the substrates of each first transistor M to the fourth resistor R4 and then receiving the second control signal 13, generally ±2.6V is taken.

[0034] The parallel switch group 32 includes n second transistors Q, a fifth resistor R5, and a sixth resistor R6; the gates of each of the second transistors Q are respectively connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is used to receive the first control signal 12; the substrates of each of the second transistors Q are respectively connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is used to receive the second control signal 13; among two adjacent second transistors Q, the source of the latter second transistor Q is connected to the drain of the second transistor Q; in the parallel switch group 32, the source of the first second transistor Q1 serves as the control end of the parallel switch group 32, and the drain of the nth second transistor Qn serves as the output end of the parallel switch group 32; where n is a positive integer greater than or equal to 2. The gates of the second transistors Q of the parallel switch group 32 receive the first control signal 12 through the respective fifth resistors R5, and the substrates of each second transistor Q receive the second control signal 13 through the respective sixth resistors R6, generally taking ±2.6V. By controlling the transient change of the line voltage, that is, the transient change, so as to simulate that the control signal fluctuates at a certain frequency, certain harmonic components will be generated. Through this layout, on the conduction path from the receiving end to the antenna end, the control line 14 (the bottommost M1 layer) and the PAD metal of the receiving end (the topmost AL layer) do not cross and are relatively far apart. For all layouts, by analogy, it is possible to reduce the harmonic components that may interfere with the RF signal passing through the switch, and the control line 14 passes through the ground GND of the RF of the next unit, which can absorb a part of the harmonic components. Among them, the voltage on the switch control line 11 in the coupler area 2 has a small signal and a small transient change amplitude, and there are relatively few harmonic components.

[0035] In this embodiment, the resistance value of the first resistor R1 is 10 - 30 kohm (kiloohm). By connecting the first resistor R1 with a large resistance value to ground the analog and digital control area 5 for simulation, it is possible to avoid the signal of the analog and digital control area 5 from interfering with the signal of the antenna switch area 3, thereby reducing the influence of the analog signal on the harmonics of the RF switch and also avoiding external interference to the chip.

[0036] In this embodiment, the resistance value of the second resistor R2 is 10 - 30 kohm (kiloohm). By connecting the second resistor R2 with a large resistance value to ground the analog and digital control area 5 for simulation, it is possible to avoid the signal of the analog and digital control area 5 from interfering with the signal of the antenna switch area 3, thereby reducing the influence of the analog signal on the harmonics of the RF switch and also avoiding external interference to the chip.

[0037] In this embodiment, the radio frequency switch chip structure 100 further includes an isolation switch 10, which is disposed in the analog and digital control region 5 and is used to disconnect the first annular metal structure 6 in the analog and digital control region 5.

[0038] In this embodiment, the radio frequency switch chip structure 100 further includes a control line 14. The first ends of the control line 14 are respectively connected to the series switch group 31 and the parallel switch group 32 and are used to control the conduction and disconnection of the series switch group 31 and the parallel switch group 32. The second end of the control line 14 passes through the grounding region 4 and is connected to the analog and digital control region 5. Among them, the second end of the control line 14 passes through the lower layer of the grounding region 4 and is connected to the analog and digital control region 5.

[0039] In this embodiment, the radio frequency switch chip structure 100 further includes two switch control lines 11. The first ends of the switch control lines 11 are respectively connected to the series switch group 31 and the parallel switch group 32. The second ends of the switch control lines 11 pass through the grounding region 4 and are connected to the analog and digital control region 5. The voltage on the switch control line 11 in the coupler region 2 has a small signal, and the transient change amplitude is not large, and the harmonic components are relatively few. Among them, the second ends of the switch control lines 11 pass through the lower layer of the grounding region 4 and are connected to the analog and digital control region 5.

[0040] It should be noted that each of the embodiments described above with reference to the accompanying drawings is only used to illustrate the present invention and not to limit the scope of the present invention. Those of ordinary skill in the art should understand that any modification or equivalent replacement made to the present invention without departing from the spirit and scope of the present invention should be covered within the scope of the present invention. In addition, unless the context otherwise indicates, words in the singular form include the plural form, and vice versa. Additionally, unless otherwise specified, all or part of any embodiment can be used in combination with all or part of any other embodiment.

Claims

1. A radio frequency switch chip structure, characterized in that The radio frequency switch chip structure includes a substrate, a coupler region, an antenna switch region, a ground region, and an analog and digital control region that are sequentially arranged on the substrate; the input end of the coupler region is used to connect to the antenna end, the output end of the coupler region is connected to the input end of the antenna switch region, and the output end of the antenna switch region is connected to the analog and digital control region; the ground region is respectively connected to the antenna switch region and the analog and digital control region, and is used to separate the antenna switch region from the analog and digital control region; The antenna switch region includes a series switch group, a parallel switch group, and a metal layer; the control end of the series switch group is used to connect to the antenna end, the output end of the series switch group is connected to the output end of the parallel switch group, and the control end of the parallel switch group is grounded; the metal layer is respectively arranged on the side of the series switch group and the parallel switch group away from the substrate, and the metal layer is respectively connected to the series switch group and the parallel switch group; The radio frequency switch chip structure further includes a first annular metal structure and a first resistor; a first opening is provided on the side of the antenna switch region, and the first opening is used to separate the antenna switch region from the analog and digital control region; The first annular metal structure is located in the first opening, and the analog and digital control region is connected to the ground region after connecting the first resistor in series.

2. The RF switch chip structure according to claim 1, characterized in that, The radio frequency switch chip structure further includes a second annular metal structure and a second resistor; a second opening is further provided on the side of the antenna switch region, and a part of the projection of the second opening along the width direction of the ground region into the ground region falls within the range of the ground region, and the second opening is used to separate the antenna switch region from the analog and digital control region; The second annular metal structure is located in the second opening, and the analog and digital control region is connected to the ground region after connecting the second resistor in series.

3. The RF switch chip structure according to claim 1, characterized in that The series switch group includes n first transistors, a third resistor, and a fourth resistor; the gate of each first transistor is respectively connected to the first end of the third resistor, and the second end of the third resistor is used to receive an external first control signal; the substrate of each first transistor is respectively connected to the first end of the fourth resistor, and the second end of the fourth resistor is used to receive an external second control signal; among two adjacent first transistors, the drain of the latter first transistor is connected to the source of the former first transistor; in the series switch group, the drain of the first first transistor is used as the control end of the series switch group, and the source of the nth first transistor is used as the output end of the series switch group; The parallel switch group includes n second transistors, a fifth resistor, and a sixth resistor; the gates of each of the second transistors are respectively connected to the first end of the fifth resistor, and the second end of the fifth resistor is used to receive the first control signal; the substrates of each of the second transistors are respectively connected to the first end of the sixth resistor, and the second end of the sixth resistor is used to receive the second control signal; among two adjacent second transistors, the source of the latter second transistor is connected to the drain of the former second transistor; in the parallel switch group, the source of the first second transistor serves as the control end of the parallel switch group, and the drain of the nth second transistor serves as the output end of the parallel switch group; wherein, n is a positive integer greater than or equal to 2.

4. The radio frequency switch chip structure according to claim 1, wherein The resistance value of the first resistor is 10 - 30 kohm.

5. The RF switch chip structure according to claim 2, characterized in that, The resistance value of the second resistor is 10 - 30 kohm.

6. The radio frequency switch chip structure according to claim 1, characterized in that, The radio frequency switch chip structure further includes an isolation switch, and the isolation switch is arranged in the analog and digital control area for disconnecting the first annular metal structure in the analog and digital control area.

7. The radio frequency switch chip structure according to claim 1, characterized in that The radio frequency switch chip structure further includes a control line, the first end of the control line is respectively connected to the series switch group and the parallel switch group for controlling the conduction and disconnection of the series switch group and the parallel switch group; the second end of the control line passes through the grounding area and is connected to the analog and digital control area.

8. The radio frequency switch chip structure according to claim 1, wherein The radio frequency switch chip structure further includes two switch control lines, the first ends of the switch control lines are respectively connected to the series switch group and the parallel switch group, and the second ends of the switch control lines pass through the grounding area and are connected to the analog and digital control area.

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