Planar infrared detector and preparation method thereof

Abstract

The invention discloses a planar infrared detector and a preparation method thereof, and the infrared detector comprises a substrate, and a buffer layer, an N-type doped contact layer, a superlattice absorption layer and an intrinsic contact layer which are sequentially grown on the substrate, thereby forming a laminated structure. The semiconductor device further comprises a first electrode and a second electrode, the first electrode is located in a diffusion area formed on the intrinsic contact layer, and the second electrode is located in a concave area formed on the N-type doped contact layer. According to the invention, P-type diffusion is carried out in the intrinsic contact layer to form the photoelectric response channel, so that the planar PN junction is formed, the side wall leakage current of the detector can be eliminated, and the photon injection efficiency is improved. In addition, compared with a traditional table-board type detector, a passivation treatment process is reduced, the production cost is effectively reduced, and the product yield is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor application, and in particular relates to a planar infrared detector and a preparation method thereof. Background Art

[0002] Infrared detectors have important and extensive applications in space communications, medical diagnosis and treatment, industrial detection, aerospace, etc. Antimonide superlattice materials based on III-V semiconductors have the advantages of wide-band precise adjustment, high quantum efficiency, good uniformity over a large area, high operating temperature, and low preparation cost. They can simultaneously meet the requirements of the third-generation infrared detectors for high detection rate, large array, multi-band, low power consumption, and low cost.

[0003] At present, the research and production of antimonide superlattice detectors all use a table structure, that is, the semiconductor material outside the working area is removed by etching to achieve electrical isolation between devices. However, after etching, the continuity of the semiconductor crystal is broken, resulting in surface states and inversion layers on the side walls of the device, which causes conductive channels to appear on the side wall surface and generates surface leakage current. Although various means have been adopted to passivate the detector surface, such as depositing SiO2, polyimide, photoresist and other dielectric materials, the effect is still limited. Therefore, the preparation process of antimonide superlattice infrared detectors needs to be improved. Summary of the invention

[0004] Purpose of the invention: In order to solve the problems existing in the prior art, the present invention provides a planar infrared detector and a method for preparing the same, which can eliminate the sidewall leakage current of the infrared detector, improve the photon injection efficiency of the detector, and greatly reduce the complexity and cost of the detector preparation process.

[0005] Invention content: To achieve the above-mentioned object, the present invention provides a method for preparing a planar infrared detector, comprising the following steps:

[0006] S1, sequentially growing a buffer layer, an N-type doped contact layer, a superlattice absorption layer and an intrinsic contact layer on a substrate to form a stacked structure, thereby obtaining a first device;

[0007] S2, preparing a diffusion selection layer on the surface of the first device away from the substrate, and then etching to form a diffusion window on the diffusion selection layer to obtain a second device;

[0008] S3, growing a diffusion layer at the diffusion window on the second device, and growing a diffusion protection layer on the diffusion layer to obtain a third device;

[0009] S4, performing a rapid annealing process on the third device, then removing the diffusion protection layer, the diffusion layer and the diffusion selection layer, forming a P-type diffusion region on the intrinsic contact layer, and obtaining a fourth device;

[0010] S5, etching the surface of the fourth device away from the substrate to form a recessed area on the N-type doped contact layer to obtain a fifth device with the N-type doped contact layer exposed;

[0011] S6. Prepare a first electrode and a second electrode on a surface of the fifth device away from the substrate to obtain an infrared detector, wherein the first electrode is located in a recessed region on the N-type doped contact layer, and the second electrode is located in a diffusion region on the intrinsic contact layer.

[0012] Specifically, the rapid annealing treatment includes: placing the third device in a rapid annealing furnace and introducing nitrogen gas to anneal the third device at a temperature of 300 to 500° C. for 10 to 30 minutes.

[0013] Specifically, the stacked structure can be prepared by molecular beam epitaxy; the diffusion selection layer, the diffusion layer and the diffusion protection layer can be prepared by plasma enhanced chemical vapor deposition, vacuum evaporation or magnetron sputtering.

[0014] Specifically, in step S5, the fourth device is etched using inductively coupled plasma, and the recessed area is etched to half the thickness of the N-type doped contact layer.

[0015] Specifically, the step S5 further includes: preparing a mesa mask on the surface of the fourth device away from the substrate before etching, and removing the mesa mask on the surface of the fifth device after etching to achieve mesa protection.

[0016] In addition, the present invention also provides a planar infrared detector, which is prepared by the above-mentioned preparation method, and includes a substrate and a buffer layer, an N-type doped contact layer, a superlattice absorption layer and an intrinsic contact layer grown in sequence on the substrate, thereby forming a stacked structure; it also includes a first electrode and a second electrode, the first electrode is located in a diffusion region formed on the intrinsic contact layer, and the second electrode is located in a recessed region formed on the N-type doped contact layer.

[0017] Specifically, the stacked structure also includes an M-type barrier layer between the N-type doped contact layer and the superlattice absorption layer, so that the intrinsic contact layer, the superlattice absorption layer, the M-type barrier layer, and the N-type doped contact layer together form a P-π-MN structure through P-type diffusion.

[0018] Specifically, the substrate is an N-type GaSb substrate, and the buffer layer is made of N-type doped GaSb material with a thickness of 300-1000 nm.

[0019] Specifically, the N-type doped contact layer is an N-type doped superlattice layer with a thickness of 250 to 600 nm; the superlattice absorption layer is a P-type doped superlattice layer with a thickness of 1.5 to 3.5 μm; and the intrinsic contact layer is an undoped superlattice layer with a thickness of 10 to 100 nm.

[0020] Specifically, the materials of the diffusion selection layer and the diffusion protection layer include SiO2, Si x N y , SiON, Al2O3 or a combination thereof, and the thickness is 100nm to 3μm; the material of the diffusion layer includes ZnO x , ZnS or a combination of several thereof, and the thickness is 100nm~3μm.

[0021] Beneficial effects:

[0022] The present invention performs diffusion by opening holes in the diffusion selection layer to expose the intrinsic contact layer, so that the unexposed area is protected by the diffusion selection layer and does not diffuse, thereby forming an electrical isolation area, so there is no need to etch the mesa structure to achieve electrical isolation. At the same time, the present invention forms a recessed area on the N-type doped contact layer through an etching process, thereby exposing the lower electrode, so that the conductive path from the upper electrode to the lower electrode does not pass through the side wall, so no side wall leakage current is generated.

[0023] The present invention adopts a diffusion layer and a diffusion protection layer as a diffusion source. On the one hand, the diffusion depth of the diffusion layer can be adjusted by the diffusion temperature, which is beneficial to controlling the diffusion effect and improving the photon injection efficiency; on the other hand, the diffusion protection layer can reduce the volatilization of the diffusion layer during the thermal diffusion process, play a protective role, further ensure the diffusion effect, and reduce pollution.

[0024] In summary, the present invention forms a photoelectric response channel by performing P-type diffusion in the intrinsic contact layer, thereby forming a planar PN junction, which can eliminate the sidewall leakage current of the detector and improve the photon injection efficiency. In addition, compared with the traditional table-type detector, the present invention reduces the passivation process, effectively reduces the production cost, and improves the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Schematic diagram of the process of preparing an infrared detector in an embodiment of the present invention, wherein (a) to (f) are schematic diagrams of the structures of the first to fifth devices and the infrared detector, respectively;

[0026] Figure 2 is a cross-sectional schematic diagram of an infrared detector according to an embodiment of the present invention;

[0027] Figure 3 Schematic diagram of the composition of an infrared detector in an embodiment of the present invention;

[0028] Figure 4 is a plan view schematic diagram of an infrared detector according to an embodiment of the present invention;

[0029] Figure 5It is a graph showing the variation of Zn ion diffusion depth at different diffusion temperatures in an embodiment of the present invention;

[0030] Figure 6 This is a graph showing changes in the detection rate of infrared light of different bands of the infrared detector in an embodiment of the present invention;

[0031] The figure includes: 1-substrate, 2-buffer layer, 3-N-type doped contact layer, 4-M-type barrier layer, 5-superlattice absorption layer, 6-intrinsic contact layer, 7-first electrode, 8-second electrode, 9-diffusion selection layer, 10-diffusion layer, 11-diffusion protection layer, 12-diffusion region. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0033] Reference Figure 1 This embodiment provides a method for preparing a planar infrared detector, comprising the following steps:

[0034] S1, sequentially growing a buffer layer 2, an N-type doped contact layer 3, an M-type barrier layer 4, a superlattice absorption layer 5 and an intrinsic contact layer 6 on a substrate 1, thereby forming a stacked structure to obtain a first device;

[0035] S2, preparing a diffusion selection layer 9 on a surface of the first device away from the substrate 1, and then etching the diffusion selection layer 9 to form a diffusion window, thereby obtaining a second device;

[0036] S3, growing a diffusion layer 10 at the diffusion window on the second device, and growing a diffusion protection layer 11 on the diffusion layer 10, to obtain a third device;

[0037] S4, performing a rapid annealing process on the third device, then removing the diffusion protection layer 11, the diffusion layer 10 and the diffusion selection layer 9, forming a P-type diffusion region 12 on the intrinsic contact layer 6, and obtaining a fourth device;

[0038] S5, etching is performed on the surface of the fourth device away from the substrate 1 to form a recessed area on the N-type doped contact layer 3, thereby obtaining a fifth device with the N-type doped contact layer 3 exposed;

[0039] S6. Prepare a first electrode 7 and a second electrode 8 on the surface of the fifth device away from the substrate 1 to obtain an infrared detector, wherein the first electrode 7 is located in the recessed area on the N-type doped contact layer 3, and the second electrode 8 is located in the diffusion area 12 on the intrinsic contact layer 6.

[0040] Specifically, the rapid annealing treatment includes: placing the third device in a rapid annealing furnace and introducing nitrogen gas to anneal the third device at a temperature of 300 to 500° C. for 10 to 30 minutes.

[0041] Specifically, the stacked structure can be prepared by molecular beam epitaxy, and the diffusion selection layer 9, the diffusion layer 10 and the diffusion protection layer 11 can be prepared by plasma enhanced chemical vapor deposition.

[0042] Specifically, in step S5, the fourth device is etched using inductively coupled plasma, and the recessed area is deep into half the thickness of the N-type doped contact layer 3. It should be noted that in order to avoid interference with the diffusion region 12, it is necessary to etch at a position on the surface of the fourth device away from the diffusion region 12. At the same time, before etching, a mesa mask is prepared on the surface of the fourth device away from the substrate 1, and the mesa mask on the surface of the fifth device is removed after etching to further achieve mesa protection.

[0043] Specifically, in step S6, an electrode mask is first prepared on the surface of the fifth device away from the substrate, and electrode windows are etched on the electrode mask, including a first electrode window located in the recessed area and a second electrode window located at the top of the diffusion area 12, and then a first electrode 7 and a second electrode 8 are respectively prepared on the first electrode window and the second electrode window to obtain an infrared detector.

[0044] In addition, this embodiment also provides a planar infrared detector, which is prepared by the above preparation method. Figure 2 The detector includes a substrate 1 and a buffer layer 2, an N-type doped contact layer 3, an M-type barrier layer 4, a superlattice absorption layer 5 and an intrinsic contact layer 6 grown in sequence on the substrate 1, thereby forming a stacked structure; it also includes a first electrode 7 and a second electrode 8, the first electrode 7 is located in a diffusion region 12 formed on the intrinsic contact layer 6, and the second electrode 8 is located in a recessed region formed on the N-type doped contact layer 3.

[0045] Specifically, infrared light enters from the diffusion region 12 at the top of the detector, is absorbed by the superlattice absorption layer 5 to generate photogenerated carriers. Under the action of an external electric field, the electrons in the photogenerated carriers move toward the intrinsic contact layer 6 and are output through the second electrode 8, and the holes in the photogenerated carriers move toward the N-type doped contact layer 3 and are output through the first electrode 7, thereby forming a conductive channel, and detecting the infrared light is achieved by detecting the output current of the infrared light detection.

[0046] Specifically, the substrate 1 is an N-type GaSb substrate, and the doping concentration is generally not less than 10 17 cm -3 ; The buffer layer 2 is made of N-type doped GaSb material, where Te element can be used for doping, and the doping concentration is generally not less than 1018 cm -3 The buffer layer 2 has a thickness of 300 to 1000 nm and is used to smooth the surface of the substrate 1 and reduce growth defects of subsequent structures.

[0047] Specifically, the intrinsic contact layer 6, the absorption layer 5, the M-type barrier layer 4, and the N-type doped contact layer 3 form a P-π-MN structure through the diffusion of P-type materials. The N-type doped contact layer 3 can be doped with Si elements, and the doping concentration is generally not less than 10 18 cm -3 , with a thickness of 250-600 nm. The N-type doped contact layer 3 is used to form an ohmic contact with the first electrode 7 (metal lower electrode). The M-type barrier layer 4 blocks the reverse movement of holes through the energy band design, thereby reducing the body dark current. The superlattice absorption layer 5 is a slightly P-type doped layer, and the carrier concentration under undoped conditions is 10 14 ~10 16 cm -3 The intrinsic contact layer 6 is an undoped layer with a thickness of 10 to 100 nm, which is used to diffuse and form a conductive channel and form an ohmic contact with the second electrode 8 (metal upper electrode).

[0048] Specifically, the material of the superlattice absorption layer 5 includes one of short-wave infrared material, medium-wave infrared material, long-wave infrared material or very long-wave infrared material, so as to realize the detection of infrared light in different bands.

[0049] Specifically, the material of the diffusion selection layer 9 and the diffusion protection layer 11 can be one or a combination of SiO2, SixNy, SiON, and Al2O3 materials, and the thickness can be 100nm to 3μm; the material of the diffusion layer 10 can be one or a combination of ZnS and ZnOx materials, and the thickness can be 100nm to 3μm.

[0050] Specifically, the structures of the first electrode 7 and the second electrode 8 each include: a Ti layer, a Pt layer formed on the Ti layer, and an Au layer formed on the Pt layer, wherein the thickness of the Ti layer and the Pt layer is 50 nm, and the thickness of the Au layer is 300 nm. The Ti layer can form a good ohmic contact, Pt can prevent Au from diffusing into the Ti layer and the infrared detection material, and the Au layer can maintain good stability and bonding in the package. Preferably, the first electrode 7 and the second electrode 8 are both annular.

[0051] For example, refer to Figure 3The substrate 1 is an N-type GaSb substrate with a thickness of about 600 μm; the buffer layer 2 is made of N-type doped GaSb material with a thickness of 988 nm; the N-type doped contact layer 3 is an N-type doped 10InAs / 1GaSb / 5AlSb / 1GaSb superlattice layer with a thickness of 524 nm; the M-type barrier layer 4 is an M-type doped 10InAs / 1GaSb / 5AlSb / 1GaSb superlattice layer with a thickness of 524 nm; the superlattice absorption layer 5 is a P-type doped 9.25InAs / 7GaSb superlattice layer with a thickness of 2379 nm; the intrinsic contact layer 6 is an undoped 9.25InAs / 7GaSb superlattice layer with a thickness of 71 nm.

[0052] Reference Figure 4 A ring-shaped upper electrode is prepared in the diffusion region 12 on the top of the intrinsic contact layer 6, and the N-type doped contact layer 3 is exposed through the recessed region and then a metal is grown as a lower electrode.

[0053] Reference Figure 5 The SIMS (Secondary Ion Mass Spectrometry) test method can be used to obtain the change in Zn ion diffusion depth at different diffusion temperatures. The horizontal axis represents the depth (unit: nm) and the vertical axis represents the Zn ion concentration (unit: atoms / cm 2 ). It can be seen that, generally speaking, the higher the temperature, the deeper the diffusion depth of Zn ions. Therefore, the diffusion depth of the diffusion layer can be adjusted by the diffusion temperature, which is beneficial to control the diffusion effect and improve the photon injection efficiency.

[0054] Figure 6 The above embodiment shows the change of detection rate for infrared light of different wavelength bands. The horizontal axis represents the infrared light wavelength (unit: μm), and the vertical axis represents the detectability (unit: cm×Hz). 1 / 2 / W). In the field of infrared detectors, the detection rate is usually closely related to the key indicator of detectability (D), especially when describing the performance of infrared detectors. The larger the D value, the more sensitive the detector is, that is, it can detect smaller optical power signals under the same bandwidth and area conditions. It can be seen that this detector has good mid-wave infrared light detection capability at 77K.

[0055] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for preparing a planar infrared detector, characterized in that: The following steps are involved: S1, sequentially growing a buffer layer, an N-type doped contact layer, a superlattice absorption layer and an intrinsic contact layer on a substrate to form a stacked structure, thereby obtaining a first device; S2, preparing a diffusion selection layer on the surface of the first device away from the substrate, and then etching to form a diffusion window on the diffusion selection layer to obtain a second device; S3, growing a diffusion layer at the diffusion window on the second device, and growing a diffusion protection layer on the diffusion layer to obtain a third device; S4, performing a rapid annealing process on the third device, then removing the diffusion protection layer, the diffusion layer and the diffusion selection layer, forming a P-type diffusion region on the intrinsic contact layer, and obtaining a fourth device; S5, etching the surface of the fourth device away from the substrate to form a recessed area on the N-type doped contact layer, thereby obtaining a fifth device with the N-type doped contact layer exposed; S6. Prepare a first electrode and a second electrode on a surface of the fifth device away from the substrate to obtain an infrared detector, wherein the first electrode is located in a recessed region on the N-type doped contact layer, and the second electrode is located in a diffusion region on the intrinsic contact layer.

2. The preparation method according to claim 1, characterized in that: The rapid annealing process comprises: The third device is placed in a rapid annealing furnace and nitrogen is introduced to anneal the device at a temperature of 300 to 500° C. for 10 to 30 minutes.

3. The preparation method according to claim 1, characterized in that: The stacked structure is prepared by molecular beam epitaxy, and the diffusion selection layer, the diffusion layer and the diffusion protection layer are prepared by plasma enhanced chemical vapor deposition, vacuum evaporation or magnetron sputtering.

4. The preparation method according to claim 1, characterized in that: In the step S5, the fourth device is etched using inductively coupled plasma, and the recessed area is etched to half the thickness of the N-type doped contact layer.

5. The preparation method according to claim 1, characterized in that: The step S5 further includes: preparing a mesa mask on the surface of the fourth device away from the substrate before etching, and removing the mesa mask on the surface of the fifth device after etching.

6. A planar infrared detector, prepared by the preparation method according to any one of claims 1 to 5, characterized in that: It includes a substrate and a buffer layer, an N-type doped contact layer, a superlattice absorption layer and an intrinsic contact layer grown in sequence on the substrate, thereby forming a stacked structure; it also includes a first electrode and a second electrode, the first electrode is located in a diffusion region formed on the intrinsic contact layer, and the second electrode is located in a recessed region formed on the N-type doped contact layer.

7. The planar infrared detector according to claim 6, characterized in that: The stacked structure also includes an M-type barrier layer between the N-type doped contact layer and the superlattice absorption layer, so that the intrinsic contact layer, the superlattice absorption layer, the M-type barrier layer, and the N-type doped contact layer together form a P-π-MN structure through P-type diffusion.

8. The planar infrared detector according to claim 6, characterized in that: The substrate is an N-type GaSb substrate, and the buffer layer is made of N-type doped GaSb material with a thickness of 300-1000nm.

9. The planar infrared detector according to claim 6, characterized in that: The N-type doped contact layer is an N-type doped superlattice layer with a thickness of 250 to 600 nm; the superlattice absorption layer is a P-type doped superlattice layer with a thickness of 1.5 to 3.5 μm; and the intrinsic contact layer is an undoped superlattice layer with a thickness of 10 to 100 nm.

10. The planar infrared detector according to claim 6, characterized in that: The materials of the diffusion selection layer and the diffusion protection layer include SiO2, Si x N y , SiON, Al2O3 or a combination thereof, and the thickness is 100nm to 3μm; the material of the diffusion layer includes ZnO x , ZnS or a combination of several thereof, and the thickness is 100nm~3μm.

Images