Display panel, preparation method of display panel and electronic equipment

Abstract

The embodiment of the invention provides a display panel, a preparation method of the display panel and electronic equipment, and relates to the technical field of display. In the display panel, an isolation structure layer comprises a plurality of test element groups, each test element group comprises a first test structure and a second test structure, the first test structures are enclosed on a substrate to form a test opening, and the second test structures are located in the test openings. The first conductive layer electrically connects the first test structure and the second test structure, and in at least part of the test element groups, the test protection unit is located on the first conductive layer. Through the design, the test protection unit can play a role in protecting the test element group and the first conductive layer, the problem that the test element group and the first conductive layer are damaged in the patterning process of the light-emitting device, so that the measurement of the lap resistance is inaccurate is avoided, and the test accuracy of the lap resistance can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel, a method for preparing a display panel, and an electronic device. Background Art

[0002] Organic Light Emitting Diode (OLED) is considered to be the next generation display technology after liquid crystal display technology. It is widely used in various consumer electronic products such as smart phones, TVs, laptops, desktop computers, car displays, wearable devices, etc. due to its excellent color and picture quality, and has become the mainstream technology in display panels.

[0003] However, the process performance of current OLED display products needs to be further improved. Summary of the invention

[0004] In order to overcome the technical problems mentioned in the above technical background, the present application provides a display panel, a method for preparing a display panel, and an electronic device.

[0005] In a first aspect of the present application, a display panel is provided, the display panel comprising a display area and a test area, the display panel further comprising:

[0006] substrate;

[0007] an isolation structure layer, the isolation structure layer being located at one side of the substrate, the isolation structure layer comprising a plurality of test element groups located in the test area, the test element groups comprising a first test structure and a second test structure, the first test structure enclosing a test opening on the substrate, the second test structure being located in the test opening, wherein the first test structure and the second test structure are spaced apart;

[0008] a first conductive layer, at least partially located in the test opening, the first conductive layer electrically connecting the first test structure and the second test structure;

[0009] A test protection unit, in at least part of the test element group, is located on a side of the first conductive layer away from the substrate, and an orthographic projection of the test protection unit on the substrate covers an orthographic projection of the test element group on the substrate.

[0010] In a possible implementation of the present application, at least part of the test element group further includes a protection structure;

[0011] The protection structure encloses a protection opening on the substrate, and the orthographic projection of the first test structure on the substrate is located within the orthographic projection of the protection opening on the substrate;

[0012] Preferably, the protection structure and the test element group are arranged at the same layer;

[0013] Preferably, the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the test opening on the substrate;

[0014] Preferably, the orthographic projection of the first conductive layer on the substrate partially overlaps with the orthographic projection of the corresponding first test structure on the substrate;

[0015] Preferably, the orthographic projection of the test protection unit on the substrate covers the orthographic projection of the protection opening on the substrate, and the orthographic projection of the test protection unit on the substrate partially overlaps with the orthographic projection of the protection structure on the substrate.

[0016] In a possible implementation of the present application, the orthographic projection shape of the first test structure on the substrate is a ring, and the orthographic projection shape of the protection structure on the substrate is also a ring;

[0017] Preferably, the first test structure comprises a body and a connecting portion, and the connecting portion is located on a side of the body away from the second test structure;

[0018] Preferably, the orthographic projection shape of the body on the substrate is the same as the orthographic projection shape of the protection structure on the substrate;

[0019] Preferably, the orthographic projection shape of the body on the substrate is a rectangular ring, and the orthographic projection shape of the protection structure on the substrate is also a rectangular ring;

[0020] Preferably, the orthographic projection of the body on the substrate and the orthographic projection of the protection structure on the substrate form a U-shaped pattern.

[0021] In a possible implementation of the present application, the orthographic projection shape of the connecting portion on the substrate is a rectangle, and the orthographic projection shape of the second test structure on the substrate is a rectangle;

[0022] Preferably, the geometric center of the orthographic projection of the second test structure on the substrate coincides with the geometric center of the orthographic projection of the body on the substrate;

[0023] Preferably, each side of the orthographic projection of the second test structure on the substrate is parallel to a corresponding side of the orthographic projection of the body on the substrate that faces the second test structure.

[0024] In a possible implementation of the present application, the substrate includes a substrate and a conductive trace located on the substrate in the test area, the conductive trace includes a first conductive trace and a second conductive trace that are insulated from each other, and the display panel also includes a first test contact, a second test contact, a third test contact, and a fourth test contact located in the test area;

[0025] The first conductive trace connects the first test structure with the first test contact and the second test contact, and the second conductive trace connects the second test structure with the third test contact and the fourth test contact;

[0026] Preferably, the first conductive trace, the second conductive trace, the first test contact, the second test contact, the third test contact and the fourth test contact are made on the same layer;

[0027] Preferably, in a direction perpendicular to the plane where the substrate is located, the first conductive trace, the second conductive trace, the first test contact, the second test contact, the third test contact and the fourth test contact are a titanium-aluminum-titanium three-layer structure;

[0028] Preferably, the conductive trace is insulated from a protection structure in the test element group.

[0029] In a possible implementation of the present application, the display panel further includes an insulating layer, and the insulating layer is located on a side of the isolation structure layer facing the conductive trace;

[0030] In the test area, the insulating layer includes a first insulating layer through hole and a second insulating layer through hole, the first test structure is connected to the first conductive trace through the first insulating layer through hole, and the second test structure is connected to the second conductive trace through the second insulating layer through hole;

[0031] Preferably, the orthographic projection of the first insulating layer through hole on the substrate is located within the orthographic projection of the first test structure on the substrate, and the orthographic projection of the second insulating layer through hole on the substrate is located within the orthographic projection of the second test structure on the substrate;

[0032] Preferably, the orthographic projection of the first insulating layer through hole on the substrate is located within the orthographic projection of the connecting portion on the substrate.

[0033] In a possible implementation of the present application, the insulating layer further includes a pixel defining layer located in the display area and the test area;

[0034] In the test area, the pixel defining layer includes a first defining layer through hole and a second defining layer through hole, the connecting portion is connected to the first conductive trace through the first defining layer through hole, and the second test structure is connected to the second conductive trace through the second defining layer through hole.

[0035] In a possible implementation of the present application, the insulating layer further includes a planarization layer located in the display area and the test area, and the planarization layer is located on a side of the pixel defining layer facing the conductive trace;

[0036] In the test area, the planarization layer includes a first planarization layer through hole and a second planarization layer through hole, the connection portion is connected to the first conductive trace through the first definition layer through hole and the first planarization layer through hole, and the second test structure is connected to the second conductive trace through the second definition layer through hole and the second planarization layer through hole;

[0037] Preferably, the orthographic projection of the first defining layer through hole on the substrate is located within the orthographic projection of the first planarization layer through hole on the substrate, and the orthographic projection of the second defining layer through hole on the substrate is located within the orthographic projection of the second planarization layer through hole on the substrate;

[0038] Preferably, the pixel defining layer is an inorganic pixel defining layer;

[0039] Preferably, the pixel defining layer is a single-layer structure of silicon oxide or silicon nitride, or a stacked-layer structure formed alternately of silicon oxide and silicon nitride.

[0040] In a possible implementation of the present application, the isolation structure layer includes an isolation structure located in the display area, and the isolation structure encloses an isolation opening on the substrate;

[0041] The display panel further includes a light emitting device, at least part of which is located in the isolation opening, and in a direction away from the substrate, the light emitting device includes a first electrode, a light emitting material layer and a second electrode which are stacked, and the second electrode overlaps the isolation structure;

[0042] The first conductive layer and the second electrode are arranged in the same layer;

[0043] Preferably, the material of the first test structure and the second test structure is at least partially the same as the material of the isolation structure;

[0044] Preferably, on the side of the first conductive layer facing the substrate, the display panel further comprises a first light-emitting functional layer located in the test area and arranged in the same layer as the light-emitting material layer in the light-emitting device;

[0045] Preferably, the display panel further comprises a first protective layer located in the test area and arranged on a side of the first conductive layer away from the substrate;

[0046] Preferably, the first light-emitting functional layer, the first conductive layer and the first protective layer form a test connection unit.

[0047] In a possible implementation of the present application, at least part of the film layer in the test protection unit is arranged in the same layer as the film layer in the light-emitting device;

[0048] Preferably, part of the film layer in the test protection unit is arranged in the same layer as the light-emitting material layer and the second electrode in the light-emitting device;

[0049] Preferably, the test protection unit comprises a second light-emitting functional layer and a second conductive layer located in the test area, wherein the second light-emitting functional layer is arranged in the same layer as the light-emitting material layer, and the second conductive layer is arranged in the same layer as the second electrode;

[0050] Preferably, the test protection unit further comprises a second protection layer located in the test area and located on a side of the second conductive layer away from the substrate;

[0051] Preferably, in the same test element group, the material of the first light-emitting functional layer is different from the material of the second light-emitting functional layer in the test protection unit.

[0052] In a possible implementation of the present application, the test element group includes a first test element group, the light-emitting device includes a first light-emitting device and a second light-emitting device having different light-emitting colors, the test connection unit includes a first test connection unit, a first conductive layer in the first test connection unit connects a first test structure and a second test structure in the first test element group, the first conductive layer and the first light-emitting functional layer in the first test connection unit are respectively arranged in the same layer as a second electrode and a light-emitting material layer of the first light-emitting device, the test protection unit includes a first test protection unit, a second conductive layer and a second light-emitting functional layer in the first test protection unit are respectively arranged in the same layer as a second electrode and a light-emitting material layer of the second light-emitting device, wherein the first test structure in the first test element group is enclosed on the substrate to form a first test opening;

[0053] The orthographic projection of the first test connection unit on the substrate covers the orthographic projection of the first test opening on the substrate, and the orthographic projection of the first test protection unit on the substrate covers the orthographic projection of the first test connection unit on the substrate;

[0054] Preferably, the test element group also includes a protection structure, which encloses a first protection opening on the substrate, the orthographic projection of the first test opening on the substrate is located within the orthographic projection of the first protection opening on the substrate, and the orthographic projection of the first test protection unit on the substrate covers the orthographic projection of the first protection opening on the substrate.

[0055] In a possible implementation of the present application, in the first test element group, the orthographic projection of the first test connection unit on the substrate partially overlaps with the orthographic projection of the first test structure on the substrate, and the orthographic projection of the first test protection unit on the substrate partially overlaps with the orthographic projection of the protection structure on the substrate;

[0056] Preferably, in the first test element group, in a direction away from the center of the first test opening, an overlap size between the first protection layer in the first test connection unit and a side of the first test structure away from the substrate is 5 μm-12 μm;

[0057] Preferably, in the first test element group, in a direction away from the center of the first test opening, an overlapping dimension between the second protection layer in the first test protection unit and a side of the protection structure away from the substrate is 5 μm-12 μm.

[0058] In a possible implementation of the present application, the test element group further includes a second test element group, the light-emitting device further includes a third light-emitting device having a light-emitting color different from that of the first light-emitting device and the second light-emitting device, the test connection unit further includes a second test connection unit, the first conductive layer in the second test connection unit connects the first test structure and the second test structure in the second test element group, the first conductive layer and the first light-emitting functional layer in the second test connection unit are respectively arranged in the same layer as the second electrode and the light-emitting material layer of the second light-emitting device, the test protection unit includes a second test protection unit, the second conductive layer and the second light-emitting functional layer in the second test protection unit are respectively arranged in the same layer as the second electrode and the light-emitting material layer of the third light-emitting device, wherein the first test structure in the second test element group is enclosed on the substrate to form a second test opening;

[0059] The orthographic projection of the second test connection unit on the substrate covers the orthographic projection of the second test opening on the substrate, and the orthographic projection of the second test protection unit on the substrate covers the orthographic projection of the second test connection unit on the substrate;

[0060] Preferably, the protection structure also encloses a second protection opening on the substrate, the orthographic projection of the second test opening on the substrate is located within the orthographic projection of the second protection opening on the substrate, and the orthographic projection of the second test protection unit on the substrate covers the orthographic projection of the second protection opening on the substrate.

[0061] In a possible implementation of the present application, in the second test element group, the orthographic projection of the second test connection unit on the substrate partially overlaps with the orthographic projection of the first test structure on the substrate, and the orthographic projection of the second test protection unit on the substrate partially overlaps with the orthographic projection of the protection structure on the substrate;

[0062] Preferably, in the second test element group, in a direction away from the center of the second test opening, an overlap size between the first protection layer in the second test connection unit and a side of the first test structure away from the substrate is 5 μm-12 μm;

[0063] Preferably, in the second test element group, in a direction away from the center of the second test opening, an overlapping dimension between the second protection layer in the two test protection units and a side of the protection structure away from the substrate is 5 μm-12 μm.

[0064] In a possible implementation of the present application, the test element group further includes a third test element group, the test connection unit further includes a third test connection unit, the first conductive layer in the third test connection unit connects the first test structure and the second test structure in the third test element group, the first conductive layer and the first light-emitting functional layer in the third test connection unit are respectively arranged in the same layer as the second electrode and the light-emitting material layer of the third light-emitting device, wherein the first test structure in the third test element group is enclosed on the substrate to form a third test opening;

[0065] The orthographic projection of the third test connection unit on the substrate covers the orthographic projection of the third test opening on the substrate;

[0066] Preferably, in the third test element group, in a direction away from the center of the third test opening, an overlapping dimension between the first protection layer in the third test connection unit and a side of the first test structure away from the substrate is 5 μm-12 μm.

[0067] In a possible implementation of the present application, the display panel further includes a first encapsulation layer, and in the display area, the first encapsulation layer includes a plurality of encapsulation units, and different encapsulation units are used to encapsulate light-emitting devices in different isolation openings;

[0068] Preferably, two adjacent packaging units for packaging light-emitting devices of different colors are disconnected at a side of the isolation structure away from the substrate, and a gap exists between the packaging unit located at a side of the isolation structure away from the substrate and the isolation structure;

[0069] Preferably, two adjacent encapsulation units for encapsulating light-emitting devices of the same color are connected to each other on a side of the isolation structure away from the substrate;

[0070] Preferably, the first protection layer in the test connection unit and the second protection layer in the test protection unit are arranged in the same layer as the packaging unit;

[0071] Preferably, in the same test element group, the first protection layer in the test connection unit and the second protection layer in the test protection unit are respectively arranged at the same layer as the encapsulation unit for encapsulating light-emitting devices of different light-emitting colors;

[0072] Preferably, the display panel further comprises a second encapsulation layer, and in the display area and the test area, the second encapsulation layer is located on a side of the encapsulation unit, the first protective layer and the second protective layer away from the substrate;

[0073] Preferably, the second encapsulation layer has a flat surface on a side away from the substrate;

[0074] Preferably, the display panel further comprises a third encapsulation layer, and the third encapsulation layer is located on a side of the second encapsulation layer away from the substrate;

[0075] Preferably, the first encapsulation layer and the third encapsulation layer are inorganic encapsulation layers, and the second encapsulation layer is an organic encapsulation layer.

[0076] In a possible implementation of the present application, the isolation structure layer includes a first isolation layer and a second isolation layer that are stacked, the second isolation layer is arranged on a side of the first isolation layer away from the substrate, and the orthographic projection of the first isolation layer on the substrate is located within the orthographic projection of the second isolation layer on the substrate;

[0077] Preferably, the isolation structure layer further includes a third isolation layer, and in a direction away from the substrate, the third isolation layer, the first isolation layer and the second isolation layer are stacked in sequence, and the orthographic projection of the first isolation layer on the substrate is located within the orthographic projection of the third isolation layer on the substrate;

[0078] Preferably, the orthographic projection of the third isolation layer on the substrate is located within the orthographic projection of the second isolation layer on the substrate;

[0079] Preferably, the material of the first isolation layer includes aluminum, silver or copper, the material of the second isolation layer includes titanium or molybdenum, and the material of the third isolation layer includes molybdenum or titanium.

[0080] In a second aspect of the present application, a method for preparing a display panel is further provided, wherein the display panel comprises a display area and a test area, and the method comprises:

[0081] providing a substrate;

[0082] Making an isolation structure material layer on one side of the substrate;

[0083] Performing patterning on the isolation structure material layer to form an isolation structure layer including a plurality of test element groups in the test area, wherein the test element group includes a first test structure and a second test structure, the first test structure encloses a test opening on the substrate, the second test structure is located in the test opening, and the first test structure is spaced apart from the second test structure;

[0084] A first conductive layer is fabricated in the test opening, and a test protection unit covering the first conductive layer is formed on a side of at least part of the test element group away from the first conductive layer, wherein the first conductive layer electrically connects the first test structure and the second test structure.

[0085] In a possible implementation of the present application, the test element group includes a first test element group, a second test element group, and a third test element group, the first test element group includes a first test opening formed by a first test structure, the second test element group includes a second test opening formed by a first test structure, and the third test element group includes a third test opening formed by a first test structure, and the step of manufacturing a first conductive layer in the test opening and forming a test protection unit covering the first conductive layer on a side away from the first conductive layer in at least part of the test element groups includes:

[0086] Manufacturing a first light-emitting device film layer, using the second electrode in the first light-emitting device film layer as the first conductive layer in the first test opening, and removing the first light-emitting device film layer outside the first test opening;

[0087] A second light-emitting device film layer is manufactured, and the second electrode in the second light-emitting device film layer is used as the first conductive layer in the second test opening, and the second light-emitting device film layer at the third test opening is removed to expose the third test opening, and the second light-emitting device film layer covering the first light-emitting device film layer is used as a test protection unit of the first test element group;

[0088] A third light-emitting device film layer is manufactured, and the second electrode in the third light-emitting device film layer is used as the first conductive layer in the third test opening. The third light-emitting device film layer at the first test opening is removed, and the third light-emitting device film layer covering the second light-emitting device film layer is used as a test protection unit of the second test element group.

[0089] According to a third aspect of the present application, an electronic device is provided, comprising a display panel in any possible implementation manner in the first aspect or a display panel prepared in any possible implementation manner in the second aspect.

[0090] The embodiments of the present application provide a display panel, a method for preparing a display panel, and an electronic device. In the test area of ​​the display panel, the isolation structure layer includes a plurality of test element groups, the test element group includes a first test structure and a second test structure, the first test structure is enclosed on the substrate to form a test opening, and the second test structure is located in the test opening. The first conductive layer electrically connects the first test structure and the second test structure, and in at least part of the test element group, the test protection unit is located above the first conductive layer. With such a design, the test protection unit can protect the test element group and the first conductive layer, avoiding damage to the test element group and the first conductive layer during the patterning process of the light-emitting device, thereby causing the problem of inaccurate measurement of the overlap resistance, and can improve the accuracy of the overlap resistance test. BRIEF DESCRIPTION OF THE DRAWINGS

[0091] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0092] Figure 1 Schematic diagram illustrating the regional distribution of the display panel provided in this embodiment

[0093] Figure 2 One of the structural schematic diagrams of the test element group in the display panel provided by this embodiment is illustrated;

[0094] Figure 3 Example Figure 1 A schematic cross-sectional view of the test element group in the AA direction;

[0095] Figure 4 The second structural schematic diagram of the test element group in the display panel provided by this embodiment is illustrated;

[0096] Figure 5 Example Figure 4A schematic cross-sectional view of the test element group in the AA direction;

[0097] Figure 6 An example of a connection diagram between a test element group and a connecting wire is shown;

[0098] Figure 7 Example Figure 6 One of the cross-sectional schematic diagrams of the test element group in the BB direction;

[0099] Figure 8 Example Figure 6 The second schematic cross-sectional view of the test element group in the BB direction;

[0100] Fig. 9 One of the cross-sectional schematic diagrams of the display panel provided in the embodiment in the display area is illustrated;

[0101] Fig.10 The schematic diagram of the structure of the first test element group in the display panel provided by this embodiment is illustrated;

[0102] Fig.11 Example Fig.10 A schematic cross-sectional view of the test element group in the AA direction;

[0103] Fig.12 The schematic diagram of the structure of the second test element group in the display panel provided by this embodiment is illustrated;

[0104] Fig.13 Example Fig.12 A schematic cross-sectional view of the test element group in the AA direction;

[0105] Fig.14 The schematic diagram of the structure of the third test element group in the display panel provided by this embodiment is illustrated;

[0106] Fig.15 Example Fig.14 A schematic cross-sectional view of the test element group in the AA direction;

[0107] Fig.16 One of the schematic diagrams of the membrane layer structure of the isolation structure layer is illustrated;

[0108] Fig.17 The second schematic diagram of the membrane structure of the isolation structure layer is illustrated;

[0109] Fig.18 The second schematic cross-sectional view of the display area of ​​the display panel provided by the present embodiment is illustrated;

[0110] Fig.19 A schematic diagram illustrating a process of a method for preparing a display panel provided in this embodiment;

[0111] Fig. 20 for Fig.19 Corresponding process diagram.

[0112] Icons: 1-display panel; 10-test connection unit; 10a-first test connection unit; 10b-second test connection unit; 10c-third test connection unit; 101-first conductive layer; 102-first light-emitting functional layer; 103-first protective layer; 11-substrate; 111-substrate; 112-conductive trace; 1121-first conductive trace; 1122-second conductive trace; 12-isolation structure layer; 121-test element group; 121a-first test element group; 121b-second test element group Test element group; 121c-third test element group; 1211-first test structure; 1212-second test structure; 1213-protection structure; 1221-first isolation layer; 1222-second isolation layer; 1223-third isolation layer; 124-isolation structure; 1241-isolation opening; 13-light-emitting device; 13a-first light-emitting device; 13b-second light-emitting device; 13c-third light-emitting device; 131-first electrode; 132-light-emitting material layer; 133-second electrode; 14-test Protection unit; 14a-first test protection unit; 14b-second test protection unit; 141-second light-emitting functional layer; 142-second conductive layer; 143-second protection layer; 1401-first test contact; 1402-second test contact; 1403-third test contact; 1404-fourth test contact; 15-insulating layer; 1501-first insulating layer through hole; 1502-second insulating layer through hole; 151-pixel defining layer; 15101-first defining layer through hole; 15102-second defining layer through hole Fixed layer through hole; 152-planarization layer; 15201-first planarization layer through hole; 15202-second planarization layer through hole; 171-first packaging layer; 1711-packaging unit; 1712-second packaging unit; 172-second packaging layer; 173-third packaging layer; 20-test opening; 20a-first test opening; 20b-second test opening; 20c-third test opening; 30-protection opening; 30a-first protection opening; 30b-second protection opening; 40-isolation structure material layer. DETAILED DESCRIPTION

[0113] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0114] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0115] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0116] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0117] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.

[0118] Improving the density of light-emitting devices in a display panel (i.e., pixel density) is an important way to improve the display effect. However, the display panels currently made using the fine metal evaporation mask (FMM) technology cannot further increase the density of light-emitting devices due to technical limitations. After long-term research, the inventors found that in order to solve the technical problem that the density of light-emitting devices cannot be further increased, an isolation structure is set in some display panels. When the light-emitting material layer and the cathode are evaporated in the entire layer, the light-emitting material layer and the cathode can be disconnected at the isolation structure position. Through multiple evaporation and multiple etching processes, light-emitting devices of different colors can be formed in different isolation openings, that is, light-emitting device patterning.

[0119] Patent CN118251982A, Patent 202410864269.8, Patent PCT / CN2024 / 098407, Patent PCT / CN2024 / 102783, Patent PCT / CN2024 / 098217, PCT / CN2024 / 099419, Patent PCT / CN2024 / 099072, Patent CN117979755A, Patent CN117998900A, Patent CN 117062489A, patent CN117580403A, patent CN116583155A, patent CN116669477A, ​​patent CN117396039A, patent CN116669480A, patent CN116600606A and patent CN117500332A record related technical solutions of isolation structure (or partition structure or isolation column) and encapsulation layer, and their contents are incorporated into this application by reference for reference.

[0120] In the above-mentioned display panel, it is usually necessary to overlap the cathode formed by evaporation with the side wall of the isolation structure so as to transmit a common voltage (e.g., ELVSS voltage) to the cathode through the isolation structure. However, since the material used for the cathode (e.g., transparent conductive material) is different from the material used for the isolation structure, a relatively large overlap resistance will be generated at the overlap position. The size of the overlap resistance directly affects the display effect and power consumption of the display panel. Therefore, the manufacturing yield of the display panel can be controlled by testing the overlap resistance during the manufacturing process of the display panel. How to accurately test the overlap resistance in the above-mentioned display panel becomes crucial.

[0121] In order to solve the above-mentioned technical problems, the inventor innovatively designed the following technical solutions, and the specific implementation solutions of the present application will be described in detail below in conjunction with the accompanying drawings. It should be noted that the defects existing in the solutions in the above-mentioned prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above-mentioned technical problems and the solutions proposed in this embodiment below for the above-mentioned problems should all be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as the technical content known to those skilled in the art.

[0122] Please refer to Figure 1 , Figure 2 and Figure 3 , Figure 1 The schematic diagram of the regional distribution of the display panel provided by this embodiment is illustrated. Figure 2 The schematic diagram of the structure of the test element group in the display panel provided by this embodiment is illustrated. Figure 3 Example Figure 2In the embodiment, the display panel 1 includes a display area AA, a test area NA1, and a non-display area NA2 located between the display area AA and the test area NA1, and the test element group is located in the test area NA1. The test area NA1 may be located in the non-display area. The test area NA1 may be an area to be cut.

[0123] The display panel 1 further includes a substrate 11, an isolation structure layer 12, a first conductive layer 101, and a test protection unit 14. The substrate 11 is a multi-layer structure, and the substrate 11 at least includes a plurality of conductive layers and an insulating layer located between adjacent conductive layers. A pixel circuit for providing a driving signal for the light-emitting device is formed in the substrate 11, wherein the conductive layer may be a metal conductive layer.

[0124] The isolation structure layer 12 is located on one side of the substrate 11. The isolation structure layer is a single film layer or a multi-film layer structure. The isolation structure layer is a conductive isolation structure layer. In the test area NA1, the isolation structure layer includes a plurality of test element groups (TEGs) 121. The test element group 121 includes a first test structure 1211 and a second test structure 1212. The first test structure 1211 encloses a test opening 20 on the substrate 11, and the second test structure 1212 is located in the test opening 20. In this embodiment, the first test structure 1211 and the second test structure 1212 are arranged at intervals, and the orthographic projection of the first test structure 1211 on the substrate 11 does not overlap with the orthographic projection of the second test structure 1212 on the substrate 11. In other words, the second test structure 1212 is located in the test opening 20 enclosed by the first test structure 1211, and the second test structure 1212 does not contact the first test structure 1211.

[0125] The first conductive layer 101 is at least partially located in the test opening 20 . The first conductive layer 101 electrically connects the first test structure 1211 and the second test structure 1212 , so as to test the lap resistance between the first conductive layer 101 and the test structures in the test element group 121 .

[0126] In at least part of the test element group 121, the test protection unit 14 is located on a side of the first conductive layer 101 away from the substrate 11. The orthographic projection of the test protection unit 14 on the substrate 11 covers the orthographic projection of the test element group 121 on the substrate 11, wherein the test protection unit 14 may be a single-layer structure or a multi-layer structure.

[0127] In the above scheme, by setting a test protection unit 14 on the side of the first conductive layer 101 away from the substrate 11, and allowing the orthographic projection of the test protection unit 14 on the substrate 11 to cover the orthographic projection of the test element group 121 on the substrate 11, the test element group 121 and the first conductive layer 101 can be protected, avoiding damage to the test element group 121 and the first conductive layer 101 during the patterning process of the light-emitting device, thereby preventing the problem of inaccurate measurement of the overlap resistance, and improving the accuracy of the overlap resistance test.

[0128] Furthermore, the inventors have found that in order to protect the first test structure 1211, the second test structure 1212 and the first conductive layer 101 from being etched by the etching solution, in this embodiment, please refer to Figure 4 and Figure 5 The test element group 121 also includes a protection structure 1213. The protection structure 1213 encloses a protection opening 30 on the substrate 11. The first test structure 1211 and the second test structure 1212 are located in the protection opening 30. The protection structure 1213 can form a dam structure around the first test structure 1211 and the second test structure 1212. The protection structure 1213 and the test protection unit 14 cooperate to prevent the etching liquid from directly acting on the first test structure 1211, the second test structure 1212 and the first conductive layer 101, so as to ensure that the first test structure 1211, the second test structure 1212 and the first conductive layer 101 will not be etched by the etching liquid in the subsequent process.

[0129] In this embodiment, the protection structure 1213 encloses the protection opening 30 on the substrate 11 , and the orthographic projection of the first test structure 1211 on the substrate 11 is located within the orthographic projection of the protection opening 30 on the substrate 11 , that is, the first test structure 1211 is located within the protection opening 30 .

[0130] The orthographic projection of the first conductive layer 101 on the substrate 11 covers the orthographic projection of the test opening 20 on the substrate 11. The orthographic projection of the test protection unit 14 on the substrate 11 covers the orthographic projection of the protection opening 30 on the substrate 11, and the orthographic projection of the test protection unit 14 on the substrate 11 partially overlaps with the orthographic projection of the protection structure 1213 on the substrate 11.

[0131] In a possible implementation of this embodiment, please refer again to Figure 4 The orthographic projection shape of the first test structure 1211 on the substrate 11 is a ring, and the orthographic projection shape of the protection structure 1213 on the substrate 11 is also a ring.

[0132] The first test structure 1211 includes a body 12111 and a connection portion 12112, wherein the connection portion 12112 is located on a side of the body 12111 away from the second test structure 1212. In this implementation, the orthographic projection shape of the body 12111 on the substrate 11 and the orthographic projection shape of the protection structure 1213 on the substrate 11 may be the same. For example, the orthographic projection shape of the body 12111 on the substrate 11 is a rectangular ring, and the orthographic projection shape of the protection structure 1213 on the substrate 11 is also a rectangular ring. Optionally, the orthographic projection of the body 12111 on the substrate 11 and the orthographic projection of the protection structure 1213 on the substrate 11 form a U-shaped pattern, that is, the corresponding sides of the orthographic projection of the body 12111 on the substrate 11 and the orthographic projection of the protection structure 1213 on the substrate 11 are parallel to each other.

[0133] In the above possible implementation, the orthographic projection shape of the connection portion 12112 on the substrate 11 is a rectangle, and the orthographic projection shape of the second test structure 1212 on the substrate 11 is a rectangle. Optionally, the geometric center of the orthographic projection of the second test structure 1212 on the substrate 11 coincides with the geometric center of the orthographic projection of the body 12111 on the substrate 11. Such a design can provide sufficient space for the second test structure 1212 and the body 12111 in different directions for making the first conductive layer 101, so as to facilitate the test of the lap resistance of the first conductive layer 101 formed in different evaporation directions.

[0134] Optionally, each side of the orthographic projection of the second test structure 1212 on the substrate 11 is parallel to a corresponding side of the orthographic projection of the body 12111 on the substrate 11 that faces the second test structure 1212 .

[0135] For further information, please refer to Figure 6 and Figure 7 The substrate 11 also includes a substrate 111 and a conductive trace 112. In the test area NA1, the conductive trace 112 is located on the side of the isolation structure layer 12 facing the substrate 111. The conductive trace 112 includes a first conductive trace 1121 and a second conductive trace 1122 that are insulated from each other. The display panel 1 also includes a first test contact 1401, a second test contact 1402, a third test contact 1403 and a fourth test contact 1404 located in the test area NA1.

[0136] The first conductive trace 1121 connects the first test structure 1211 with the first test contact 1401 and the second test contact 1402, and the second conductive trace 1122 connects the second test structure 1212 with the third test contact 1403 and the fourth test contact 1404. Exemplarily, the first test structure 1211 is connected to the first test contact 1401 and the second test contact 1402 through two first conductive traces 1121, respectively, wherein the two first conductive traces 1121 can be partially shared. One of the first test contact 1401 and the second test contact 1402 can be in contact with a current supply probe (e.g., a positive electrode of a constant current source) of a test device, and the other can be in contact with a voltage acquisition probe. The second test structure 1212 is connected to the third test contact 1403 and the fourth test contact 1404 through two second connecting traces 1122, respectively, and the two second conductive traces 1122 can be partially shared. One of the third test contact 1403 and the fourth test contact 1404 can be in contact with a current supply probe (e.g., the negative pole of a constant current source) of a test device, and the other can be in contact with a voltage collection probe. The total resistance R between the first test structure 1211 and the second test structure 1212 can be tested by using a four-probe test method. 总 .

[0137] The conductive trace 112 is generally arranged in a titanium-aluminum-titanium three-layer structure, and its trace resistance is small and can be ignored. In this embodiment, the total resistance R 总 The first conductive trace 1121 and the first test structure 1211 are mainly composed of a first connection resistor R1 between the first conductive trace 1121 and the first test structure 1211, a second connection resistor R2 between the second conductive trace 1122 and the second test structure 1212, a third resistor R3 of the bonding electrode 13 between the first test structure 1211 and the second test structure 1212, and a bonding resistor R t Composition. Lap resistor R t It can be expressed as R t =R 总 -R1-R2-R3, wherein the first connection resistor R1 and the second connection resistor R2 can be measured by a set reference test element group, and the third resistor R3 can also be directly tested by a test device.

[0138] In this embodiment, the conductive trace 112 is insulated from the protection structure 1213 in the test element group 121 .

[0139] Further, please refer again to Figure 7The display panel 1 further includes an insulating layer 15, which is located on the side of the isolation structure layer 12 facing the conductive trace 112, wherein the insulating layer 15 can be distributed in the display area AA and the test area NA1. In the test area NA1, the insulating layer 15 includes a first insulating layer through hole 1501 and a second insulating layer through hole 1502, the first test structure 1211 is connected to the first conductive trace 1121 through the first insulating layer through hole 1501, and the second test structure 1212 is connected to the second conductive trace 1122 through the second insulating layer through hole 1502.

[0140] Optionally, the orthographic projection of the first insulating layer through hole 1501 on the substrate 11 is located within the orthographic projection of the first test structure 1211 on the substrate 11. Optionally, the orthographic projection of the first insulating layer through hole 1501 on the substrate 11 is located within the orthographic projection of the connecting portion 12112 in the first test structure 1211 on the substrate 11. The orthographic projection of the second insulating layer through hole 1502 on the substrate 11 is located within the orthographic projection of the second test structure 1212 on the substrate 11.

[0141] Further, please refer again to Figure 7 The insulating layer 15 may include a pixel defining layer 151 distributed in the display area AA and the test area NA1. In the test area NA1, the pixel defining layer 151 includes a first defining layer through hole 15101 and a second defining layer through hole 15102. The first test structure 1211 is connected to the first conductive trace 1121 through the first defining layer through hole 15101, and the second test structure 1212 is connected to the second conductive trace 1122 through the second defining layer through hole 15102.

[0142] For further information, please refer to Figure 8 The insulating layer 15 further includes a planarization layer 152 distributed in the display area AA and the test area NA1. In the test area NA1, the planarization layer 152 is located on the side of the pixel definition layer 151 facing the conductive trace 112. The planarization layer 152 includes a first planarization layer through hole 15201 and a second planarization layer through hole 15202. The connection portion 12112 of the first test structure 1211 is connected to the first conductive trace 1121 through the first definition layer through hole 15101 and the first planarization layer through hole 15201. The second test structure 1122 is connected to the second conductive trace 1122 through the second definition layer through hole 15102 and the second planarization layer through hole 15202.

[0143] Exemplarily, the orthographic projection of the first defining layer through hole 15101 on the substrate 11 is located within the orthographic projection of the first planarization layer through hole 15201 on the substrate 11, and the orthographic projection of the second defining layer through hole 15102 on the substrate 11 is located within the orthographic projection of the second planarization layer through hole 15202 on the substrate 11. That is, the orthographic projection area of ​​the first defining layer through hole 15101 on the substrate 11 is smaller than the orthographic projection area of ​​the first planarization layer through hole 15201 on the substrate 11, and the orthographic projection area of ​​the second defining layer through hole 15102 on the substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer through hole 15202 on the substrate 11. The first defining layer through hole 15101 may cover the side wall of the first planarization layer through hole 15201, and the second defining layer through hole 15102 may cover the side wall of the second defining layer through hole 15102. The pixel defining layer 151 is an inorganic pixel defining layer. For example, the pixel defining layer 151 is a single layer structure of silicon oxide (SiOx) or silicon nitride (SiNx), or a stacked structure formed by alternating silicon oxide and silicon nitride. The above design can prevent the planarization layer 152 from being exposed and absorbing water vapor, which may cause the isolation structure layer 12 to have uneven film layers due to water vapor overflow during film formation.

[0144] See also Fig. 9 The isolation structure layer 12 further includes an isolation structure 124 located in the display area AA, and the isolation structure 124 encloses an isolation opening 1241 on the substrate. The materials of the first test structure 1211 and the second test structure 1212 may be at least partially the same as the material of the isolation structure 124. For example, the materials of the first test structure 1211, the second test structure 1212 and the isolation structure 124 may be completely the same, that is, the first test structure 1211, the second test structure 1212 and the isolation structure 124 may be arranged in the same layer.

[0145] The display panel 1 further includes a light emitting device 130 at least partially located in the isolation opening 1241, and the light emitting device 130 includes a first electrode 131, a light emitting material layer 132, and a second electrode 133 which are sequentially stacked in a direction away from the substrate 11. The second electrode 163 overlaps the isolation structure 124, and illustratively, at least a portion of the second electrode 163 extends from the isolation opening 1241 to be electrically connected to the side wall of the isolation structure 124 facing the isolation opening 1241.

[0146] The isolation structure 124 can enclose a plurality of isolation openings 1241. The setting of the isolation structure 124 can form film layers of light-emitting devices of different colors in different isolation openings 1241 without the need for a fine metal mask, thereby reducing the manufacturing cost of the display panel. The isolation structure 124 can isolate the light-emitting material layer and the second electrode in the light-emitting device, so that different light-emitting devices are independent of each other, so as to improve the crosstalk between adjacent light-emitting devices 130 and enhance the display effect. Adjacent light-emitting devices 130 can be independently packaged to improve the packaging yield. At the same time, due to the existence of the isolation structure 124, the light-emitting material layer 132 and the second electrode 133 in the light-emitting device 130 of each color in the display panel can be first prepared on the entire surface and then patterned, thereby eliminating the fine metal mask to save the manufacturing cost of the display panel.

[0147] Furthermore, please combine Figure 7 , Figure 8 and Fig. 9 The first conductive layer 101 located in the test area NA1 can be arranged in the same layer as the first electrode 131 located in the display area AA, that is, the two are made by the same process.

[0148] Optionally, on the side of the first conductive layer 101 facing the substrate 11, the display panel 1 further includes a first light-emitting functional layer 102 located in the test area NA1 and disposed on the same layer as the light-emitting material layer 132 in the light-emitting device 13. Further, the display panel 1 further includes a first protective layer 103 located in the test area NA1 and disposed on the side of the first conductive layer 101 away from the substrate 11, and the first light-emitting functional layer 102, the first conductive layer 101, and the first protective layer 103 stacked in a direction away from the substrate 11 form a test connection unit 10.

[0149] Please combine again Figure 7 , Figure 8 and Fig. 9 , at least part of the film layer in the test protection unit 14 is arranged in the same layer as the film layer in the light-emitting device 13. Exemplarily, part of the film layer in the test protection unit 14 is arranged in the same layer as the light-emitting material layer 132 and the second electrode 133 in the light-emitting device 13. Optionally, the test protection unit 14 includes a second light-emitting functional layer 141 and a second conductive layer 142 located in the tested area NA1, wherein the second light-emitting functional layer 141 is arranged in the same layer as the light-emitting material layer 131, and the second conductive layer 142 is arranged in the same layer as the second electrode 133.

[0150] Optionally, the test protection unit 14 further includes a second protection layer 143 located in the test area NA1 and located on the side of the second conductive layer 142 away from the substrate 11. In the direction away from the substrate 11, the test protection unit 14 is formed by the second light-emitting functional layer 141, the second conductive layer 142 and the second protection layer 143 stacked.

[0151] In this embodiment, in the same test element group 121, the material of the first light-emitting functional layer 102 is different from the material of the second light-emitting functional layer 141 in the test protection unit 14, that is, in the same test element group 121, the light-emitting material layer 132 arranged on the same layer as the first light-emitting functional layer 102 is different from the light-emitting material layer 132 arranged on the same layer as the second light-emitting functional layer 141.

[0152] Please refer to Fig. 9 , Fig.10 and Fig.11 In this embodiment, the light emitting device 13 includes a first light emitting device 13a and a second light emitting device 13b with different light emitting colors, the test element group 121 includes a first test element group 121a, the test connection unit 10 includes a first test connection unit 10a, the first conductive layer 101 in the first test connection unit 10a connects the first test structure 1211 and the second test structure 1212 in the first test element group 121a, the first conductive layer 101 and the first light emitting function layer 102 in the first test connection unit 10a are respectively arranged in the same layer as the second electrode 133 and the light emitting material layer 132 of the first light emitting device 13a, and the test protection unit 14 includes a first test protection unit 14a, and the second conductive layer 142 and the second light emitting function layer 141 in the first test protection unit 14a are respectively arranged in the same layer as the second electrode 133 and the light emitting material layer 132 of the second light emitting device 13b. Among them, the first test structure 1211 in the first test element group 121a encloses the first test opening 20a on the substrate 11.

[0153] The orthographic projection of the first test connection unit 10 a on the substrate 11 covers the orthographic projection of the first test opening 121 a on the substrate 11 , and the orthographic projection of the first test protection unit 14 a on the substrate 11 covers the orthographic projection of the first test connection unit 10 a on the substrate 11 .

[0154] Optionally, the test element group 121 may further include a protection structure 1213, which further encloses a first protection opening 30a on the substrate 11, and the orthographic projection of the first test opening 20a on the substrate 11 is located within the orthographic projection of the first protection opening 30a on the substrate 11, and the orthographic projection of the first test protection unit 14a on the substrate 11 covers the orthographic projection of the first protection opening 30a on the substrate 11.

[0155] Please refer again Fig.10 In the first test element group 121a, the orthographic projection of the first test connection unit 10a on the substrate 11 partially overlaps with the orthographic projection of the first test structure 1211 on the substrate 11, and the orthographic projection of the first test protection unit 14a on the substrate 11 partially overlaps with the orthographic projection of the protection structure 1213 on the substrate 11.

[0156] Optionally, in the first test element group 121a, in the direction away from the center of the first test opening 20a, an overlapping dimension d1 between the first protective layer 103 in the first test connection unit 10a and a side of the first test structure 1211 away from the substrate 11 is 5μm-12μm. Exemplarily, the overlapping dimension d1 includes 5μm, 5.1μm, 5.75μm, 6.32μm, 6.8μm, 7.35μm, 8.2μm, 9.1μm, 9.8μm, 10.4μm, 11.2μm, 11.6μm or 12μm, etc.

[0157] Optionally, in the first test element group 121a, in the direction away from the center of the first test opening 20a, an overlapping dimension d2 between the second protection layer 143 in the first test protection unit 14a and a side of the protection structure 1213 away from the substrate 11 is 5μm-12μm. Exemplarily, the overlapping dimension d2 includes 5μm, 5.1μm, 5.75μm, 6.32μm, 6.8μm, 7.4μm, 8.2μm, 9.1μm, 9.8μm, 10.4μm, 11.2μm, 11.8μm or 12μm, etc.

[0158] Please refer to Fig. 9 , Fig.12 and Fig.13 The test element group 121 further includes a second test element group 121b, the light emitting device 13 further includes a third light emitting device 13c having a light emitting color different from that of the first light emitting device 13a and the second light emitting device 13b, the test connection unit 10 further includes a second test connection unit 10b, the first conductive layer 101 in the second test connection unit 10b connects the first test structure 1211 and the second test structure 1212 in the second test element group 121b, the first conductive layer 101 and the first light emitting functional layer 102 in the second test connection unit 10b are respectively arranged in the same layer as the second electrode 133 and the light emitting material layer 132 of the second light emitting device 13b, the test protection unit 14 includes a second test protection unit 14b, the second conductive layer 142 and the second light emitting functional layer 141 in the second test protection unit 14b are respectively arranged in the same layer as the second electrode 133 and the light emitting material layer 132 of the third light emitting device 13c. The first test structure 1211 in the second test element group 121b is enclosed on the substrate 11 to form a second test opening 20b.

[0159] The orthographic projection of the second test connection unit 10 b on the substrate 11 covers the orthographic projection of the second test opening 20 b on the substrate 11 , and the orthographic projection of the second test protection unit 14 b on the substrate 11 covers the orthographic projection of the second test connection unit 10 b on the substrate 11 .

[0160] Optionally, the protection structure 1213 also encloses a second protection opening 30b on the substrate 11, the orthographic projection of the second test opening 20b on the substrate 11 is located within the orthographic projection of the second protection opening 30b on the substrate 11, and the orthographic projection of the second test protection unit 14b on the substrate 11 covers the orthographic projection of the second protection opening 30b on the substrate 11.

[0161] Please refer again Fig.13 In the second test element group 121b, the orthographic projection of the second test connection unit 10b on the substrate 11 partially overlaps with the orthographic projection of the first test structure 1211 on the substrate 11, and the orthographic projection of the second test protection unit 14b on the substrate 11 partially overlaps with the orthographic projection of the protection structure 1213 on the substrate 11.

[0162] Optionally, in the second test element group 121b, in the direction away from the center of the second test opening 20b, the overlap dimension d3 between the first protection layer 103 in the second test connection unit 10b and the side of the first test structure 1211 away from the substrate 11 is 5μm-12μm. Exemplarily, the overlap dimension d3 includes 5μm, 5.1μm, 5.75μm, 6.32μm, 6.8μm, 7.35μm, 8.1μm, 9.3μm, 9.8μm, 10.1μm, 11.2μm, 11.6μm or 12μm, etc.

[0163] Optionally, in the second test element group 121b, in the direction away from the center of the second test opening 20b, the overlap dimension d4 between the second protection layer 143 in the second test protection unit 14b and the side of the protection structure 1213 away from the substrate 11 is 5μm-12μm. Exemplarily, the overlap dimension d4 includes 5μm, 5.2μm, 5.65μm, 6.5μm, 6.8μm, 7.35μm, 8.2μm, 9.1μm, 9.8μm, 10.4μm, 11.2μm, 11.6μm or 12μm, etc.

[0164] Please refer to Fig. 9 , Fig.14 and Fig.15, the test element group 121 further includes a third test element group 121c, the test connection unit 10 further includes a third test connection unit 10c, the first conductive layer 101 in the third test connection unit 10c connects the first test structure 1211 and the second test structure 1212 in the third test element group 121c, and the first conductive layer 101 and the first light-emitting functional layer 102 in the third test connection unit 10c are respectively arranged in the same layer as the second electrode 133 and the light-emitting material layer 132 of the third light-emitting device 13c. The first test structure 1211 in the third test element group 121c encloses a third test opening 20c on the substrate 11. The orthographic projection of the third test connection unit 10c on the substrate 11 covers the orthographic projection of the third test opening 20c on the substrate 11.

[0165] Optionally, in the third test element group 121c, in the direction away from the center of the third test opening 20c, the overlap dimension d5 between the first protection layer 103 in the third test connection unit 10c and the side of the first test structure 1211 away from the substrate 11 is 5μm-12μm. Exemplarily, the overlap dimension d5 includes 5μm, 5.1μm, 5.85μm, 6.3μm, 6.8μm, 7.35μm, 8.2μm, 9.1μm, 9.8μm, 10.6μm, 11.4μm, 11.8μm or 12μm, etc.

[0166] For some possible implementations, see Fig.16 The isolation structure layer 12 includes a first isolation layer 1221 and a second isolation layer 1222 stacked in a direction away from the substrate 11. The orthographic projection of the first isolation layer 1221 on the substrate 11 is located within the orthographic projection of the second isolation layer 1222 on the substrate 11. The orthographic projection area of ​​the first isolation layer 1221 on the substrate 11 is smaller than the orthographic projection area of ​​the second isolation layer 1222 on the substrate 11. On a cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the test opening 20, the cross sections of the first test structure 1211, the second test structure 1212 and the protection structure 1213 may be T-shaped. On a cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the isolation opening 1241, the cross section of the isolation structure 124 may be T-shaped.

[0167] Optionally, see Fig.17 The isolation structure layer 12 further includes a third isolation layer 1223 located between the first isolation layer 1221 and the substrate 11 .

[0168] Optionally, the orthographic projection of the third isolation layer 1223 on the substrate 11 is located within the orthographic projection of the second isolation layer 1222 on the substrate 11, and the orthographic projection area of ​​the third isolation layer 1223 on the substrate 11 is smaller than the orthographic projection area of ​​the second isolation layer 1222 on the substrate 11. On a cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the test opening 20, the cross sections of the first test structure 1211, the second test structure 1212, and the protective structure 1213 may be in an I-shape, and on a cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the isolation opening 1241, the cross section of the isolation structure 124 may be in an I-shape.

[0169] Optionally, the material of the first isolation layer 1221 includes aluminum, silver or copper, the material of the second isolation layer 1222 includes titanium or molybdenum, and the material of the third isolation layer 1223 includes molybdenum or titanium.

[0170] For some possible implementations, see Fig.18 The display panel further includes a first encapsulation layer 171 . In the display area AA, the first encapsulation layer 171 includes a plurality of encapsulation units 1711 . Different encapsulation units 1711 are used to encapsulate the light-emitting devices 13 in different isolation openings 1241 .

[0171] Optionally, two adjacent encapsulation units 1711 for encapsulating light-emitting devices 13 of different colors are disconnected on a side of the isolation structure 124 away from the substrate 11 , and a gap exists between the encapsulation unit 1711 located on the side of the isolation structure 124 away from the substrate 11 and the isolation structure 124 .

[0172] Optionally, two adjacent encapsulation units 1711 for encapsulating light-emitting devices 13 of the same color are connected to each other at a side of the isolation structure 124 away from the substrate 11 .

[0173] Optionally, see Figure 7 , Figure 8 and Fig.18 The first protection layer 103 in the test connection unit 10 and the second protection layer 143 in the test protection unit 14 are arranged at the same layer as the packaging unit 1711 .

[0174] Optionally, in the same test element group 121 , the first protection layer 103 in the test connection unit 10 and the second protection layer 143 in the test protection unit 14 are respectively arranged in the same layer as the encapsulation unit 1711 for encapsulating light-emitting devices 13 of different light-emitting colors.

[0175] Optionally, please refer again to Fig.18The display panel 1 further includes a second encapsulation layer 172. In the display area AA and the test area NA1, the second encapsulation layer 172 is located on a side of the encapsulation unit 1711, the first protective layer 103, and the second protective layer 104 away from the substrate 11. The second encapsulation layer 172 has a flat surface on a side away from the substrate 11. The second encapsulation layer 172 can also fill the gap between the encapsulation unit 1711 and the isolation structure 124, and the gap between the first protective layer 103 and the protective structure 1213.

[0176] Optionally, please refer again to Fig.18 The display panel 1 further includes a third encapsulation layer 173 , and the third encapsulation layer 173 is located on a side of the second encapsulation layer 172 away from the substrate 11 .

[0177] Optionally, the materials of the first encapsulation layer 171 and the third encapsulation layer 173 include inorganic materials, and the material of the second encapsulation layer 172 includes organic materials. For example, the first encapsulation layer 171 and the third encapsulation layer 173 can be formed by chemical vapor deposition (CVD), and the second encapsulation layer 172 can be formed by inkjet printing (IJP).

[0178] Based on the same inventive concept, this embodiment also provides a method for preparing a display panel, which can be used to prepare the display panel described above. The display panel 1 includes a display area AA and a test area NA1. Fig.19 and Fig. 20 , the method may include the following steps.

[0179] Step S110 , providing a substrate 11 .

[0180] The substrate 11 is a multi-layer structure, and includes at least a plurality of conductive layers and insulating layers between adjacent conductive layers. A pixel circuit for providing a driving signal for the light-emitting device is formed in the substrate 11, wherein the conductive layer may be a metal conductive layer.

[0181] Step S120 , forming an isolation structure material layer 40 on one side of the substrate.

[0182] Step S130 , patterning the isolation structure material layer 40 to form an isolation structure layer 12 including a plurality of test element groups 121 in the test area.

[0183] The test element group 121 includes a first test structure 1211 and a second test structure 1212 . The first test structure 1211 encloses a test opening 20 on the substrate 11 , and the second test structure 1212 is located in the test opening 20 . The first test structure 1211 and the second test structure 1212 are spaced apart from each other.

[0184] Step S140 , manufacturing a first conductive layer 101 in the test opening 20 , and forming a test protection unit 14 covering the first conductive layer 101 on a side away from the first conductive layer 101 in at least a portion of the test element group 121 .

[0185] The first conductive layer 101 electrically connects the first test structure 1211 and the second test structure 1212 .

[0186] Further, in this embodiment, the test element group includes a first test element group, a second test element group and a third test element group, the first test element group includes a first test opening formed by a first test structure, the second test element group includes a second test opening formed by a first test structure, and the third test element group includes a third test opening formed by a first test structure, and step S140 can be implemented in the following way.

[0187] First, a first light-emitting device film layer is manufactured, and the second electrode in the first light-emitting device film layer is used as the first conductive layer in the first test opening, and the first light-emitting device film layer outside the first test opening is removed.

[0188] Next, a second light-emitting device film layer is manufactured, and the second electrode in the second light-emitting device film layer is used as the first conductive layer in the second test opening. The second light-emitting device film layer at the third test opening is removed to expose the third test opening, and the second light-emitting device film layer covering the first light-emitting device film layer is used as a test protection unit of the first test element group.

[0189] Then, a third light-emitting device film layer is manufactured, and the second electrode in the third light-emitting device film layer is used as the first conductive layer in the third test opening. The third light-emitting device film layer at the first test opening is removed, and the third light-emitting device film layer covering the second light-emitting device film layer is used as the test protection unit of the second test element group. Fig.10 The film structure of the first test element group is shown, Fig.12 The film structure of the second test element group shown Fig.14 The film layer structure of the third test element group is shown.

[0190] In the preparation method of the above-mentioned display panel, a test protection unit is manufactured on the side of the first conductive layer away from the substrate, which can protect the test element group and the first conductive layer, and avoid damage to the test element group and the first conductive layer during the patterning process of the light-emitting device, thereby preventing the problem of inaccurate measurement of the overlap resistance from occurring, thereby improving the accuracy of the overlap resistance test.

[0191] Based on the same inventive concept, an embodiment of the present application also provides an electronic device, which includes the display panel provided in the present application, or includes a display panel prepared by the display panel manufacturing method provided in the present embodiment. The electronic device may include a mobile phone, a tablet computer, a smart wearable device, a television, a laptop computer, a monitor, and other devices with a display function.

[0192] The embodiments of the present application provide a display panel, a method for preparing a display panel, and an electronic device. In the display panel, the isolation structure layer includes a plurality of test element groups, the test element group includes a first test structure and a second test structure, the first test structure is enclosed on the substrate to form a test opening, and the second test structure is located in the test opening. The first conductive layer electrically connects the first test structure and the second test structure, and in at least part of the test element group, the test protection unit is located above the first conductive layer. With such a design, the test protection unit can protect the test element group and the first conductive layer, avoiding damage to the test element group and the first conductive layer during the patterning process of the light-emitting device, thereby causing the problem of inaccurate measurement of the overlap resistance, and can improve the accuracy of the overlap resistance test.

[0193] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a test area, and the display panel further includes: substrate; an isolation structure layer, the isolation structure layer being located at one side of the substrate, the isolation structure layer comprising a plurality of test element groups located in the test area, the test element groups comprising a first test structure and a second test structure, the first test structure enclosing a test opening on the substrate, the second test structure being located in the test opening, wherein the first test structure and the second test structure are spaced apart; a first conductive layer, at least partially located in the test opening, the first conductive layer electrically connecting the first test structure and the second test structure; A test protection unit, in at least part of the test element group, is located on a side of the first conductive layer away from the substrate, and an orthographic projection of the test protection unit on the substrate covers an orthographic projection of the test element group on the substrate.

2. The display panel according to claim 1, wherein: At least some of the test element groups further include a protective structure; The protection structure encloses a protection opening on the substrate, and the orthographic projection of the first test structure on the substrate is located within the orthographic projection of the protection opening on the substrate; Preferably, the protection structure and the test element group are arranged at the same layer; Preferably, the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the test opening on the substrate; Preferably, the orthographic projection of the first conductive layer on the substrate partially overlaps with the orthographic projection of the corresponding first test structure on the substrate; Preferably, the orthographic projection of the test protection unit on the substrate covers the orthographic projection of the protection opening on the substrate, and the orthographic projection of the test protection unit on the substrate partially overlaps with the orthographic projection of the protection structure on the substrate.

3. The display panel according to claim 2, wherein: The orthographic projection shape of the first test structure on the substrate is a ring, and the orthographic projection shape of the protection structure on the substrate is also a ring; Preferably, the first test structure comprises a body and a connecting portion, and the connecting portion is located at a side of the body away from the second test structure; Preferably, the orthographic projection shape of the body on the substrate is the same as the orthographic projection shape of the protection structure on the substrate; Preferably, the orthographic projection shape of the body on the substrate is a rectangular ring, and the orthographic projection shape of the protection structure on the substrate is also a rectangular ring; Preferably, the orthographic projection of the body on the substrate and the orthographic projection of the protection structure on the substrate form a U-shaped pattern.

4. The display panel according to claim 3, wherein: The orthographic projection shape of the connecting portion on the substrate is a rectangle, and the orthographic projection shape of the second test structure on the substrate is a rectangle; Preferably, the geometric center of the orthographic projection of the second test structure on the substrate coincides with the geometric center of the orthographic projection of the body on the substrate; Preferably, each side of the orthographic projection of the second test structure on the substrate is parallel to a corresponding side of the orthographic projection of the body on the substrate that faces the second test structure.

5. The display panel according to claim 3, wherein: The substrate comprises a substrate and a conductive trace located on the substrate in the test area, the conductive trace comprises a first conductive trace and a second conductive trace insulated from each other, and the display panel further comprises a first test contact, a second test contact, a third test contact and a fourth test contact located in the test area; The first conductive trace connects the first test structure with the first test contact and the second test contact, and the second conductive trace connects the second test structure with the third test contact and the fourth test contact; Preferably, the first conductive trace, the second conductive trace, the first test contact, the second test contact, the third test contact and the fourth test contact are made on the same layer; Preferably, in a direction perpendicular to the plane where the substrate is located, the first conductive trace, the second conductive trace, the first test contact, the second test contact, the third test contact and the fourth test contact are a titanium-aluminum-titanium three-layer structure; Preferably, the conductive trace is insulated from a protection structure in the test element group.

6. The display panel according to claim 5, wherein: The display panel further comprises an insulating layer, wherein the insulating layer is located on a side of the isolation structure layer facing the conductive trace; In the test area, the insulating layer includes a first insulating layer through hole and a second insulating layer through hole, the first test structure is connected to the first conductive trace through the first insulating layer through hole, and the second test structure is connected to the second conductive trace through the second insulating layer through hole; Preferably, the orthographic projection of the first insulating layer through hole on the substrate is located within the orthographic projection of the first test structure on the substrate, and the orthographic projection of the second insulating layer through hole on the substrate is located within the orthographic projection of the second test structure on the substrate; Preferably, the orthographic projection of the first insulating layer through hole on the substrate is located within the orthographic projection of the connecting portion on the substrate.

7. The display panel according to claim 6, wherein: The insulating layer further includes a pixel defining layer located in the display area and the test area; In the test area, the pixel defining layer includes a first defining layer through hole and a second defining layer through hole, the connecting portion is connected to the first conductive trace through the first defining layer through hole, and the second test structure is connected to the second conductive trace through the second defining layer through hole.

8. The display panel according to claim 7, wherein: The insulating layer further comprises a planarization layer located in the display area and the test area, wherein the planarization layer is located on a side of the pixel defining layer facing the conductive trace; In the test area, the planarization layer includes a first planarization layer through hole and a second planarization layer through hole, the connection portion is connected to the first conductive trace through the first definition layer through hole and the first planarization layer through hole, and the second test structure is connected to the second conductive trace through the second definition layer through hole and the second planarization layer through hole; Preferably, the orthographic projection of the first defining layer through hole on the substrate is located within the orthographic projection of the first planarization layer through hole on the substrate, and the orthographic projection of the second defining layer through hole on the substrate is located within the orthographic projection of the second planarization layer through hole on the substrate; Preferably, the pixel defining layer is an inorganic pixel defining layer; Preferably, the pixel defining layer is a single-layer structure of silicon oxide or silicon nitride, or a stacked-layer structure formed alternately of silicon oxide and silicon nitride.

9. The display panel according to claim 1, wherein: The isolation structure layer comprises an isolation structure located in the display area, and the isolation structure encloses an isolation opening on the substrate; The display panel further includes a light emitting device, at least part of which is located in the isolation opening, and in a direction away from the substrate, the light emitting device includes a first electrode, a light emitting material layer and a second electrode which are stacked, and the second electrode overlaps the isolation structure; The first conductive layer and the second electrode are arranged in the same layer; Preferably, the material of the first test structure and the second test structure is at least partially the same as the material of the isolation structure; Preferably, on the side of the first conductive layer facing the substrate, the display panel further comprises a first light-emitting functional layer located in the test area and arranged in the same layer as the light-emitting material layer in the light-emitting device; Preferably, the display panel further comprises a first protective layer located in the test area and arranged on a side of the first conductive layer away from the substrate; Preferably, the first light-emitting functional layer, the first conductive layer and the first protective layer form a test connection unit.

10. The display panel according to claim 9, wherein: At least part of the film layer in the test protection unit is arranged in the same layer as the film layer in the light emitting device; Preferably, part of the film layer in the test protection unit is arranged in the same layer as the light-emitting material layer and the second electrode in the light-emitting device; Preferably, the test protection unit comprises a second light-emitting functional layer and a second conductive layer located in the test area, wherein the second light-emitting functional layer is arranged in the same layer as the light-emitting material layer, and the second conductive layer is arranged in the same layer as the second electrode; Preferably, the test protection unit further comprises a second protection layer located in the test area and located on a side of the second conductive layer away from the substrate; Preferably, in the same test element group, the material of the first light-emitting functional layer is different from the material of the second light-emitting functional layer in the test protection unit.

11. The display panel according to claim 9, wherein: The test element group includes a first test element group, the light-emitting device includes a first light-emitting device and a second light-emitting device having different light-emitting colors, the test connection unit includes a first test connection unit, a first conductive layer in the first test connection unit connects a first test structure and a second test structure in the first test element group, the first conductive layer and the first light-emitting functional layer in the first test connection unit are respectively arranged in the same layer with a second electrode and a light-emitting material layer of the first light-emitting device, the test protection unit includes a first test protection unit, a second conductive layer and a second light-emitting functional layer in the first test protection unit are respectively arranged in the same layer with a second electrode and a light-emitting material layer of the second light-emitting device, wherein the first test structure in the first test element group is enclosed on the substrate to form a first test opening; The orthographic projection of the first test connection unit on the substrate covers the orthographic projection of the first test opening on the substrate, and the orthographic projection of the first test protection unit on the substrate covers the orthographic projection of the first test connection unit on the substrate; Preferably, the test element group also includes a protection structure, which encloses a first protection opening on the substrate, the orthographic projection of the first test opening on the substrate is located within the orthographic projection of the first protection opening on the substrate, and the orthographic projection of the first test protection unit on the substrate covers the orthographic projection of the first protection opening on the substrate.

12. The display panel according to claim 11, wherein: In the first test element group, the orthographic projection of the first test connection unit on the substrate partially overlaps with the orthographic projection of the first test structure on the substrate, and the orthographic projection of the first test protection unit on the substrate partially overlaps with the orthographic projection of the protection structure on the substrate; Preferably, in the first test element group, in a direction away from the center of the first test opening, an overlap size between the first protection layer in the first test connection unit and a side of the first test structure away from the substrate is 5 μm-12 μm; Preferably, in the first test element group, in a direction away from the center of the first test opening, an overlapping dimension between the second protection layer in the first test protection unit and a side of the protection structure away from the substrate is 5 μm-12 μm.

13. The display panel according to claim 11, wherein: The test element group further includes a second test element group, the light-emitting device further includes a third light-emitting device having a light-emitting color different from that of the first light-emitting device and the second light-emitting device, the test connection unit further includes a second test connection unit, the first conductive layer in the second test connection unit connects the first test structure and the second test structure in the second test element group, the first conductive layer and the first light-emitting functional layer in the second test connection unit are respectively arranged in the same layer with the second electrode and the light-emitting material layer of the second light-emitting device, the test protection unit includes a second test protection unit, the second conductive layer and the second light-emitting functional layer in the second test protection unit are respectively arranged in the same layer with the second electrode and the light-emitting material layer of the third light-emitting device, wherein the first test structure in the second test element group is enclosed on the substrate to form a second test opening; The orthographic projection of the second test connection unit on the substrate covers the orthographic projection of the second test opening on the substrate, and the orthographic projection of the second test protection unit on the substrate covers the orthographic projection of the second test connection unit on the substrate; Preferably, the protection structure also encloses a second protection opening on the substrate, the orthographic projection of the second test opening on the substrate is located within the orthographic projection of the second protection opening on the substrate, and the orthographic projection of the second test protection unit on the substrate covers the orthographic projection of the second protection opening on the substrate.

14. The display panel according to claim 13, wherein: In the second test element group, the orthographic projection of the second test connection unit on the substrate partially overlaps with the orthographic projection of the first test structure on the substrate, and the orthographic projection of the second test protection unit on the substrate partially overlaps with the orthographic projection of the protection structure on the substrate; Preferably, in the second test element group, in a direction away from the center of the second test opening, an overlap size between the first protection layer in the second test connection unit and a side of the first test structure away from the substrate is 5 μm-12 μm; Preferably, in the second test element group, in a direction away from the center of the second test opening, an overlapping dimension between the second protection layer in the two test protection units and a side of the protection structure away from the substrate is 5 μm-12 μm.

15. The display panel according to claim 13, wherein: The test element group further includes a third test element group, the test connection unit further includes a third test connection unit, the first conductive layer in the third test connection unit connects the first test structure and the second test structure in the third test element group, the first conductive layer and the first light-emitting functional layer in the third test connection unit are respectively arranged in the same layer as the second electrode and the light-emitting material layer of the third light-emitting device, wherein the first test structure in the third test element group is enclosed on the substrate to form a third test opening; The orthographic projection of the third test connection unit on the substrate covers the orthographic projection of the third test opening on the substrate; Preferably, in the third test element group, in a direction away from the center of the third test opening, an overlapping dimension between the first protection layer in the third test connection unit and a side of the first test structure away from the substrate is 5 μm-12 μm.

16. The display panel according to claim 10, wherein: The display panel further comprises a first encapsulation layer, wherein in the display area, the first encapsulation layer comprises a plurality of encapsulation units, and different encapsulation units are used to encapsulate light-emitting devices in different isolation openings; Preferably, two adjacent packaging units for packaging light-emitting devices of different colors are disconnected at a side of the isolation structure away from the substrate, and a gap exists between the packaging unit located at a side of the isolation structure away from the substrate and the isolation structure; Preferably, two adjacent encapsulation units for encapsulating light-emitting devices of the same color are connected to each other on a side of the isolation structure away from the substrate; Preferably, the first protection layer in the test connection unit and the second protection layer in the test protection unit are arranged in the same layer as the packaging unit; Preferably, in the same test element group, the first protection layer in the test connection unit and the second protection layer in the test protection unit are respectively arranged at the same layer as the encapsulation unit for encapsulating light-emitting devices of different light-emitting colors; Preferably, the display panel further comprises a second encapsulation layer, and in the display area and the test area, the second encapsulation layer is located on a side of the encapsulation unit, the first protective layer and the second protective layer away from the substrate; Preferably, the second encapsulation layer has a flat surface on a side away from the substrate; Preferably, the display panel further comprises a third encapsulation layer, and the third encapsulation layer is located on a side of the second encapsulation layer away from the substrate; Preferably, the first encapsulation layer and the third encapsulation layer are inorganic encapsulation layers, and the second encapsulation layer is an organic encapsulation layer.

17. The display panel according to claim 1, wherein: The isolation structure layer comprises a first isolation layer and a second isolation layer which are stacked, wherein the second isolation layer is arranged on a side of the first isolation layer away from the substrate, and an orthographic projection of the first isolation layer on the substrate is located within an orthographic projection of the second isolation layer on the substrate; Preferably, the isolation structure layer further includes a third isolation layer, and in a direction away from the substrate, the third isolation layer, the first isolation layer and the second isolation layer are stacked in sequence, and the orthographic projection of the first isolation layer on the substrate is located within the orthographic projection of the third isolation layer on the substrate; Preferably, the orthographic projection of the third isolation layer on the substrate is located within the orthographic projection of the second isolation layer on the substrate; Preferably, the material of the first isolation layer includes aluminum, silver or copper, the material of the second isolation layer includes titanium or molybdenum, and the material of the third isolation layer includes molybdenum or titanium.

18. A method for preparing a display panel, characterized in that: The display panel includes a display area and a test area, and the method includes: providing a substrate; Making an isolation structure material layer on one side of the substrate; Performing patterning on the isolation structure material layer to form an isolation structure layer including a plurality of test element groups in the test area, wherein the test element group includes a first test structure and a second test structure, the first test structure encloses a test opening on the substrate, the second test structure is located in the test opening, and the first test structure is spaced apart from the second test structure; A first conductive layer is fabricated in the test opening, and a test protection unit covering the first conductive layer is formed on a side of at least part of the test element group away from the first conductive layer, wherein the first conductive layer electrically connects the first test structure and the second test structure.

19. The method for preparing a display panel according to claim 18, wherein: The test element group includes a first test element group, a second test element group and a third test element group, the first test element group includes a first test opening formed by a first test structure, the second test element group includes a second test opening formed by a first test structure, and the third test element group includes a third test opening formed by a first test structure, and the step of making a first conductive layer in the test opening and forming a test protection unit covering the first conductive layer on a side away from the first conductive layer in at least part of the test element group includes: Manufacturing a first light-emitting device film layer, using the second electrode in the first light-emitting device film layer as the first conductive layer in the first test opening, and removing the first light-emitting device film layer outside the first test opening; A second light-emitting device film layer is manufactured, and the second electrode in the second light-emitting device film layer is used as the first conductive layer in the second test opening, and the second light-emitting device film layer at the third test opening is removed to expose the third test opening, and the second light-emitting device film layer covering the first light-emitting device film layer is used as a test protection unit of the first test element group; A third light-emitting device film layer is manufactured, and the second electrode in the third light-emitting device film layer is used as the first conductive layer in the third test opening. The third light-emitting device film layer at the first test opening is removed, and the third light-emitting device film layer covering the second light-emitting device film layer is used as a test protection unit of the second test element group.

20. An electronic device, characterized in that: A display panel comprising the display panel described in any one of claims 1 to 17, or a display panel prepared by the method for preparing a display panel described in any one of claims 18 to 19.

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