Method for adjusting thermality in wafer placement table and method for manufacturing wafer placement table

Abstract

The invention provides a method capable of adjusting the soaking property of a loading surface after manufacturing of a wafer loading table. The method comprises the following steps: a) preparing a wafer carrying table which is provided with a ceramic substrate which is provided with a carrying surface of a wafer and can be heated through electric conduction; and a cooling plate which is joined to the ceramic substrate, can be cooled by a refrigerant supplied to the flow path, and is configured from a base portion where the flow path is located and a lid portion that is attachable to and detachable from the base portion and can open the flow path by being detached from the base portion. B) attaching the lid part to the base part, and measuring the temperature distribution while electrically heating and cooling; c) when the temperature distribution does not satisfy a predetermined reference, the cover part is removed, and the shape of the flow path is locally adjusted; and d) after the cover part is mounted on the base part, the temperature distribution of the wafer carrying table with the flow path shape adjusted is measured again while electric heating and cooling are carried out, and the steps c) and d) are repeated until the temperature distribution obtained by the measurement again meets a specified standard.

Description

Technical Field

[0001] The present invention relates to a chip placing table for fixing the chip by electrostatic adsorption, and in particular to a heat equalization adjustment process thereof. Background Art

[0002] When a semiconductor chip (hereinafter also referred to as a chip) is subjected to a prescribed treatment such as plasma treatment, a chip placement table (also referred to as a chip workbench, etc.) for electrostatically adsorbing and fixing the chip is already known (for example, see Patent Document 1 and Patent Document 2).

[0003] In summary, the chip carrier has the following structure: a ceramic substrate implanted with an ESC electrode (electrostatic chuck electrode) for electrostatically adsorbing the chip and a heater electrode for heating the chip, and a cooling plate (also called a base, etc.) having a flow path for a coolant to cool the ceramic substrate, which are joined together by means of a bonding layer.

[0004] In the wafer stage, a direct current voltage is applied to the ESC electrode while a wafer is placed on the upper surface of the ceramic substrate, i.e., the placement surface, so that the wafer is fixed by electrostatic adsorption. At the same time, a coolant is circulated through the flow path inside the cooling plate, and the heater electrode is energized, so that the wafer is heated at a predetermined temperature distribution (heat distribution) set in advance.

[0005] In the wafer placement table as described above, heater electrodes are usually provided so as to obtain a heat generation density that matches the heat dissipation distribution, thereby ensuring a desired temperature distribution.

[0006] The heat dissipation distribution in the wafer stage is different from one unit to another due to manufacturing errors such as the thickness deviation of the bonding layer and the processing accuracy of the cooling plate. In addition, the assumed heat density may not be obtained due to the deviation of the shape (cross-sectional area, width, etc.) of the heater electrode from the design. For these reasons, the temperature distribution on the wafer surface fixed to the wafer stage may be different from one unit to another. Depending on the situation, it is also possible to manufacture a wafer stage that cannot obtain the desired temperature distribution.

[0007] Therefore, with the conventionally constructed wafer placement table, there is a limit to the improvement of the manufacturing yield.

[0008] Prior art literature

[0009] Patent Literature

[0010] Patent Document 1: Japanese Patent Application Publication No. 2003-60019

[0011] Patent Document 2: Japanese Patent No. 6918642 Summary of the invention

[0012] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a method capable of adjusting the thermal uniformity at the wafer placement surface of the wafer placement table after the wafer placement table is manufactured.

[0013] In order to solve the above-mentioned problems, a first scheme of the present invention is a method for adjusting the thermal uniformity of a chip placing surface of a chip placing table, wherein the chip placing table is configured as follows: when a voltage is applied to an ESC electrode implanted in a ceramic substrate and a chip is electrostatically adsorbed and fixed on the placing surface of the ceramic substrate, heating is performed by energizing a heater electrode implanted in the ceramic substrate and cooling is performed by circulating a refrigerant in a flow path provided in a cooling plate attached to the ceramic substrate, wherein the method comprises the following steps: a) preparing the chip placing table, wherein the chip placing table comprises the ceramic substrate and the cooling plate, wherein the cooling plate is attached to the ceramic substrate, and wherein the chip placing table comprises a base having the flow path and a base which is freely loadable and removable relative to the base and which is loaded and unloaded by the base; The invention relates to a method of manufacturing a wafer substrate for wafer loading platform comprising: a) a cover portion that can be removed to open the flow path; b) with the cover portion mounted on the base portion, the temperature distribution of the loading surface is measured while the electrical heating and cooling are performed; c) when the measured temperature distribution does not meet a prescribed reference, the cover portion is removed from the base portion and the shape of the flow path is partially adjusted; d) after the cover portion is mounted on the base portion, the temperature distribution of the wafer loading platform whose shape of the flow path is adjusted in the step c) is measured again while the electrical heating and cooling are performed, and the steps c) and d) are repeated until the temperature distribution measured again in the step d) meets the prescribed reference.

[0014] A second scheme of the present invention is based on the method for adjusting thermal uniformity in a chip placement table involved in the first scheme, and is characterized in that, for the base of the chip placement table prepared in the step a), fins are pre-protrudingly provided at at least one portion of the flow path.

[0015] The third scheme of the present invention is based on the method for adjusting the thermal uniformity in the chip carrier involved in the second scheme, and is characterized in that in the process c), at a specified position determined according to the measurement result of the temperature distribution, at least one of the following processes is performed: a process of lowering the height of the fin, a process of widening the width of the flow path, a process of forming a groove at a position facing the flow path on a main surface of the cover part, or a process of adding new fins to the flow path.

[0016] The fourth scheme of the present invention is based on the method for adjusting thermal uniformity in the chip carrier involved in the third scheme, and is characterized in that in the step c), when the new fin is added to the flow path, the thermal conductivity of the material of the new fin is made higher than the thermal conductivity of the material of the cooling plate.

[0017] The fifth scheme of the present invention is based on the method for adjusting the thermal uniformity in the chip carrier involved in the first scheme, and is characterized in that in the process c), at a specified position determined according to the measurement result of the temperature distribution, at least one of the following processes is performed: a process of widening the width of the flow path, a process of forming a groove at a position facing the flow path on a main surface of the cover part, or a process of protruding a fin at at least one position of the flow path.

[0018] A sixth scheme of the present invention is a method for manufacturing a chip carrier, wherein, while a voltage is applied to an ESC electrode implanted in a ceramic substrate and the chip is electrostatically fixed on the chip placement surface of the ceramic substrate, the heater electrode implanted in the ceramic substrate is electrically heated and the cooling is performed using a refrigerant circulated and supplied to a flow path provided in a cooling plate joined to the ceramic substrate. The method for manufacturing the chip carrier comprises the following steps: a) joining the ceramic substrate implanted with the ESC electrode and the heater electrode and the base of the cooling plate having a groove to be the flow path; b) implanting a first power supply unit for supplying power to the ESC electrode and a second power supply unit for supplying power to the heater electrode into the joint of the ceramic substrate and the base; and c) The cover of the cooling plate is detachably mounted on the base to close the flow path; d) with the cover mounted on the base, the temperature distribution of the loading surface is measured while the electrical heating and cooling are performed; e) when the measured temperature distribution does not meet the prescribed criterion, the cover is removed from the base and the shape of the flow path is partially adjusted; f) after the cover is mounted on the base, the temperature distribution of the chip loading table whose shape of the flow path is adjusted in the step e) is measured again while the electrical heating and cooling are performed, and the steps e) and f) are repeated until the temperature distribution measured again in the step f) meets the prescribed criterion.

[0019] A seventh aspect of the present invention is the method for manufacturing a wafer stage according to the sixth aspect, wherein a fin is provided to protrude from at least one portion of the flow path before the step c) is performed at the latest.

[0020] The eighth scheme of the present invention is based on the manufacturing method of the chip carrier involved in the seventh scheme, and is characterized in that, in the process e), at a specified position determined based on the measurement result of the temperature distribution, at least one of the following processes is performed: a process of lowering the height of the fin, a process of widening the width of the flow path, a process of forming a groove at a position facing the flow path on a main surface of the cover part, or a process of adding a new fin to the flow path.

[0021] The ninth scheme of the present invention is based on the manufacturing method of the chip carrier involved in the eighth scheme, and is characterized in that when the new fin is added to the flow path in the step e), the thermal conductivity of the material of the new fin is made higher than the thermal conductivity of the material of the cooling plate.

[0022] The tenth scheme of the present invention is based on the manufacturing method of the chip carrier involved in the sixth scheme, and is characterized in that, in the process e), at a specified position determined according to the measurement result of the temperature distribution, at least one of the following processes is performed: a process of widening the width of the flow path, a process of forming a groove at a position facing the flow path on a main surface of the cover part, or a process of protruding a fin at at least one position of the flow path.

[0023] According to the first to tenth aspects of the present invention, when the temperature distribution on the placement surface does not meet the prescribed standard, the temperature distribution can be improved by removing the cover and adjusting the shape of the flow path. In this way, the temperature distribution in the wafer placement table after manufacturing can be adjusted, thereby improving the manufacturing yield of the wafer placement table. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic cross-sectional view showing the structure of the wafer placement table 10.

[0025] Figure 2 It is a diagram showing the flow of the uniform heat adjustment process.

[0026] Figure 3 2 is a diagram schematically showing the configuration of the temperature distribution measuring device 100 .

[0027] Figure 4 It is a diagram showing the state of the flow path adjustment processing in stages.

[0028] Figure 5 It is a diagram showing the state of the flow path adjustment processing in stages.

[0029] Figure 6 It is a diagram showing the state of the flow path adjustment processing in stages. DETAILED DESCRIPTION

[0030] <Wafer stage>

[0031] Figure 1 The schematic cross-sectional view shows the structure of a wafer stage 10 that is the target of the heat equalization treatment method according to the embodiment of the present invention. The wafer stage 10 is configured to fix the semiconductor wafer (wafer) by electrostatic adsorption while heating the wafer at a predetermined temperature distribution when a predetermined treatment such as plasma treatment is performed on the wafer.

[0032] In summary, the wafer stage 10 has a structure in which the ceramic base 20 and the cooling plate 30 are bonded to each other via a bonding layer 40 , whereby the ceramic base 20 and the cooling plate 30 are stacked.

[0033] The ceramic base 20 is a disk-shaped member formed of insulating ceramics such as Al2O3, AlN, etc. The main surface of the ceramic base 20 opposite to the bonding surface with the bonding layer 40 serves as a placement surface 20a on which a wafer is placed.

[0034] An ESC electrode (electrostatic chuck electrode) 21 for electrostatically adsorbing a wafer and a heater electrode 22 for heating the wafer are embedded in the ceramic base 20. The ESC electrode 21 is embedded closer to the mounting surface 20a than the heater electrode 22.

[0035] Examples of the material of the ESC electrode 21 and the heater electrode 22 include metals such as W, Mo, Ti, Si, and Ru, or carbides and nitrides thereof.

[0036] The cooling plate 30 is a part that has a flow path 31 inside and cools the wafer that is electrostatically fixed to the ceramic substrate 20 and further to its placement surface 20a by introducing a coolant (e.g., water) from the outside into the flow path 31. As a preferred example, the flow path 31 is configured as a continuous groove that is arranged in a spiral shape when viewed from above, so that substantially the entire area of ​​the ceramic substrate 20 is cooled. Alternatively, it may be a form in which a plurality of independent open-loop grooves are arranged in a concentric circle shape when viewed from above.

[0037] In more detail, the cooling plate 30 is composed of a base 30a and a cover 30b. The base 30a is bonded to the ceramic base 20 by means of a bonding layer 40 on one main surface side (upper side in the drawing), and has a recess 30c for the cover 30b to be embedded, and a groove 31 obtained by further digging from the recess 30c on the other main surface side (lower side in the drawing). The cover 30b is embedded in the recess 30c provided in the base 30a, and is fastened to the base 30a at multiple locations by means of screws not shown in the figure, but can be removed by releasing the fastening. That is, the cover 30b is freely loadable and removable relative to the base 30a.

[0038] It should be noted that a sealing member for preventing leakage of the refrigerant may be disposed between the base 30a and the lid 30b when the lid 30b is fixed. Examples of the sealing member include a liquid gasket and an O-ring.

[0039] When the cover 30b is fixed to the base 30a, the flow path 31 is closed by one main surface 30d of the cover 30b, but by releasing the fixation and removing the cover 30b, the flow path 31 can be opened. Thus, in the wafer stage 10 according to the present embodiment, the flow path 31 can be accessed after completion by removing the cover 30b.

[0040] As the material of the cooling plate 30, a metal material such as aluminum is preferably used, but ceramics or a composite material of metal and ceramics may be used.

[0041] The bonding of the ceramic substrate 20 and the cooling plate 30 using the bonding layer 40 is achieved as follows: for example, the ceramic substrate 20 and the cooling plate 30 before bonding are bonded using a resin adhesive or an adhesive layer such as an adhesive sheet, metal solder, or a ceramic binder to obtain a stacked body, and the stacked body is subjected to heat and pressure bonding by heating at a specified temperature and applying pressure.

[0042] The wafer stage 10 further includes a first power supply unit 50 for supplying power to the ESC electrode 21 and a second power supply unit 60 for supplying power to the heater electrode 22 .

[0043] The first power supply unit 50 is provided along the stacking direction of the ceramic base 20 and the cooling plate 30, and includes: a power supply terminal 51; an insulating member (sleeve) 52 surrounding the power supply terminal 51; and a connecting portion 53 provided at one end of the power supply terminal 51 and connected to the ESC electrode 21. The first power supply unit 50 is configured such that a predetermined range on the side where the connecting portion 53 is located is implanted and fixed to the ceramic base 20 and the base 30a, and the remaining portion passes through the through hole 33 provided in the cooling plate 30 and is exposed to the outside on the other end side. And, on the other end side, the power supply terminal 51 is electrically connected to the ESC power supply 70 provided outside.

[0044] With the wafer placed on the placement surface 20 a of the ceramic base 20 , a DC voltage is applied to the ESC electrode 21 via the power supply terminal 51 and the connection portion 53 by the ESC power supply 70 , so that the wafer is electrostatically attracted to the placement surface 20 a .

[0045] In addition, the second power supply part 60 includes: a power supply terminal 61; an insulating member (sleeve) 62 surrounding the power supply terminal 61; and a connecting part 63 provided at one end of the power supply terminal 61 and connected to the heater electrode 22. The second power supply part 60 is configured such that a predetermined range on the side where the connecting part 63 is located is implanted and fixed to the ceramic base 20 and the base 30a, and the remaining part passes through the through hole 34 provided in the cooling plate 30 and is exposed to the outside on the other end side. And, on the other end side, the power supply terminal 61 is electrically connected to the heater power supply 80 provided outside.

[0046] The heater electrode 22 is energized by the heater power supply 80 through the power supply terminal 61 and the connection portion 63 , whereby the wafer stage 10 is heated and the wafer is heated as well.

[0047] In addition, at a predetermined position of the cover 30b, the refrigerant inlet and outlet 35 communicating with the flow path 31 is penetrated in a state where the cover 30b is fixed to the base 30a. Figure 1 In order to simplify the diagram, only one refrigerant inlet and outlet 35 is shown, but in fact, one refrigerant inlet and outlet 35 is provided at each end of the groove portion constituting the flow path 31. Each refrigerant inlet and outlet 35 is connected to a refrigeration unit 90 that circulates and supplies the refrigerant to the flow path 31.

[0048] Fins 32 are protrudingly provided at at least one position of the flow path 31. The fins 32 have the function of increasing the flow velocity of the refrigerant at the position where they are arranged and locally improving the cooling efficiency. The shape and size of the fins 32 are appropriately determined according to the cooling conditions required at the position where they are arranged. The fins 32 can be provided with the same material as the cooling plate 30, or can be provided with a material different from the cooling plate 30. It should be noted that a form without fins 32 is also possible.

[0049] In the chip loading platform 10 having the above structure, a voltage is applied to the ESC electrode 21 so that the chip loaded on the loading surface 20a is electrostatically adsorbed and fixed, and then the heater electrode 22 is energized to heat it. At the same time, a coolant is circulated to the flow path 31, thereby balancing the heating and cooling, so that the chip can be heated with a specified temperature distribution.

[0050] The chip carrier 10 can be manufactured in the following order: for example, a ceramic substrate 20, a base 30a and a cover 30b with ESC electrodes 21 and heater electrodes 22 embedded therein are prepared respectively, and then the ceramic substrate 20 and the base 30a are bonded together by means of a bonding layer 40, and then the first power supply part 50 and the second power supply part 60 are implanted, and finally, the cover 30b is installed relative to the base 30a.

[0051] The ceramic substrate 20 can be produced as follows: for example, a plurality of ceramic green sheets including a ceramic green sheet printed with an electrode pattern for the ESC electrode 21 and a ceramic green sheet printed with an electrode pattern for the heater electrode 22 are stacked and bonded together to form a green sheet molded body, and the green sheet molded body is hot pressed and sintered.

[0052] In addition, the base 30a and the cover 30b of the cooling plate 30 can be made by cutting of a block metal, casting such as gel casting, etc. In this case, a recess 30c and a flow path 31 are formed in the base 30a, and further, the fin 32 is protruded and arranged at a predetermined position. On the other hand, the cover 30b is provided with a through hole 33, a through hole 34 and a refrigerant inlet and outlet 35. In addition, both the base 30a and the cover 30b are provided with screw holes (not shown) used when fastening the cover 30b to the base 30a.

[0053] In addition, the joint body of the ceramic substrate 20 and the base 30a is provided with holes (implantation holes) for implanting the first power supply part 50 and the second power supply part 60. It should be noted that the implantation holes may be provided in the ceramic substrate 20 and the base 30a before bonding so as to communicate after bonding.

[0054] It should be noted that the first power supply part 50 and the second power supply part 60 may be implanted in the ceramic base 20 before bonding, and then the first power supply part 50 and the second power supply part 60 may be respectively inserted into the through hole 33 and the through hole 34, and the ceramic base 20 and the base 30a may be bonded.

[0055] <Heat uniformity adjustment treatment>

[0056] Next, the heat equalization adjustment process for the wafer stage 10 according to the present embodiment will be described. Figure 2 2 is a diagram showing a flow of a heat uniformity adjustment process. In summary, the heat uniformity adjustment process is a process performed to improve the heat uniformity when the temperature distribution on the placement surface 20a of the wafer placement table 10 that is temporarily manufactured does not satisfy the desired heat uniformity.

[0057] First, the wafer stage 10 to be adjusted, which is manufactured by the above-described procedure, is prepared (step S1 ), and the temperature distribution on the placement surface 20 a of the wafer stage 10 is measured (step S2 ).

[0058] Figure 3 1 is a diagram schematically showing the configuration of a temperature distribution measuring device 100 for measuring the temperature distribution of the placement surface 20 a.

[0059] The temperature distribution measuring apparatus 100 includes a chamber 110 in which a wafer stage 10 to be measured is disposed. The chamber 110 is provided with a support table 111 for supporting the wafer stage 10 from below. The wafer stage 10 is supported on the support table 111 with the placement surface 20a facing vertically upward.

[0060] A window 120 is provided on the top surface of the chamber 110 facing the placement surface 20a of the wafer stage 10 when the wafer stage 10 is supported on the support 111. An IR camera 130 capable of photographing the inside of the chamber 110 through the window 120 is provided outside the chamber 110.

[0061] In addition, although Figure 3 Although not shown in the figure, in the temperature distribution measuring device 100, when the chip carrier 10 is supported on the support platform 111, the first power supply part 50 can be connected to the ESC power supply 70, the second power supply part 60 can be connected to the heater power supply 80, and the refrigerant inlet and outlet 35 can be connected to the refrigeration unit 90.

[0062] In the temperature distribution measuring device 100 having the above-mentioned structure, the heater electrode 22 can be heated by supplying power from the heater power source 80 and the cooling unit 90 circulates and supplies the cooling medium to the flow path 31, while the placement surface 20a of the wafer placement table 10 supported by the support table 111 can be photographed by the IR camera 130. That is, the temperature distribution on the placement surface 20a can be measured. The measurement result can be obtained in the form of temperature map data, for example.

[0063] After the temperature distribution of the placement surface 20 a is obtained by the temperature distribution measuring device 100 , a heat distribution evaluation of the placement surface 20 a is performed based on the measurement result (step S3 ).

[0064] In the heat-saturation evaluation, it is determined whether the measured temperature distribution satisfies a predetermined reference (step S4). The reference can be set appropriately according to the temperature distribution required by the wafer, etc. For example, it can be determined whether the local temperature deviation in the obtained temperature distribution is within a predetermined threshold range, or it can be determined whether the difference between the obtained temperature distribution and the temperature distribution assumed when the wafer stage 10 is designed is within a predetermined threshold range.

[0065] When it is determined that the temperature distribution satisfies the predetermined criterion (YES in step S4 ), the processing is terminated at that point.

[0066] On the other hand, when it is determined that the temperature distribution does not satisfy the prescribed benchmark (NO in step S4), in order to improve the temperature distribution, more specifically, in order to improve the heat dissipation distribution of the cooling plate 30, a process of locally adjusting the shape (typically the cross-sectional area) of the flow path 31, i.e., a flow path adjustment process, is performed. Figures 4 to 6 1 and 2 are diagrams showing the flow path adjustment process in stages. The flow path adjustment process locally changes the flow of the refrigerant at the adjustment target portion.

[0067] Specifically, first, the wafer stage 10 taken out of the temperature distribution measuring apparatus 100, the connection with the heater power supply 80 and the cooling unit 90 being disconnected and the cooling medium being removed from the flow path 31, is Figure 4 As shown in FIG. 1 , the cover 30b is removed from the base 30a (step S5). As a result, the flow path 31 is opened and the flow path 31 can be accessed.

[0068] Next, the shape of the accessible flow channel 31 is adjusted based on the measurement result of the temperature distribution (step S6 ).

[0069] There are four specific adjustment methods: methods (a) to (d) below. Depending on the location where the temperature distribution is to be improved and the desired effect (temperature increase or decrease), the adjustment by methods (a) to (d) is performed individually or in combination. Figure 5 Examples of each method are shown in .

[0070] (a) Lowering the height of the fin 32 located in the flow path 31: If the height of the fin 32 is lowered, the cross-sectional area of ​​the flow path 31 at the protruding portion of the fin 32 becomes larger. As a result, the flow velocity of the refrigerant in this portion is reduced, and the heat removal efficiency is reduced. Therefore, the temperature near this portion of the placement surface 20a is increased compared to before the adjustment. Figure 5 , the case where the height of the fin 32a is reduced by Δh is exemplified. As a specific method of reducing the height of the fin 32, cutting the fin 32, replacing the fin 32 with a shorter fin 32, etc. can be exemplified.

[0071] (b) Widening the width of the flow path 31: If the width of the flow path 31 is widened, the cross-sectional area of ​​the flow path at that location becomes larger. As a result, the flow velocity of the refrigerant is reduced, and the heat removal efficiency is reduced. Therefore, the temperature near that location of the placement surface 20a is increased compared to before the adjustment. Figure 5 2 illustrates a case where the width of the two side surfaces of the flow path 31b is increased by Δt. As a specific method of increasing the width of the flow path 31, cutting the side surfaces of the flow path 31 can be exemplified.

[0072] (c) A groove is formed at a portion of one main surface 30d of the cover 30b facing the flow path 31: If a groove is formed at a portion of one main surface 30d of the removed cover 30b facing the flow path 31 when the cover 30b is installed on the base 30a, the cross-sectional area of ​​the flow path 31 at that portion becomes larger when the cover 30b is installed again. As a result, the flow velocity of the refrigerant is reduced, and the heat removal efficiency is reduced, so that the temperature near that portion of the placement surface 20a is increased compared to before the adjustment. Figure 5 3 shows an example in which a groove g is provided at a portion facing the flow path 31c. As a specific method for forming the groove, cutting, hammering, etc. can be exemplified.

[0073] (d) Adding fins 32 to the flow path 31: The fins 32 are newly protruded in a portion where there are no fins 32, so that the cross-sectional area of ​​the flow path 31 at that portion becomes larger. As a result, the flow velocity of the refrigerant increases, and the heat removal efficiency increases, so that the temperature near that portion of the placement surface 20a decreases compared to before the adjustment. It should be noted that method (d) also includes the case where the fins 32 are provided when there are no fins 32 protruding in advance in the flow path 31. Figure 5 3 shows an example in which fins 32d are added to the flow path 31d.

[0074] The same effect can be obtained when a pin-shaped component is provided instead of the fin 32. In addition, in order to improve the cooling efficiency, a component with a material having a higher thermal conductivity than the material of the cooling plate 30 can be used as the added fin 32 (or pin). An appropriate material or shape can be selected according to the desired adjustment method (for example, the degree of temperature change).

[0075] After adjusting the flow path 31 based on the above methods (a) to (d), Figure 6 As shown, the cover 30b is reinstalled on the base 30a (step S7). Then, the temperature distribution measurement device 100 is used again to measure the temperature distribution (step S2) and the uniform heat evaluation is performed based on the obtained measurement results (step S3). As a result of the uniform heat evaluation, if it is determined that the temperature distribution meets the prescribed standard (YES in step S4), the process ends.

[0076] If it is determined by this second heat distribution evaluation that the temperature distribution does not satisfy the predetermined standard (NO in step S4), the flow path adjustment process, temperature distribution measurement and heat distribution evaluation are repeated until the final temperature distribution satisfies the predetermined standard.

[0077] As described above, in the present embodiment, a wafer carrier that is formed by bonding a ceramic substrate and a cooling plate, and that can heat a wafer electrostatically fixed to a mounting surface on a ceramic substrate at a predetermined temperature distribution by balancing the heating by the energization of a heater electrode embedded in the ceramic substrate and the cooling by the refrigerant circulated and supplied to the cooling plate, comprises a base bonded to the ceramic substrate and a cover that can be freely loaded and unloaded relative to the base, and the flow path for the refrigerant to flow can be opened by removing the cover. Accordingly, when the temperature distribution at the mounting surface does not meet the predetermined benchmark, the temperature distribution can be improved by removing the cover and adjusting the shape of the flow path. By being able to adjust the temperature distribution in the wafer carrier after manufacture, the manufacturing yield of the wafer carrier is improved.

[0078] <Modification>

[0079] In the above embodiment, the temperature distribution is measured on the placement surface 20a where no wafer is placed. Alternatively, the temperature distribution on the wafer surface may be measured while the wafer is placed on the placement surface 20a and the wafer is electrostatically fixed to the placement surface 20a by applying voltage using the ESC power supply 70. In this case, it is also preferable to place the wafer when measuring the temperature distribution of the wafer placement table after the flow path adjustment process.

Claims

1. A method for adjusting the thermal uniformity of a wafer loading table, which is a method for adjusting the thermal uniformity of a wafer loading surface of the wafer loading table, wherein the wafer loading table is configured to: apply voltage to an ESC electrode embedded in a ceramic substrate so that a wafer is electrostatically fixed to the loading surface of the ceramic substrate, perform electrical heating using a heater electrode embedded in the ceramic substrate, and perform cooling using a refrigerant circulated and supplied to a flow path provided in a cooling plate connected to the ceramic substrate, wherein: The method for adjusting the thermal uniformity in the wafer placement table includes the following steps: a) preparing the wafer stage, the wafer stage comprising the ceramic base and the cooling plate, the cooling plate being bonded to the ceramic base and comprising a base having the flow path, and a cover which is detachable from the base and can open the flow path by being removed from the base; b) measuring the temperature distribution of the placement surface while performing the power heating and the cooling in a state where the cover is mounted on the base; c) when the measured temperature distribution does not satisfy a predetermined reference, removing the cover from the base and partially adjusting the shape of the flow path; d) after the cover is mounted on the base, while performing the electrical heating and the cooling, the temperature distribution of the wafer stage whose shape of the flow path is adjusted in the step c) is measured again, The step c) and the step d) are repeatedly performed until the temperature distribution remeasured in the step d) satisfies the predetermined standard.

2. The method for adjusting thermal uniformity in a wafer stage according to claim 1, wherein: With respect to the base portion of the wafer placing table prepared in the step a), fins are provided in advance to protrude from at least one location of the flow path.

3. The method for adjusting thermal uniformity in a wafer stage according to claim 2, wherein: In the step c), at least one of the following steps is performed at a predetermined position determined based on the measurement result of the temperature distribution: a step of lowering the height of the fins, a step of widening the width of the flow path, a step of forming a groove at a portion of one main surface of the cover portion facing the flow path, or The step of adding new fins to the flow path.

4. The method for adjusting thermal uniformity in a wafer stage according to claim 3, wherein: When the new fin is added to the flow path in the step c), the thermal conductivity of the material of the new fin is made higher than the thermal conductivity of the material of the cooling plate.

5. The method for adjusting thermal uniformity in a wafer stage according to claim 1, wherein: In the step c), at least one of the following steps is performed at a predetermined position determined based on the measurement result of the temperature distribution: a step of widening the width of the flow path, a step of forming a groove at a portion of one main surface of the cover portion facing the flow path, or A step of providing a fin protruding from at least one location of the flow path.

6. A method for manufacturing a wafer stage, wherein: A method for manufacturing a wafer stage is characterized in that a voltage is applied to an ESC electrode embedded in a ceramic substrate and a wafer is electrostatically fixed on a loading surface of the ceramic substrate, and heating is performed by energizing a heater electrode embedded in the ceramic substrate and cooling is performed by circulating a refrigerant in a flow path provided in a cooling plate connected to the ceramic substrate. The method comprises the following steps: a) bonding the ceramic substrate in which the ESC electrode and the heater electrode are embedded and the base of the cooling plate having the groove to be the flow path; b) implanting a first power supply unit for supplying power to the ESC electrode and a second power supply unit for supplying power to the heater electrode into a joint of the ceramic substrate and the base; c) a cover portion of the cooling plate is detachably mounted relative to the base portion to close the flow path; d) measuring the temperature distribution of the placement surface while performing the power heating and the cooling in a state where the cover is mounted on the base; e) when the measured temperature distribution does not satisfy a predetermined reference, removing the cover from the base and partially adjusting the shape of the flow path; f) after the cover is mounted on the base, while performing the electrical heating and the cooling, the temperature distribution of the wafer stage whose shape of the flow path is adjusted in the step e) is measured again, The steps e) and f) are repeatedly performed until the temperature distribution remeasured in the step f) satisfies the predetermined standard.

7. The method for manufacturing a wafer stage according to claim 6, wherein: At the latest before the step c) is performed, a fin is provided to protrude at at least one location of the flow path.

8. The method for manufacturing a wafer stage according to claim 7, wherein: In the step e), at least one of the following steps is performed at a predetermined position determined based on the measurement result of the temperature distribution: a step of lowering the height of the fins, a step of widening the width of the flow path, a step of forming a groove at a portion of one main surface of the cover portion facing the flow path, or The step of adding new fins to the flow path.

9. The method for manufacturing a wafer stage according to claim 8, wherein: When the new fin is added to the flow path in the step e), the thermal conductivity of the material of the new fin is made higher than the thermal conductivity of the material of the cooling plate.

10. The method for manufacturing a wafer stage according to claim 6, wherein: In the step e), at least one of the following steps is performed at a predetermined position determined based on the measurement result of the temperature distribution: a step of widening the width of the flow path, a step of forming a groove at a portion of one main surface of the cover portion facing the flow path, or A step of providing a fin protruding from at least one location of the flow path.

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