Semiconductor device

By using a resin cover to cover and clamp semiconductor components in semiconductor devices, the problem of insufficient voltage resistance under high voltage conditions is solved, and higher voltage resistance is achieved.

CN119908035APending Publication Date: 2025-04-29KK TOSHIBA +1
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Patent Information

Application Number
CN202480003976.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-14
Filing Date
2024-02-27
Publication Date
2025-04-29

AI Technical Summary

Technical Problem

Existing semiconductor devices are unbearable under high voltage conditions and have insufficient voltage resistance.

Method used

The semiconductor device design is adopted, including a semiconductor element, a conductive electrode, an insulator and a cover, wherein the cover is composed of resin, covering the side surface of the semiconductor element and clamping the upper and lower surfaces thereof to improve insulation.

Benefits of technology

Through the cover and clamping of the cover, the extrusion and discharge of the conductor are suppressed, and the voltage resistance of the semiconductor device is significantly improved.

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Abstract

The invention relates to a semiconductor device. According to one embodiment, a semiconductor device includes a semiconductor element, a first conductor, a first electrode, a second conductor, a second electrode, and a cover. The semiconductor element extends along the first surface, includes the first surface, a second surface facing the first surface, and a third surface extending to an end portion of the first surface and an end portion of the second surface, and includes a first electrode pad provided in a region including the first surface, and a second electrode pad provided in a region including the second surface. The first conductor is in contact with the first electrode pad. The first electrode is in contact with the first conductor. The second conductor is in contact with the second electrode pad. The second electrode is in contact with the second conductor. The cover is a resin cover including a first portion, a second portion, and a third portion. The first portion covers the third surface. The second portion is connected to the first portion and faces the first surface. The third portion is connected to the first portion, faces the second surface, and sandwiches the semiconductor element together with the second portion.
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Description

Technical Field

[0001] An embodiment of the present invention relates to a semiconductor device. Background Art

[0002] As power semiconductor devices, IGBT (Insulated Gate Bipolar Transistor) and IEGT (Injection Enhanced Gate Transistor) are known. The chip of these semiconductor devices includes a collector electrode pad on one of two opposing surfaces and an emitter electrode pad on the other. Electrodes are respectively mounted on the collector electrode pad and the emitter electrode pad. Since a high voltage is applied to the power semiconductor device, it is required to be able to withstand the application of the high voltage.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: International Publication No. 2012 / 133098 Pamphlet

[0006] Patent Document 2: Japanese Patent Application Laid-Open No. 6-224235

[0007] Patent Document 3: Japanese Patent No. 7203214 Summary of the invention

[0008] Problems to be solved by the invention

[0009] Provided is a semiconductor device having a higher withstand voltage.

[0010] Means for solving problems

[0011] A semiconductor device according to one embodiment includes a semiconductor element, a first conductor, a first electrode, a second conductor, a second electrode, and a cover. The semiconductor element extends along a first surface, includes a first surface, a second surface opposite to the first surface, and a third surface extending to the end of the first surface and the end of the second surface, and includes a first electrode pad provided in a region including the first surface, and a second electrode pad provided in a region including the second surface. The first electrode is in contact with the first electrode pad. The first electrode is in contact with the first conductor. The second conductor is in contact with the second electrode pad. The second electrode is in contact with the second conductor. The cover is a resin cover including a first part, a second part, and a third part. The first part covers the third surface. The second part is connected to the first part and is opposite to the first surface. The third portion is connected to the first portion, faces the second surface, and sandwiches the semiconductor element together with the second portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 An example of the structure of a converter device including the semiconductor device according to the first embodiment is shown.

[0013] Figure 2 An example of a cross-sectional structure of a semiconductor module including the semiconductor device according to the first embodiment is shown.

[0014] Figure 3 An example of a planar structure of the semiconductor device according to the first embodiment is shown.

[0015] Figure 4 An example of a planar structure of the semiconductor device according to the first embodiment is shown.

[0016] Figure 5 An example of the cross-sectional structure of the semiconductor device according to the first embodiment is shown.

[0017] Figure 6 An example of the cross-sectional structure of the semiconductor device according to the first embodiment is shown.

[0018] Figure 7 An example of the cross-sectional structure of the semiconductor device according to the first embodiment is shown.

[0019] Figure 8 A part of the manufacturing process of the semiconductor device according to the first embodiment is shown.

[0020] Fig. 9 A part of the manufacturing process of the semiconductor device according to the first embodiment is shown.

[0021] Fig.10 An example of a cross-sectional structure of a semiconductor device according to a modification of the first embodiment is shown. DETAILED DESCRIPTION

[0022] The following describes the embodiments with reference to the accompanying drawings. The accompanying drawings are schematic, and the relationship between thickness and plane size, the ratio of thickness of each layer, etc. may be different from the actual situation. In addition, the drawings may also include parts with different relationship and ratio of each other's size.

[0023] Hereinafter, the implementation method is described using the XYZ orthogonal coordinate system. Sometimes the positive direction of the vertical axis of the figure is referred to as the upper side, and the negative direction is referred to as the lower side. Sometimes the positive direction of the horizontal axis of the figure is referred to as the right side, and the negative direction is referred to as the left side. That is, in the top view (XY plane view (hereinafter, the same)) representing the XY plane, the upper side refers to the +Y direction, the lower side refers to the -Y direction, the right side refers to the +X direction, and the left side refers to the -X direction. In the XZ plane view observed from the +Y direction, the upper side refers to the +Z direction, the lower side refers to the -Z direction, the right side refers to the +X direction, and the left side refers to the -X direction.

[0024] 1. First Implementation Method

[0025] 1.1. Composition (structure)

[0026] Figure 1 1 shows an example of a structure of a converter including a semiconductor device according to the first embodiment. The converter 100 converts electric power, for example. Figure 1 As shown, the conversion device 100 includes a housing, which includes a bottom 101, a side 102 and an upper part 103. The housing has a space inside. The conversion device 100 also includes a support 105, a plurality of cooling fins 106, a support 107, a spring 108 and a plurality of semiconductor modules 110 inside the housing. Figure 1 An example of three semiconductor modules 110 is shown.

[0027] The support body 105 is made of an insulator and is located on the upper surface of the base 101. A plurality of cooling fins 106 and a plurality of semiconductor modules 110 are located one by one at alternating positions on the upper surface of the support body 105. That is, one semiconductor module 110 is placed on the upper surface of one cooling fin 106, another cooling fin is placed on the upper surface of the semiconductor module 110, and another semiconductor module 110 and cooling fin 106 are placed similarly. Two semiconductor modules 110 arranged in the +Z direction are electrically connected.

[0028] The support body 107 is composed of an insulating pair and is located on the upper surface of the uppermost cooling fin 106. The spring 108 is located on the upper surface of the support body 107 and is in contact with the lower surface of the upper portion 103 at the upper surface.

[0029] Figure 2FIG. 2 shows an example of a cross-sectional structure of a semiconductor module including the semiconductor device according to the first embodiment. Figure 2 As shown, the semiconductor module 110 includes a plurality of semiconductor devices 1 , a plurality of conductors 131 , a plurality of terminal plates 132 , and external electrodes 135 and 136 .

[0030] A plurality of semiconductor devices 1 are arranged at intervals on the upper surface of the external electrode 135. The semiconductor device 1 includes a semiconductor element 3, an emitter electrode 4, and a collector electrode 5.

[0031] The semiconductor element 3 is an element formed on a substrate substantially composed of a semiconductor. In this specification, "substantially" and "substantially" mean that the sentence described by "substantially" does not require the strictness of the sentence to the extent of the content expressed by the sentence, but includes errors caused by unavoidable reasons. Examples of the semiconductor element 3 include IGBT and IEGT.

[0032] The collector electrode 5 is a conductive member such as metal. The collector electrode 5 is located on the upper surface of the external electrode 135. The semiconductor element 3 is located on the upper surface of the collector electrode 5.

[0033] The emitter electrode 4 is a conductive member such as metal and is located on the upper surface of the semiconductor element 3 .

[0034] The conductor 131 is located on the upper surface of the semiconductor element 3 and is in contact with the gate electrode pad 6 (not shown) of the semiconductor element 3 at its lower surface. The terminal plate 132 is in contact with the upper surface of the conductor 131 at its lower surface.

[0035] The external electrode 135 includes copper (Cu) or is substantially composed of copper. The external electrode 136 is in contact with the upper surfaces of the plurality of semiconductor elements 3 at its lower surface. The external electrode 136 includes copper or is substantially composed of copper.

[0036] Figure 3 as well as Figure 4 An example of a planar structure of the semiconductor device according to the first embodiment is shown. Figure 3 FIG. 1 shows a state where the semiconductor device 1 is viewed from the −Z direction. Figure 4 1 shows a state where the semiconductor device 1 is viewed from the +Z direction.

[0037] like Figure 3 as well as Figure 4 As shown in FIG. 1 , the semiconductor device 1 extends along the XY plane. The semiconductor element 3 has a quadrilateral shape, for example, a rectangular shape, along the XY plane. Figure 2 As described above, the semiconductor element 3 , the emitter electrode 4 , and the collector electrode 5 further include a cover 7 . The semiconductor element 3 further includes a gate electrode pad 6 .

[0038] The emitter electrode 4 has a size that fits inside the edge of the semiconductor element 3 along the XY plane. The emitter electrode 4 has a shape along the XY plane that is obtained by cutting off the corners of a quadrilateral. For example, the emitter electrode 4 has a shape that is obtained by cutting off the corners of a rectangle along the XY plane. The emitter electrode 4 is connected to an emitter electrode pad 31 (not shown) of the semiconductor element 3.

[0039] The emitter electrode 4 includes one or more of molybdenum (Mo), ruthenium (Ru), tungsten (W), iron (Fe), copper (Cu), cobalt (Co), nickel (Ni) and palladium (Pd). The emitter electrode 4 includes molybdenum, copper-molybdenum, copper-tungsten, and invar as a main material, or is substantially composed of molybdenum, copper-molybdenum, copper-tungsten, and invar.

[0040] As reference Figure 1 As described above, the semiconductor device 1 can be included in the semiconductor module 110, and a plurality of semiconductor modules 110 can be stacked in the conversion device 100. In such applications, the semiconductor device 1 is subjected to a large load. Molybdenum, copper-molybdenum, copper-tungsten or Invar is used for the purpose of withstanding the load. Molybdenum, copper-molybdenum, copper-tungsten and Invar have high hardness.

[0041] In the case of using molybdenum, the surface of the emitter electrode 4 may be coated with one or more of nickel, gold (Au), palladium (Pd), and ruthenium (Ru).

[0042] Copper molybdenum is an alloy of copper and molybdenum. Copper tungsten is an alloy of copper and tungsten. Copper molybdenum and copper tungsten have higher heat dissipation than molybdenum and are less likely to thermally expand than molybdenum.

[0043] Invar is less likely to thermally expand than molybdenum. When Invar is used, the emitter electrode 4 contains iron and cobalt, or iron and nickel.

[0044] The collector electrode 5 has a size along the XY plane that is accommodated inside the edge of the semiconductor element 3. The collector electrode 5 has a quadrilateral shape along the XY plane, for example, a rectangular shape. The emitter electrode 4 is connected to the collector electrode pad 32 of the semiconductor element 3. The collector electrode 5 is substantially composed of the same material as the material that can be used as the emitter electrode 4.

[0045] The gate electrode pad 6 is a conductive member such as metal. The gate electrode pad 6 is located in the cut portion of the emitter electrode 4. The gate electrode pad 6 has a quadrilateral shape along the XY plane, for example, a rectangular shape. The gate electrode pad 6 is spaced apart from the emitter electrode 4.

[0046] The cover 7 is an insulating member. The cover 7 has an annular shape along the XY plane and has a quadrilateral outline, for example, a rectangular outline. The cover 7 is located around the semiconductor element 3 and extends continuously along the edge of the semiconductor element 3. The cover 7 is substantially made of an insulating resin. Examples of the resin include PTFE (polytetrafluoroethylene).

[0047] Figure 5 An example of the cross-sectional structure of the semiconductor device according to the first embodiment is shown. Figure 5 Shown along Figure 3 as well as Figure 4 The semiconductor device 1 has a structure along the VV line of FIG. 6 and a structure along the cross section along the XZ plane. For example, the semiconductor device 1 has a structure along the VV line of FIG. 6 on any XZ plane and any YZ plane excluding the gate electrode pad 6. Figure 5 The structure shown.

[0048] like Figure 5 As shown, the semiconductor device 1 further includes conductors 11 and 12 , and insulators 14 and 15 . Figure 5 Also shown are the emitter electrode pad 31 and the collector electrode pad 32 of the semiconductor element 3 . Figure 5 The dimensions and positional relationships of the several components shown will be Figure 6 This will be described later.

[0049] The emitter electrode pad 31 extends along the XY plane and extends over a region including one of two surfaces of the semiconductor element 3 that extend along the XY plane and face each other. Figure 5 An example is shown in which the emitter electrode pad 31 is located on the upper surface of two opposing surfaces.

[0050] The collector electrode pad 32 faces the emitter electrode pad 31. The collector electrode pad 32 extends along the XY plane and extends over a region including the other of the two faces of the semiconductor element 3 extending along the XY plane and facing each other. Figure 5 An example is shown in which the collector electrode pad 32 is located on the lower surface of two opposing surfaces.

[0051] The emitter electrode 4 has a rectangular parallelepiped shape with corners cut off. The emitter electrode 4 faces the surface where the emitter electrode pad 31 of the semiconductor element 3 is located via the conductor 11. The emitter electrode 4 has a length L1 in the X direction.

[0052] The collector electrode 5 has a rectangular parallelepiped shape, and faces the surface where the collector electrode pad 32 of the semiconductor element 3 is located, with the conductor 12 interposed therebetween. The collector electrode 5 has a length L2 in the X direction. The length L2 is longer than the length L1.

[0053] The conductor 11 extends along the XY plane. The conductor 11 is located between the emitter electrode pad 31 and the emitter electrode 4, and is in contact with the upper surface of the emitter electrode pad 31 and the lower surface of the emitter electrode 4. The edge of the conductor 11 is located closer to the center line CL of the semiconductor device 1 than the edge of the emitter electrode 4.

[0054] As an example of the conductor 11, a metal is included, for example, a sintered body including a metal. The sintered body is formed by heating a sheet or a paste of a material including the conductor 11 to sinter. The conductor 11 is substantially composed of a material that is easy to bond to the emitter electrode 4 based on the material of the emitter electrode 4. The conductor 11 is substantially composed of a metal, and includes one or more of gold, silver (Ag), copper, lead (Pb), tin (Sn) and nickel. The conductor 11 includes gold, silver, copper or solder as a main material, or is substantially composed of gold, silver, copper or solder.

[0055] Gold is easy to bond with many metals because it is difficult to oxidize, and has higher conductivity and heat dissipation than solder. Silver can be processed by common technology, is relatively easy to obtain, and has higher conductivity and heat dissipation than solder. Copper has high heat dissipation, can be easily obtained, and has higher conductivity and heat dissipation than solder. Solder can be easily obtained and can be processed by common technology.

[0056] The conductor 12 extends along the XY plane. The conductor 12 is located between the collector electrode pad 32 and the collector electrode 5, and is in contact with the upper surface of the collector electrode 5 and the lower surface of the collector electrode pad 32. The edge of the conductor 12 is located closer to the center line CL of the semiconductor device 1 than the edge of the collector electrode 5. The conductor 12 is formed by sintering a sheet or paste of a material containing the conductor 12 by heating. As an example of the conductor 12, a metal, such as a sintered body containing a metal, is included. The conductor 12 is substantially composed of a metal, and is substantially composed of the same material as the material that can be used as the conductor 11.

[0057] The insulator 14 surrounds the conductor 11 along the XY plane, is located between the emitter electrode 4 and the upper surface of the semiconductor element 3, and is in contact with the lower surface of the emitter electrode 4 and the upper surface of the semiconductor element 3. The insulator 14 is also partially located between the upper surface of the semiconductor element 3 and the cover 7, and covers the upper surface of the semiconductor element 3 except for the area directly below the emitter electrode 4 and the area above the gate electrode pad 6. The insulator 14 is substantially composed of a heat-resistant organic substance. For example, the insulator 14 contains a component contained in a solvent of a paste or sheet containing an element of the conductor 11, or is substantially composed of such a component. As an example of a component, propylene carbonate is included.

[0058] The insulator 15 surrounds the conductor 12 along the XY plane, is located between the collector electrode 5 and the lower surface of the semiconductor element 3, and is in contact with the upper surface of the collector electrode 5 and the lower surface of the semiconductor element 3. The insulator 15 is substantially made of the same material as that used as the insulator 14.

[0059] The cover 7 covers the upper surface of the semiconductor element 3 except for the area directly below the emitter electrode 4 and the area except for the area above the gate electrode pad 6. The cover 7 also covers the area of ​​the lower surface of the semiconductor element 3 that is not covered by either the insulator 15 or the collector electrode 5. The cover 7 also covers the entire side surface of the semiconductor element 3.

[0060] Figure 6 An example of the cross-sectional structure of the semiconductor device according to the first embodiment is shown. Figure 6 Shown along Figure 3 as well as Figure 4 The semiconductor device 1 has a structure along the VI-VI line of FIG. 6 and a structure of a cross section along the XZ plane. The semiconductor device 1 has a structure along the VI-VI line of FIG. 6 and a structure of a cross section along the XZ plane. Figure 6 The structure shown.

[0061] like Figure 6 As shown and as referenced Figure 4 As described above, the gate electrode pad 6 is located at a cut-away portion of the emitter electrode 4. The gate electrode pad 6 is located in a region including the upper surface of the semiconductor element 3. The gate electrode pad 6 is not covered by the cover 7 and is exposed.

[0062] Figure 7 An example of a cross-sectional structure of a semiconductor device according to the first embodiment is shown, and a part of a side surface of the semiconductor device 1 is shown in an enlarged manner. Figure 7 As shown, there is a distance D1 between the edge of the collector electrode 5 and the side surface of the semiconductor element 3. There is a distance D2 between the edge of the emitter electrode 4 and the side surface of the semiconductor element 3. The distance D2 is greater than the distance D1. This is based on the following reason. That is, during the operation of the semiconductor element 3 (during the application of voltage to the emitter electrode 4 and the collector electrode 5), the potential of the collector electrode 5 is transmitted from the corner of the collector electrode 5 along the side surface of the semiconductor element 3, and the area along the side surface of the semiconductor element 3 and the area near the side surface has the same potential as the collector electrode 5. Therefore, point A near the corner formed by the upper surface and the side surface of the semiconductor element 3 has the same potential as the collector electrode 5. Therefore, when the emitter electrode 4 approaches point A, discharge may occur between point A and the emitter electrode 4. In order to avoid this, the emitter electrode 4 is located at a position away from point A, so that the distance D2 is greater than the distance D1.

[0063] The cover 7 includes a first portion 71 , a second portion 72 , a third portion 73 , a fourth portion 74 , and a fifth portion 75 .

[0064] The first portion 71 has a quadrilateral shape. The first portion 71 occupies a region including the entire side surface of the cover 7. The first portion 71 covers the entire side surface of the semiconductor element 3. The first portion 71 extends from the upper end to the lower end of the cover 7.

[0065] The second portion 72 has a quadrilateral shape. The second portion 72 occupies the region between the first portion 71 and the collector electrode 5 in the cover 7. The second portion 72 is located in the region including a portion of the lower end of the cover 7. The second portion 72 is in contact with the side surface of the collector electrode 5 on the left side (the side close to the center line CL of the semiconductor device 1). The upper edge of the second portion 72 is aligned with the upper surface of the collector electrode 5. The edge of the second portion 72 on the right side (the side away from the center line CL of the semiconductor device 1) is connected to the left side edge of the first portion 71 (the side close to the center line CL of the semiconductor device 1). The length of the second portion 72 in the X direction, i.e., the distance D1, is based on a dimension determined in such a way that the second portion 72 covers a maximum of 5% of the lower surface of the semiconductor element 3.

[0066] The third portion 73 has a quadrilateral shape. The third portion 73 occupies the region between the first portion 71 and the emitter electrode 4 in the cover 7. The third portion 73 is located in the region including a portion of the upper end of the cover 7. The third portion 73 is in contact with the side surface of the emitter electrode 4 on the left side (the side close to the center line CL of the semiconductor device 1). The lower edge of the third portion 73 is located closer to the lower surface of the emitter electrode 4 in the -Z direction. The edge of the third portion 73 on the right side (the side away from the center line CL of the semiconductor device 1) is connected to the left side edge of the first portion 71 (the side close to the center line CL of the semiconductor device 1). The length of the third portion 73 in the X direction, i.e., the distance D2, is based on a dimension determined so that the third portion 73 covers a maximum of 20% of the upper surface of the semiconductor element 3.

[0067] The fourth portion 74 occupies the region between the second portion 72 and the semiconductor element 3 and the region between the collector electrode 5 and the semiconductor element 3 in the cover 7. The fourth portion 74 has a quadrilateral shape. The lower edge of the fourth portion 74 is connected to the upper edge of the second portion 72. The right edge of the fourth portion 74 (the side away from the center line CL of the semiconductor device 1) is connected to the left edge of the first portion 71 (the side close to the center line CL of the semiconductor device 1).

[0068] The fifth portion 75 occupies the area between the third portion 73 and the semiconductor element 3 in the cover 7. The fifth portion 75 has a quadrilateral shape. The upper edge of the fifth portion 75 is connected to the lower edge of the third portion 73. The right edge of the fifth portion 75 (the side away from the center line CL of the semiconductor device 1) is connected to the left edge of the first portion 71 (the side close to the center line CL of the semiconductor device 1).

[0069] The upper surface of semiconductor element 3 not covered by emitter electrode 4 and the portion other than the portion above gate electrode pad 6 are covered by cap 7. The lower surface of semiconductor element 3 not covered by collector electrode 5 is covered by cap 7.

[0070] The cover 7 sandwiches the upper surface and the lower surface of the semiconductor element 3 by the first portion 71, the second portion 72, and the third portion 73. With such a shape of the cover 7, the cover 7 is fixed to the semiconductor element 3 without using an adhesive.

[0071] 1.2. Manufacturing method

[0072] Figure 8 as well as Fig. 9 A part of the manufacturing process of the semiconductor device according to the first embodiment is shown. Fig. 9 The state before the collector electrode 5 , the bonding material 21 , the semiconductor element 3 , the bonding material 22 , the emitter electrode 4 , the resin 7A, the jig 25 , and the buffer material 26 are stacked is shown.

[0073] like Figure 8 as well as Fig. 9 As shown, in the opening of the mask 27, the collector electrode 5, the bonding material 21, the semiconductor element 3, the bonding material 22, the emitter electrode 4 and the buffer material 26 are overlapped in the +Z direction in sequence. The cross section of the mask 27 has a rectangular shape with the inner corners of the rectangle cut off. The lower end of the cutout is roughly aligned with the upper surface of the semiconductor element 3.

[0074] The bonding material 21 contains the conductor 12 and the insulator 15 as a solvent, and has a sheet or paste shape. The bonding material 22 contains the conductor 11 and the insulator 14 as a solvent, and has a sheet or paste shape.

[0075] Resin 7A is arranged on the upper surface of semiconductor element 3. Resin 7A is a material that becomes cover 7 by sintering. Resin 7A has a ring shape and has an opening larger than the shape along the XY plane of emitter electrode 4. Resin 7A is arranged on the upper surface of semiconductor element 3 so as to enclose emitter electrode 4 in its opening.

[0076] A jig 25 is arranged on the upper surface of the resin 7A. The jig 25 fixes the position of the resin 7A. The jig 25 has a ring shape and has an opening larger than the shape along the XY plane of the emitter electrode 4. The jig 25 is arranged on the upper surface of the resin 7A so as to enclose the emitter electrode 4 in its opening.

[0077] A buffer material 26 is disposed on the upper surface of the emitter electrode 4. The buffer material 26 is substantially made of the same material as that of the cover 7, for example.

[0078] In a state where the collector electrode 5, the bonding material 21, the semiconductor element 3, the bonding material 22, the emitter electrode 4, the resin 7A, the jig 25, and the buffer material 26 are arranged in the opening of the mask 27 as described above, the upper surface of the buffer material 26 is subjected to pressure by the punch 29. In a state where pressure is applied, the structure composed of the collector electrode 5, the bonding material 21, the semiconductor element 3, the bonding material 22, the emitter electrode 4, the resin 7A, the jig 25, and the buffer material 26 is heated.

[0079] The bonding material 21 is sintered by heating under pressure. As a result, the conductor 12 is formed, and the semiconductor element 3 and the collector electrode 5 are bonded via the conductor 12. In addition, the insulator 15 is formed by diffusion of the solvent of the bonding material 21.

[0080] By heating while applying pressure, the bonding material 22 is sintered. As a result, the conductor 11 is formed, and the semiconductor element 3 and the emitter electrode 4 are bonded via the conductor 11. In addition, the insulator 14 is formed by diffusion of the solvent of the bonding material 22. Since the area of ​​the XY plane of the emitter electrode 4 is smaller than the area of ​​the XY plane of the collector electrode 5, the emitter electrode 4 is subjected to a greater pressure than the collector electrode 5. Therefore, the solvent of the bonding material 22 spreads to a wider range than the solvent of the bonding material 21.

[0081] By applying pressure and heating, the resin 7A is deformed and expanded. As a result, the resin 7A moves in the area between the mask 27 and the semiconductor element 3, and further reaches the area between the semiconductor element 3 and the collector electrode 5. In this way, the cover 7 is formed from the resin 7A. Even if a portion that is not in contact with the cover 7 is formed on the surface of the semiconductor element 3, the area between the surface of the semiconductor element 3 and the cover 7 in such a portion is filled with the solvent of the bonding material 21 or 22, that is, the insulator 15 or 16. Therefore, the portion of the surface of the semiconductor element 3 that is not in contact with the cover 7 is covered by the insulator 14 or 15.

[0082] After the pressurization and heating, the semiconductor device 1 is completed by cleaning and curing of the cover 7 .

[0083] After curing, the semiconductor device 1 may also be heated, so that the cap 7 softens and the region between the cap 7 and the semiconductor element 3 , the emitter electrode 4 or the collector electrode 5 is filled more reliably before softening.

[0084] According to the first embodiment, as described below, a semiconductor device 1 having a high withstand voltage can be provided.

[0085] In reference to Figure 8 During the above-mentioned pressurization and heating process, the bonding material and the conductor as its component may be squeezed out from the emitter electrode or the collector electrode in the plane along the XY plane. The conductor squeezed out in this way may cause discharge between the collector electrode and the emitter electrode.

[0086] According to the first embodiment, the semiconductor device 1 includes an insulating cover 7 having a shape that covers the side surface of the semiconductor element 3 and clamps the upper surface and the lower surface of the semiconductor element 3. As a result, it is possible to suppress the extrusion of the conductor 11 and the conductor 12, and thus it is possible to suppress the discharge between the collector electrode 5 and the emitter electrode 4 caused by the extrusion of the conductor 11 or 12. Therefore, it is possible to realize a semiconductor device 1 with a high withstand voltage.

[0087] According to the first embodiment, the cover 7 covers the portion of the upper surface of the semiconductor element 3 that is not covered by the emitter electrode 4, and covers the portion of the lower surface of the semiconductor element 3 that is not covered by the collector electrode 5. Therefore, the cover 7 covers the end of the collector electrode 5 to the end of the emitter electrode 4. The cover 7 can improve the insulation of the region between the collector electrode 5 and the emitter electrode 4, thereby realizing a semiconductor device 1 with a high withstand voltage.

[0088] The semiconductor device 1 includes insulators 14 and 15, and the insulator 14 partially fills the gap between the cover 7 and the semiconductor element 3 and partially covers the upper surface of the semiconductor element 3. The insulators 14 and 15 are derived from a solvent, that is, a liquid, and fill the gap between the cover 7 and the semiconductor element 3 with high precision. Therefore, the region from the end of the collector electrode 5 to the end of the emitter electrode 4 is covered with the cover 7 and the insulators 14 and 15 with high precision. This contributes to the realization of a semiconductor device 1 with a high withstand voltage.

[0089] The semiconductor device 1 does not use an adhesive to fix the cover 7 and the semiconductor element 3. In order to improve the withstand voltage of the semiconductor element, an insulating chip frame surrounding the semiconductor element is sometimes installed. This installation can be performed using an adhesive. However, the components of the adhesive, such as siloxane, may deteriorate the characteristics of the semiconductor element. Since the semiconductor device 1 does not use an adhesive to fix the cover 7 and the semiconductor element 3, it is possible to suppress the deterioration of the characteristics of the semiconductor element 3 caused by the adhesive.

[0090] 1.3. Modifications

[0091] like Fig.10 As shown, the cover 7 may cover the entire side surface of the semiconductor element 3, only the vicinity of the end portion of the upper surface of the semiconductor element 3, and only the vicinity of the end portion of the lower surface. Figure 8 In the above-mentioned pressurization and pressurization process, the pressure and (or) temperature are higher than that in Figure 8 When the pressure and / or temperature used in the process are low, such a shape of the cover 7 may be produced. Fig.10 In the structure shown, since the side surface of the semiconductor element 3 which greatly contributes to the generation of discharge between the collector electrode 5 and the emitter electrode 4 is also covered by the cover 7, a high withstand voltage can be achieved.

[0092] Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. These embodiments and their variations are included in the scope and purpose of the invention, and are included in the invention described in the scope of the patent claim and the scope equivalent thereto.

Claims

1. A semiconductor device comprising: A semiconductor element extending along a first surface, including a first surface, a second surface opposite to the first surface, and a third surface extending to an end of the first surface and an end of the second surface, and including a first electrode pad provided in a region including the first surface, and a second electrode pad provided in a region including the second surface; A first conductor connected to the first electrode pad; A first electrode connected to the first conductor; A second conductor connected to the second electrode pad; a second electrode in contact with the second conductor; and The insulating cover includes a first part, a second part and a third part, wherein the first part covers the third surface, the second part is connected to the first part and opposite to the first surface, and the third part is connected to the first part and opposite to the second surface, and clamps the semiconductor element together with the second part.

2. The semiconductor device according to claim 1, wherein The cover is continuous over a region facing the first surface, a region facing the second surface, and a region facing the third surface.

3. The semiconductor device according to claim 1, wherein The cover continuously surrounds the semiconductor element along the first surface.

4. The semiconductor device according to claim 1, wherein The semiconductor device further comprises: a first insulator on the first surface; and The second insulator on the second surface, The second portion of the cover includes a portion not in contact with the first surface. The first insulator is located between the first surface and a portion of the second portion of the cover that is not in contact with the first surface. The third portion of the cover includes a portion not in contact with the second surface. The second insulator is located between a portion of the second portion of the cover that is not in contact with the second surface and the second surface.

5. The semiconductor device according to claim 1, wherein The second portion of the cover is in contact with the first electrode. The third portion of the cover is in contact with the second electrode.

6. The semiconductor device according to claim 1, wherein One or both of the first electrode and the second electrode include one or more of molybdenum, ruthenium, tungsten, iron, copper, cobalt, nickel, and palladium.

7. The semiconductor device according to claim 1, wherein One or both of the first conductor and the second conductor include one or more of gold, silver, copper, lead, tin and nickel.

8. The semiconductor device according to claim 2, wherein: One or both of the first electrode and the second electrode include one or more of molybdenum, ruthenium, tungsten, iron, copper, cobalt, nickel, and palladium.

9. The semiconductor device according to claim 2, wherein: One or both of the first conductor and the second conductor include one or more of gold, silver, copper, lead, tin and nickel.

10. The semiconductor device according to claim 3, wherein One or both of the first electrode and the second electrode include one or more of molybdenum, ruthenium, tungsten, iron, copper, cobalt, nickel, and palladium.

11. The semiconductor device according to claim 3, wherein: One or both of the first conductor and the second conductor include one or more of gold, silver, copper, lead, tin and nickel.

12. The semiconductor device according to claim 4, wherein: One or both of the first electrode and the second electrode include one or more of molybdenum, ruthenium, tungsten, iron, copper, cobalt, nickel, and palladium.

13. The semiconductor device according to claim 4, wherein: One or both of the first conductor and the second conductor include one or more of gold, silver, copper, lead, tin and nickel.

Citation Information

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