Chip testing equipment

Abstract

The invention discloses a chip testing device, and the device enables a to-be-tested chip of a chip storage mechanism to be placed on a bearing seat for temporary storage, so as to enable the bearing seat at a first position to receive the to-be-tested chip. When the detection seat is idle, the to-be-tested chip of the bearing seat at the second position is transferred to the detection seat through the first transfer mechanism so as to perform performance test on the to-be-tested chip, so that the bearing seat can serve as a chip temporary storage position to provide chip support for the detection seat; when the arrangement positions of the detection seats are changed or a plurality of detection seats are provided, the to-be-tested chips can be flexibly transferred to the detection seats through the bearing seat and the first conveying mechanism, so that the testing flexibility is effectively improved; and the extension direction of the second conveying mechanism is perpendicular to the extension direction of the first conveying mechanism, so that the first transfer mechanism can conveniently transfer the to-be-tested chip, the layout is reasonable, and the space utilization rate of the chip detection equipment is further improved.

Description

Technical Field

[0001] The present application relates to the field of chip testing technology, and in particular to a chip testing device. Background Art

[0002] In today's information society, chips are undoubtedly one of the most important basic supports. With the advancement of technology, existing chip testing equipment usually performs performance tests on chips to verify the performance and reliability of chips. For example, chip testing equipment will perform high and low temperature tests on chips to simulate the working environment of chips under extreme temperature conditions and evaluate the performance of chips in different regions, seasons and working environments.

[0003] Existing chip testing equipment is usually only suitable for testing a single chip during testing. When there are multiple chips waiting to be tested, it is necessary to wait for the chip detection of the test seat to be completed and transferred before the next chip to be tested can be transferred from the chip storage mechanism to the test seat. When the test progress is affected, the chip to be tested will be temporarily stored on the chip storage mechanism, resulting in both the test progress of the test seat and the chip transfer progress of the chip storage mechanism being blocked, and the test flexibility is poor. Summary of the invention

[0004] In order to solve the problem of poor test flexibility in the prior art, the present application provides a chip testing device.

[0005] In order to solve the technical problems existing in the prior art, the present application provides a chip testing device, including a seat body, a first conveying mechanism, a supporting seat, at least one detection unit and a first transfer mechanism; the first conveying mechanism is arranged on the seat body; the supporting seat is slidably connected to the first conveying mechanism, the supporting seat includes a first position and a second position, and the supporting seat at the first position is used to receive a chip to be tested; the detection unit is arranged on the seat body, the detection unit includes a second conveying mechanism and a detection seat, the second conveying mechanism is arranged on the seat body, the extension direction of the second conveying mechanism is perpendicular to the extension direction of the first conveying mechanism, and the detection seat is slidably connected to the second conveying mechanism; the first transfer mechanism is arranged on the seat body, the supporting seat moves to the second position along the extension direction of the first conveying mechanism, the first transfer mechanism is used to transfer the chip to be tested of the supporting seat at the second position to the detection seat, and the second conveying mechanism is used to move the chip to be tested on the detection seat to the test position to perform performance testing on the chip to be tested.

[0006] Optionally, the chip testing device further comprises a testing mechanism, which is disposed on the seat body and corresponds to the detection seat, and is used to perform a performance test on the chip to be tested of the detection seat located at the test position.

[0007] Optionally, the detection unit includes a power mechanism, which is arranged on the detection seat, and the power mechanism is used to drive the detection seat to move along a first direction, and the first direction is respectively perpendicular to the extension direction of the first conveying mechanism and the second conveying mechanism, the detection seat is located at the test position, and the test mechanism is located above the detection seat, and the power mechanism is used to drive the detection seat to move upward so that the test probe of the test mechanism contacts the chip to be tested on the detection seat.

[0008] Optionally, the power mechanism includes a bearing member, a first driving member and an encoder, the detection seat is arranged on the bearing member, the bearing member is connected to the first driving member, the first driving member is used to drive the bearing member to rotate so that the detection seat moves upward, and the encoder is spaced apart from the detection seat for detecting the moving distance of the detection seat; wherein the encoder is a magnetic encoder or a photoelectric encoder.

[0009] Optionally, the detection unit includes at least a first group of the second conveying mechanisms, a second group of the second conveying mechanisms, a first detection seat and a second detection seat, the first detection seat is slidably connected to the first group of the second conveying mechanisms, the second detection seat is slidably connected to the second group of the second conveying mechanisms, the first group of the second conveying mechanisms is used to transport the first chip of the first detection seat to the first test position, and the second group of the second conveying mechanisms is used to transport the second chip of the second detection seat to the second test position; the testing mechanism includes a base, a first test probe and a second test probe, the first test probe and the second test probe are arranged on both sides of the base, the first test probe is arranged corresponding to the first test position, the second test probe is arranged corresponding to the second test position, the first test probe is used to perform a performance test on the first chip on the first test position, and the second test probe is used to perform a performance test on the second chip on the second test position.

[0010] Optionally, the detection unit includes at least a first group of the second conveying mechanisms, a second group of the second conveying mechanisms, a first detection seat and a second detection seat, the first detection seat is slidably connected to the first group of the second conveying mechanisms, the second detection seat is slidably connected to the second group of the second conveying mechanisms, the first group of the second conveying mechanisms is used to transport the first chip of the first detection seat to the first test position, and the second group of the second conveying mechanisms is used to transport the second chip of the second detection seat to the second test position; the testing mechanism includes a base and a test probe, the test probe is slidably connected to the base, and the test probe is used to perform a performance test on the first chip when sliding to the first test position, and to perform a performance test on the second chip when sliding to the second test position.

[0011] Optionally, the detection unit includes a limiting mechanism, which is detachably connected to the detection seat, and the limiting mechanism is provided with a limiting seat, the size of the limiting seat corresponds to the size of the chip to be tested, and the limiting seat is used to carry the chip to be tested.

[0012] Optionally, the chip testing equipment also includes a chip storage mechanism and a second transfer mechanism, the chip storage mechanism is arranged on a side of the supporting seat away from the detection seat, the chip storage mechanism stores a plurality of the chips to be tested, and the second transfer mechanism is used to transfer the chips to be tested in the chip storage mechanism to the supporting seat.

[0013] Optionally, the chip testing equipment includes at least a first group of the first conveying mechanisms and a second group of the first conveying mechanisms arranged in parallel on the seat body, a first supporting seat is slidably connected to the first group of the first conveying mechanisms, and a second supporting seat is slidably connected to the second group of the first conveying mechanisms; the second transfer mechanism is used to transfer the third chip on the chip storage mechanism to the first supporting seat of the first group of the first conveying mechanisms, and the second transfer mechanism is also used to transfer the fourth chip on the chip storage mechanism to the second supporting seat of the second group of the first conveying mechanisms.

[0014] Optionally, the chip testing equipment includes at least two groups of detection units, which are arranged in sequence along the extension direction of the first conveying mechanism, and the first transfer mechanism is used to transfer the chips to be tested on the carrier to the first group of detection units and the second group of detection units respectively.

[0015] Compared with the prior art, the supporting seat of the chip testing equipment of the present application is slidably connected to the first conveying mechanism, and the supporting seat in the first position is used to receive the chip to be tested; at least one detection unit is arranged on the seat body, and the detection unit includes a second conveying mechanism and a detection seat, the second conveying mechanism is arranged on the seat body, and the extension direction of the second conveying mechanism is perpendicular to the extension direction of the first conveying mechanism, and the detection seat is slidably connected to the second conveying mechanism; the first transfer mechanism is arranged on the seat body, and the supporting seat moves to the second position along the extension direction of the first conveying mechanism, the first transfer mechanism is used to transfer the chip to be tested of the supporting seat in the second position to the detection seat, and the second conveying mechanism is used to move the chip to be tested on the detection seat to the test position, so as to perform performance testing on the chip to be tested. Through the above-mentioned method, the chip detection equipment of the present application can place the chip to be tested of the chip storage mechanism on the carrier seat for temporary storage, so that the carrier seat at the first position receives the chip to be tested, and when the detection seat is idle, the chip to be tested of the carrier seat at the second position is transferred to the detection seat through the first transfer mechanism, so that the carrier seat can be used as a chip temporary storage position to provide chip support for the detection seat; when the setting position of the detection seat changes or there are multiple detection seats, the chip to be tested can be flexibly transferred to the detection seat through the carrier seat and the first conveying mechanism, effectively improving the flexibility of the test; and the extension direction of the second conveying mechanism is perpendicular to the extension direction of the first conveying mechanism, which can facilitate the first transfer mechanism to transfer the chip to be tested. The layout is reasonable, which further improves the space utilization of the chip detection equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 is a structural schematic diagram of a first embodiment of a chip testing device provided by the present application;

[0018] Figure 2 is a structural schematic diagram of a second embodiment of a chip testing device provided by the present application;

[0019] Figure 3 is a structural schematic diagram of a third embodiment of a chip testing device provided by the present application;

[0020] Figure 4 yes Figure 3 A magnified schematic diagram of the structure in the middle;

[0021] Figure 5 yes Figure 3 A structural schematic diagram of an embodiment of a detection unit;

[0022] Figure 6 yes Figure 1 A structural schematic diagram of an embodiment of a testing mechanism;

[0023] Figure 7 yes Figure 1 A structural schematic diagram of an embodiment of the first transport mechanism and the supporting seat.

[0024] In the figure, 10, seat body; 21, first conveying mechanism; 22, bearing seat; 221, first bearing seat; 222, second bearing seat; 23, first transfer mechanism; 30, detection unit; 31, second conveying mechanism; 32, detection seat; 321, first detection seat; 322, second detection seat; 33, power mechanism; 331, bearing member; 34, limiting mechanism; 341, limiting seat; 40, testing mechanism; 41, base; 51, chip storage mechanism; 52, second transfer mechanism. DETAILED DESCRIPTION

[0025] The present application is further described in detail below in conjunction with the accompanying drawings and examples. It is particularly noted that the following examples are only used to illustrate the present application, but are not intended to limit the scope of the present application. Similarly, the following examples are only some embodiments of the present application rather than all embodiments, and all other embodiments obtained by those of ordinary skill in the art without making creative work are within the scope of protection of the present application.

[0026] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0027] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "install", "set", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or a connection through an intermediate medium. For ordinary technicians in this field, if there are directional indications (such as up, down, left, right, front, back...) involved in the embodiments of this application, the directional indications are only used to explain the relative position relationship, movement, etc. between the components in a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0028] See also Figure 1 and Figure 2 , Figure 1 is a schematic structural diagram of a first embodiment of a chip testing device provided by the present application, Figure 2 Schematic diagram of the structure of the second embodiment of the chip testing device provided by the present application. Figure 1 and Figure 2 As shown, the chip testing device according to the embodiment of the present application includes a base 10 , a first conveying mechanism 21 , a supporting base 22 , at least one detection unit 30 and a first transfer mechanism 23 .

[0029] The first conveying mechanism 21 is arranged on the base body 10; the supporting seat 22 is slidably connected to the first conveying mechanism 21, and the supporting seat 22 includes a first position and a second position. The bearing seat 22 at the first position is used to receive the chip to be tested; the detection unit 30 is arranged on the base body 10, and the detection unit 30 includes a second conveying mechanism 31 and a detection seat 32. The second conveying mechanism 31 is arranged on the base body 10, and the extension direction X of the second conveying mechanism 31 is perpendicular to the extension direction Y of the first conveying mechanism 21, and the detection seat 32 is slidably connected to the second conveying mechanism 31; the first transfer mechanism 23 is arranged on the base body 10, and the bearing seat 22 moves to the second position along the extension direction Y of the first conveying mechanism 21. The first transfer mechanism 23 is used to transfer the chip to be tested of the bearing seat 22 at the second position to the detection seat 32, and the second conveying mechanism 31 is used to move the chip to be tested on the detection seat 32 to the test position to perform performance testing on the chip to be tested.

[0030] Specifically, the first transport mechanism 21 may include a second driving member and a first transport rail, the second driving member is connected to the support seat 22, the support seat 22 is arranged on the first transport rail, and the second driving member is used to drive the support seat 22 to slide along the extension direction of the first transport rail, so that the support seat 22 moves between the first position and the second position. The support seat 22 is used to receive the chip to be tested from the chip storage mechanism 51 of the chip detection equipment, so as to temporarily store the chip to be tested as a transfer platform. The second transport mechanism 31 may include a third driving member and a second transport rail, the third driving member is connected to the detection seat 32, the detection seat 32 is arranged on the second transport rail, and the third driving member is used to drive the detection seat 32 to slide along the extension direction of the second transport rail, so that the detection seat 32 receives the chip to be tested transferred by the second transfer mechanism 52, and moves the chip to be tested to the test position for testing.

[0031] The first transfer mechanism 23 may be provided with at least one mechanical clamp, and the first transfer mechanism 23 clamps the chip to be tested on the carrier 22 by driving the mechanical clamp to transfer the chip to be tested from the carrier 22 to the detection seat 32. The extension directions X of the first conveying mechanism 21 and the second conveying mechanism 31 are perpendicular to each other. In a possible embodiment, the extension direction X of the second conveying mechanism 31 is parallel to the length direction of the seat 10, and the extension direction Y of the first conveying mechanism 21 is parallel to the width direction of the seat 10.

[0032] Further, the above-mentioned carrier seat 22 and detection seat 32 may include multiple ones. Exemplarily, the seat body 10 of the chip testing device may be provided with a first conveying mechanism 21 and multiple second conveying mechanisms 31, the multiple second conveying mechanisms 31 are respectively provided on one side of the first conveying mechanism 21, the multiple second conveying mechanisms 31 may be arranged side by side along the extension direction Y of the first conveying mechanism 21, and the chips to be tested on the carrier seat 22 are sequentially transferred to the detection seats 32 of the multiple second conveying mechanisms 31 by the first transfer mechanism 23; or, the seat body 10 of the chip testing device may be provided with multiple first conveying mechanisms 21 and multiple second conveying mechanisms 31, the multiple first conveying mechanisms 21 are arranged side by side along the extension direction X of the second conveying mechanism 31; or, the seat body 10 of the chip testing device may be provided with multiple first conveying mechanisms 21 and multiple second conveying mechanisms 31, the carrier seats 22 of the multiple first conveying mechanisms 21 may carry multiple chips to be tested, and when the detection seat 32 of a certain second conveying mechanism 31 is idle, the first transfer mechanism 23 is used to transfer the chip to be tested on a certain carrier seat 22 to the idle detection seat 32. In other embodiments, when there are multiple first conveying mechanisms 21 and multiple second conveying mechanisms 31, the first conveying mechanism 23 may be controlled to transfer the chips to be tested by setting the shortest transfer path or the highest transfer efficiency, which is not specifically limited here.

[0033] It can be understood that the chip testing equipment of this embodiment can be used to perform high and low temperature tests on the chip. High and low temperature tests refer to placing the chip in a high or low temperature environment, performing functional tests on part or all of the functions of the chip, and analyzing the test results. The design and implementation of the chip testing equipment is intended to meet the performance testing requirements of the chip in different environments, provide more accurate data support for the performance evaluation of the chip, and improve the test efficiency.

[0034] In the implementation of the present application, the support seat 22 of the chip testing equipment is slidably connected to the first conveying mechanism 21, and the support seat 22 in the first position is used to receive the chip to be tested; at least one detection unit 30 is arranged on the seat body 10, and the detection unit 30 includes a second conveying mechanism 31 and a detection seat 32, the second conveying mechanism 31 is arranged on the seat body 10, the extension direction X of the second conveying mechanism 31 is perpendicular to the extension direction Y of the first conveying mechanism 21, and the detection seat 32 is slidably connected to the second conveying mechanism 31; the first transfer mechanism 23 is arranged on the seat body 10, and the support seat 22 moves to the second position along the extension direction Y of the first conveying mechanism 21, the first transfer mechanism 23 is used to transfer the chip to be tested of the support seat 22 in the second position to the detection seat 32, and the second conveying mechanism 31 is used to move the chip to be tested on the detection seat 32 to the test position, so as to perform performance testing on the chip to be tested. Through the above-mentioned method, the chip detection equipment of the present application can place the chip to be tested of the chip storage mechanism 51 on the support seat 22 for temporary storage, so that the support seat 22 at the first position receives the chip to be tested, and when the detection seat 32 is idle, the chip to be tested of the support seat 22 at the second position is transferred to the detection seat 32 through the first transfer mechanism 23, so that the support seat 22 can be used as a chip temporary storage position to provide chip support for the detection seat 32; when the setting position of the detection seat 32 is changed or at least one detection unit 30 includes multiple detection seats 32, the chip to be tested can be flexibly transferred to the detection seat 32 through the support seat 22 and the first conveying mechanism 21, effectively improving the flexibility of the test; and the extension direction X of the second conveying mechanism 31 is perpendicular to the extension direction Y of the first conveying mechanism 21, which can facilitate the first transfer mechanism 23 to transfer the chip to be tested. The layout is reasonable, further improving the space utilization of the chip detection equipment.

[0035] In one embodiment, if Figure 1 As shown, the chip testing device further includes a testing mechanism 40 , which is disposed on the base 10 and corresponds to the testing base 32 . The testing mechanism 40 is used to perform a performance test on the chip to be tested in the testing base 32 at the testing position.

[0036] Specifically, the test mechanism 40 of the chip testing equipment is arranged on the seat 10, and the test mechanism 40 can be arranged on the transport path of the second transport mechanism 31 to correspond to the detection seat 32. The test mechanism 40 is used to perform performance testing on the chip to be tested of the detection seat 32 located at the test position. In a possible implementation, the test mechanism 40 may include a temperature control component and a monitoring component, the temperature control component is used to press the chip to be tested on the detection seat 32, the temperature control component is also used to adjust the temperature of the chip to be tested to provide a suitable high temperature environment or low temperature environment for the chip to be tested, and the monitoring component is used to perform signal monitoring on the chip during the performance test to obtain the test result of the chip to be tested.

[0037] Optionally, see Figure 3 and Figure 4 , Figure 3 is a schematic structural diagram of a third embodiment of a chip testing device provided by the present application, Figure 4 yes Figure 3 The enlarged schematic diagram of the structure A in FIG. Among them, it can be understood that, Figure 4 The A structure in Figure 3 The illustration of the power mechanism 33 revealed after the outer shell of one of the detection bases 32 is disassembled is only an example structure, and the detection bases 32 in other illustrations may also include the following: Figure 4 The power mechanism 33 disclosed in the embodiment, or the power mechanism 33 is not provided, is not specifically limited here.

[0038] like Figure 3 and Figure 4 As shown, the detection unit 30 includes a power mechanism 33, which is arranged on the detection seat 32. The power mechanism 33 is used to drive the detection seat 32 to move along a first direction, and the first direction is perpendicular to the extension direction X of the first conveying mechanism 21 and the second conveying mechanism 31 respectively. The detection seat 32 is located at the test position, and the test mechanism 40 is located above the detection seat 32. The power mechanism 33 is used to drive the detection seat 32 to move upward so that the test probe of the test mechanism 40 contacts the chip to be tested on the detection seat 32.

[0039] Specifically, the power mechanism 33 of the chip testing equipment is used to drive the detection seat 32 to move up and down along a first direction, and the first direction is parallel to the gravity direction. When the second conveying mechanism 31 moves the detection seat 32 to the test position, the test mechanism 40 is arranged on the seat body 10 and is located above the detection seat 32. The power mechanism 33 is used to drive the detection seat 32 to move upward, so that the test probe of the test mechanism 40 contacts the chip to be tested on the detection seat 32, and the test probe contacts the chip to be tested with pressure, so as to provide a suitable test environment for the chip to be tested to perform performance testing.

[0040] Furthermore, if Figure 4 As shown, the power mechanism 33 includes a bearing member 331, a first driving member (not shown) and an encoder. The detection seat 32 is arranged on the bearing member 331, and the bearing member 331 is connected to the first driving member. The first driving member is used to drive the bearing member 331 to rotate so that the detection seat 32 moves up. The encoder is spaced apart from the detection seat 32, and the encoder is used to detect the moving distance of the detection seat 32.

[0041] Specifically, the first driving member can be a device that can output kinetic energy, such as a motor or an electric cylinder. In a possible implementation, the bearing member 331 can include a bearing and a rotating shaft; the bearing is connected to the first driving member, the rotating shaft can be fixed on the seat body 10, and the first driving member drives the bearing to rotate around the rotating shaft, so that the bearing rises relative to the seat body 10 and drives the detection seat 32 to move up, or the rotating shaft is connected to the detection seat 32 and the first driving member respectively, the bearing is fixed on the seat body 10, and the first driving member drives the rotating shaft to rotate relative to the bearing, so that the rotating shaft rises relative to the seat body 10 and drives the detection seat 32 to move up.

[0042] The encoder is used to detect the distance or height of the upward movement of the bearing member 331 and convert the detection result into an electrical signal. Specifically, the power mechanism 33 may also include a power control circuit, which is connected to the encoder and the first drive member respectively, and the power control circuit is used to perform power control on the first drive member so that the first drive member drives the bearing member 331 to rotate and moves the detection seat 32 upward. In this process, the power control circuit synchronously obtains the electrical signal of the moving distance of the detection seat 32 detected by the encoder, so as to judge whether the detection seat 32 is moved up to the specified position based on the electrical signal, and realize the control and monitoring of the rotation accuracy of the bearing member 331. In the above manner, the chip testing equipment of the present application can improve the accuracy of the upward movement of the detection seat 32, so as to ensure the accuracy of the contact position between the chip to be tested and the testing mechanism 40 after the detection seat 32 is moved up, so as to reduce the accident of the chip to be tested being squeezed and damaged due to the excessive upward movement of the chip to be tested, and reduce the accident of the test of the chip to be tested being invalid due to the insufficient upward movement of the chip to be tested.

[0043] The encoder of this embodiment is a magnetic encoder or a photoelectric encoder.

[0044] Specifically, the first driving member may include a rotating motor, which is connected to the bearing member 331 through a screw rod, so as to drive the bearing member 331 to rotate and rise through the screw rod. In one embodiment, the power mechanism 33 may also include a deflector, which is used to detect the rotation angle of the bearing member 331, and the magnetic encoder is used to convert the displacement of the rotation angle on the bearing member 331 into a pulse or digital signal through magneto-electric conversion. For example, the rotation angle of the bearing member 331 can be detected through a Hall code disk (magnetic ring) and a Hall element, and then the moving distance of the detection seat 32 can be calculated or converted.

[0045] In another embodiment, the moving distance of the detection seat 32 can also be directly detected through the photoelectric conversion of the photoelectric encoder to convert the detected mechanical displacement into a pulse or digital signal. For example, the moving distance of the detection seat 32 can be detected by the change of the transparent and opaque lines on the grating disk, thereby improving the accuracy of the upward movement of the detection seat 32, thereby improving the docking accuracy between the chip to be tested and the test mechanism 40, and improving the test effect of the chip testing equipment.

[0046] Optionally, see Figure 5 , Figure 5 yes Figure 3 A schematic diagram of the structure of an embodiment of the detection unit. Figure 5 As shown, the detection unit 30 at least includes a first group of second conveying mechanisms 31, a second group of second conveying mechanisms 31, a first detection seat 321 and a second detection seat 322. The first detection seat 321 is slidably connected to the first group of second conveying mechanisms 31, and the second detection seat 322 is slidably connected to the second group of second conveying mechanisms 31. The first group of second conveying mechanisms 31 is used to transport the first chip of the first detection seat 321 to the first test position, and the second group of second conveying mechanisms 31 is used to transport the second chip of the second detection seat 322 to the second test position.

[0047] Specifically, the chip testing device includes at least one testing unit 30, each testing unit 30 includes at least a first group of second conveying mechanisms 31 and a second group of second conveying mechanisms 31 arranged in parallel on the base 10, and the first group of second conveying mechanisms 31 and the second group of second conveying mechanisms 31 are arranged along the extension direction Y of the first conveying mechanism 21 respectively. The first group of second conveying mechanisms 31 is used to convey the first testing seat 321, so as to convey the first chip to be tested to the first testing position through the first testing seat 321; the second group of second conveying mechanisms 31 is used to convey the second testing seat 322, so as to convey the second chip to be tested to the second testing position through the second testing seat 322. Among them, the first chip and the second chip are both chips to be tested.

[0048] Through the above method, the first detection seat 321 and the second detection seat 322 can share the carrier seat 22 as a temporary storage position for the chip to be tested, so that the chip testing equipment can place the chip ready for testing on the loading seat for temporary storage, and transfer the temporarily stored chip to the detection seat 32 for testing when the first detection seat 321 and / or the second detection seat 322 are idle, thereby effectively improving the flexibility of the test; and the chip testing equipment can perform performance tests on the chips to be tested on the first detection seat 321 and the second detection seat 322 at the same time or in different time periods, thereby further improving the test efficiency.

[0049] In one embodiment, see Figure 6 , Figure 6 yes Figure 1A schematic diagram of the structure of an embodiment of the testing mechanism. Figure 6 As shown, the testing mechanism 40 includes a base 41, a first test probe (not shown) and a second test probe (not shown). The first test probe and the second test probe are arranged on both sides of the base 41. The first test probe is arranged corresponding to the first test position, and the second test probe is arranged corresponding to the second test position. The first test probe is used to perform a performance test on the first chip on the first test position, and the second test probe is used to perform a performance test on the second chip on the second test position.

[0050] Specifically, the first test probe and the second test probe of the test mechanism 40 are used to press and contact with the chip to be tested so as to perform performance test on the chip to be tested. The first test probe and the second test probe are arranged on both sides of the base 41, and the test mechanism 40 is used to perform performance test on the first chip on the first test position through the first test probe, and the test mechanism 40 is used to perform performance test on the second chip on the second test position through the second test probe. It can be understood that in this embodiment, the first chip on the first detection seat 321 is tested by the first test probe, and the second chip on the second detection seat 322 is tested by the second test probe, so that the chips to be tested on the first detection seat 321 and the second detection seat 322 can be tested for performance at the same time or in time-sharing, further improving the test efficiency of the detection unit 30.

[0051] In another embodiment, the testing mechanism 40 includes a base 41 and a testing probe, which is slidably connected to the base 41. The testing probe is used to perform a performance test on the first chip when sliding to a first testing position, and to perform a performance test on the second chip when sliding to a second testing position.

[0052] Specifically, the test probe is slidably connected to the base 41, and the test probe can slide on the base 41 so that the test probe is located above the first test position or the second test position. The sliding track of the test probe on the base 41 can be, but not limited to, a straight line, a semicircle, a circle, an ellipse, a square, a polygon or an irregular shape, and it can also be understood that a sliding track can be provided on the base 41, and the shape of the sliding track can be, but not limited to, a straight line, a semicircle, a circle, an ellipse, a square, a polygon or an irregular shape.

[0053] In this embodiment, the first detection seat 321 and the second detection seat 322 share a test probe to reduce the increase of parts and reduce costs. In addition, the test probe can be used to perform interleaved tests on the chips to be tested on the first detection seat 321 and the second detection seat 322 to improve the test efficiency of the detection unit 30.

[0054] Furthermore, in other embodiments, when the chip size of the chip to be tested is larger than the size of the conventional first detection seat 321 and the second detection seat 322, the chip testing equipment can also jointly carry the third detection seat 32 by the first group of second conveying mechanisms 31 and the second group of second conveying mechanisms 31, and the size of the third detection seat 32 is larger than the size of the first detection seat 321 and the second detection seat 322, so that the chip testing equipment of this embodiment can be suitable for performance testing of chips to be tested of various sizes, thereby improving the applicability of the chip testing equipment.

[0055] In one embodiment, if Figure 4 As shown, the detection unit 30 includes a limit mechanism 34, which is detachably connected to the detection seat 32. The limit mechanism 34 is provided with a limit seat 341, the size of which corresponds to the size of the chip to be tested, and the limit seat 341 is used to carry the chip to be tested.

[0056] Specifically, the limiting seat 341 can accommodate the chip to be tested by providing a groove or the like, and the accommodation size of the limiting seat 341 corresponds to the size of the chip to be tested, so that the chip to be tested can be stably placed on the limiting seat 341. In a possible implementation, the limiting mechanism 34 may also include a limiting member, the size of the limiting seat 341 corresponds to the size of the chip to be tested, and the limiting member is arranged on the limiting seat 341. The limiting member may be, but is not limited to, a spring, a spring, an elastic buckle, etc. with a limiting function, and the limiting member is used to fix the chip to be tested on the limiting seat 341, so that the chip to be tested is not easy to fall off or drop on the detection seat 32, thereby improving the reliability of the chip testing equipment.

[0057] In one embodiment, if Figure 1 As shown, the chip testing equipment also includes a chip storage mechanism 51 and a second transfer mechanism 52. The chip storage mechanism 51 is arranged on the side of the supporting seat 22 away from the detection seat 32. The chip storage mechanism 51 stores a plurality of chips to be tested. The second transfer mechanism 52 is used to transfer the chips to be tested in the chip storage mechanism 51 to the supporting seat 22.

[0058] Specifically, the chip storage mechanism 51 is used to store a number of chips to be tested. In a possible implementation, the chip storage mechanism 51 can store the chips to be tested through multiple layers of stacked trays. Exemplarily, the chip storage mechanism 51 includes a storage silo and a third transfer mechanism. The storage silo is provided with multiple layers of storage racks, each storage rack can be used to place at least one tray, and each tray can be used to store multiple chips to be tested; the third transfer mechanism is arranged at the bottom layer of the storage silo, and the third transfer mechanism is used to carry the tray located at the bottom layer of the storage silo, and move the tray to the tray placement position, so that the second transfer mechanism 52 transfers the chip to be tested on the tray placement position to the support seat 22. In other embodiments, the third transfer mechanism can adsorb and fix the tray by means of vacuum suction cups, pressure suction cups, etc., so as to reduce or avoid accidents such as displacement and falling of the chips in the tray during movement, thereby improving the reliability of the chip testing equipment.

[0059] Optionally, see Figure 7 , Figure 7 yes Figure 1 A schematic diagram of the structure of an embodiment of the first conveying mechanism and the supporting seat. Figure 7 As shown, the chip testing mechanism 40 may include a plurality of first conveying mechanisms 21 , and each first conveying mechanism 21 has a corresponding supporting seat 22 .

[0060] Specifically, the chip testing equipment includes at least a first group of first conveying mechanisms 21 and a second group of first conveying mechanisms 21 arranged in parallel on the base body 10, the first supporting seat 221 is slidably connected to the first group of first conveying mechanisms 21, and the second supporting seat 222 is slidably connected to the second group of first conveying mechanisms 21; the second transfer mechanism 52 is used to transfer the third chip on the chip storage mechanism 51 to the first supporting seat 221 of the first group of first conveying mechanisms 21, and the second transfer mechanism 52 is also used to transfer the fourth chip on the chip storage mechanism 51 to the second supporting seat 222 of the second group of first conveying mechanisms 21.

[0061] Among them, the first group of first conveying mechanisms 21 and the second group of first conveying mechanisms 21 are arranged in sequence along the extension direction X of the second conveying mechanism 31. The first group of first conveying mechanisms 21 is used to convey the first bearing seat 221, so as to receive the third chip on the chip storage mechanism 51 through the first bearing seat 221, and convey the third chip to the corresponding detection seat 32. The second group of first conveying mechanisms 21 is used to convey the second bearing seat 222, so as to receive the fourth chip on the chip storage mechanism 51 through the second bearing seat 222, and convey the fourth chip to the second test position. The third chip and the fourth chip mentioned above are both chips to be tested. The second transfer mechanism 52 can be provided with at least one mechanical clamp, and the second transfer mechanism 52 clamps the chip to be tested on the chip storage mechanism 51 to the corresponding bearing seat 22 by driving the mechanical clamp.

[0062] Through the above-mentioned method, the chip testing equipment of this embodiment can temporarily store the chips to be tested of the chip storage mechanism 51 through multiple supporting seats 22, and when the setting position of the detection seat 32 is changed or includes multiple detection seats 32, it can flexibly transfer the chips to be tested to the detection seat 32 through multiple corresponding supporting seats 22 and the first conveying mechanism 21, thereby effectively improving the flexibility and efficiency of the test.

[0063] In one embodiment, the chip testing equipment includes at least two groups of detection units 30, which are arranged in sequence along the extension direction Y of the first conveying mechanism 21, and the first transfer mechanism 23 is used to transfer the chips to be tested on the carrier 22 to the first group of detection units 30 and the second group of detection units 30 respectively.

[0064] Specifically, at least two groups of detection units 30 are arranged on the side of the carrier 22 away from the chip storage mechanism 51. Exemplarily, the first group of detection units 30 and the second group of detection units 30 are arranged along the extension direction Y of the first conveying mechanism 21, the carrier 22 is located between the detection units 30 and the chip storage mechanism 51, and the detection units 30, the carrier 22, and the chip storage mechanism 51 are arranged along the extension direction X of the second conveying mechanism 31. Among them, the chip testing equipment can also include at least two groups of testing mechanisms 40, each group of detection units 30 corresponds to a testing mechanism 40, and each testing mechanism 40 is arranged above each group of detection units 30.

[0065] In a possible embodiment, the chip testing equipment includes a first group of detection units 30, a second group of detection units 30, a first group of first conveying mechanisms 21 and a second group of conveying mechanisms, the first supporting seat 221 on the first group of first conveying mechanisms 21 is used to provide the first group of detection units 30 with chips to be tested, and the second supporting seat 222 on the second group of first conveying mechanisms 21 is used to provide the second group of detection units 30 with chips to be tested.

[0066] Through the above manner, the chip testing device of this embodiment can perform performance tests on multiple chips to be tested simultaneously through at least two groups of detection units 30, thereby further improving the testing efficiency of the detection units 30.

[0067] Different from the prior art, the chip testing equipment of the embodiment of the present application can place the chip to be tested of the chip storage mechanism 51 on the carrier seat 22 for temporary storage, so that the carrier seat 22 at the first position receives the chip to be tested, and when the detection seat 32 is idle, the chip to be tested of the carrier seat 22 at the second position is transferred to the detection seat 32 through the first transfer mechanism 23, so that the carrier seat 22 can be used as a chip temporary storage position to provide chip support for the detection seat 32; when multiple groups of detection units 30 are included or the detection unit 30 includes multiple detection seats 32, the carrier seat 22 can be moved to the corresponding detection unit 30 through the first conveying mechanism 21, so that the first transfer mechanism 23 can flexibly transfer the chip to be tested to the corresponding detection seat 32, effectively improving the flexibility of the test; and, the extension direction X of the second conveying mechanism 31 is perpendicular to the extension direction Y of the first conveying mechanism 21, and / or at least two groups of detection units 30 are arranged in sequence along the extension direction Y of the first conveying mechanism 21, which can facilitate the first transfer mechanism 23 to transfer the chip to be tested, and the layout is reasonable, which can further improve the space utilization of the chip testing equipment.

[0068] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A chip testing device, characterized in that: include: seat body; A first conveying mechanism is disposed on the seat body; A carrier seat, slidably connected to the first conveying mechanism, the carrier seat comprises a first position and a second position, the carrier seat at the first position is used to receive the chip to be tested; At least one detection unit is disposed on the base, the detection unit comprises a second conveying mechanism and a detection base, the second conveying mechanism is disposed on the base, the extension direction of the second conveying mechanism is perpendicular to the extension direction of the first conveying mechanism, and the detection base is slidably connected to the second conveying mechanism; A first transfer mechanism is arranged on the seat body, and the supporting seat moves to the second position along the extension direction of the first conveying mechanism. The first transfer mechanism is used to transfer the chip to be tested on the supporting seat at the second position to the detection seat, and the second conveying mechanism is used to move the chip to be tested on the detection seat to the test position to perform performance testing on the chip to be tested.

2. The chip testing device according to claim 1, characterized in that: The chip testing device further comprises a testing mechanism, which is disposed on the seat body and corresponds to the detection seat, and is used for performing a performance test on the chip to be tested of the detection seat located at the testing position.

3. The chip testing device according to claim 2, characterized in that: The detection unit includes a power mechanism, which is arranged on the detection seat. The power mechanism is used to drive the detection seat to move along a first direction, and the first direction is perpendicular to the extension direction of the first conveying mechanism and the second conveying mechanism respectively. The detection seat is located at the test position, and the test mechanism is located above the detection seat. The power mechanism is used to drive the detection seat to move upward so that the test probe of the test mechanism contacts the chip to be tested on the detection seat.

4. The chip testing device according to claim 3, characterized in that: The power mechanism includes a bearing member, a first driving member and an encoder, the detection seat is arranged on the bearing member, the bearing member is connected to the first driving member, the first driving member is used to drive the bearing member to rotate so that the detection seat moves upward, and the encoder is spaced apart from the detection seat and is used to detect the moving distance of the detection seat; Wherein, the encoder is a magnetic encoder or a photoelectric encoder.

5. The chip testing device according to claim 2, characterized in that: The detection unit at least includes a first group of the second conveying mechanism, a second group of the second conveying mechanism, a first detection seat and a second detection seat, the first detection seat is slidably connected to the first group of the second conveying mechanism, the second detection seat is slidably connected to the second group of the second conveying mechanism, the first group of the second conveying mechanism is used to convey the first chip of the first detection seat to the first test position, and the second group of the second conveying mechanism is used to convey the second chip of the second detection seat to the second test position; The testing mechanism includes a base, a first testing probe and a second testing probe, wherein the first testing probe and the second testing probe are arranged on both sides of the base, the first testing probe is arranged corresponding to a first testing position, and the second testing probe is arranged corresponding to a second testing position, the first testing probe is used to perform a performance test on a first chip on the first testing position, and the second testing probe is used to perform a performance test on a second chip on the second testing position.

6. The chip testing device according to claim 2, characterized in that: The detection unit at least includes a first group of the second conveying mechanism, a second group of the second conveying mechanism, a first detection seat and a second detection seat, the first detection seat is slidably connected to the first group of the second conveying mechanism, the second detection seat is slidably connected to the second group of the second conveying mechanism, the first group of the second conveying mechanism is used to convey the first chip of the first detection seat to the first test position, and the second group of the second conveying mechanism is used to convey the second chip of the second detection seat to the second test position; The testing mechanism includes a base and a testing probe, wherein the testing probe is slidably connected to the base, and the testing probe is used to perform a performance test on the first chip when sliding to the first testing position, and to perform a performance test on the second chip when sliding to the second testing position.

7. The chip testing device according to claim 1, characterized in that: The detection unit comprises a limiting mechanism, which is detachably connected to the detection seat. The limiting mechanism is provided with a limiting seat, the size of which corresponds to the size of the chip to be tested, and the limiting seat is used to carry the chip to be tested.

8. The chip testing device according to claim 1, characterized in that: The chip testing equipment also includes a chip storage mechanism and a second transfer mechanism. The chip storage mechanism is arranged on a side of the supporting seat away from the detection seat. The chip storage mechanism stores a plurality of the chips to be tested. The second transfer mechanism is used to transfer the chips to be tested in the chip storage mechanism to the supporting seat.

9. The chip testing device according to claim 8, characterized in that: The chip testing device at least comprises a first group of the first conveying mechanisms and a second group of the first conveying mechanisms arranged in parallel on the seat body, a first bearing seat is slidably connected to the first group of the first conveying mechanisms, and a second bearing seat is slidably connected to the second group of the first conveying mechanisms; The second transfer mechanism is used to transfer the third chip on the chip storage mechanism to the first supporting seat of the first group of the first transport mechanism, and the second transfer mechanism is also used to transfer the fourth chip on the chip storage mechanism to the second supporting seat of the second group of the first transport mechanism.

10. The chip testing device according to claim 1, characterized in that: The chip testing equipment comprises at least two groups of detection units, which are arranged in sequence along the extension direction of the first conveying mechanism, and the first transfer mechanism is used to transfer the chips to be tested on the carrier to the first group of detection units and the second group of detection units respectively.

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