Laminated capacitor structure with adjustable capacitance value and manufacturing method thereof
By designing an adjustable stacked capacitor structure, and using interlaced plates and switch structures, a variety of adjustment methods of capacitance value are realized, solving the problem of complex capacitance value fixation and adjustment in the prior art, meeting different application needs and reducing costs.
Patent Information
- Application Number
- CN202510110289.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2025-05-02
AI Technical Summary
The capacitance value of the existing stacked capacitor structure is fixed, which cannot meet the requirements of circuit performance debugging and different application, and the process of adjusting the capacitance value is complex and costly.
A stacked capacitor structure with adjustable capacitance values is designed. Through the interlaced upper and lower plates, combined with the first and second switching structures, a combination of selective conduction and dielectric layers is realized, forming a variety of stacked capacitor structures to adjust the capacitance values.
It realizes a variety of adjustment methods of capacitance value to meet different application needs, simplifies the process of adjustment of capacitance value, and reduces cost and complexity.
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Figure CN119920626A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of microwave radio frequency, and in particular to a stacked capacitor structure with adjustable capacitance value and a manufacturing method thereof. Background Art
[0002] As one of the most basic passive components in electronic circuits, the optimization of capacitor performance and structure plays a vital role in the operation of the entire electronic system. The stacked capacitor structure enables the capacitor to achieve a larger capacitance value within a limited area, and has advantages such as good high-frequency characteristics and stability. However, the common stacked capacitor structure now only has a fixed capacitance value. To obtain different capacitance values, it is necessary to change the structural parameters and readjust the manufacturing process according to the new parameters, which greatly increases the manufacturing time and cost. At the same time, for circuits that need to adjust the capacitance value for performance debugging, a stacked capacitor with a single fixed capacitance value cannot meet its needs, so it is necessary to design and invent a stacked capacitor structure with an adjustable capacitance value. Summary of the invention
[0003] In view of the above problems in the prior art, the present invention proposes a multilayer capacitor structure with adjustable capacitance value and a manufacturing method thereof, which mainly solves the problem that a capacitor with a single fixed capacitance value is difficult to meet circuit performance debugging and application requirements.
[0004] In order to achieve the above purpose and other purposes, the technical solution adopted by the present invention is as follows.
[0005] The present application provides a stacked capacitor structure with adjustable capacitance value, comprising: one or more upper plates; one or more lower plates, wherein the upper plates and the lower plates are arranged alternately to form a stacked structure, and the stacked structure comprises at least three layers of plates; a first switch structure, which is respectively connected to each of the upper plates to selectively conduct one or more of the upper plates; and a second switch structure, which is respectively connected to each of the lower plates to selectively conduct one or more of the lower plates.
[0006] In an embodiment of the present application, both the first switch structure and the second switch structure include: a switch array or a bonding wire.
[0007] In one embodiment of the present application, a dielectric layer is disposed between adjacent upper plates and lower plates.
[0008] In an embodiment of the present application, a dielectric constant of at least one of the dielectric layers is different from dielectric constants of the remaining dielectric layers.
[0009] In an embodiment of the present application, the material of the dielectric layer includes silicon, gallium arsenide, resin or ceramic.
[0010] In one embodiment of the present application, each of the upper plates is individually led out to the first switch structure through a metal structure, and each of the lower plates is also individually led out to the second switch structure through a metal structure.
[0011] In one embodiment of the present application, the spacing between at least one group of adjacent upper electrode plates and lower electrode plates in the stacked structure is different from the corresponding spacing between the remaining adjacent upper electrode plates and lower electrode plates.
[0012] The present application also provides a method for manufacturing a stacked capacitor structure with an adjustable capacitance value, comprising: providing one or more upper plates; providing one or more lower plates, and forming a stacked structure by staggered arrangement of the upper plates and the lower plates, wherein the stacked structure comprises at least three layers; providing a first switch structure, which is respectively connected to each of the upper plates to selectively conduct one or more of the upper plates; and providing a second switch structure, which is respectively connected to each of the lower plates to selectively conduct one or more of the lower plates.
[0013] As described above, the present application provides a stacked capacitor structure with adjustable capacitance value and a manufacturing method thereof, which have the following beneficial effects.
[0014] By selecting the upper plate and the lower plate in different positions through the switch structure, the number and level of the upper plate and the lower plate can be freely combined, thereby changing the plate spacing, the number of stacked layers and the composition of the dielectric layer to form a variety of stacked capacitor structures, and achieve a wider range of stacked capacitance value adjustment to meet different applications and debugging requirements. There is no need to add other circuits or structures for capacitance adjustment, the structure is simple, and the control is convenient. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 FIG. 1 is a schematic diagram of a stacked capacitor structure with adjustable capacitance value in an embodiment of the present application.
[0016] Figure 2 Schematic diagram of the internal circuit structure of the first switch structure in one embodiment of the present application.
[0017] Figure 3 Schematic diagram of the internal circuit structure of the second switch structure in one embodiment of the present application.
[0018] Figure 4 Schematic diagram of a process for manufacturing a stacked capacitor structure with adjustable capacitance value in one embodiment of the present application. DETAILED DESCRIPTION
[0019] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.
[0020] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0021] The inventor has found that as one of the most basic passive components in electronic circuits, the optimization of the performance and structure of capacitors plays a vital role in the operation of the entire electronic system. The stacked capacitor structure enables the capacitor to achieve a larger capacitance value within a limited area, and has advantages such as good high-frequency characteristics and stability. However, the common stacked capacitors now only have a fixed capacitance value. To obtain different capacitance values, it is necessary to change the structural parameters and readjust the manufacturing process according to the new parameters, which greatly increases the manufacturing time and cost. At the same time, for circuits that need to adjust the capacitance value for performance debugging, a stacked capacitor with a single fixed capacitance value cannot meet its needs, so it is necessary to design and invent a stacked capacitor structure with an adjustable capacitance value.
[0022] In one existing solution, a T-shaped slider is used to change the position of one of the electrodes to change the spacing between the flat plate capacitors, thereby adjusting the capacitance value. However, the disadvantage of this method is that the slider structure is relatively complex, and only a single parameter is changed, and the adjustable range is narrow. In another existing solution, a screw is inserted into the laminated structure respectively, and the upper and lower plates connected are selected to change their spacing and effective area, thereby changing their capacitance value. However, its disadvantage is that its laminated structure is always a double-layer plate, the structure is complex, and its adjustment range is also small.
[0023] Based on the above problems existing in the prior art, the present application proposes a stacked capacitor structure with adjustable capacitance value. The technical solution of the present application is described in detail below in conjunction with specific embodiments.
[0024] The stacked capacitor structure provided in the embodiment of the present application includes: one or more upper plates; one or more lower plates, wherein the upper plates and the lower plates are arranged in an alternating manner to form a stacked structure, and the stacked structure includes at least three layers of plates; a first switch structure, which is respectively connected to each of the upper plates to selectively conduct one or more of the upper plates; a second switch structure, which is respectively connected to each of the lower plates to selectively conduct one or more of the lower plates. Taking the stacked structure composed of three layers of plates as an example, the three-layer stacked structure may include an upper plate and two lower plates, the upper plate is arranged between the two lower plates, the upper plate and the lower plate are arranged opposite to each other, the upper plate leads out a metal structure to be connected to the first switch structure, and the two lower plates lead out a metal structure to be connected to the second switch structure, and the upper plate and at least one lower plate can be connected by switching the first switch structure and the second switch structure. Of course, the total number of upper plates and lower plates is not limited to three, and the number can be set according to the actual capacitance requirements, and the number of upper plates and lower plates can also be different, as long as the staggered arrangement is met. For example, there can be three upper plates and two lower plates, and the two lower plates are arranged between the three upper plates to form a laminated structure. The specific number can also be set and adjusted according to the actual application requirements, and there is no restriction here. The staggered arrangement here means that the upper plate and the lower plate are stacked in sequence, and the upper plate and the lower plate have a certain facing area to form a capacitor laminated structure.
[0025] In one embodiment, the first switch structure and the second switch structure both include: a switch array or a bonding wire. Taking the switch array as an example, each upper plate can be individually connected to a switch in the switch array, and the corresponding upper plate can be connected and disconnected by switching the switch. The connection method of the lower plate is similar, which will not be repeated here. The type of specific switch array or switch selection chip can be set and adjusted according to actual application requirements, and is not limited here.
[0026] In one embodiment, a dielectric layer is provided between any two adjacent upper plates and lower plates, and the gap between the upper and lower substrates is filled by the dielectric layer. The dielectric layer can be made of resin, silicon, gallium arsenide, ceramics and other materials, which can be selected according to the actual application requirements and are not limited here. Of course, a dielectric layer may not be provided between the upper plate and the lower plate, and the plates are separated by air or other gases, and the plates are supported by an additional support frame. The specific structure of the support frame can be set and adjusted according to the actual product requirements, such as support columns are set on the side, middle and other areas of the plate, which are not limited here.
[0027] In one embodiment, the dielectric constant of at least one of the dielectric layers is different from the dielectric constants of the remaining dielectric layers. Specifically, the materials of the different dielectric layers may be different, thereby forming dielectric layers with different dielectric constants. Figure 1 , Figure 1 61, 62 and 63 are dielectric layers, respectively. The dielectric constant ε1 of 61 is greater than the dielectric constant ε2 of 62, and the dielectric constant ε2 of 62 is greater than the dielectric constant ε2 of 63. The specific dielectric constant size relationship can be set and adjusted according to actual application requirements, which is limited here. Of course, the dielectric constants of all dielectric layers can be kept the same, or one or more dielectric layers can be selectively set to have different dielectric constants. Any combination can be made according to actual application requirements, which is not limited here.
[0028] In one embodiment, each of the upper plates is independently led to the first switch structure through a metal structure, and each of the lower plates is also independently led to the second switch structure through a metal structure. That is, the connection between each plate lead-out metal structure and the corresponding switch structure is relatively independent, and they do not interfere with each other during the control process. The on and off of each layer of plates can be independently controlled to achieve different level combinations.
[0029] In one embodiment, the spacing between at least one group of adjacent upper plates and lower plates in the stacked structure is different from the corresponding spacing between the remaining adjacent upper plates and lower plates. Specifically, the adjacent upper plates and lower plates are taken as a group, and the spacing between one group of adjacent plates can be set to be different from the spacing between other groups of adjacent plates, thereby obtaining more diverse capacitor stacking combinations and a larger capacitance adjustment range. The specific spacing and combination can be set and adjusted according to actual application requirements. Please refer to Figure 1 , the thickness of 61 can be greater than the thickness of 62, and the thickness of 62 can be greater than the thickness of 63. The specific spacing relationship can be combined and set according to actual application requirements, and is not limited here. In another embodiment, the spacing between different upper and lower plates can also be set to be the same, which can be set and adjusted according to actual product requirements, and is not limited here.
[0030] See also Figure 1 , Figure 1 Schematic diagram of a stacked capacitor structure with adjustable capacitance value in one embodiment of the present application. The stacked capacitor structure includes upper and lower plates, Figure 11 is the input end of the upper plate, 2 is the input end of the lower plate, and taking four metal layers as an example, 11 and 12 are the upper and lower plates of the two upper plates, 21 and 22 are the upper and lower plates of the two lower plates, a total of four metal layers; 31-34 are the metal structure lead-out ends of the metal layers; 41 is the first switch structure of the upper plate, and 42 is the second switch structure of the lower plate. At the same time, the metal layers of the upper plate and the lower plate are staggered. The upper plate port is equipped with a first switch structure 41, and the upper plate 11 of the upper plate and the lower plate 12 of the upper plate are both led out of the metal structure separately and connected to the first switch structure 41. The lower plate port is equipped with a second switch structure 42, and the upper plate 21 and the lower plate 22 of the lower plate are also led out of the metal structure separately and connected to the second switch structure 42. The first switch structure 41 of the upper electrode plate selectively connects the upper electrode plate. When only the metal structure lead-out terminal 31 of the upper plate 11 is connected inside the first switch structure 41, the upper plate 11 of the upper electrode plate is connected and conductive; when only the metal structure lead-out terminal 32 of the lower plate 12 is connected inside the first switch structure 41, the lower plate 12 of the upper electrode plate is connected and conductive; when the metal structure lead-out terminals 31 and 32 of the metal levels 11 and 12 are simultaneously connected inside the first switch structure 41, both the upper plate 11 and the lower plate 12 of the upper electrode plate are connected and conductive. The second switch structure 42 of the lower plate selectively connects the lower plate. When the second switch structure 42 is only connected to the metal structure lead-out terminal 33 of the upper plate 21, the upper plate 21 of the lower plate is connected and turned on; when the second switch structure 42 is only connected to the metal structure lead-out terminal 34 of the lower plate 22, the lower plate 22 of the lower plate is connected and turned on; when the second switch structure 42 is simultaneously connected to the metal structure lead-out terminals 33 and 34 of 21 and 22, both the upper plate 21 and the lower plate 22 of the lower plate are connected and turned on. When the switch structures of the upper plate and the lower plate are selectively connected, a variety of stacked capacitor structures can be formed, and the various stacked capacitor structures change the number of stacked layers, the stacked layer distance or the dielectric layer, thereby changing the capacitance value of the stacked capacitor in a wide range.
[0031] See also Figure 2 , Figure 2 Schematic diagram of the internal circuit structure of the first switch structure in one embodiment of the present application. The first switch structure 41 includes a switch 51 and a switch 52, wherein the switch 51 connects the input terminal 1 of the upper electrode and the metal structure lead-out terminal 31 of the upper plate metal layer of the upper electrode, and the switch 52 connects the input terminal 1 of the upper electrode and the metal structure lead-out terminal 32 of the lower plate metal layer of the upper electrode.
[0032] See also Figure 3 , Figure 3Schematic diagram of the internal circuit structure of the second switch structure in one embodiment of the present application. The second switch structure 42 includes a switch 53 and a switch 54, wherein the switch 53 connects the input terminal 2 of the lower electrode and the metal structure lead-out terminal 33 of the upper plate metal layer of the upper electrode, and the switch 54 connects the input terminal 2 of the lower electrode and the metal structure lead-out terminal 34 of the lower plate metal layer of the upper electrode.
[0033] In the first switch structure 41 of the upper electrode, the switch 51 is turned on and the switch 52 is turned off, so that the upper electrode input terminal 1 is connected to the metal structure lead-out terminal 31 of the metal layer 11, and the connection and conduction of the upper plate 11 of the upper electrode is realized. At the same time, the second switch structure 42 of the lower electrode, 53 is turned on and the switch 54 is turned off, so that the lower electrode input terminal 2 is connected to the metal conductor of the metal structure lead-out terminal 33 of the metal layer 21, and the connection and conduction of the upper plate of the lower electrode are realized, so that the stacked capacitor structure is the first double-sheet stacked structure, where the double-sheet stacked structure refers to a capacitor structure formed by only two electrode plates being turned on.
[0034] The switch 51 in the first switch structure 41 of the upper electrode is turned on, and the switch 52 is turned off, so that the upper electrode input terminal 1 is connected to the metal structure lead-out section 31 of the metal level 11, and the connection of the upper plate of the upper electrode is realized. At the same time, the switch 54 in the second switch structure 42 of the lower electrode is turned on, and the switch 53 is turned off, so that the lower electrode input terminal 2 is connected to the metal conductor of the metal structure lead-out terminal 34 of the metal level 22, and the connection of the lower plate of the lower electrode is realized, so that the stacked capacitor structure is the second double-chip stacked structure.
[0035] In the first switch structure 41 of the upper electrode, switch 52 is turned on, and switch 51 is turned off, so that the upper electrode input terminal 1 is connected to the metal structure lead-out terminal 32 of the metal level 12, and the lower plate of the upper electrode is connected. At the same time, 53 and 54 in the second switch structure 42 of the lower electrode are turned on, so that the lower electrode input terminal 2 is connected to the metal conductor of the metal structure lead-out terminal 33 of the metal level 21 and the metal conductor of the metal structure lead-out terminal 34 of the metal level 22, and the connection between the upper plate and the lower plate of the lower electrode is connected, so that the stacked capacitor structure is a three-piece stacked structure. The three-piece stacked structure here refers to a capacitor stacking structure formed by only three electrode plates being turned on.
[0036] In the first switch structure 41 of the upper electrode, switches 51 and 52 are turned on, and the first switch structure 41 connects the metal structure lead-out terminals 31 and 32 of the metal layers 11 and 12, so as to realize the connection and conduction of the upper plate 11 and the lower plate 12 of the upper electrode; in the second switch structure 42 of the lower electrode, switches 53 and 54 are turned on, and the second switch structure 42 connects the metal structure lead-out terminals 33 and 34 of the metal layers 21 and 22, so as to realize the connection and conduction of the upper plate 21 and the lower plate 22 of the lower electrode, so that the stacked capacitor structure is a four-piece stacked structure. The four-piece stacked structure here refers to a capacitor stacking structure formed by only four of the electrode plates being turned on.
[0037] Based on the above technical solution of the present application, the stacked structure is composed of a metal layer, a metal structure led out from the metal layer, and a switch structure. After production, no other devices are required to change the inside of the stacked structure. It is only necessary to freely select and connect the metal structure lead-out ends of the upper electrode and the lower electrode through the corresponding switch structure to achieve different numbers of layers and spacings between the upper and lower plates of the stacked capacitor. A variety of stacked structures such as double-layer boards, three-layer boards, and four-layer boards can be formed. The structure is simple, production is easy, and the capacitance value can be changed over a wide range.
[0038] See also Figure 4 , Figure 4 The flowchart of the method for manufacturing a stacked capacitor structure with adjustable capacitance value in one embodiment of the present application is shown in FIG. The manufacturing method comprises the following steps:
[0039] Step S200, providing one or more upper plates;
[0040] Step S210, providing one or more lower electrode plates, and forming a laminated structure by staggered arrangement of the upper electrode plates and the lower electrode plates, wherein the laminated structure includes at least three layers;
[0041] Step S220, providing a first switch structure, which is respectively connected to each of the upper plates to selectively turn on one or more of the upper plates;
[0042] Step S230 , providing a second switch structure, which is respectively connected to each of the lower plates to selectively turn on one or more of the lower plates.
[0043] In one embodiment, a dielectric layer can be provided between any adjacent upper plates and lower plates during the manufacturing process of the laminated structure, and the dielectric constants of different dielectric layers can be the same or different, and can be combined and provided according to actual application requirements, which is not limited here. The spacing between any adjacent upper plates and lower plates can be the same or different, and can be combined and provided according to actual application requirements to obtain a larger adjustable capacitance range.
[0044] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A stacked capacitor structure with adjustable capacitance value, characterized in that: include: one or more upper plates; One or more lower plates, wherein the upper plates and the lower plates are arranged alternately to form a stacked structure, and the stacked structure includes at least three layers of plates; A first switch structure, which is connected to each of the upper plates respectively to selectively turn on one or more of the upper plates; The second switch structure is connected to each of the lower plates respectively to selectively turn on one or more of the lower plates.
2. The stacked capacitor structure with adjustable capacitance according to claim 1, characterized in that: The first switch structure and the second switch structure both include: a switch array or bonding gold wires.
3. The stacked capacitor structure with adjustable capacitance according to claim 1, characterized in that: A dielectric layer is arranged between the adjacent upper electrode plates and the lower electrode plates.
4. The stacked capacitor structure with adjustable capacitance according to claim 3, characterized in that: The dielectric constant of at least one of the dielectric layers is different from the dielectric constants of the remaining dielectric layers.
5. The stacked capacitor structure with adjustable capacitance according to claim 3, characterized in that: The material of the dielectric layer includes silicon, gallium arsenide, resin or ceramic.
6. The stacked capacitor structure with adjustable capacitance according to claim 1, characterized in that: Each of the upper plates is individually led out to the first switch structure through a metal structure, and each of the lower plates is also individually led out to the second switch structure through a metal structure.
7. The stacked capacitor structure with adjustable capacitance according to claim 1, characterized in that: The spacing between at least one group of adjacent upper electrode plates and lower electrode plates in the stacked structure is different from the corresponding spacing between the remaining adjacent upper electrode plates and lower electrode plates.
8. A method for manufacturing a stacked capacitor structure with adjustable capacitance, characterized in that: include: providing one or more upper plates; Providing one or more lower electrode plates, wherein the upper electrode plates and the lower electrode plates are arranged alternately to form a laminated structure, wherein the laminated structure comprises at least three layers; Providing a first switch structure, which is respectively connected to each of the upper plates to selectively turn on one or more of the upper plates; A second switch structure is provided, which is respectively connected to each of the lower plates to selectively turn on one or more of the lower plates.