Manufacturing method of infrared bilattice photonic crystal surface emitting laser

Abstract

The invention belongs to the technical field of optoelectronic device manufacturing, and particularly relates to a manufacturing method of an infrared double-lattice photonic crystal surface emitting laser, which comprises material growth and device manufacturing, a quantum well light-emitting layer adopts an Al < 0.3 > Ga < 0.7 > AsSb / In < 0.3 > Ga < 0.7 > AsSb multi-quantum well light-emitting layer, so that stress matching of a quantum barrier and a quantum well can be realized, the loss of carriers is less, and the performance of the laser is improved. The radiation recombination efficiency is high; ni and Ag metals and p-GaSb are annealed to form good electrical conduction, the formed contact resistance is relatively low, and the electro-optical conversion efficiency is favorably improved; the hole diameter of the photonic crystal structure is 160-200nm; x and y are arranged at equal intervals, the arrangement interval is 100-150nm, and the hole depth is 300-500nm; according to the device designed and realized by the invention, the device with the x and y double-lattice structure is high in electro-optical conversion efficiency, and the threshold power density can reach 1.8-1.91 kW / cm < 2 >. According to the invention, the output efficiency and the frequency stability of the laser are significantly improved by combining the double-lattice structure and the photonic crystal characteristics.

Description

Technical Field

[0001] The invention belongs to the technical field of optoelectronic device manufacturing, and in particular relates to a method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser. Background Art

[0002] With the rapid development of infrared laser technology, surface-emitting lasers have been widely used in communication, sensing, and medical fields due to their high efficiency, miniaturization, and easy integration. However, traditional infrared lasers still have shortcomings in beam quality and frequency stability.

[0003] Although existing photonic crystal lasers have good frequency selectivity, their manufacturing process is complex and it is difficult to achieve efficient surface-emitting output. In addition, the application of double lattice structures in photonic crystals is still immature, limiting their application potential in the infrared band.

[0004] Therefore, there is an urgent need for a new manufacturing method that can realize efficient infrared double-lattice photonic crystal surface-emitting lasers while ensuring the characteristics of photonic crystals. Summary of the invention

[0005] In view of the problems in the background technology, the present invention provides a method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser, which realizes efficient and stable infrared laser output by combining the double-lattice structure and the photonic crystal characteristics.

[0006] To achieve the above object, the present invention adopts the following technical solution: A method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser comprises the following steps: Step 1: Material growth: growing an epitaxial structure on a substrate; Step 2: Device production: (1) Photolithography: The photolithography technology is used to etch holes with a diameter of 160~200nm on the semiconductor chip; the x and y spacings are arranged at equal intervals, and the arrangement spacing is 100~150nm; (2) Corrosion: Removal of unwanted materials by corrosion; (3) Definition: (3.1) Define a p-electrode pattern on the surface of a p-type semiconductor, and evaporate Ni, Ag, TiW ohmic contact layers and Au, Ni, Pt, Au layers, with each layer having a thickness of 10-200 nm, of which the Ni layer has a thickness of 0.5-1 nm; remove the photoresist after stripping, and finally form a p-electrode layer; (3.2) Define the N-electrode pattern on the surface of the N-type semiconductor, evaporate Au, alloy layer, Au, Ti, and Au layer, each layer has a thickness of 10~200nm, remove the photoresist after stripping, and finally form the n-electrode layer; (4) Annealing: The annealing process is used to form good electrical conduction between the metal and the P-type semiconductor and the N-type semiconductor respectively.

[0007] Preferably, the substrate is an n-type GaSb substrate, the energy gap of the GaSb material is 0.726 eV, and its lattice constant is 6.1 Å.

[0008] Preferably, the epitaxial structure includes a GaSb buffer layer, an n-Al x Ga 1-x AsSb extension layer, n-Al y Ga 1- y AsSb distributed confinement layer, Al 0.3 Ga 0.7 AsSb / In 0.3 Ga 0.7 AsSb multiple quantum well light-emitting layer, p-Al z Ga 1-z AsSb distributed confinement layer, p-Al c Ga 1-c AsSb extension layer, p-GaSb ohmic contact layer.

[0009] Preferably, the thickness of the multi-quantum well layer is 5-8 nm, and the thickness of the barrier layer is 4-7 nm, and there are 4-6 pairs of them respectively.

[0010] Preferably, the thickness of the n-type GaSb substrate is 200-300 nm, and the thickness of the n-Al x Ga 1-x The thickness of AsSb extension layer is 2~3μm, and the thickness of n-Al y Ga 1-y The thickness of the AsSb distributed confinement layer is 200~300nm, and the p-Al z Ga 1-z The thickness of the AsSb distributed confinement layer is 200~300nm, and the p-Al c Ga 1-c The thickness of the AsSb extension layer is 200~300nm. Preferably, the p-GaSb ohmic contact layer, wherein the p-GaSb is p-type doped with Mg, and the doping concentration is greater than 1*10 19 cm -3 , thickness is 100~200nm; n-type is doped with Si, and the growth temperature of other p-type layers is 550~750℃.

[0011] Preferably, after the material growth in step 1 is completed, Si3N4 is deposited by PECVD method with a thickness of 100-200 nm.

[0012] Preferably, the alloy layer material in step (3.2) is AuGe or AuGeNi.

[0013] Preferably, after the annealing process is completed, an Al2O3 protective layer is deposited on the surface using an ALD method with a thickness of 100-150 nm.

[0014] Compared with the prior art, the present invention has the following beneficial effects: 1. The quantum well light-emitting layer of the present invention adopts Al 0.3 Ga 0.7 AsSb / In 0.3 Ga 0.7 AsSb multi-quantum well light-emitting layer, in which the multi-quantum well layer thickness is 5~8nm, the barrier layer thickness is 4~7nm, and the number of pairs is 4~6 pairs. Under this composition, the lattice constants of the materials are equivalent, and the bandgap widths Eg are different, which can achieve quantum barrier and quantum well stress matching, less carrier loss, and high radiation recombination efficiency; 2. The present invention uses Ni, Ag metal and p-GaSb to form good electrical conduction through annealing; the contact resistance is relatively low, which is conducive to improving the electro-optical conversion efficiency; the horizontal electrode structure design makes wire bonding easier and has a large expansion space; 3. The hole diameter of the photonic crystal structure of the present invention is 160~200nm; the x and y spacings are arranged at equal intervals, the arrangement spacing is 100~150nm, and the hole depth is 300~500nm; the device designed and realized by the above invention has a high electro-optical conversion efficiency of the x, y double lattice structure, and the threshold power density can reach 1.8~1.91 kW / cm 2 .

[0015] 4. The present invention significantly improves the output efficiency and frequency stability of the laser by combining the double lattice structure and the characteristics of the photonic crystal, and also provides new possibilities for its application in the infrared band. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a diagram of the bidirectional photonic crystal arrangement of the present invention.

[0017] Figure 2 It is a vertical structure diagram of the device of the present invention. DETAILED DESCRIPTION

[0018] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the specific implementation mode, structure, characteristics and effects of the present invention are described in detail below in combination with the accompanying drawings and preferred embodiments.

[0019] The invention discloses a method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser, using a metal organic vapor deposition method, such as Figure 1 As shown, the specific steps include: 1. Material growth: 1. Growing a GaSb buffer layer 101 on an n-type GaSb substrate 100, with a thickness of 200-300 nm; 2. Growing n-Al on the buffer layer 101 x Ga 1-x AsSb extension layer 102, with a thickness of 2-3 μm, where x ranges from 0.75 to 0.88; 3. Growing n-Al on the extension layer 102 y Ga 1-y AsSb distributed confinement layer 103, thickness is 200-300 nm, y range is 0.25-0.35; 4. Growing Al on the distributed confinement layer 103 0.3 Ga 0.7 AsSb / In 0.3 Ga 0.7 AsSb multi-quantum well light-emitting layer 104, wherein the multi-quantum well layer thickness is 5-8nm, the barrier layer thickness is 4-7nm, and there are 4-6 pairs respectively; 5. Growing p-Al on the multi-quantum well light-emitting layer 104 z Ga 1-z AsSb distributed confinement layer 105, with a thickness of 200-300 nm, wherein z ranges from 0.25 to 0.35; 6. Growing p-Al on the distributed confinement layer 105 c Ga 1-c AsSb extension layer 106, with a thickness of 200-300 nm, wherein c ranges from 0.45 to 0.65; 7. A p-GaSb ohmic contact layer 107 is grown on the extension layer 106, wherein the p-GaSb is p-type doped with Mg and the doping concentration is greater than 1*10 19 cm -3 , thickness is 100~200nm; n-type is doped with Si, and the growth temperature of other p-type layers is 550~750℃; After the above growth is completed, the surface is cleaned; Si3N4 is deposited by PECVD method with a thickness of about 100~200nm.

[0020] 2. Device Fabrication 1. Use electron beam exposure system for photolithography, the diameter of the photolithographic holes is 160~200nm; the x and y spacings are arranged at equal intervals, and the spacing is 100~150nm, such as Figure 2 As shown; 2. Use ICP-RIE technology to etch away the surface Si3N4 to the surface of the epitaxial layer and remove the photoresist; 3. Use ICP-RIE technology to etch the epitaxial layer and remove the photoresist; the etching depth is 300~500nm; 4. Remove the surface Si3N4 layer with BOE; 5. After the photolithography process, a 0.5~1mm pitch pattern is formed, and the n-AlGaAsSb extension layer is etched by ICP dry method to remove the photoresist; 6. Through the photolithography process, a p-electrode pattern is defined on the surface of the P-type semiconductor, and Ni, Ag, and TiW ohmic contact layers are deposited by sputtering, and Au, Ni, Pt, and Au layers are deposited by electron beam method. The thickness of each layer is 10 to 200 nm, and the thickness of the Ni layer is about 0.5 to 1 nm. After stripping, the photoresist is removed to finally form a P-electrode layer 201; Use annealing process to form good electrical conduction between metal and P-type semiconductor, annealing temperature is 380~450℃, time is 10~15min; 7. Through photolithography, define an N electrode pattern on the surface of the n-AlGaAsSb extension layer, and use electron beam evaporation to deposit Au, alloy layer, Au, Ti, and Au layer, each layer having a thickness of 10 to 200 nm, and remove the photoresist after stripping; wherein the alloy material may be AuGe, AuGeNi, etc., and finally form a P electrode layer 202; Use annealing process to form good electrical conduction between metal and N-type semiconductor, annealing temperature is 280~350℃, time is 10~15min; 8. Deposit an Al2O3 protective layer 203 on the surface using the ALD method, with a thickness of about 10-15 nm; 9. Through the photolithography process and ICP process, the protective layer above the P and N electrodes is removed to expose the electrode layer, and the photoresist is removed; the above chips are thinned to 200~250μm; after cutting, the wafer is separated into a single mid-infrared emission laser with a surface photonic crystal.

[0021] In summary, the production of laser devices with a diameter of 0.5~1mm and a light emission wavelength of 2.2~2.3μm was completed.

Claims

1. A method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser, characterized in that: The specific steps include: Step 1: Material growth: growing an epitaxial structure on a substrate; Step 2: Device production: (1) Photolithography: The photolithography technology is used to etch holes with a diameter of 160~200nm on the semiconductor chip; the x and y spacings are arranged at equal intervals, and the arrangement spacing is 100~150nm; (2) Corrosion: Removal of unwanted materials by corrosion; (3) Definition: (3.1) Define a p-electrode pattern on the surface of a p-type semiconductor, and evaporate Ni, Ag, TiW ohmic contact layers and Au, Ni, Pt, Au layers, with each layer having a thickness of 10-200 nm, of which the Ni layer has a thickness of 0.5-1 nm; remove the photoresist after stripping, and finally form a p-electrode layer; (3.2) Define the N-electrode pattern on the surface of the N-type semiconductor, evaporate Au, alloy layer, Au, Ti, and Au layer, each layer has a thickness of 10~200nm, remove the photoresist after stripping, and finally form the n-electrode layer; (4) Annealing: The annealing process is used to form good electrical conduction between the metal and the P-type semiconductor and the N-type semiconductor respectively.

2. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 1, characterized in that: The substrate adopts an n-type GaSb substrate, the energy gap of the GaSb material is 0.726 eV, and its lattice constant is 6.1 Å.

3. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 2, characterized in that: The epitaxial structure includes a GaSb buffer layer, an n-Al x Ga 1-x AsSb extension layer, n-Al y Ga 1-y AsSb distributed confinement layer, Al 0.3 Ga 0.7 AsSb / In 0.3 Ga 0.7 AsSb multiple quantum well light-emitting layer, p-Al z Ga 1-z AsSb distributed confinement layer, p-Al c Ga 1- c AsSb extension layer, p-GaSb ohmic contact layer.

4. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 3, characterized in that: The thickness of the multi-quantum well layer is 5-8 nm, and the thickness of the barrier layer is 4-7 nm, and there are 4-6 pairs of them respectively.

5. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 4, characterized in that: The thickness of the n-type GaSb substrate is 200-300 nm, and the thickness of the n-Al x Ga 1-x The thickness of AsSb extension layer is 2~3μm, and the thickness of n-Al y Ga 1-y The thickness of the AsSb distributed confinement layer is 200~300nm, and the p-Al z Ga 1-z The thickness of the AsSb distributed confinement layer is 200~300nm, and the p-Al c Ga 1- c The thickness of the AsSb extension layer is 200~300nm.

6. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 5, characterized in that: The p-GaSb ohmic contact layer, wherein the p-GaSb is p-type doped with Mg, and the doping concentration is greater than 1*10 19 cm -3 , thickness is 100~200nm; n-type is doped with Si, and the growth temperature of other p-type layers is 550~750℃.

7. A method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to any one of claims 1 to 6, characterized in that: After the material growth in step 1 is completed, Si3N4 is deposited by PECVD method with a thickness of 100-200 nm.

8. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 1, characterized in that: The alloy layer material in step (3.2) is AuGe or AuGeNi.

9. The method for manufacturing an infrared double-lattice photonic crystal surface-emitting laser according to claim 1, characterized in that: After completing the annealing process, an Al2O3 protective layer with a thickness of 100~150nm is deposited on the surface using the ALD method.

Images