PMOS (P-channel Metal Oxide Semiconductor) bleeder circuit and use method thereof

Abstract

The invention discloses a PMOS bleeder circuit and a use method thereof, and belongs to the field of power management circuits. The circuit comprises a bias module, a driving module, a PMOS discharge power switch and a current discharge module, the input end of the bias module is electrically connected with the output end of a signal sending module, and the output end of the bias module is electrically connected with the input end of the driving module; the output end of the driving module is electrically connected with the input end of the PMOS discharge power switch; the current discharge module is electrically connected with the bias module, the driving module and the PMOS discharge power switch respectively; the bias module and the driving module are respectively provided with a voltage-regulator tube. According to the invention, normal work of the circuit under the high-voltage condition can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of power management circuits, and in particular to a PMOS discharge circuit and a use method thereof. Background Art

[0002] A bleeder circuit is a circuit used to release charge or energy in a circuit. It is commonly found in power supply filtering, high-voltage equipment, and energy storage components. When the bleeder circuit operates at high voltage, the bias circuit in the bleeder circuit mainly converts the low-voltage control signal into a high-voltage drive signal to control the opening and closing of the PMOS bleeder switch.

[0003] The traditional discharge circuit is restricted by the external power supply, which makes the traditional drive circuit unsuitable for power management circuits with higher operating voltages. In addition, the traditional discharge circuit also has the problem that the NMOS tube power switch is affected by the total dose of radiation and cannot be closed normally.

[0004] Based on this, there is an urgent need for a PMOS discharge circuit and a method of using the same to solve the above technical problems. Summary of the invention

[0005] The present invention provides a PMOS discharge circuit and a method for using the same, which can solve the problem in the related art that the discharge circuit cannot work in a high voltage circuit and cannot be shut down normally. The technical solution is as follows:

[0006] In one aspect, a PMOS discharge circuit is provided, the circuit comprising a signal sending module, a bias module, a driving module, a PMOS discharge power switch and a current discharge module, wherein:

[0007] The input end of the bias module is electrically connected to the output end of the signal sending module, and the output end of the bias module is electrically connected to the input end of the driving module;

[0008] The output end of the driving module is electrically connected to the input end of the PMOS discharge power switch;

[0009] The current discharge module is electrically connected to the bias module, the driving module and the PMOS discharge power switch respectively.

[0010] On the other hand, a method for using a PMOS discharge circuit is provided, the method comprising:

[0011] Using the current discharge module to provide an operating voltage for the PMOS discharge circuit;

[0012] Using the bias module to convert the control signal input by the signal sending module into a high-level output signal;

[0013] The driving module is used to receive the output signal, and the output signal is converted into a driving signal and sent to the PMOS discharge power switch to control the working state of the PMOS discharge power switch.

[0014] The technical solution provided by the present invention can at least bring the following beneficial effects: by setting a bias module, a driving module and a PMOS discharge power switch connected in sequence, and electrically connecting the clamping module to the bias module and the driving module respectively, a PMOS discharge circuit is formed. The bias module is used to convert a low-level input signal into a high-level input signal to the driving module, and then the driving module is used to control the working state of the PMOS power switch. The bias module and the driving module are both equipped with corresponding clamping sub-modules to provide corresponding bias voltages and driving voltages for them. At the same time, the working power supply voltage of the bias module and the driving module is changed from the original traditional external supply to directly connected to the current discharge module, and the current discharge module provides the working voltage. In this way, no additional external power supply is required, and power management circuits with different working voltages can be used for current discharge, and the PMOS tube is used as a power switch to ensure the normal start and stop of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 A PMOS discharge circuit diagram provided by an embodiment of the present invention;

[0017] Figure 2 is a circuit diagram of a bias module provided by an embodiment of the present invention;

[0018] Figure 3 A circuit diagram of a driving module and a PMOS tube discharge power switch provided in an embodiment of the present invention;

[0019] Figure 4 The present invention provides a flow chart of a method for using a PMOS discharge circuit according to an embodiment of the present invention.

[0020] Reference numerals:

[0021] 12-Bias module;

[0022] M1-first PMOS tube;

[0023] M2-second PMOS tube;

[0024] M3-NMOS tube;

[0025] R1-first resistor;

[0026] R2-second resistor;

[0027] D1- the first voltage regulator tube;

[0028] D2- the second voltage regulator tube;

[0029] D3-the third voltage regulator tube;

[0030] D4- the fourth voltage regulator tube;

[0031] 16- driver module;

[0032] M4-the third PMOS tube;

[0033] R3-the third resistor;

[0034] D5- the fifth voltage regulator tube;

[0035] 17-PMOS power switch;

[0036] M5-the fourth PMOS tube. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0038] As mentioned above, the high-side power supply port in the traditional discharge circuit is an externally connected power supply. In order to ensure the normal operation of the drive circuit, the operating voltage of the power supply input cannot be greater than the drain-source withstand voltage of all MOS tubes in the drive circuit; at the same time, the traditional discharge switch uses an NMOS tube. The influence of total dose radiation will cause the threshold voltage of the NMOS tube to drift to the left. The drift amount is large enough to prevent the NMOS tube from being closed normally.

[0039] Based on this, the concept of the present invention is to change the working power supply voltage of the bias module and the driving module from the original traditional external supply to a direct connection to the current discharge end, and the working voltage is provided by the current discharge end. In this way, no additional external power supply is required, and power management circuits with different working voltages can be used for current discharge; considering the influence of total dose irradiation, the power switch will use a PMOS tube to discharge current.

[0040] The specific implementation of the above concept is described below.

[0041] Please refer to Figure 1 , an embodiment of the present invention provides a PMOS discharge circuit, which includes a bias module, a driving module, a PMOS discharge power switch and a current discharge module, wherein: the input end of the bias module is electrically connected to the output end of the signal sending module, the output end of the bias module is electrically connected to the input end of the driving module; the output end of the driving module is electrically connected to the input end of the PMOS discharge power switch; the current discharge module is electrically connected to the bias module, the driving module and the PMOS discharge power switch respectively.

[0042] In the embodiment of the present invention, a bias module, a driving module and a PMOS discharge power switch connected in sequence are provided, and a clamping module is electrically connected to the bias module and the driving module respectively to form a PMOS discharge circuit. The bias module is used to convert a low-level input signal into a high-level input signal to the driving module, and then the driving module is used to control the working state of the PMOS power switch. The bias module and the driving module are both equipped with corresponding clamping sub-modules to provide corresponding bias voltages and driving voltages for them. At the same time, the working power supply voltage of the bias module and the driving module is changed from the original traditional external supply to directly connected to the current discharge module, and the current discharge module provides the working voltage. In this way, no additional external power supply is required, and power management circuits with different working voltages can be used for current discharge, and the PMOS tube is used as a power switch to ensure the normal start and stop of the circuit.

[0043] Described below Figure 1 The specific connection method of each component is shown.

[0044] like Figure 1 As shown, Figure 1 The connection diagram of the PMOS discharge circuit provided by the embodiment of the present invention is as follows. The circuit includes a bias module 12, a driving module 16, a PMOS discharge switch 17 and a current discharge module.

[0045] The input end of the bias module 12 is electrically connected to the output end of the signal sending module, and the output end of the bias module 12 is electrically connected to the input end of the driving module; the output end of the driving module is electrically connected to the input end of the PMOS discharge power switch; the current discharge module is electrically connected to the bias module 12, the driving module and the PMOS discharge power switch respectively.

[0046] The bias module is used to convert the low-level input signal into a high-level input signal for the driving module, and then the driving module is used to control the working state of the PMOS power switch. The working power supply voltage of the bias module and the driving module is changed from the original traditional external supply to a direct connection to the current discharge end, and the working voltage is provided by the current discharge end. In this way, there is no need for an additional external power supply, and current discharge can be applied to power management circuits with different working voltages.

[0047] In the embodiment of the present invention, the bias module 12 and the driving module 16 are both provided with a voltage regulator tube, which serves as a clamping submodule to provide a clamping voltage for the corresponding parts of the lines of the bias module 12 and the driving module 16. Under the action of the voltage regulator tube, the current discharge module can work normally even when the voltage of the current discharge module is higher than the drain-source voltage of the MOS tube in the bias module 12.

[0048] Furthermore, if Figure 2 As shown, Figure 2 The bias module circuit diagram provided in this embodiment, the bias module 12 also includes a current mirror module and a control signal input submodule, and the types of MOS tubes arranged in the two are different, wherein the MOS tube of the current mirror module is a PMOS tube, and the MOS tube of the control signal input submodule is an NMOS tube.

[0049] Specifically, the bias module 12 is provided with a first PMOS tube M1, a second PMOS tube M2, an NMOS tube M3, a first resistor R1, a second resistor R2, a first voltage regulator tube D1, a second voltage regulator tube D2, a third voltage regulator tube D3 and a fourth voltage regulator tube D4, wherein:

[0050] The gate of the first PMOS tube M1 is electrically connected to the gate of the second PMOS tube M2, the source of the first PMOS tube M1 is electrically connected to the current discharge module, and the drain of the first PMOS tube M1 is electrically connected to the gates of the first PMOS tube M1 and the second PMOS tube M2;

[0051] The source of the second PMOS tube M2 is electrically connected to the current discharge module, and the drain of the second PMOS tube M2 is electrically connected to the input end of the driving module as the output end of the bias module 12;

[0052] A first end of the first resistor R1 is electrically connected to the gate of the first PMOS tube M1, and a second end of the first resistor R1 is electrically connected to the cathode of the first voltage regulator tube D1;

[0053] A first end of the second resistor R2 is electrically connected to the drain of the second PMOS tube M2, and a second end of the second resistor R2 is electrically connected to the cathode of the second voltage regulator tube D2 and the drain of the NMOS tube M3 respectively;

[0054] The gate of the NMOS tube M3 is electrically connected to the output end of the signal sending module as the input end of the bias module 12, and the drain of the NMOS tube M3 is electrically connected to the second end of the second resistor R2 and the cathode of the third voltage regulator tube D3 respectively;

[0055] The source of the NMOS tube M3, the anode of the first voltage regulator tube D1 and the anode of the third voltage regulator tube D3 are all grounded;

[0056] The cathode of the second voltage regulator tube D2 is electrically connected to the drain of the first PMOS tube M1 and the drain of the second PMOS tube M2, and the anode of the second voltage regulator tube D2 is electrically connected to the gate of the first PMOS tube M1 and the gate of the second PMOS tube M2;

[0057] The cathode of the fourth voltage regulator tube D4 is electrically connected to the current discharge module, and the anode of the fourth voltage regulator tube D4 is electrically connected to the drain of the second PMOS tube M2 and the first end of the second resistor R2 respectively.

[0058] It is understandable that when the bias module 12 operates at high voltage, and the operating voltage is higher than the sum of the clamping voltage and the source-drain voltage of an ordinary MOS tube, this will cause the MOS tubes in the bias module 12 to have the risk of exceeding the withstand voltage, so the current mirror module and the control signal input submodule are both high-voltage MOS tubes.

[0059] At the same time, when the bias module 12 works in a high-voltage environment, the cathode voltage of the first voltage regulator tube D1 is used as the clamping voltage of the second end of the first resistor R1; the anode voltage of the second voltage regulator tube D2 is used as the clamping voltage of the gates of the first PMOS tube M1 and the second PMOS tube M2; the cathode voltage of the third voltage regulator tube D3 is used as the clamping voltage of the second end of the second resistor R2; and the anode voltage of the fourth voltage regulator tube D4 is used as the output terminal voltage of the bias module 12. The voltage regulator tubes are used to ensure the normal working state of the circuit in a high-voltage environment.

[0060] For example, the cathode of the second voltage regulator D2 is connected to the drain of the first PMOS tube M1 and the second PMOS tube M2, and the anode is connected to the gate and drain of the first PMOS tube M1 and the gate of the second PMOS tube M2. For the convenience of description, it is assumed that the turn-on voltage of all MOS tubes is Vth, the maximum gate-source operating voltage 〡Vgs〡 is 5V, the clamping voltage VD of all voltage regulators is 5V, the voltage of the discharge current end is VHI (VHI ≥ 5V), and the ground is VLO. Therefore, the gate-source voltage of the first PMOS tube M1 and the second PMOS tube M2 is 5V at most and VHI-Vth at least during operation, and the maximum voltage of the connection between the first voltage regulator D1 and the first resistor R1 is VLO+5V; the cathode of the fourth voltage regulator D4 is connected to the current discharge end, and the anode is connected to the drain of the second PMOS tube M2 and the connection line of one end of the second resistor R2 as the output end of the bias module 12, so the maximum drain of the second PMOS tube M2 is VHI-min (Vgs-Vth) when it is working. M2 , the minimum is VHI-5V; the anode of the third voltage regulator D3 is connected to the ground VLO, and the cathode is connected to the second resistor R2 and the drain connection line of the NMOS tube M3. When VIN=VLO, the NMOS tube M3 is cut off, and the drain voltage of the NMOS tube M3 reaches the maximum and is VLO+5V. At this time, the drain voltage of the second PMOS tube M2, that is, the output voltage of the bias module, reaches the maximum, and the maximum value is VHI-min (Vgs-Vth) M2 When VIN=VLO+5V, the NMOS tube M3 is turned on and enters the deep linear region, and the drain voltage of the NMOS tube M3 reaches the minimum and is VLO. At this time, the drain voltage of the second PMOS tube M2, that is, the output voltage of the bias module, reaches the minimum, and the minimum value is VHI-5V. Therefore, the bias module 12 can convert the input VIN low-level input range VLO~VLO+5V into a high-level output range VHI-5V~VHI-min(Vgs-Vth) M2 , thereby providing it to the next-level driving module 16; based on the above-mentioned MOS tube operating voltage, it is further determined that the bias circuit 12 is suitable for a power management circuit with a higher operating voltage.

[0061] like Figure 3 As shown, Figure 3The circuit diagram of the driving module and the PMOS discharge power switch provided in this embodiment is as follows: the driving module 16 is provided with a third PMOS tube M4, a third resistor R3 and a fifth voltage regulator tube D5, wherein: the gate of the third PMOS tube M4 is electrically connected to the output end of the bias module as the input end of the driving module 16, the source of the third PMOS tube M4 is electrically connected to the second end of the third resistor R3, the anode of the fifth voltage regulator tube D5 and the input end of the PMOS discharge power switch as the output end of the driving module 16, and the drain of the third PMOS tube M4 is grounded; the first end of the third resistor R3 and the cathode of the fifth voltage regulator tube D5 are both electrically connected to the current discharge module.

[0062] It is understandable that when the driving module 16 operates in a high-voltage environment, the anode voltage of the fifth voltage regulator tube D5 is used as the output terminal voltage of the driving module 16 .

[0063] The principle of the voltage regulator tube in the driving module 16 is similar to the above process. For example, the cathode of the fifth voltage regulator tube D5D5 is connected to the current discharge module, and the anode is connected to the output of the driving module 16. Since the discharge switch adopts a PMOS tube, when the drain voltage Vd4 of the third PMOS tube M4 is ≥ VHI-Vth, the discharge switch fourth PMOS tube M5 is closed; since the drain of the third PMOS tube M4 is clamped by the fifth voltage regulator tube D5D5, the drain voltage Vd4 of the third PMOS tube M4 when working is ≥ VHI-5V, so the gate voltage range of the PMOS power switch 17 when discharging current is VHI-5V~VHI-Vth; since the working power supply voltage of the discharge circuit is provided by the discharge current end, as the discharge circuit is turned on to discharge current, the voltage VHI of the discharge current end will gradually decrease, so when the voltage VHI of the discharge current end continuously decreases to less than Vth, the PMOS discharge switch will be closed and no longer discharge current.

[0064] In the embodiment of the present invention, the PMOS discharge power switch includes a fourth PMOS tube M5, wherein: the gate of the fourth PMOS tube M5 is electrically connected to the output end of the driving module 16 as the input end of the PMOS discharge power switch, the source of the fourth PMOS tube M5 is electrically connected to the current discharge module, and the drain of the fourth PMOS tube M5 is grounded.

[0065] Specifically, the gate input end of the PMOS discharge switch 17 is connected to the driving module 16; the current discharge module is respectively connected to the bias module 12, the driving module 16 and the PMOS discharge switch 17; the power supply provided by the current discharge module is used to provide an operating voltage to the bias module 12, the driving module 16 and the PMOS discharge switch 17, so that the driving circuit outputs a driving signal to the power switch to control the working state of the power switch.

[0066] It is understandable that in order to ensure that the entire circuit can be applied to a high-voltage working environment, the MOS tubes selected in the above modules are all high-voltage MOS tubes.

[0067] like Figure 4 As shown, an embodiment of the present invention further provides a method for using a PMOS discharge circuit, which is applied to the PMOS discharge circuit mentioned in any of the above embodiments, and the method includes:

[0068] S400, using a current discharge module to provide a working voltage for a PMOS discharge circuit;

[0069] S402, using a bias module to convert a control signal input by a signal sending module into a high-level output signal;

[0070] S404 , using a driving module to receive the output signal, and converting the output signal into a driving signal to send to the PMOS discharge power switch to control the working state of the PMOS discharge power switch.

[0071] Furthermore, when the PMOS discharge circuit operates in a high-voltage environment, the voltage regulator is used to adjust the operating voltages of the bias module and the driving module, so that the PMOS discharge circuit operates under high-voltage conditions.

[0072] It can be understood that the method embodiment provided by the embodiment of the present invention and the above-mentioned circuit embodiment belong to the same inventive concept, so the two have the same beneficial effects and will not be described in detail here.

[0073] It can be known from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly contributed to the prior art in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application or certain parts of the embodiments.

[0074] Finally, it should be noted that, in this article, relational terms such as first, second, third and fourth are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0075] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A PMOS discharge circuit, characterized in that: The circuit includes a bias module, a driving module, a PMOS discharge power switch and a current discharge module, wherein: The input end of the bias module is electrically connected to the output end of the signal sending module, and the output end of the bias module is electrically connected to the input end of the driving module; The output end of the driving module is electrically connected to the input end of the PMOS discharge power switch; The current discharge module is electrically connected to the bias module, the driving module and the PMOS discharge power switch respectively.

2. The circuit according to claim 1, characterized in that The bias module and the driving module are both provided with a voltage regulator tube, and the voltage regulator tube is used to provide a clamping voltage for corresponding components in the bias module and the driving module.

3. The circuit according to claim 2, characterized in that The bias module is provided with a first PMOS tube, a second PMOS tube, an NMOS tube, a first resistor, a second resistor, a first voltage regulator tube, a second voltage regulator tube, a third voltage regulator tube and a fourth voltage regulator tube, wherein: The gate of the first PMOS tube is electrically connected to the gate of the second PMOS tube, the source of the first PMOS tube is electrically connected to the current discharge module, and the drain of the first PMOS tube is electrically connected to the gates of the first PMOS tube and the second PMOS tube; The source of the second PMOS tube is electrically connected to the current discharge module, and the drain of the second PMOS tube is electrically connected to the input end of the driving module as the output end of the bias module; A first end of the first resistor is electrically connected to the gate of the first PMOS tube, and a second end of the first resistor is electrically connected to the cathode of the first voltage regulator tube; A first end of the second resistor is electrically connected to the drain of the second PMOS tube, and a second end of the second resistor is electrically connected to the cathode of the second voltage regulator tube and the drain of the NMOS tube respectively; The gate of the NMOS tube is electrically connected to the output end of the signal sending module as the input end of the bias module, and the drain of the NMOS tube is electrically connected to the second end of the second resistor and the cathode of the third voltage regulator tube respectively; The source of the NMOS tube, the anode of the first voltage regulator tube and the anode of the third voltage regulator tube are all grounded; The cathode of the second voltage regulator tube is electrically connected to the drain of the first PMOS tube and the drain of the second PMOS tube respectively, and the anode of the second voltage regulator tube is electrically connected to the gate of the first PMOS tube and the gate of the second PMOS tube respectively; The cathode of the fourth voltage regulator is electrically connected to the current discharge module, and the anode of the fourth voltage regulator is electrically connected to the drain of the second PMOS tube and the first end of the second resistor respectively.

4. The circuit according to claim 3, characterized in that When the bias module operates in a high voltage environment: Using the cathode voltage of the first voltage regulator tube as the clamping voltage of the second end of the first resistor; Using the anode voltage of the second voltage regulator tube as the clamping voltage of the gates of the first PMOS tube and the second PMOS tube; Using the cathode voltage of the third voltage regulator tube as the clamping voltage of the second end of the second resistor; The anode voltage of the fourth voltage regulator tube is used as the output terminal voltage of the bias module.

5. The circuit according to claim 2, characterized in that The driving module is provided with a third PMOS tube, a third resistor and a fifth voltage regulator tube, wherein: The gate of the third PMOS tube is electrically connected to the output end of the bias module as the input end of the driving module, the source of the third PMOS tube is electrically connected to the second end of the third resistor, the anode of the fifth voltage regulator tube and the input end of the PMOS discharge power switch as the output end of the driving module, and the drain of the third PMOS tube is grounded; The first end of the third resistor and the cathode of the fifth voltage regulator are both electrically connected to the current discharge module.

6. The circuit according to claim 5, characterized in that When the driving module operates in a high-voltage environment, the anode voltage of the fifth voltage regulator tube is used as the output terminal voltage of the driving module.

7. The circuit according to claim 2, characterized in that The PMOS discharge power switch includes a fourth PMOS tube, wherein: The gate of the fourth PMOS tube is electrically connected to the output end of the driving module as the input end of the PMOS discharge power switch, the source of the fourth PMOS tube is electrically connected to the current discharge module, and the drain of the fourth PMOS tube is grounded.

8. The circuit according to any one of claims 3 to 5, characterized in that All the MOS tubes are high-voltage MOS tubes.

9. A method for using a PMOS discharge circuit, characterized in that: A PMOS discharge circuit as claimed in any one of claims 2 to 8, comprising: Using the current discharge module to provide an operating voltage for the PMOS discharge circuit; Using the bias module to convert the control signal input by the signal sending module into a high-level output signal; The driving module is used to receive the output signal, and the output signal is converted into a driving signal and sent to the PMOS discharge power switch to control the working state of the PMOS discharge power switch.

10. The method according to claim 9, characterized in that When the PMOS discharge circuit operates in a high-voltage environment, the voltage regulator is used to adjust the operating voltages of the bias module and the driving module, so that the PMOS discharge circuit operates under high-voltage conditions.

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