Charging circuit soft start control method, soft start device and computer equipment

Abstract

The invention provides a charging circuit soft start control method, a soft start device and computer equipment. The method comprises the following steps: acquiring a bus voltage at the output end side of the PFC circuit, and controlling the bus voltage to reach a first bus voltage value; controlling the dead-zone time of a switch pair transistor in the LLC circuit to be reduced from the maximum dead-zone time to the first dead-zone time and the working frequency to be reduced from two times of the resonant frequency of the LLC circuit to the first working frequency, and controlling the output voltage of the LLC circuit to reach a first output voltage value; controlling the dead-zone time of a switch pair transistor in the LLC circuit to be reduced from the first dead-zone time to the second dead-zone time and the working frequency to be reduced from the first working frequency to the second working frequency, and controlling the output voltage of the LLC circuit to reach a second output voltage value; and when the output voltage of the LLC circuit reaches the second output voltage value, the bus voltage is controlled to be reduced from the first bus voltage value to the second bus voltage value.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a charging circuit soft start control method, a soft start device and a computer device. Background Art

[0002] With the development of the new energy industry, battery energy storage technology has emerged. In the battery charging process, PFC circuit and LLC circuit are needed. Before charging the battery, the PFC circuit and LLC circuit need to be soft-started first.

[0003] In traditional technology, when a different output voltage is required, the LLC duty cycle is increased to 50% while the LLC operating frequency is reduced to meet the output voltage requirement. However, when the LLC operating frequency is reduced and the duty cycle is increased, the switch tube is falsely turned off and the switch-to-tube has a weak direct conduction phenomenon, which can easily cause the switch tube to overheat and cause the risk of explosion. Summary of the invention

[0004] Based on this, it is necessary to provide a charging circuit soft start control method, a soft start device and a computer device to address the above technical problems.

[0005] A charging circuit soft start control method, the charging circuit comprising a PFC circuit and an LLC circuit, the input end of the PFC circuit being used to connect to an external power supply, and the output end of the PFC circuit being connected to the input end of the LLC circuit; the method comprising:

[0006] Acquiring a bus voltage at an output end side of the PFC circuit, and controlling the bus voltage to reach a first bus voltage value;

[0007] Controlling the dead time of the switch pair in the LLC circuit to decrease from the maximum dead time to the first dead time, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach the first output voltage value based on the first dead time, the first operating frequency and the first bus voltage value;

[0008] Controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time, and the operating frequency to decrease from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach a second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value;

[0009] When the LLC circuit output voltage reaches a second output voltage value, controlling the bus voltage to decrease from the first bus voltage value to the second bus voltage value;

[0010] The first operating frequency is greater than 1.7 times the resonant frequency of the LLC circuit, and the second output voltage value is greater than the first output voltage value.

[0011] In one embodiment, the step of controlling the dead time of the switch pair in the LLC circuit to be reduced from the first dead time to the second dead time, and the operating frequency to be reduced from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value comprises:

[0012] Controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time according to the first slope, and controlling the operating frequency to decrease from the first operating frequency to the second operating frequency according to the second slope, wherein the second operating frequency is greater than 1.2 times the resonant frequency of the LLC circuit;

[0013] The LLC circuit output voltage is controlled to increase from the first output voltage value to the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value.

[0014] In one embodiment, the LLC circuit includes a transformer, and the first output voltage value is determined according to the first bus voltage value, the number of turns of the primary winding of the transformer, the number of turns of the secondary winding of the transformer, the first dead time, and the first operating frequency.

[0015] In one embodiment, the method further comprises:

[0016] Controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to a third dead time according to a third slope, and controlling the operating frequency to decrease from the first operating frequency to a third operating frequency according to a fourth slope, and controlling the output voltage of the LLC circuit to increase from the first output voltage value to a third output voltage value based on the third dead time and the third operating frequency;

[0017] When the output voltage of the LLC circuit increases to a third output voltage value, the dead time of the switch pair in the LLC circuit is controlled to decrease from the third dead time to the second dead time according to a fifth slope, and the operating frequency is controlled to decrease from the third operating frequency to the second operating frequency according to a sixth slope, and the output voltage of the LLC circuit is controlled to increase from the third output voltage value to the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value;

[0018] The third operating frequency is greater than 1.5 times the resonant frequency of the LLC circuit, the third slope is less than the fifth slope, and the fourth slope is greater than the sixth slope.

[0019] In one embodiment, the step of controlling the dead time of the switch pair in the LLC circuit to be reduced from the maximum dead time to the first dead time, and reducing the operating frequency from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach the first output voltage value based on the first dead time and the first operating frequency includes:

[0020] Controlling the dead time of the middle switch pair of the LLC circuit to decrease from the maximum dead time to the first dead time according to the seventh slope, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency according to the eighth slope;

[0021] Controlling the output voltage of the LLC circuit to reach a first output voltage value based on the first dead time and the first operating frequency;

[0022] The seventh slope is smaller than the third slope, and the eighth slope is larger than the fourth slope.

[0023] In one embodiment, the charging circuit soft start control method further includes:

[0024] Controlling the dead time of the switch pair in the LLC circuit to decrease from the second dead time to zero, and controlling the operating frequency to decrease from the second operating frequency to a fourth operating frequency according to a ninth slope, wherein the fourth operating frequency is the same as the resonant frequency of the LLC circuit, and the ninth slope is less than the second slope;

[0025] The LLC circuit output voltage is controlled to increase from the second output voltage value to the fourth output voltage value based on the fourth operating frequency and the first bus voltage value.

[0026] In one embodiment, the charging circuit soft start control method further includes:

[0027] When the LLC circuit output voltage reaches a fourth output voltage value, the bus voltage is controlled to decrease from the first bus voltage value to a third bus voltage value, wherein the third bus voltage value is greater than the second bus voltage value.

[0028] A soft starting device, comprising:

[0029] A charging circuit, the charging circuit comprising a PFC circuit and an LLC circuit, the input end of the PFC circuit being used to connect to an external power supply, and the output end of the PFC circuit being connected to the input end of the LLC circuit;

[0030] The control circuit is connected to the charging circuit and is used to execute the charging circuit soft start control method described in any one of the above embodiments.

[0031] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any one of the methods described in the above embodiments when executing the computer program.

[0032] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in any one of the above embodiments.

[0033] Compared with the prior art, the above-mentioned charging circuit soft start control method, soft start device and computer equipment. The method includes: first, obtaining the bus voltage on the output side of the PFC circuit, and controlling the bus voltage to reach a first bus voltage value; second, controlling the dead time of the switch pair tube in the LLC circuit to be reduced from the maximum dead time to the first dead time, and the operating frequency to be reduced from 2 times the resonant frequency of the LLC circuit to the first operating frequency, and based on the first dead time, the first operating frequency and the first bus voltage value, controlling the output voltage of the LLC circuit to reach the first output voltage value; then, controlling the dead time of the switch pair tube in the LLC circuit to be reduced from the first dead time to the second dead time, and the operating frequency to be reduced from the first operating frequency to the second operating frequency, and based on the second dead time, the second operating frequency and the first bus voltage value, controlling the output voltage of the LLC circuit to reach the second output voltage value; finally, when the output voltage of the LLC circuit reaches the second output voltage value, controlling the bus voltage to be reduced from the first bus voltage value to the second bus voltage value. The present application adopts the above method, which can first establish the bus voltage to the first bus voltage value, and then establish the output voltage to the first output voltage value and the second output voltage value in sequence, and then when the output voltage reaches the second output voltage value, the bus voltage is brought to the steady-state target value - that is, the second bus voltage value, thereby avoiding the risk of explosion, and the control method is simple and reliable to operate. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 A flowchart of a charging circuit soft start control method provided in an embodiment of the present application;

[0036] Figure 2 A circuit diagram of a charging circuit provided in an embodiment of the present application;

[0037] Figure 3 A timing diagram of bus voltage provided in an embodiment of the present application;

[0038] Figure 4 A timing diagram of the output voltage of the LLC circuit provided in one embodiment of the present application;

[0039] Figure 5 A timing diagram of the operating frequency of the LLC circuit provided in one embodiment of the present application;

[0040] Figure 6 A timing diagram of the dead time of an LLC circuit provided in an embodiment of the present application;

[0041] Figure 7 A circuit schematic diagram of a soft start device provided in one embodiment of the present application;

[0042] Figure 8 This is a diagram of the internal structure of a computer device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0043] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific implementation disclosed below.

[0044] The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings). In the description of this application, it should be understood that the orientation or position relationship indicated by the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. are based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0045] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0046] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0048] See also Figures 1 to 3 An embodiment of the present application provides a charging circuit soft start control method, which is applied to a charging circuit. The charging circuit includes a PFC circuit and an LLC circuit. The input end of the PFC circuit is used to connect an external power supply. The output end of the PFC circuit is connected to the input end of the LLC circuit.

[0049] The method comprises:

[0050] S102: Acquire a bus voltage at an output end side of the PFC circuit, and control the bus voltage to reach a first bus voltage value.

[0051] In some embodiments, a voltage can be input to the bus on the output side of the PFC circuit through an external power supply so that the bus voltage on the output side of the PFC circuit reaches a first bus voltage value. PFC in the PFC circuit refers to "Power Factor Correction". The power factor is often used to characterize the efficiency of electronic products in using electric energy. The higher the power factor of the electronic product, the higher the electric energy utilization efficiency of the electronic product. The PFC circuit includes inductors L1 / L2 / L3 connected in sequence, a first full-bridge circuit (including switches Q1, Q2, Q3, Q4, Q5, Q6) and a bus capacitor C1.

[0052] Optionally, when the voltage of the external power input enters the PFC circuit, the voltage of the external power input will charge the bus capacitor C1, increase the bus voltage from 0, and within a certain period of time (such as Figure 3 The voltage of the first bus increases to the Vbus constant value (i.e., the first bus voltage value) within the time period 0-t2, and the value of Vbus is the highest bus voltage in steady-state operation. In other words, the first bus voltage value is the highest bus voltage in steady-state operation.

[0053] S104: Control the dead time of the switch pair in the LLC circuit to decrease from the maximum dead time to the first dead time, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency, and control the output voltage of the LLC circuit to reach a first output voltage value based on the first dead time, the first operating frequency and the first bus voltage value.

[0054] In some embodiments, the LLC circuit includes a transformer, the primary side of the transformer includes a second full-bridge circuit (including switches S1, S2, S3, S4) and an LC series resonant circuit connected in sequence, and the secondary side of the transformer includes a third full-bridge circuit (including diodes D1, D2, D3, D4). The second full-bridge circuit can also be replaced by a half-bridge circuit, and the full-bridge circuit is taken as an example here.

[0055] When the bus voltage reaches the first bus voltage value, the dead time of the switch pair in the second full-bridge circuit of the LLC circuit can be controlled to decrease from the maximum dead time to the first dead time, and the operating frequency of the switch in the second full-bridge circuit of the LLC circuit can be linearly or exponentially reduced from 2 times the resonant frequency of the LLC circuit to the first operating frequency. The first operating frequency is greater than 1.7 times the resonant frequency of the LLC circuit. In some embodiments, the dead time and the operating frequency are one-to-one corresponding in some cases. For example, the first dead time corresponds to the first operating frequency; the maximum dead time corresponds to 2 times the resonant frequency of the LLC circuit.

[0056] In some embodiments, the bus voltage reaching the first bus voltage value is input to the LLC circuit, and after being processed by the second full-bridge circuit, the LC series resonant circuit, the converter, and the third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is increased within a certain period of time (e.g. Figure 4 As shown, the time period t2-t3) increases from 0 to the first output voltage value.

[0057] S106: Control the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time, and the operating frequency to decrease from the first operating frequency to the second operating frequency, and control the output voltage of the LLC circuit to reach a second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value.

[0058] In some embodiments, when the output voltage of the LLC circuit reaches the first output voltage value, the dead time of the switch pair in the LLC circuit is further controlled to be reduced from the first dead time to the second dead time, and the operating frequency is reduced from the first operating frequency to the second operating frequency, wherein the second operating frequency is greater than 1.2 times the resonant frequency of the LLC circuit. The bus voltage reaching the first bus voltage value is input into the LLC circuit, and after being processed by the second full-bridge circuit, the LC series resonant circuit, the converter and the third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain time (such as Figure 4 As shown, the output voltage increases from the first output voltage value to the second output voltage value during the time period t3-t5. The second output voltage value is greater than the first output voltage value.

[0059] S108: When the LLC circuit output voltage reaches a second output voltage value, controlling the bus voltage to decrease from the first bus voltage value to the second bus voltage value.

[0060] In some embodiments, when the LLC circuit output voltage reaches the second output voltage value and runs stably for a period of time, the bus voltage on the output side of the PFC circuit can be further controlled to decrease from the first bus voltage value to the second bus voltage value Vbus1 within a certain period of time, that is, the second bus voltage value Vbus1 is the steady-state operating bus voltage target value corresponding to the second output voltage value Vout1.

[0061] This embodiment adopts the above method, and can first establish the bus voltage to the first bus voltage value, and then establish the output voltage to the first output voltage value and the second output voltage value in sequence. Then, when the output voltage reaches the second output voltage value and runs for a period of time, the bus voltage is brought to the steady-state target value - that is, the second bus voltage value. This can avoid the risk of explosion, and the control method is simple and reliable to operate.

[0062] like Figure 5 and Figure 6 As shown, in some embodiments, the step of controlling the dead time of the switch pair in the LLC circuit to be reduced from the first dead time to the second dead time, and the operating frequency to be reduced from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value includes:

[0063] Control the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time according to the first slope, and control the operating frequency to decrease from the first operating frequency to the second operating frequency according to the second slope, wherein the second operating frequency is greater than 1.2 times the resonant frequency of the LLC circuit; based on the second dead time, the second operating frequency and the first bus voltage value, control the output voltage of the LLC circuit to increase from the first output voltage value to the second output voltage value.

[0064] In some embodiments, the first slope and the second slope may be fixed values ​​or variable values, which are not limited in this embodiment. Under the first slope, the dead time of the switch pair in the LLC circuit gradually decreases; under the second slope, the operating frequency of the switch in the second full-bridge circuit of the LLC circuit gradually decreases.

[0065] In some embodiments, the LLC circuit includes a transformer, and the first output voltage value is determined according to the first bus voltage value, the number of turns of the primary winding of the transformer, the number of turns of the secondary winding of the transformer, the first dead time, and the first operating frequency. In some embodiments, the first output voltage value may be the minimum output voltage value Voutmin, the operating frequency corresponding to the steady state thereof is the first operating frequency f2, and the dead time is the first dead time Tdead1. The second output voltage value may be a steady-state target value of the output voltage, such as Vout1, Vout2, Vout3, etc. This embodiment is described with the second output voltage value being Vout1.

[0066] In some embodiments, the method further includes: controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time Tdead1 to a third dead time Tdead2 according to a third slope, and controlling the operating frequency to decrease from the first operating frequency f2 to a third operating frequency f3 according to a fourth slope, and based on the third dead time and the third operating frequency, controlling the output voltage of the LLC circuit to increase from the first output voltage value to a third output voltage value.

[0067] In some embodiments, the third slope and the fourth slope can be fixed values ​​or variable values, which are not limited in this embodiment. Under the third slope k12, the dead time of the switch pair tube in the LLC circuit gradually decreases; under the fourth slope k2, the operating frequency of the switch tube in the second full-bridge circuit of the LLC circuit gradually decreases. In this embodiment, the bus voltage reaching the first bus voltage value is input into the LLC circuit, and after being processed by the second full-bridge circuit, LC series resonant circuit, converter and third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain time (such as Figure 4 As shown, during the time period t3-t4, the output voltage increases from the first output voltage value to the third output voltage value.

[0068] When the output voltage of the LLC circuit increases to the third output voltage value, the dead time of the switch pair in the LLC circuit is controlled to be reduced from the third dead time Tdead2 to the second dead time Tdeadmin according to the fifth slope, and the operating frequency is reduced from the third operating frequency f3 to the second operating frequency f4 according to the sixth slope, and the output voltage of the LLC circuit is controlled to increase from the third output voltage value to the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value; wherein the third operating frequency is greater than 1.5 times the resonant frequency of the LLC circuit, the third slope is less than the fifth slope, and the fourth slope is greater than the sixth slope.

[0069] In some embodiments, the fifth slope and the sixth slope can be fixed values ​​or variable values, which are not limited in this embodiment. Under the fifth slope k13, the dead time of the switch pair tube in the LLC circuit gradually decreases; under the sixth slope k3, the operating frequency of the switch tube in the second full-bridge circuit of the LLC circuit gradually decreases. In this embodiment, the bus voltage reaching the first bus voltage value is input into the LLC circuit, and after being processed by the second full-bridge circuit, LC series resonant circuit, converter and third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain period of time (such as Figure 4 As shown, during the time period t4-t5, the output voltage increases from the third output voltage value to the second output voltage value.

[0070] In some embodiments, the step of controlling the dead time of the middle switch pair of the LLC circuit to be reduced from the maximum dead time to the first dead time, and the operating frequency to be reduced from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach a first output voltage value based on the first dead time and the first operating frequency includes: controlling the dead time of the middle switch pair of the LLC circuit to be reduced from the maximum dead time Tdeadmax to the first dead time Tdead1 according to the seventh slope k11, and the operating frequency to be reduced from twice the resonant frequency of the LLC circuit (f1, f1 is twice the resonant frequency of the LLC circuit) to the first operating frequency f2 according to the eighth slope k1; controlling the output voltage of the LLC circuit to reach a first output voltage value Voutmin based on the first dead time and the first operating frequency; wherein the seventh slope is less than the third slope, and the eighth slope is greater than the fourth slope.

[0071] In some embodiments, the seventh slope and the eighth slope can be fixed values ​​or variable values, which are not limited in this embodiment. Under the seventh slope k11, the dead time of the switch pair tube in the LLC circuit gradually decreases; under the eighth slope k1, the operating frequency of the switch tube in the second full-bridge circuit of the LLC circuit gradually decreases. In this embodiment, the bus voltage reaching the first bus voltage value is input into the LLC circuit, and after being processed by the second full-bridge circuit, LC series resonant circuit, converter and third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain time (such as Figure 4 As shown, the time period t2-t3) increases from 0 to the first output voltage value Voutmin.

[0072] In some embodiments, the charging circuit soft start control method further includes: controlling the dead time of the switch pair in the LLC circuit to be reduced from the second dead time to zero, and reducing the operating frequency from the second operating frequency to the fourth operating frequency according to the ninth slope, wherein the fourth operating frequency is the same as the resonant frequency of the LLC circuit, and the ninth slope is less than the second slope; and controlling the output voltage of the LLC circuit to increase from the second output voltage value to the fourth output voltage value based on the fourth operating frequency and the first bus voltage value. In some embodiments, when the output voltage of the LLC circuit reaches the fourth output voltage value, the bus voltage is controlled to decrease from the first bus voltage value to the third bus voltage value, wherein the third bus voltage value is greater than the second bus voltage value.

[0073] In some embodiments, if the second output voltage value is Vout1 and the fourth output voltage value is Vout2, the fourth operating frequency is the operating frequency of Vout2 in steady state, and the corresponding ninth slope is k4. At this time, the switch duty cycle of the second full-bridge circuit of the LLC circuit is 50%. In this embodiment, the bus voltage reaching the first bus voltage value is input into the LLC circuit, and after being processed by the second full-bridge circuit, the LC series resonant circuit, the converter and the third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain period of time (such as Figure 4 As shown, the output voltage Vout1 increases from the second output voltage value Vout1 to the fourth output voltage value Vout2 during the time period t5-t6. In some embodiments, when the LLC circuit output voltage reaches the fourth output voltage value Vout2 and runs stably for a period of time, the bus voltage at the output end side of the PFC circuit can be further controlled to decrease from the first bus voltage value to the third bus voltage value Vbus2 within a certain period of time, that is, the third bus voltage value Vbus2 is the steady-state operation bus voltage target value corresponding to the fourth output voltage value Vout2.

[0074] In some embodiments, if the second output voltage value is Vout2 and the fourth output voltage value is Vout3, the fourth operating frequency is the operating frequency of Vout3 in steady state, and the corresponding ninth slope is k4. At this time, the dead time of the second full-bridge circuit of the LLC circuit is 0. In this embodiment, the bus voltage reaching the first bus voltage value is input into the LLC circuit, and after being processed by the second full-bridge circuit, the LC series resonant circuit, the converter and the third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain time (such as Figure 4 As shown, the output voltage Vout2 increases from the second output voltage value Vout2 to the fourth output voltage value Vout3 during the time period t6-t7. In some embodiments, when the LLC circuit output voltage reaches the fourth output voltage value Vout3 and runs stably for a period of time, the bus voltage at the output end side of the PFC circuit can be further controlled to decrease from the first bus voltage value to the third bus voltage value Vbus3 within a certain period of time, that is, the third bus voltage value Vbus3 is the steady-state operation bus voltage target value corresponding to the fourth output voltage value Vout3.

[0075] In some embodiments, if the second output voltage value is Vout3 and the fourth output voltage value is Vout4, the fourth operating frequency is the operating frequency of Vout4 in a steady state, and the corresponding ninth slope is k4. At this time, the dead time of the second full-bridge circuit of the LLC circuit is 0. In this embodiment, the bus voltage reaching the first bus voltage value is input to the LLC circuit, and after being processed by the second full-bridge circuit, the LC series resonant circuit, the converter and the third full-bridge circuit in the LLC circuit, the output voltage of the LLC circuit is reduced within a certain time (such as Figure 4 As shown, the output voltage Vout3 increases from the second output voltage value Vout3 to the fourth output voltage value Vout4 during the time period t7-t8. In some embodiments, when the LLC circuit output voltage reaches the fourth output voltage value Vout4 and runs stably for a period of time, the bus voltage at the output end side of the PFC circuit can be further controlled to decrease from the first bus voltage value to the third bus voltage value Vbus4 within a certain period of time, that is, the third bus voltage value Vbus4 is the steady-state operation bus voltage target value corresponding to the fourth output voltage value Vout4.

[0076] From the above content, it can be seen that the output voltage of the LLC circuit gradually increases from 0, and when the voltage value of the output voltage increases to Vout1, when the output voltage of the LLC circuit is increased later, it is not necessary to increase the output voltage of the LLC circuit from 0, but it can be further increased on the basis of Vout1, which can reduce the time required for the soft start process while keeping the soft start state of the output voltage part consistent.

[0077] See also Figure 7In one embodiment of the present application, a soft start device 10 is provided. The soft start device 10 comprises: a charging circuit 100 and a control circuit 200. The charging circuit 100 comprises a PFC circuit 110 and an LLC circuit 120. The input end of the PFC circuit 110 is used to connect an external power supply. The output end of the PFC circuit 110 is connected to the input end of the LLC circuit 120. The control circuit 200 is connected to the charging circuit 100. The control circuit 200 is used to execute the charging circuit soft start control method described in any one of the above embodiments.

[0078] In some embodiments, the specific circuit topology of the control circuit 200 is not limited, as long as it has the function of executing the charging circuit soft start control method described in any of the above embodiments. For example, the control circuit 200 can be a controller or an integrated control chip. The specific control logic of the control circuit 200 can refer to the above embodiments and will not be repeated here. The soft start device described in this embodiment adopts the above method, and can first establish the bus voltage to the first bus voltage value, and then establish the output voltage to the first output voltage value and the second output voltage value in sequence. After the output voltage reaches the second output voltage value, the bus voltage is brought to the steady-state target value-that is, the second bus voltage value. This can avoid the risk of explosion, and the control method is simple and reliable to operate.

[0079] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 8 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a charging circuit soft start control method is implemented. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covered on the display screen, or a key, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0080] Those skilled in the art will understand that Figure 8The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0081] See also Figure 8 Another embodiment of the present application provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the charging circuit soft start control method described in any one of the above embodiments are implemented.

[0082] In one embodiment, the processor implements the following steps when executing the computer program:

[0083] S102: Acquire a bus voltage at an output end side of the PFC circuit, and control the bus voltage to reach a first bus voltage value;

[0084] S104: controlling the dead time of the switch pair in the LLC circuit to decrease from the maximum dead time to the first dead time, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach the first output voltage value based on the first dead time, the first operating frequency and the first bus voltage value;

[0085] S106: controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time, and the operating frequency to decrease from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach a second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value;

[0086] S108: When the output voltage of the LLC circuit reaches a second output voltage value, the bus voltage is controlled to decrease from the first bus voltage value to the second bus voltage value; wherein, the first operating frequency is greater than 1.7 times the resonant frequency of the LLC circuit, and the second output voltage value is greater than the first output voltage value.

[0087] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the charging circuit soft start control method described in any one of the above embodiments are implemented.

[0088] In one embodiment, the computer program, when executed by a processor, implements the following steps:

[0089] S102: Acquire a bus voltage at an output end side of the PFC circuit, and control the bus voltage to reach a first bus voltage value;

[0090] S104: controlling the dead time of the switch pair in the LLC circuit to decrease from the maximum dead time to the first dead time, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach the first output voltage value based on the first dead time, the first operating frequency and the first bus voltage value;

[0091] S106: controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time, and the operating frequency to decrease from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach a second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value;

[0092] S108: When the output voltage of the LLC circuit reaches a second output voltage value, the bus voltage is controlled to decrease from the first bus voltage value to the second bus voltage value; wherein, the first operating frequency is greater than 1.7 times the resonant frequency of the LLC circuit, and the second output voltage value is greater than the first output voltage value.

[0093] The above-mentioned computer device and computer-readable storage medium, by adopting the above-mentioned method, can first establish the bus voltage to the first bus voltage value, and then establish the output voltage to the first output voltage value and the second output voltage value in sequence, and then when the output voltage reaches the second output voltage value, the bus voltage is brought to the steady-state target value - that is, the second bus voltage value, so that the risk of explosion can be avoided, and the control method is simple and reliable to operate.

[0094] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0095] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0096] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A charging circuit soft start control method, characterized in that: The charging circuit includes a PFC circuit and an LLC circuit, the input end of the PFC circuit is used to connect to an external power supply, and the output end of the PFC circuit is connected to the input end of the LLC circuit; the method includes: Acquiring a bus voltage at an output end side of the PFC circuit, and controlling the bus voltage to reach a first bus voltage value; Controlling the dead time of the switch pair in the LLC circuit to decrease from the maximum dead time to the first dead time, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach the first output voltage value based on the first dead time, the first operating frequency and the first bus voltage value; Controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time, and the operating frequency to decrease from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach a second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value; When the LLC circuit output voltage reaches a second output voltage value, controlling the bus voltage to decrease from the first bus voltage value to the second bus voltage value; The first operating frequency is greater than 1.7 times the resonant frequency of the LLC circuit, and the second output voltage value is greater than the first output voltage value.

2. The charging circuit soft start control method according to claim 1, characterized in that: The step of controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time, and the operating frequency to decrease from the first operating frequency to the second operating frequency, and controlling the output voltage of the LLC circuit to reach the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value comprises: Controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to the second dead time according to the first slope, and controlling the operating frequency to decrease from the first operating frequency to the second operating frequency according to the second slope, wherein the second operating frequency is greater than 1.2 times the resonant frequency of the LLC circuit; The LLC circuit output voltage is controlled to increase from the first output voltage value to the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value.

3. The charging circuit soft start control method according to claim 2, characterized in that: The LLC circuit includes a transformer, and the first output voltage value is determined according to the first bus voltage value, the number of turns of the primary winding of the transformer, the number of turns of the secondary winding of the transformer, the first dead time, and the first operating frequency.

4. The charging circuit soft start control method according to claim 2, characterized in that: The method further comprises: Controlling the dead time of the switch pair in the LLC circuit to decrease from the first dead time to a third dead time according to a third slope, and controlling the operating frequency to decrease from the first operating frequency to a third operating frequency according to a fourth slope, and controlling the output voltage of the LLC circuit to increase from the first output voltage value to a third output voltage value based on the third dead time and the third operating frequency; When the output voltage of the LLC circuit increases to a third output voltage value, the dead time of the switch pair in the LLC circuit is controlled to decrease from the third dead time to the second dead time according to a fifth slope, and the operating frequency is controlled to decrease from the third operating frequency to the second operating frequency according to a sixth slope, and the output voltage of the LLC circuit is controlled to increase from the third output voltage value to the second output voltage value based on the second dead time, the second operating frequency and the first bus voltage value; The third operating frequency is greater than 1.5 times the resonant frequency of the LLC circuit, the third slope is less than the fifth slope, and the fourth slope is greater than the sixth slope.

5. The charging circuit soft start control method according to claim 4, characterized in that: The step of controlling the dead time of the switch pair in the LLC circuit to decrease from the maximum dead time to the first dead time, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency, and controlling the output voltage of the LLC circuit to reach the first output voltage value based on the first dead time and the first operating frequency includes: Controlling the dead time of the middle switch pair of the LLC circuit to decrease from the maximum dead time to the first dead time according to the seventh slope, and the operating frequency to decrease from twice the resonant frequency of the LLC circuit to the first operating frequency according to the eighth slope; Controlling the output voltage of the LLC circuit to reach a first output voltage value based on the first dead time and the first operating frequency; The seventh slope is smaller than the third slope, and the eighth slope is larger than the fourth slope.

6. The charging circuit soft start control method according to claim 2, characterized in that: The method further comprises: Controlling the dead time of the switch pair in the LLC circuit to decrease from the second dead time to zero, and controlling the operating frequency to decrease from the second operating frequency to a fourth operating frequency according to a ninth slope, wherein the fourth operating frequency is the same as the resonant frequency of the LLC circuit, and the ninth slope is less than the second slope; The LLC circuit output voltage is controlled to increase from the second output voltage value to the fourth output voltage value based on the fourth operating frequency and the first bus voltage value.

7. The charging circuit soft start control method according to claim 6, characterized in that: The method further comprises: When the LLC circuit output voltage reaches a fourth output voltage value, the bus voltage is controlled to decrease from the first bus voltage value to a third bus voltage value, wherein the third bus voltage value is greater than the second bus voltage value.

8. A soft start device, characterized in that: include: A charging circuit, the charging circuit comprising a PFC circuit and an LLC circuit, the input end of the PFC circuit being used to connect to an external power supply, and the output end of the PFC circuit being connected to the input end of the LLC circuit; A control circuit is connected to the charging circuit and is used to execute the charging circuit soft start control method according to any one of claims 1 to 7.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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