Self-protection circuit, cascade circuit and operational amplifier circuit

Abstract

The invention discloses a self-protection circuit, a cascade circuit and an operational amplifier circuit, the self-protection circuit is configured to receive a first power supply, and the self-protection circuit comprises a first transistor, a first switch assembly and a control unit. The first transistor comprises a first input end, a first output end and a first control end. The first output end is electrically connected with the grounding end, and the first input end is configured to receive the first power supply. The first switch assembly is electrically connected with the first control end and the first input end. The control unit is electrically connected with the first switch assembly and is configured to control the first switch assembly to be switched on before the first power supply supplies power to the first transistor. And after the first power supply continuously supplies power to the first transistor, the first switch assembly is controlled to be switched off.

Description

Technical Field

[0001] This case is related to the technical field of circuits, especially self-protection circuits, cascade circuits and operational amplifier circuits. Background Art

[0002] In order to prevent the surge from affecting the components in the circuit, parasitic capacitors are generally used to guide the surge to the ground, or the characteristics of the diode are used to guide the reverse surge to the ground.

[0003] However, although the above method can avoid the negative impact of surges, when the circuit works normally, since the parasitic capacitor or diode is still electrically connected to the circuit, the component characteristics of the parasitic capacitor or diode will affect the overall operation of the circuit and can only protect against surges in one direction. Summary of the invention

[0004] In view of the above, a self-protection circuit is provided. In some embodiments, the self-protection circuit is configured to receive a first power supply, and the self-protection circuit includes a first transistor, a first switch component and a control unit. The first transistor includes a first input terminal, a first output terminal and a first control terminal, the first output terminal is electrically connected to the ground terminal, and the first input terminal is configured to receive the first power supply. The first switch component is electrically connected to the first control terminal and the first input terminal, respectively. The control unit is electrically connected to the first switch component, and is configured to control the first switch component to be turned on before the first power supply supplies power to the first transistor, and to control the first switch component to be turned off after the first power supply continues to supply power to the first transistor.

[0005] In some embodiments, the control unit controls the first switch component to be turned on before the first power source stops supplying power to the first transistor.

[0006] In some embodiments, the self-protection circuit further includes a second switch component and a third switch component. The second switch component is electrically connected between the first control terminal and the ground terminal. The third switch component is electrically connected between the first power supply and the first input terminal. The control unit is electrically connected to the second switch component and the third switch component respectively to control the second switch component and the third switch component to be turned on or off respectively.

[0007] In some embodiments, the control unit controls the first switch component to be turned on before the first power source stops supplying power to the first transistor.

[0008] In some embodiments, the control unit controls the second switch component and the third switch component to be turned on so that the first power supply supplies power to the first transistor, and controls the second switch component and the third switch component to be turned off so that the first power supply does not supply power to the first transistor.

[0009] In some embodiments, the control unit controls the first switch component to be turned on before controlling the third switch component to be turned on.

[0010] A cascade circuit is also provided, configured to receive a first power supply. The cascade circuit includes a first transistor, a second transistor, a first switch component, a second switch component and a control unit, wherein the first transistor includes a first input terminal, a first output terminal and a first control terminal. The first input terminal receives the first power supply. The second transistor includes a second input terminal, a second output terminal and a second control terminal. The first output terminal is electrically connected to the second input terminal, and the second output terminal is electrically connected to the ground terminal. The first switch component is electrically connected to the first control terminal and the first input terminal, respectively. The second switch component is electrically connected to the second control terminal and the second input terminal, respectively. The control unit is electrically connected to the first switch component and the second switch component, respectively, and is configured to control the first switch component and the second switch component to be turned on before the first power supply is supplied to the first transistor, and to control the first switch component and the second switch component to be turned off after the first power supply is continuously supplied to the first transistor.

[0011] Another operational amplifier circuit is provided, which is configured to receive a first power supply. The operational amplifier circuit includes a current mirror circuit, a first transistor, a first switch component and a control unit. The first transistor includes a first input terminal, a first output terminal and a first control terminal. The first input terminal and the first control terminal are respectively electrically connected to the current mirror circuit. The first input terminal is configured to receive the first power supply. The first output terminal is electrically connected to a ground terminal. The first switch component is respectively electrically connected to the first input terminal and the first control terminal. The control unit is electrically connected to the first switch component, and is configured to control the first switch component to be turned on before the first power supply is supplied to the first transistor, and to control the first switch component to be turned off after the first power supply is continuously supplied to the first transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A circuit diagram of a self-protection circuit in some embodiments is shown. Figure 2 A circuit diagram of a cascade circuit in some embodiments is shown. Figure 3 A circuit diagram of an operational amplifier circuit in some embodiments is shown. Figure 4 A timing diagram of the first switch component, the second switch component, and the third switch component when the first power source supplies power in some embodiments is shown. Figure 5 A timing diagram of the first switch component, the second switch component, and the third switch component when the first power source is stopped in some embodiments is shown. DETAILED DESCRIPTION

[0013] See also Figure 1As shown, the self-protection circuit is configured to receive a first power supply V out10 The self-protection circuit includes a first transistor 10, a first switch component 20, and a control unit 30.

[0014] See also Figure 1 As shown, the first transistor 10 includes a first input terminal 101, a first output terminal 102 and a first control terminal 103. The first input terminal 101 is configured to receive a first power supply V out10 , the first output terminal 102 is electrically connected to the ground terminal G10. In some embodiments, the first transistor 10 can be a bipolar junction transistor (BJT) or a field effect transistor (FET). In some embodiments, the first transistor 10 is an N-channel enhancement type MOSFET, the first input terminal 101 is a drain, the first output terminal 102 is a source, and the first control terminal 103 is a gate.

[0015] See also Figure 1 As shown, the first switch component 20 is electrically connected to the first control terminal 103 and the first input terminal 101 respectively. In some embodiments, the first switch component 20 can be a bipolar transistor or a field effect transistor. In some embodiments, the first switch component 20 is an N-channel enhancement type MOSFET, the drain of the first switch component 20 is electrically connected to the first input terminal 101, and the source of the first switch component 20 is electrically connected to the first control terminal 103.

[0016] See also Figure 1 As shown, the control unit 30 is electrically connected to the first switch component 20 and is configured to out10 Before supplying power to the first transistor 10, the first switch element 20 is controlled to be turned on, and the first power source V out10 After the first transistor 10 is continuously supplied with power, the first switch element 20 is controlled to be turned off. In some embodiments, the control unit 30 is a control circuit such as a microprocessor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), etc., which can output corresponding electrical signals.

[0017] See also Figure 1 and Figure 4 As shown, at the first power supply V out10 Before supplying power to the first transistor 10, the control unit 30 first controls the first switch element 20 to be turned on, so that the first power source V out10 When power is supplied to the first transistor 10, the current first flows through the first switch element 20, then flows through the first transistor 10 from the first control terminal 103, and then is output from the first output terminal 102. out10After continuously supplying power to the first transistor 10, the control unit 30 controls the first switch element 20 to be turned off. In this way, when the first switch element 20 is turned on, the first transistor 10 can be prevented from being damaged due to an instantaneous excessive current, and when the first switch element 20 is turned off, its component characteristics can be prevented from affecting the overall circuit. Figure 5 As shown, in some embodiments, at the first power supply V out10 Before stopping supplying power to the first transistor 10 , the control unit 30 will also control the first switch element 20 to be turned on, so as to prevent the surge generated when the power supply is stopped from affecting the first transistor 10 .

[0018] See also Figure 1 As shown, in some embodiments, the self-protection circuit further includes a second switch component 21 and a third switch component 22. The second switch component 21 is electrically connected between the first control terminal 103 and the ground terminal G10. The third switch component 22 is electrically connected to the first power supply V out10 and the first input terminal 101. The control unit 30 is electrically connected to the second switch component 21 and the third switch component 22 to control the second switch component 21 and the third switch component 22 to be turned on or off. When the second switch component 21 and the third switch component 22 are turned on, the first power source V out10 can flow into the first transistor 10, and when the second switch component 21 and the third switch component 22 are cut off, the first power supply V out10 Therefore, the control unit 30 controls the second switch element 21 and the third switch element 22 to be turned on or off to determine the first power source V out10 Whether it flows into the first transistor 10. As described above, when the first power source V out10 Before power is supplied to the first transistor 10 (i.e., before the second switch element 21 and the third switch element 22 are turned on under the control of the control unit 30), the first switch element 20 must be turned on first. out10 After the first transistor 10 is continuously supplied with power, the first switch element 20 is turned off. out10 Before stopping supplying power to the first transistor 10 (ie, before the second switch element 21 and the third switch element 22 are turned off under the control of the control unit 30 ), the first switch element 20 needs to be turned on first.

[0019] In some embodiments, through the control of the control unit 30, at least the first switch component 20 needs to be turned on before the third switch component 22 is turned on, regardless of whether the second switch component 21 is turned on before the first switch component 20 is turned on. That is, the turn-on sequence of the first switch component 20, the second switch component 21 and the third switch component 22 can be the first switch component 20, the third switch component 22, the second switch component 21, or the first switch component 20, the second switch component 21, the third switch component 22, or after the first switch component 20 is turned on, the second switch component 21 and the third switch component 22 are turned on at the same time.

[0020] See also Figure 2 As shown, in some embodiments, the aforementioned self-protection circuit can be applied to a cascade circuit. The cascade circuit is configured to receive a first power supply V out20 The cascade circuit includes a first transistor 40 , a second transistor 41 , a first switch component 50 , a second switch component 51 and a control unit 31 .

[0021] See also Figure 2 As shown, the first transistor 40 includes a first input terminal 401, a first output terminal 402 and a first control terminal 403. The first input terminal 401 receives a first power supply V out20 The second transistor 41 includes a second input terminal 411, a second output terminal 412 and a second control terminal 413. The first output terminal 402 is electrically connected to the second input terminal 411, and the second output terminal 412 is electrically connected to the ground terminal G20. The first switch component 50 is electrically connected to the first control terminal 403 and the first input terminal 401. The second switch component 51 is electrically connected to the second control terminal 413 and the second input terminal 411. The control unit 31 is electrically connected to the first switch component 50 and the second switch component 51, and is configured to out20 Before supplying power to the first transistor 40, the first switch element 50 and the second switch element 51 are controlled to be turned on, and the first power source V out20 After power is continuously supplied to the first transistor 40 , the first switch element 50 and the second switch element 51 are controlled to be turned off.

[0022] At the first power supply V out20 Before supplying power to the first transistor 40, the first switch element 50 and the second switch element 51 must be turned on first. out20 After the first transistor 40 is continuously supplied with power, the first switch element 50 and the second switch element 51 are turned off. out20 The first power source V out20The current flows through the second switch element 51, and then passes through the second control terminal 413 and the second transistor 41 to be output from the second output terminal 412. out20 When the power supply starts, the first transistor 40 and the second transistor 41 are damaged. out20 When power is continuously supplied to the first transistor 40 and the second transistor 41 , the control unit 31 controls the first switch element 50 and the second switch element 51 to be turned off, so as to prevent the component characteristics of the first switch element 50 and the second switch element 51 from affecting the operation of the cascade circuit.

[0023] In some embodiments, the control unit 31 is configured to out20 Before stopping supplying power to the first transistor 40, the first switch element 50 and the second switch element 51 are controlled to be turned on. out20 The surge generated when the power supply is stopped affects the cascade circuit.

[0024] In some embodiments, the cascade circuit includes a third switch component 52 and a fourth switch component 53. The third switch component 52 is electrically connected between the first control terminal 403 and the ground terminal G20. The fourth switch component 53 is electrically connected between the second control terminal 413 and the ground terminal G20. The control unit 31 is electrically connected to the third switch component 52 and the fourth switch component 53, and the control unit 31 is used to control the third switch component 52 and the fourth switch component 53 to be turned on or off.

[0025] In some embodiments, through the control of the control unit 31, at least the first switch component 50 and the second switch component 51 need to be turned on before the third switch component 52 and the fourth switch component 53 are turned on. That is, the turn-on sequence of the first switch component 50, the second switch component 51, the third switch component 52 and the fourth switch component 53 can be the first switch component 50, the second switch component 51, the third switch component 52, the fourth switch component 53, or the first switch component 50 and the second switch component 51 are turned on at the same time, and then the third switch component 52 and the fourth switch component 53 are turned on at the same time.

[0026] In some embodiments, the first switch component 50, the second switch component 51, the third switch component 52, the fourth switch component 53, the first transistor 40 and the second transistor 41 may be bipolar transistors or field effect transistors. In some embodiments, the first switch component 50, the second switch component 51, the third switch component 52, the fourth switch component 53, the first transistor 40 and the second transistor 41 are N-channel enhancement MOSFETs, the first input terminal 401 and the second input terminal 411 are drains, the first output terminal 402 and the second output terminal 412 are sources, and the first control terminal 403 and the second control terminal 413 are gates.

[0027] See also Figure 3 As shown, in some embodiments, the aforementioned self-protection circuit can be applied to an operational amplifier circuit. The operational amplifier circuit is configured to receive a first power supply V out30 The operational amplifier circuit includes a current mirror circuit 60 , a first switch component 70 , a first transistor 80 , and a control unit 32 .

[0028] The first transistor 80 includes a first input terminal 801, a first output terminal 802 and a first control terminal 803. The first input terminal 801 and the first control terminal 803 are electrically connected to the current mirror circuit 60 respectively. The first input terminal 801 is configured to receive a first power source V out30 The first output terminal 802 is electrically connected to the ground terminal G30. The first switch component 70 is electrically connected to the first input terminal 801 and the first control terminal 803. The control unit 32 is electrically connected to the first switch component 70 and is configured to be connected to the first power supply V out30 Before supplying power to the first transistor 80, the first switch element 70 is controlled to be turned on, and the first power source V out30 After the power is continuously supplied to the first transistor 80 , the first switch element 70 is controlled to be turned off.

[0029] The operational amplifier circuit receives the first power supply V out30 Before, the control unit 32 will first control the first switch component 70 to conduct, so that the first power source V out30 After passing through the first switch element 70, the first power source V out30 When the first power supply V out30 When power is continuously supplied to the operational amplifier circuit, the control unit 32 controls the first switch element 70 to be cut off, so that the element characteristics of the first switch element 70 will not affect the operation of the operational amplifier circuit.

[0030] In some embodiments, when the first power supply V out30Before stopping supplying power to the operational amplifier circuit, the control unit 32 controls the first switch element 70 to be turned on to prevent the first power source V out30 The surge generated when the power supply is cut off has a negative impact on the operational amplifier circuit.

[0031] In some embodiments, the current mirror circuit 60 is configured to receive the second power supply V out40 The current mirror circuit 60 includes a second transistor 61, a third transistor 62 and a second switch element 63. The second transistor 61 includes a second input terminal 611, a second output terminal 612 and a second control terminal 613. The second control terminal 613 is electrically connected to the second input terminal 611. The second input terminal 611 is configured to receive a second power supply V out40 The second output terminal 612 is electrically connected to the ground terminal G30. The third transistor 62 includes a third input terminal 621, a third output terminal 622 and a third control terminal 623. The second control terminal 613 is electrically connected to the third control terminal 623. The third input terminal 621 is configured to receive a second power supply V out40 The third output terminal 622 is electrically connected to the ground terminal G30. The second switch component 63 is electrically connected to the third control terminal 623 and the third input terminal 621. The control unit 32 is electrically connected to the second switch component 63 and is configured to be connected to the second power supply V out40 Before supplying power to the current mirror circuit 60, the second switch element 63 is controlled to be turned on, and the second power source V out40 After the power is continuously supplied to the current mirror circuit 60 , the second switch component 63 is controlled to be turned off.

[0032] When the current mirror circuit 60 starts to receive the second power supply V out40 Before, the control unit 32 controls the second switch component 63 to be turned on, so that the second power source V out40 When entering the current mirror circuit 60, the second power supply V out40 The power will flow along the second switch element 63 through the third control terminal 623, and finally flow from the third output terminal 622 to the ground terminal G30 through the third transistor 62. out40 The moment the current mirror circuit 60 is entered, the second transistor 61 or the third transistor 62 is damaged. out40 After continuously supplying power to the current mirror circuit 60 , the control unit 32 controls the second switch element 63 to be turned off, so as to reduce the influence of the element characteristics of the second switch element 63 on the operation of the current mirror circuit 60 .

[0033] In addition, in some embodiments, when the second power supply V out40 Before stopping supplying power to the current mirror circuit 60, the control unit 32 controls the second switch element 63 to be turned on to prevent the second power source V out40The surge generated when the power supply is stopped has a negative impact on the current mirror circuit 60 .

[0034] In some embodiments, the first transistor 80, the second transistor 61, the third transistor 62, the first switch component 70, and the second switch component 63 may be bipolar transistors or field effect transistors. In some embodiments, the first transistor 80, the second transistor 61, the third transistor 62, the first switch component 70, and the second switch component 63 are all N-channel enhancement type MOSFETs, the first input terminal 801, the second input terminal 611, and the third input terminal 621 are all drains, the first output terminal 802, the second output terminal 612, and the third output terminal 622 are all sources, and the first control terminal 803, the second control terminal 613, and the third control terminal 623 are all gates.

[0035] According to some embodiments of the self-protection circuit of the present invention, the control unit 30 is used to control the first switch component 20 to be turned on or off, so that the self-protection circuit starts to receive the first power supply V out10 , or stop receiving the first power supply V out10 When the first switch component 20 is turned on, the self-protection circuit has a self-protection function. When the self-protection circuit continues to receive the first power supply V out10 When the self-protection circuit is turned off, the first switch component 20 is cut off, so that the component characteristics of the first switch component 20 will not affect the operation of the self-protection circuit.

Explanation of symbols

[0036] V out10 ,V out20 ,V out30 :First Power V out40 : Second power supply G10, G20, G30: Ground terminal 10,40,80: First transistor 101,401,801: First input terminal 102,402,802: first output terminal 103,403,803: First control terminal 20,50,70: first switch assembly 21,51,63: Second switch assembly 22,52: The third switch component 53: Fourth switch component 30,31,32: Control unit 41,61: Second transistor 411,611: Second input terminal 412,612: Second output terminal 413,613: Second control terminal 60: Current mirror circuit 62: The third transistor 621: third input terminal 622: third output terminal 623: Third control terminal

Claims

1. A self-protection circuit, configured to receive a first power source, characterized in that: The self-protection circuit includes: a first transistor, comprising a first input terminal, a first output terminal and a first control terminal, the first output terminal being electrically connected to a ground terminal, and the first input terminal being configured to receive the first power source; a first switch component, electrically connected to the first control terminal and the first input terminal respectively; and A control unit is electrically connected to the first switch component and is configured to control the first switch component to be turned on before the first power supply supplies power to the first transistor, and to control the first switch component to be turned off after the first power supply continues to supply power to the first transistor.

2. The self-protection circuit according to claim 1, characterized in that: The control unit controls the first switch component to be turned on before the first power source stops supplying power to the first transistor.

3. The self-protection circuit according to claim 1, characterized in that: Also includes: a second switch component, electrically connected between the first control terminal and the ground terminal; and a third switch component, electrically connected between the first power source and the first input terminal; The control unit is electrically connected to the second switch component and the third switch component respectively to control the second switch component and the third switch component to be turned on or off respectively.

4. The self-protection circuit according to claim 3, characterized in that: The control unit controls the first switch component to be turned on before the first power source stops supplying power to the first transistor.

5. The self-protection circuit according to claim 3, characterized in that: The control unit controls the second switch component and the third switch component to be turned on so that the first power supply supplies power to the first transistor, and controls the second switch component and the third switch component to be turned off so that the first power supply does not supply power to the first transistor.

6. The self-protection circuit according to claim 3, characterized in that: The control unit controls the first switch component to be turned on before controlling the third switch component to be turned on.

7. A cascade circuit, configured to receive a first power source, characterized in that: The cascade circuit comprises: A first transistor, comprising a first input terminal, a first output terminal and a first control terminal, wherein the first input terminal receives the first power source; a second transistor, comprising a second input terminal, a second output terminal and a second control terminal, the first output terminal being electrically connected to the second input terminal, and the second output terminal being electrically connected to a ground terminal; a first switch component, electrically connected to the first control terminal and the first input terminal respectively; a second switch component, electrically connected to the second control terminal and the second input terminal respectively; and A control unit is electrically connected to the first switch component and the second switch component respectively, and is configured to control the first switch component and the second switch component to be turned on before the first power supply supplies power to the first transistor, and to control the first switch component and the second switch component to be turned off after the first power supply continues to supply power to the first transistor.

8. The cascade circuit according to claim 7, characterized in that: The cascade circuit comprises: a third switch component, electrically connected between the first control terminal and the ground terminal; and a fourth switch component, electrically connected between the second control terminal and the ground terminal; The control unit is electrically connected to the third switch component and the fourth switch component respectively, and the control unit is used to control the third switch component and the fourth switch component to be turned on or off respectively.

9. An operational amplifier circuit, configured to receive a first power supply, characterized in that: The operational amplifier circuit includes: a current mirror circuit; a first transistor, comprising a first input terminal, a first output terminal and a first control terminal, the first input terminal and the first control terminal are electrically connected to the current mirror circuit respectively, the first input terminal is configured to receive the first power source, and the first output terminal is electrically connected to a ground terminal; a first switch component, electrically connected to the first input terminal and the first control terminal respectively; and A control unit is electrically connected to the first switch component and is configured to control the first switch component to be turned on before the first power source supplies power to the first transistor, and to control the first switch component to be turned off after the first power source continues to supply power to the first transistor.

10. The operational amplifier circuit according to claim 9, wherein: The current mirror circuit is configured to receive a second power supply, and the current mirror circuit includes: a second transistor, comprising a second input terminal, a second control terminal and a second output terminal, the second control terminal being electrically connected to the second input terminal, the second input terminal being configured to receive the second power source, and the second output terminal being electrically connected to the ground terminal; a third transistor, comprising a third input terminal, a third control terminal and a third output terminal, the second control terminal is electrically connected to the third control terminal, the third input terminal is configured to receive the second power source, and the third output terminal is electrically connected to the ground terminal; and a second switch component, electrically connected to the third control terminal and the third input terminal respectively; The control unit is electrically connected to the second switch component and is configured to control the second switch component to be turned on before the second power supply supplies power to the current mirror circuit, and to control the second switch component to be turned off after the second power supply continues to supply power to the current mirror circuit.

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