Manufacturing method of high dielectric layer metal gate device

Abstract

The invention relates to a manufacturing method of a high dielectric layer metal gate device, and relates to the field of integrated circuits. The manufacturing method comprises the steps that a substrate is provided, the substrate comprises active regions and isolation structures, and the isolation structures and the active regions are arranged at intervals; the substrate is provided with a first region and a second region, the active region protrudes out of the isolation structure to form a first fin part in the first region, and a second fin part is formed in the second region; forming a first work function layer to cover the first fin part and the second fin part; free radicals generated by exciting the first gas through the metastable state particles are in contact with the surface of the first work function layer, and free dangling bonds on the surface of the first work function layer are removed; forming a second work function layer on the first work function layer; etching to remove the second work function layer on the first fin part; and the surface of the first work function layer is treated by free radicals generated by exciting the second gas through the metastable state particles. The problem of material loss of the first work function layer when devices with different threshold voltages are formed on the same substrate is solved.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a method for manufacturing a high dielectric layer metal gate device. Background Art

[0002] At present, semiconductor devices continue to shrink, and high-K Metal Gate (HKMG) devices have replaced traditional silicon dioxide / polysilicon gates. High-K metal gate devices use high-k materials to replace silicon dioxide as the gate dielectric layer. Under the premise of keeping the equivalent oxide capacitance (EOT) unchanged, the thickness of the high-k gate dielectric layer is thicker than that of the silicon dioxide gate dielectric layer, which effectively curbs the gate leakage current and reduces the static power consumption (Pstatic) of the device to less than 1 / 10 of the original, significantly improving the device energy efficiency ratio.

[0003] However, as the size of semiconductor devices shrinks, the thickness of the high dielectric constant gate dielectric layer becomes thinner and thinner, and high dielectric constant metal gate devices still have many problems. Summary of the invention

[0004] Based on this, it is necessary to provide a method for manufacturing a high dielectric layer metal gate device to address the problems in the prior art.

[0005] The present application provides a method for manufacturing a high dielectric layer metal gate device, comprising:

[0006] Providing a substrate, the substrate comprising an active region and an isolation structure, wherein the isolation structure and the active region are spaced apart;

[0007] forming a first work function layer, wherein the first work function layer covers the active area;

[0008] The first gas is excited by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer to remove free dangling bonds on the surface of the first work function layer.

[0009] Optionally, free radicals generated by the first gas combine with free dangling bonds on the surface of the first work function layer to generate volatile reactants.

[0010] Optionally, the substrate has a first region and a second region, the active region protrudes from the isolation structure to form a first fin in the first region, and a second fin in the second region; the first work function layer covers surfaces of the first fin and the second fin; and the manufacturing method further includes:

[0011] forming a second work function layer on the first work function layer;

[0012] Etching and removing the second work function layer on the first fin;

[0013] The second gas is excited by metastable particles to generate free radicals, and the second gas generates free radicals to process the surface of the first work function layer to repair the etching damage of the first work function layer.

[0014] Optionally, before forming the second work function layer on the first work function layer, the first gas is excited by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer to remove free dangling bonds on the surface of the first work function layer.

[0015] Optionally, after etching away the second work function layer on the first fin, the first gas is excited by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer to remove free dangling bonds on the surface of the first work function layer.

[0016] Optionally, free radicals generated by the second gas contact the first work function layer to induce atomic rearrangement of the first work function layer, so as to repair etching damage of the first work function layer.

[0017] Optionally, etching and removing the second work function layer on the first fin includes:

[0018] forming a dielectric layer, wherein the dielectric layer covers the first work function layer and the second work function layer and is filled between the first fins, between the second fins, and between the first fins and the second fins;

[0019] Etching and removing a portion of the dielectric layer to expose the second work function layer on the first fin;

[0020] Etching and removing the second work function layer on the first fin to expose the first work function layer on the first fin;

[0021] The dielectric layer on the second fin is removed.

[0022] Optionally, removing the dielectric layer on the second fin includes:

[0023] Ionizing the third gas to generate plasma, and removing a portion of the dielectric layer by plasma etching;

[0024] The fourth gas is excited by metastable particles to generate free radicals, and the remaining dielectric layer is removed by etching using the free radicals generated by the fourth gas.

[0025] Optionally, the manufacturing method comprises:

[0026] Providing a substrate, the substrate comprising an active region and an isolation structure, the isolation structure and the active region are arranged at intervals, the substrate having a first region and a second region, the active region protruding from the isolation structure to form a first fin in the first region, and a second fin in the second region;

[0027] forming a first work function layer, wherein the first work function layer covers surfaces of the first fin and the second fin;

[0028] forming a second work function layer on the first work function layer;

[0029] Forming a dielectric layer to cover the first work function layer and the second work function layer and fill between the first fins, between the second fins, and between the first fins and the second fins;

[0030] Etching and removing a portion of the dielectric layer to expose the second work function layer on the first fin;

[0031] Etching and removing the second work function layer on the first fin to expose the first work function layer on the first fin;

[0032] Exciting a first gas by metastable particles to generate free radicals, wherein the free radicals generated by the first gas contact the first work function layer on the first fin, and remove free dangling bonds on the surface of the first work function layer;

[0033] removing the dielectric layer on the second fin;

[0034] The second gas is excited by metastable particles to generate free radicals, and the second gas generates free radicals to process the surface of the first work function layer to repair the etching damage of the first work function layer.

[0035] Optionally, after etching away the second work function layer on the first fin, the substrate is transferred to a process chamber, and the steps of removing free dangling bonds on the surface of the first work function layer, removing the dielectric layer on the second fin, and repairing etching damage on the surface of the first work function layer are sequentially performed in the process chamber.

[0036] The manufacturing method of the high dielectric layer metal gate device of the present application, after forming the first work function layer, treats the surface of the first work function layer by free radicals generated by exciting the first gas with metastable particles, removes the free dangling bonds on the surface of the first work function layer, reduces the free dangling bonds on the surface of the first work function layer, and can improve the defect of the free dangling bonds combining with the material of the first work function layer causing the work function of the first work function layer to decrease. After etching and removing the second work function layer on the first fin, treats the first work function layer on the first fin by free radicals generated by exciting the second gas with metastable particles, so as to reduce the material loss of the first work function layer, improve the problem of the dielectric constant of the gate dielectric layer of the device decreasing due to the material loss of the first work function layer, and further improve the gate leakage current problem of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 is a process flow chart of a method for manufacturing a high dielectric metal gate device provided in an embodiment;

[0039] Figure 2 is a schematic structural diagram after a first work function layer is formed on a substrate provided in an embodiment;

[0040] Figure 3 A schematic diagram of treating a first work function layer with free radicals provided in an embodiment;

[0041] Figure 4 A process flow chart of a method for manufacturing a high dielectric metal gate device provided in another embodiment;

[0042] Figure 5 It is a schematic diagram of a structure after a first work function layer is formed to cover the first fin and the second fin in one embodiment;

[0043] Figure 6 is a schematic diagram of a structure after forming a second work function layer, a dielectric layer and a hard mask layer in one embodiment;

[0044] Figure 7 is a schematic diagram of a structure after etching the hard mask layer to expose the dielectric layer in the first region in one embodiment;

[0045] Figure 8 is a schematic diagram of a structure after etching away the dielectric layer in the first region in one embodiment;

[0046] Fig. 9 is a schematic diagram of a structure after etching away the remaining hard mask layer in one embodiment;

[0047] Fig.10 is a schematic diagram of a structure after etching away the second work function layer in the first region in one embodiment;

[0048] Fig.11 It is a schematic diagram of the structure after etching away the remaining dielectric layer in one embodiment;

[0049] Fig.12 is a schematic diagram of a structure after a gate conductive layer is formed in one embodiment;

[0050] Fig.13 It is a schematic diagram of a structure after a first device is formed in a first region and a second device is formed in a second region in one embodiment.

[0051] Description of reference numerals:

[0052] 10. Substrate; 11. Active area; 111. First fin; 211. Second fin; 12. Isolation structure; 21. First work function layer; 22. Second work function layer; 30. Dielectric layer; 40. Hard mask layer; 50. Photoresist layer; 23. Gate conductive layer; 60. First device; 70. Second device; A1. First area; A2. Second area. DETAILED DESCRIPTION

[0053] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0055] As described in the background art, as the size of semiconductor devices shrinks, the thickness of high dielectric constant gate dielectric layers becomes thinner and thinner, and high dielectric constant metal gate devices still have many problems.

[0056] As the size of semiconductor devices decreases, the thickness of the corresponding high-dielectric constant gate dielectric layer becomes thinner and thinner. The process of depositing the high-dielectric constant gate dielectric layer may cause chlorine to be doped into the high-dielectric constant layer. The free chlorine can react with the high-dielectric constant gate dielectric layer to reduce the dielectric constant of the high-dielectric constant gate dielectric layer. In addition, during the patterning process or etching of the film layer on the high-dielectric constant gate dielectric layer, plasma bombardment or chemical corrosion may cause damage to the high-dielectric constant gate dielectric layer, reducing the dielectric constant of the high-dielectric constant gate dielectric layer.

[0057] According to an exemplary embodiment, this embodiment provides a method for manufacturing a high dielectric layer metal gate device, such as Figure 1 As shown, the method for manufacturing a high dielectric metal gate device includes the following steps:

[0058] Step S101 : providing a substrate 10 , wherein the substrate 10 comprises an active region 11 and an isolation structure 12 , wherein the isolation structure 12 and the active region 11 are spaced apart.

[0059] Reference Figure 2 As shown, the substrate 10 may be a semiconductor substrate, and the material of the semiconductor substrate may include silicon (Si), silicon germanium (SiGe), silicon germanium carbon (SiGeC), silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), indium phosphide (InP) or other III / V semiconductor materials or II / VI semiconductor materials. Alternatively, for example, the semiconductor substrate may be a layered substrate including Si / SiGe, Si / SiC, silicon on insulator (SOI) or silicon germanium on insulator.

[0060] The substrate 10 includes active regions 11 and isolation structures 12. The active regions 11 are arranged at intervals, and the isolation structures 12 are arranged between the active regions 11 to isolate adjacent active regions 11. The material of the isolation structures 12 may include at least one of silicon oxide, silicon nitride or silicon oxynitride.

[0061] Step S102 : forming a first work function layer 21 , wherein the first work function layer 21 covers the active region 11 .

[0062] Continue to refer to Figure 2 As shown, the first work function layer 21 may be formed by deposition using an atomic layer deposition (ALD) process, and the first work function layer 21 covers the surfaces of the active region 11 and the isolation structure 12 .

[0063] During the deposition of the first work function layer 21, if the precursor gas is not completely reacted or not cleaned thoroughly, the precursor gas may react with the material of the first work function layer 21 or may be incorporated into the first work function layer 21 to form dangling bonds. Dangling bonds are unsaturated chemical bonds that become charge traps, affect the dielectric properties of the first work function layer 21, and may cause leakage current problems.

[0064] The first work function layer 21 includes a material with a high dielectric constant value. The high dielectric constant means that the dielectric constant value is greater than 3.9. For example, the material of the first work function layer 21 may include hafnium silicate (HfSiO x ), hafnium silicon oxynitride (HfSiON), hafnium oxide silicate (HfSiO4) or hafnium dioxide (HfO2). Alternatively, the material of the first work function layer 21 may also include aluminum oxide or lanthanum oxide.

[0065] Taking the case where the material of the first work function layer 21 includes hafnium dioxide as an example, during the deposition of hafnium dioxide, the precursor is not completely reacted, and residual chloride ions or organic matter may remain in the first work function layer 21 to form free chlorine dangling bonds.

[0066] Step S103 : exciting the first gas by metastable particles to generate free radicals. The free radicals generated by the first gas contact the surface of the first work function layer 21 , and remove free dangling bonds on the surface of the first work function layer 21 .

[0067] Reference Figure 3 As shown, metastable particles are atoms in an excited state but with a long lifetime. The energy of metastable particles is higher than that of the ground state but they cannot rapidly transition through spontaneous radiation. The energy of free radicals generated by exciting the first gas with metastable particles is relatively small. The free radicals generated by the first gas combine with the free dangling bonds on the surface of the first work function layer 21, which can reduce the free dangling bonds, so as to prevent the free dangling bonds from combining with the material of the first work function layer 21 and causing the work function of the first work function layer 21 to change. Moreover, the contact between the free radicals and the surface of the first work function layer 21 causes little damage to the first work function layer 21, and will not damage the first work function layer 21.

[0068] In the present embodiment, a metastable gas source is excited under the first process conditions to obtain metastable particles, and the metastable particles excite the first gas to generate free radicals. The free radicals generated by the first gas contact the surface of the first work function layer 21 and combine with the free dangling bonds on the surface of the first work function layer 21 to remove the free dangling bonds on the surface of the first work function layer 21.

[0069] The first process conditions are: temperature 100°C-200°C; source power 100W-1000W; pressure 100mTorr-1000mTorr. The metastable gas source is a rare gas, such as helium (He) or neon (Ne); the first gas may include at least one of nitrogen (N2) or hydrogen (H2); and the processing time is 10s-30s.

[0070] For example, helium can be used as a metastable gas source. The excitation energy of helium is low, and it is easy to generate metastable particles through electron collision or radio frequency discharge. Helium is ionized by radio frequency and excited to a metastable state to form highly metastable particles (He*). The first gas is excited by metastable particles. The first gas includes a mixture of N2 and H2, and the ratio of H2 to N2 is 1:4. The metastable particles transfer energy through collision, dissociate the first gas to obtain hydrogen radicals·H and nitrogen radicals·N, and the hydrogen radicals·H and nitrogen radicals·N are combined with free dangling bonds in the first work function layer 21 to prevent the free dangling bonds from reacting or combining with the material of the first work function layer 21.

[0071] The manufacturing method of the high dielectric layer metal gate device of the present embodiment, after forming the first work function layer 21, treats the surface of the first work function layer 21 with free radicals generated by exciting the first gas with metastable particles, removes the free dangling bonds on the surface of the first work function layer 21, and reduces the free dangling bonds on the surface of the first work function layer 21. It can improve the defect of the work function of the first work function layer 21 being reduced due to the combination of the free dangling bonds with the material of the first work function layer 21, which is beneficial to accurately control the work function of the first work function layer 21 and improve the gate leakage current defect of the high dielectric layer metal gate device.

[0072] In some embodiments, the free radicals generated by the first gas combine with the free dangling bonds on the surface of the first work function layer 21 to generate volatile reactants. In this way, it is possible to prevent the products of the free radicals generated by the first gas and the dangling bonds from adhering to the first work function layer 21 and affecting the accuracy of the work function of the first work function layer 21.

[0073] For example, the metastable particles excite the first gas to generate hydrogen radicals ·H, which combine with free chlorine hanging bonds on the surface of the first work function layer 21 to generate hydrogen chloride (HCl) gas, which escapes into the process space and can be removed by suction.

[0074] In some embodiments, reference Figure 5 As shown, the substrate 10 has a first area A1 and a second area A2, the active area 11 protrudes from the isolation structure 12 to form a first fin 111 in the first area A1, and a second fin 211 in the second area A2; the first work function layer 21 covers the surface of the first fin 111 and the second fin 211. In this embodiment, the method for manufacturing a high dielectric layer metal gate device further includes the following steps:

[0075] Step S104 : forming a second work function layer 22 on the first work function layer 21 .

[0076] Reference Figure 6 As shown, the second work function layer 22 may be deposited by atomic layer deposition process, and the second work function layer 22 is located on the first fin 111 and the second fin 211, and covers the first work function layer 21. The second work function layer 22 may include a single work function layer or multiple work function layers.

[0077] The second work function layer 22 has a dielectric constant greater than 3.9. The material of the second work function layer 22 is different from the material of the first work function layer 21. For example, the material of the second work function layer 22 may include titanium nitride (TiN), tantalum nitride (TaN), and titanium aluminum nitride (TiAlN). The second work function layer 22 is used to adjust the dielectric constant of the device gate dielectric layer to form devices with different threshold voltages on the same substrate 10.

[0078] Step S105 : etching and removing the second work function layer 22 on the first fin 111 .

[0079] Reference Fig.10 As shown, the second work function layer 22 on the first fin 111 can be removed by multiple processes such as illumination, exposure, and etching. A single layer of the first work function layer 21 is set on the first fin 111, and two layers of the first work function layer 21 and the second work function layer 22 are set on the second fin 211. By setting different numbers of work function layers on the first fin 111 and the second fin 211, the dielectric constants of the gate dielectric layers of the devices in the first area A1 and the devices in the second area A2 are different, and the threshold voltages of the devices in the first area A1 and the devices in the second area A2 are different.

[0080] Step S106 : the second gas is excited by the metastable particles to generate free radicals, and the second gas generates free radicals to treat the surface of the first work function layer 21 , thereby repairing the etching damage of the first work function layer 21 .

[0081] Reference Fig.10As shown, since the process of etching and removing the second work function layer 22 on the first fin 111 may damage the first work function layer 21, in this embodiment, after etching and removing the second work function layer 22 on the first fin 111, the metastable gas source is excited to obtain metastable particles, and the second gas is excited by the metastable particles to generate free radicals. The free radicals generated by the second gas contact the first work function layer 21 on the first fin 111 to induce atomic rearrangement of the first work function layer 21, so as to repair the etching damage of the first work function layer 21 on the first fin 111. In this way, the problem of the work function of the first work function layer 21 being reduced due to surface damage of the first work function layer 21 can be improved, which is conducive to improving the adjustment accuracy of the dielectric constant of the gate dielectric layer of the device.

[0082] In this embodiment, the metastable gas source is excited under the second process condition to obtain metastable particles, and the metastable particles excite the second gas to generate free radicals.

[0083] The second process conditions are: temperature 100°C-200°C; source power 100W-1000W; pressure 100mTorr-1000mTorr. The metastable gas source is a rare gas, such as helium (He) or neon Ne; the second gas may include at least one of nitrogen (N2) or hydrogen (H2); the processing time is 10s-100s.

[0084] In this embodiment, the second gas includes a mixture of N2 and H2, and the ratio of H2 to N2 is 1:4. That is, the second gas can be the same gas as the first gas. This is conducive to simplifying the production equipment line and reducing the production cost.

[0085] The metastable particles excite the second gas to generate hydrogen radicals · H and nitrogen radicals · N. The hydrogen radicals · H and nitrogen radicals · N contact the surface of the first work function layer 21, inducing the rearrangement of the material of the first work function layer 21. Taking the material of the first work function layer 21 including hafnium dioxide as an example, the hydrogen radicals · H and nitrogen radicals · N react with the hafnium dioxide on the surface of the first work function layer 21, prompting the migration of hafnium dioxide atoms to fill the surface defects. The surface of the repaired first work function layer 21 is flat and uniform hafnium dioxide, which can improve the problem of reduced dielectric constant of the first work function layer 21 caused by etching.

[0086] In some embodiments, step S103 excites the first gas by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer 21 to remove free dangling bonds on the surface of the first work function layer 21. Step S104 is performed before forming the second work function layer 22 on the first work function layer 21.

[0087] In this way, after the first work function layer 21 is formed, free radical treatment of the entire surface of the first work function layer 21 can remove more free dangling bonds, further improve the defect that the free dangling bonds combine with the material of the first work function layer 21 and cause the work function of the first work function layer 21 to decrease, which can not only improve the control accuracy of the dielectric constant of the gate dielectric layer of the device in the first area A1, but also improve the control accuracy of the dielectric constant of the gate dielectric layer of the device formed in the second area A2, and can improve the problem of the dielectric constant of the gate dielectric layer decreasing due to the material loss of the work function layer, thereby improving the problem of gate leakage current of the device.

[0088] In some embodiments, step S103 excites the first gas by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer 21 to remove free dangling bonds on the surface of the first work function layer 21, and is performed after etching away the second work function layer 22 on the first fin 111 in step S104.

[0089] In this embodiment, only the exposed first work function layer 21 of the first area A1 is treated with free radicals to remove the free dangling bonds on the surface of the first work function layer 21 of the first area A1. The step of removing the free dangling bonds with free radicals and the subsequent etching steps can be performed in the same chamber, which is beneficial to saving production line equipment and reducing production line costs, and can also reduce the number of transfers of the substrate 10 and reduce the loss caused by the transfer of the substrate 10.

[0090] In some embodiments, step S105: etching and removing the second work function layer 22 on the first fin 111, including steps S1051-S1054:

[0091] Step S1051 : forming a dielectric layer 30 , wherein the dielectric layer 30 covers the first work function layer 21 and the second work function layer 22 and fills between the first fins 111 , between the second fins 211 , and between the first fins 111 and the second fins 211 .

[0092] Reference Figure 6 As shown, the dielectric layer 30 can be deposited by chemical vapor deposition (CVD). After the dielectric layer 30 is deposited, the dielectric layer 30 is polished by a chemical mechanical polishing process to polish the top surface of the dielectric layer 30 into a plane. The top surface of the dielectric layer 30 after polishing is higher than the second work function layer 22 on the first fin 111 and the second fin 211, so as to provide a flat process surface for subsequent steps.

[0093] For example, the material of the dielectric layer 30 may include silicon oxide, silicon oxynitride or silicon oxycarbide.

[0094] In this embodiment, after the dielectric layer 30 is formed, a hard mask layer 40 is formed on the dielectric layer 30. The hard mask layer 40 may be deposited by chemical vapor deposition or atomic layer deposition.

[0095] The material of the hard mask layer 40 has a high etching ratio with the dielectric layer 30 . In this embodiment, the material of the dielectric layer 30 includes silicon oxide, and the material of the hard mask layer 40 includes silicon nitride.

[0096] Step S1052: etching and removing a portion of the dielectric layer 30 to expose the second work function layer 22 on the first fin 111;

[0097] Reference Figure 6 , Figure 7 As shown, a photoresist layer 50 is formed on the hard mask layer 40, and the pattern of the first area A1 is exposed on the photoresist layer 50. The hard mask layer 40 is etched according to the exposed photoresist layer 50. The photoresist layer 50 is removed by ashing, and then the dielectric layer 30 is etched using the hard mask layer 40 as a mask to remove the dielectric layer 30 located in the first area A1, exposing the second work function layer 22 on the first fin 111.

[0098] For example, the hard mask layer 40 and the dielectric layer 30 may be etched using a dry process.

[0099] Step S1053: etching and removing the second work function layer 22 on the first fin 111 to expose the first work function layer 21 on the first fin 111;

[0100] In this embodiment, refer to Fig. 9 As shown, the remaining hard mask layer 40 can be etched away first to expose the top surface of the dielectric layer 30, so as to facilitate the subsequent removal of the dielectric layer 30. Then, referring to Fig.10 As shown, the second work function layer 22 on the first fin 111 is then etched away.

[0101] For example, the hard mask layer 40 may be removed by cleaning with a diluted hydrofluoric acid (HF) solution.

[0102] For example, a mixture of ammonium hydroxide (NH 4 OH) and hydrogen peroxide (H 2 O 2 ) may be used to clean and remove the second work function layer 22 on the first fin 111 .

[0103] Step S1054 : removing the dielectric layer 30 on the second fin 211 .

[0104] In this embodiment, the dielectric layer 30 on the second fin 211 is removed by the following implementations:

[0105] First, the third gas is ionized to generate plasma, and a portion of the dielectric layer 30 is removed by plasma etching.

[0106] Then, the fourth gas is excited by the metastable particles to generate free radicals, and the remaining dielectric layer 30 is removed by etching using the free radicals generated by the fourth gas.

[0107] The third gas may include oxygen, and oxygen is first ionized by radio frequency to generate oxygen plasma, and the dielectric layer 30 is etched by oxygen plasma to accelerate the etching rate and quickly etch and remove most of the dielectric layer 30. Before the second work function layer 22 is exposed by etching, the use of plasma to etch the dielectric layer 30 is stopped. Instead, the fourth gas is excited by metastable particles to generate free radicals, and the remaining dielectric layer 30 is removed by free radical etching. The rate of etching the dielectric layer 30 is slower and softer, which can effectively reduce the etching damage of the first work function layer 21 of the first fin 111.

[0108] In this embodiment, the fourth gas includes a mixture of N2 and H2. For example, the ratio of H2 to N2 is 1:4. In this way, the first gas, the second gas, and the fourth gas are the same gas, which reduces the gas source required for manufacturing high dielectric layer metal gate devices, can streamline the production line, and can reduce production costs.

[0109] According to an exemplary embodiment, the method for manufacturing a high dielectric metal gate device of this embodiment is as follows: Figure 4 As shown, the following steps are included:

[0110] Step S201: Provide a substrate 10, the substrate 10 includes an active area 11 and an isolation structure 12, the isolation structure 12 and the active area 11 are arranged at intervals, the substrate 10 has a first area A1 and a second area A2, the active area 11 protrudes from the isolation structure 12 to form a first fin 111 in the first area A1, and a second fin 211 in the second area A2.

[0111] Reference Figure 5 As shown, the substrate 10 provided in this embodiment includes a first area A1 and a second area A2, and the first fin 111 of the first area A1 and the second fin 211 of the second area A2 are respectively used to form high dielectric metal gate devices with different turn-on voltages, and the dielectric constants of the gate dielectric layers of the high dielectric metal gate device of the first area A1 and the high dielectric metal gate device of the second area A2 are different.

[0112] Step S202 : forming a first work function layer 21 , wherein the first work function layer 21 covers surfaces of the first fin 111 and the second fin 211 .

[0113] In this embodiment, continue to refer to Figure 5 As shown, hafnium chloride (HfCl4) and gaseous water are used as precursors, and an atomic layer deposition process is used to deposit the first work function layer 21. The material of the first work function layer 21 includes hafnium dioxide.

[0114] During the deposition process, chlorine elements remain on the first work function layer 21, and free chlorine hanging bonds are formed on the surface of the first work function layer.

[0115] Step S203 : forming a second work function layer 22 on the first work function layer 21 .

[0116] In this embodiment, refer to Figure 6 As shown, the second work function layer 22 is formed by deposition using an atomic layer deposition process, and the material of the second work function layer 22 includes titanium nitride.

[0117] Step S204 : forming a dielectric layer 30 to cover the first work function layer 21 and the second work function layer 22 and fill between the first fins 111 , between the second fins 211 , and between the first fins 111 and the second fins 211 .

[0118] In this embodiment, continue to refer to Figure 6 As shown, the dielectric layer 30 is formed by chemical vapor deposition, and the material of the dielectric layer 30 includes silicon oxide.

[0119] Step S205 : etching and removing a portion of the dielectric layer 30 to expose the second work function layer 22 on the first fin 111 .

[0120] In this embodiment, continue to refer to Figure 6 As shown, a hard mask layer 40 is first formed on the dielectric layer 30 by chemical vapor deposition, and the material of the hard mask layer 40 includes silicon nitride. A photoresist layer 50 is formed on the hard mask layer 40, and a pattern of the first area A1 is exposed on the photoresist layer 50. Figure 7 As shown, the hard mask layer 40 is etched according to the exposed photoresist layer 50 . In this embodiment, a fluorine-containing gas is used to etch the hard mask layer 40 , such as nitrogen trifluoride (NF3).

[0121] Then, refer to Figure 8 As shown, the dielectric layer 30 is etched according to the hard mask layer 40 until the second work function layer 22 on the first fin 111 is exposed and then the etching is stopped.

[0122] For example, the dielectric layer 30 may be etched using at least one of methane (CH 4 ), nitrogen, hydrogen and oxygen under process conditions of 10° C.-60° C., source power of 100 W-1000 W, and pressure of 10 mTorr-100 mTorr.

[0123] Step S206 : etching and removing the second work function layer 22 on the first fin 111 to expose the first work function layer 21 on the first fin 111 .

[0124] In this embodiment, refer to Fig. 9As shown, a diluted hydrofluoric acid (HF) solution is first used to clean and remove the remaining hard mask layer 40 on the dielectric layer 30. Then, referring to Fig.10 As shown, a mixed solution of ammonium hydroxide (NH 4 OH) and hydrogen peroxide (H 2 O 2 ) is used to clean and remove the second work function layer 22 on the first fin 111 .

[0125] Step S207 : exciting the first gas by metastable particles to generate free radicals. The free radicals generated by the first gas contact the first work function layer 21 on the first fin 111 , and remove free dangling bonds on the surface of the first work function layer 21 .

[0126] In this embodiment, refer to Fig.10 As shown, under the process conditions of temperature 100°C-200°C; source power 100W-1000W; pressure 100mTorr-1000mTorr, helium is excited to generate metastable particles, and nitrogen and / or hydrogen are excited by the metastable particles to generate free radicals, and the free radicals are combined with the chlorine dangling bonds on the surface of the first work function layer 21 to generate gas products, and the free dangling bonds on the surface of the first work function layer 21 are removed. In this embodiment, the free radical treatment time of the first work function layer 21 is 10s-30s.

[0127] Step S208 : removing the dielectric layer 30 on the second fin 211 .

[0128] In this embodiment, refer to Fig.10 , Fig.11 As shown, oxygen is ionized with a radio frequency power of 500 W to generate oxygen plasma, and most of the remaining dielectric layer 30 is removed by oxygen plasma etching.

[0129] Then, under the process condition of 100mTorr-2000mTorr, helium is excited with a source power of 1000W to produce metastable particles, nitrogen and / or hydrogen are excited by the metastable particles to produce free radicals, and the remaining dielectric layer 30 is removed by free radical etching to reduce the damage of the etching dielectric layer 30 to the first work function and reduce the material loss of the first work function layer 21, which is beneficial to maintaining the accuracy of the dielectric constant of the first work function layer 21.

[0130] Step S209 : the second gas is excited by the metastable particles to generate free radicals, and the second gas generates free radicals to treat the surface of the first work function layer 21 , thereby repairing the etching damage of the first work function layer 21 .

[0131] In this embodiment, refer to Fig.11As shown, under the process conditions of 100°C and 100mTorr-1000mTorr, helium is excited with a source power of 100W-1000W to produce metastable particles, and nitrogen and / or hydrogen are excited by the metastable particles to produce free radicals. The free radicals induce the material of the first work function layer 21 of the first area A1 to rearrange, and the migration of hafnium dioxide atoms is promoted to fill the surface defects. The surface of the repaired first work function layer 21 is flat and uniform hafnium dioxide, which can improve the problem of reduced dielectric constant of the first work function layer 21 caused by etching.

[0132] In some embodiments, after step S209, the following steps are further performed:

[0133] Step S210 : forming a gate conductive layer 23 , wherein the gate conductive layer 23 covers the first work function layer 21 in the first area A1 and the second work function layer 22 in the second area A2 .

[0134] Reference Fig.12 As shown, the gate conductive layer 23 may be formed by atomic layer deposition, chemical vapor deposition or physical vapor deposition (PVD).

[0135] For example, the gate conductive layer 23 may include a conductive metal, for example, the gate conductive layer 23 may include tungsten.

[0136] Step S211 : patterning the gate conductive layer 23 , the second work function layer 22 and the first work function layer 21 , forming a first device 60 in the first area A1 , and forming a second device 70 in the second area A2 .

[0137] In this embodiment, after forming an interlayer dielectric layer (not shown in the figure), a mask layer may be formed on the interlayer dielectric layer. Fig.13 As shown, the gate conductive layer 23, the second work function layer 22 and the first work function layer 21 are etched according to the mask layer, so that the gate conductive layer 23 of the first area A1 and the gate conductive layer 23 of the second area A2 are disconnected, and the first work function layer 21 and the gate conductive layer 23 of the first area A1 form a first device 60, and the gate dielectric layer of the first device 60 includes a single layer of the first work function layer 21. The first work function layer 21, the second work function layer 22 and the gate conductive layer 23 of the second area A2 form a second device 70, and the gate dielectric layer of the second device 70 includes a stack of the first work function layer 21 and the second work function layer 22. The gate dielectric layer of the first device 60 and the gate dielectric layer of the second device 70 have different dielectric constants, and the threshold voltages of the first device 60 and the second device 70 are different.

[0138] The manufacturing method of the high dielectric layer metal gate device of this embodiment divides the substrate 10 into a first area A1 and a second area A2, forms a first work function layer 21 on the first fin 111 of the first area A1 as the gate dielectric layer of the first area A1 device, and forms a stack of the first work function layer 21 and the second work function layer 22 on the second fin 211 of the second area A2 as the gate dielectric layer of the second area A2 device, so as to realize the integration of high dielectric layer metal gate devices with different threshold voltages on the same substrate 10, wherein the first area A1 forms a high threshold voltage device and the second area A2 forms a low threshold voltage device, thereby providing support for the design and manufacture of complex semiconductor circuits, and being able to improve device performance and reduce power consumption.

[0139] The method for manufacturing a high dielectric metal gate device of the present embodiment uses free radicals generated by metastable particle excitation to remove residual chlorine dangling bonds on the surface of the first work function layer 21 after etching away the second work function layer 22 on the first fin 111, which can reduce the influence of the chlorine dangling bonds on the electrical performance of the device, and is beneficial to improving the dielectric constant of the gate dielectric layer of the first region A1 device and improving the stability of the device; after etching and removing, metastable particle excitation is used to repair surface damage of the first work function layer 21, which is beneficial to reducing material loss of the first work function layer 21, and is suitable for forming a thinner first work function layer 21, and is suitable for manufacturing devices with smaller size nodes, improving the size nodes and reducing the manufacturing requirements for the high dielectric gate dielectric layer.

[0140] In some embodiments, after etching away the second work function layer 22 on the first fin 111, the substrate 10 is transferred to a process chamber, and the steps of removing free dangling bonds on the surface of the first work function layer 21, removing the dielectric layer 30 on the second fin 211, and repairing the etching damage on the surface of the first work function layer 21 are sequentially performed in the process chamber.

[0141] In this embodiment, after etching away the second work function layer 22 on the first fin 111 in step S206, the structure is transferred to a process chamber. First, the process chamber is adjusted to a metastable excited radical mode, free radicals are generated by metastable excitation, and dangling bonds on the surface of the first work function layer 21 are removed by free radicals; then, the process chamber is adjusted to an inductively coupled excited plasma mode, and the dielectric layer 30 is etched away by plasma generated by inductively coupled excited etching gas. After etching away most of the dielectric layer 30, the process chamber is adjusted to a metastable excited radical mode to etch away the remaining dielectric layer 30, and the etching on the surface of the first work function layer 21 is repaired by free radicals.

[0142] The manufacturing method of this embodiment optimizes the process flow so that multiple steps can be performed in the same chamber, thereby reducing the transfer process of the substrate 10 and reducing the yield drop caused by multiple transfers. At the same time, it reduces the number of equipment on the production line and reduces the production line cost.

[0143] The manufacturing method of the high dielectric layer metal gate device of the present application optimizes the process flow and uses free radicals generated by metastable excitation to treat the first work function layer 21. It can reduce the dangling bonds on the surface of the first work function layer 21, repair the surface damage of the first work function layer 21, improve the surface uniformity of the first work function layer 21, reduce the loss of work function material of the first work function layer 21, and improve the control accuracy of the thickness and work function of the first work function layer 21, which is beneficial to improving the gate control ability of the device, is suitable for forming a thinner high dielectric gate dielectric layer, and is suitable for the manufacture of smaller size devices.

[0144] The manufacturing method of the high dielectric layer metal gate device of the present application uses free radicals generated by metastable excitation to treat the first work function layer 21. The energy of the free radicals generated by metastable excitation is relatively low, and the damage to the first work function layer 21 is very small, which is beneficial to improving the yield and stability of the device; the temperature of the processing step of the manufacturing method of the high dielectric layer metal gate device of the present application is relatively low, which can reduce the thermal damage to the device and further improve the yield and stability of the device; at the same time, the manufacturing method of the high dielectric layer metal gate device of the present application has good compatibility with existing production lines and processes, and does not require new production lines or production equipment, and can be implemented on existing production lines, with low process costs.

[0145] According to an exemplary embodiment, the present disclosure further provides a high dielectric layer metal gate device, which is manufactured by using the manufacturing method of the high dielectric layer metal gate device of the above embodiment.

[0146] Among them, the high dielectric metal gate device of this embodiment can be a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash EPROM, a ferroelectric random access memory (FeRAM), a magnetic random access memory (MRAM) or other types of memory.

[0147] According to an exemplary embodiment, the present disclosure further provides an electronic device, including the high dielectric layer metal gate device of the above embodiment or the high dielectric layer metal gate device manufactured by the manufacturing method of the high dielectric layer metal gate device of the above embodiment. The electronic device can be a storage device, a mobile phone, a computer, a tablet computer, a television, an artificial intelligence device, etc.

[0148] The electronic device may be, for example but not limited to, suitable types of electronic products such as consumer electronic products, home electronic products, vehicle-mounted electronic products, and financial terminal products. Consumer electronic products may include mobile phones, tablet computers, laptop computers, desktop monitors, all-in-one computers, etc. Home electronic products may include smart door locks, televisions, refrigerators, wearable devices, etc. Vehicle-mounted electronic products may include vehicle-mounted navigation systems and vehicle-mounted DVDs, etc. Financial terminal products may include ATM machines and self-service terminals, etc.

[0149] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0150] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for manufacturing a high dielectric metal gate device, characterized in that: include: Providing a substrate, the substrate comprising an active region and an isolation structure, the isolation structure and the active region are arranged in a spaced relationship; the substrate having a first region and a second region, the active region protruding from the isolation structure to form a first fin in the first region, and a second fin in the second region; forming a first work function layer, wherein the first work function layer covers surfaces of the first fin and the second fin; Exciting a first gas by metastable particles to generate free radicals, wherein the free radicals generated by the first gas contact the surface of the first work function layer to remove free dangling bonds on the surface of the first work function layer; the first gas includes a mixture of nitrogen and hydrogen; forming a second work function layer on the first work function layer; Etching and removing the second work function layer on the first fin; The surface of the first work function layer is treated by free radicals generated by exciting a second gas with metastable particles; the second gas includes a mixture of nitrogen and hydrogen.

2. The method for manufacturing a high dielectric metal gate device according to claim 1, characterized in that: Before forming the second work function layer on the first work function layer, the first gas is excited by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer to remove free dangling bonds on the surface of the first work function layer.

3. The method for manufacturing a high dielectric metal gate device according to claim 1, characterized in that: After the second work function layer on the first fin is removed by etching, the first gas is excited by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer to remove free dangling bonds on the surface of the first work function layer.

4. The method for manufacturing a high dielectric metal gate device according to claim 3, characterized in that: Etching and removing the second work function layer on the first fin, comprising: forming a dielectric layer, wherein the dielectric layer covers the first work function layer and the second work function layer and is filled between the first fins, between the second fins, and between the first fins and the second fins; Etching and removing a portion of the dielectric layer to expose the second work function layer on the first fin; Etching and removing the second work function layer on the first fin to expose the first work function layer on the first fin; The dielectric layer on the second fin is removed.

5. The method for manufacturing a high dielectric metal gate device according to claim 4, characterized in that: Removing the dielectric layer on the second fin includes: Ionizing a third gas to generate plasma, and removing a portion of the dielectric layer by plasma etching; the third gas includes oxygen; The fourth gas is excited by metastable particles to generate free radicals, and the remaining dielectric layer is removed by etching using the free radicals generated by the fourth gas.

6. The method for manufacturing a high dielectric metal gate device according to claim 5, characterized in that: After etching away the second work function layer on the first fin, the substrate is transferred to a process chamber, and the steps of removing free dangling bonds on the surface of the first work function layer, removing the dielectric layer on the second fin, and treating the surface of the first work function layer with free radicals generated by exciting the second gas with metastable particles are sequentially performed in the process chamber.

7. The method for manufacturing a high dielectric metal gate device according to claim 5, characterized in that: The first gas, the second gas, and the fourth gas are the same gas.

8. The method for manufacturing a high dielectric metal gate device according to any one of claims 1 to 7, characterized in that: The metastable particles are obtained by ionizing helium, and the metastable particles are metastable helium.

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